pm-board.c 3.4 KB

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  1. /*
  2. * Board-level suspend/resume support.
  3. *
  4. * Copyright (C) 2014-2015 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/gpio.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/of.h>
  17. #include <linux/of_address.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/slab.h>
  20. #include "common.h"
  21. #define ARMADA_PIC_NR_GPIOS 3
  22. static void __iomem *gpio_ctrl;
  23. static int pic_gpios[ARMADA_PIC_NR_GPIOS];
  24. static int pic_raw_gpios[ARMADA_PIC_NR_GPIOS];
  25. static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd)
  26. {
  27. u32 reg, ackcmd;
  28. int i;
  29. /* Put 001 as value on the GPIOs */
  30. reg = readl(gpio_ctrl);
  31. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
  32. reg &= ~BIT(pic_raw_gpios[i]);
  33. reg |= BIT(pic_raw_gpios[0]);
  34. writel(reg, gpio_ctrl);
  35. /* Prepare writing 111 to the GPIOs */
  36. ackcmd = readl(gpio_ctrl);
  37. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
  38. ackcmd |= BIT(pic_raw_gpios[i]);
  39. srcmd = cpu_to_le32(srcmd);
  40. ackcmd = cpu_to_le32(ackcmd);
  41. /*
  42. * Wait a while, the PIC needs quite a bit of time between the
  43. * two GPIO commands.
  44. */
  45. mdelay(3000);
  46. asm volatile (
  47. /* Align to a cache line */
  48. ".balign 32\n\t"
  49. /* Enter self refresh */
  50. "str %[srcmd], [%[sdram_reg]]\n\t"
  51. /*
  52. * Wait 100 cycles for DDR to enter self refresh, by
  53. * doing 50 times two instructions.
  54. */
  55. "mov r1, #50\n\t"
  56. "1: subs r1, r1, #1\n\t"
  57. "bne 1b\n\t"
  58. /* Issue the command ACK */
  59. "str %[ackcmd], [%[gpio_ctrl]]\n\t"
  60. /* Trap the processor */
  61. "b .\n\t"
  62. : : [srcmd] "r" (srcmd), [sdram_reg] "r" (sdram_reg),
  63. [ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
  64. }
  65. static int __init mvebu_armada_pm_init(void)
  66. {
  67. struct device_node *np;
  68. struct device_node *gpio_ctrl_np;
  69. int ret = 0, i;
  70. if (!of_machine_is_compatible("marvell,axp-gp"))
  71. return -ENODEV;
  72. np = of_find_node_by_name(NULL, "pm_pic");
  73. if (!np)
  74. return -ENODEV;
  75. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) {
  76. char *name;
  77. struct of_phandle_args args;
  78. pic_gpios[i] = of_get_named_gpio(np, "ctrl-gpios", i);
  79. if (pic_gpios[i] < 0) {
  80. ret = -ENODEV;
  81. goto out;
  82. }
  83. name = kasprintf(GFP_KERNEL, "pic-pin%d", i);
  84. if (!name) {
  85. ret = -ENOMEM;
  86. goto out;
  87. }
  88. ret = gpio_request(pic_gpios[i], name);
  89. if (ret < 0) {
  90. kfree(name);
  91. goto out;
  92. }
  93. ret = gpio_direction_output(pic_gpios[i], 0);
  94. if (ret < 0) {
  95. gpio_free(pic_gpios[i]);
  96. kfree(name);
  97. goto out;
  98. }
  99. ret = of_parse_phandle_with_fixed_args(np, "ctrl-gpios", 2,
  100. i, &args);
  101. if (ret < 0) {
  102. gpio_free(pic_gpios[i]);
  103. kfree(name);
  104. goto out;
  105. }
  106. gpio_ctrl_np = args.np;
  107. pic_raw_gpios[i] = args.args[0];
  108. }
  109. gpio_ctrl = of_iomap(gpio_ctrl_np, 0);
  110. if (!gpio_ctrl)
  111. return -ENOMEM;
  112. mvebu_pm_suspend_init(mvebu_armada_pm_enter);
  113. out:
  114. of_node_put(np);
  115. return ret;
  116. }
  117. /*
  118. * Registering the mvebu_board_pm_enter callback must be done before
  119. * the platform_suspend_ops will be registered. In the same time we
  120. * also need to have the gpio devices registered. That's why we use a
  121. * device_initcall_sync which is called after all the device_initcall
  122. * (used by the gpio device) but before the late_initcall (used to
  123. * register the platform_suspend_ops)
  124. */
  125. device_initcall_sync(mvebu_armada_pm_init);