vfpmacros.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * arch/arm/include/asm/vfpmacros.h
  4. *
  5. * Assembler-only file containing VFP macros and register definitions.
  6. */
  7. #include <asm/hwcap.h>
  8. #include <asm/vfp.h>
  9. @ Macros to allow building with old toolkits (with no VFP support)
  10. .macro VFPFMRX, rd, sysreg, cond
  11. MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
  12. .endm
  13. .macro VFPFMXR, sysreg, rd, cond
  14. MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
  15. .endm
  16. @ read all the working registers back into the VFP
  17. .macro VFPFLDMIA, base, tmp
  18. #if __LINUX_ARM_ARCH__ < 6
  19. LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
  20. #else
  21. LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
  22. #endif
  23. #ifdef CONFIG_VFPv3
  24. #if __LINUX_ARM_ARCH__ <= 6
  25. ldr \tmp, =elf_hwcap @ may not have MVFR regs
  26. ldr \tmp, [\tmp, #0]
  27. tst \tmp, #HWCAP_VFPD32
  28. ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
  29. addeq \base, \base, #32*4 @ step over unused register space
  30. #else
  31. VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
  32. and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
  33. cmp \tmp, #2 @ 32 x 64bit registers?
  34. ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
  35. addne \base, \base, #32*4 @ step over unused register space
  36. #endif
  37. #endif
  38. .endm
  39. @ write all the working registers out of the VFP
  40. .macro VFPFSTMIA, base, tmp
  41. #if __LINUX_ARM_ARCH__ < 6
  42. STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
  43. #else
  44. STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
  45. #endif
  46. #ifdef CONFIG_VFPv3
  47. #if __LINUX_ARM_ARCH__ <= 6
  48. ldr \tmp, =elf_hwcap @ may not have MVFR regs
  49. ldr \tmp, [\tmp, #0]
  50. tst \tmp, #HWCAP_VFPD32
  51. stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
  52. addeq \base, \base, #32*4 @ step over unused register space
  53. #else
  54. VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
  55. and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
  56. cmp \tmp, #2 @ 32 x 64bit registers?
  57. stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
  58. addne \base, \base, #32*4 @ step over unused register space
  59. #endif
  60. #endif
  61. .endm