nfit_test.h 6.2 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #ifndef __NFIT_TEST_H__
  14. #define __NFIT_TEST_H__
  15. #include <linux/acpi.h>
  16. #include <linux/list.h>
  17. #include <linux/uuid.h>
  18. #include <linux/ioport.h>
  19. #include <linux/spinlock_types.h>
  20. struct nfit_test_request {
  21. struct list_head list;
  22. struct resource res;
  23. };
  24. struct nfit_test_resource {
  25. struct list_head requests;
  26. struct list_head list;
  27. struct resource res;
  28. struct device *dev;
  29. spinlock_t lock;
  30. int req_count;
  31. void *buf;
  32. };
  33. #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA 2
  34. #define NFIT_ARS_INJECT_INVALID 2
  35. enum err_inj_options {
  36. ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
  37. };
  38. /* nfit commands */
  39. enum nfit_cmd_num {
  40. NFIT_CMD_TRANSLATE_SPA = 5,
  41. NFIT_CMD_ARS_INJECT_SET = 7,
  42. NFIT_CMD_ARS_INJECT_CLEAR = 8,
  43. NFIT_CMD_ARS_INJECT_GET = 9,
  44. };
  45. struct nd_cmd_translate_spa {
  46. __u64 spa;
  47. __u32 status;
  48. __u8 flags;
  49. __u8 _reserved[3];
  50. __u64 translate_length;
  51. __u32 num_nvdimms;
  52. struct nd_nvdimm_device {
  53. __u32 nfit_device_handle;
  54. __u32 _reserved;
  55. __u64 dpa;
  56. } __packed devices[0];
  57. } __packed;
  58. struct nd_cmd_ars_err_inj {
  59. __u64 err_inj_spa_range_base;
  60. __u64 err_inj_spa_range_length;
  61. __u8 err_inj_options;
  62. __u32 status;
  63. } __packed;
  64. struct nd_cmd_ars_err_inj_clr {
  65. __u64 err_inj_clr_spa_range_base;
  66. __u64 err_inj_clr_spa_range_length;
  67. __u32 status;
  68. } __packed;
  69. struct nd_cmd_ars_err_inj_stat {
  70. __u32 status;
  71. __u32 inj_err_rec_count;
  72. struct nd_error_stat_query_record {
  73. __u64 err_inj_stat_spa_range_base;
  74. __u64 err_inj_stat_spa_range_length;
  75. } __packed record[0];
  76. } __packed;
  77. #define ND_INTEL_SMART 1
  78. #define ND_INTEL_SMART_THRESHOLD 2
  79. #define ND_INTEL_ENABLE_LSS_STATUS 10
  80. #define ND_INTEL_FW_GET_INFO 12
  81. #define ND_INTEL_FW_START_UPDATE 13
  82. #define ND_INTEL_FW_SEND_DATA 14
  83. #define ND_INTEL_FW_FINISH_UPDATE 15
  84. #define ND_INTEL_FW_FINISH_QUERY 16
  85. #define ND_INTEL_SMART_SET_THRESHOLD 17
  86. #define ND_INTEL_SMART_INJECT 18
  87. #define ND_INTEL_SMART_HEALTH_VALID (1 << 0)
  88. #define ND_INTEL_SMART_SPARES_VALID (1 << 1)
  89. #define ND_INTEL_SMART_USED_VALID (1 << 2)
  90. #define ND_INTEL_SMART_MTEMP_VALID (1 << 3)
  91. #define ND_INTEL_SMART_CTEMP_VALID (1 << 4)
  92. #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID (1 << 5)
  93. #define ND_INTEL_SMART_AIT_STATUS_VALID (1 << 6)
  94. #define ND_INTEL_SMART_PTEMP_VALID (1 << 7)
  95. #define ND_INTEL_SMART_ALARM_VALID (1 << 9)
  96. #define ND_INTEL_SMART_SHUTDOWN_VALID (1 << 10)
  97. #define ND_INTEL_SMART_VENDOR_VALID (1 << 11)
  98. #define ND_INTEL_SMART_SPARE_TRIP (1 << 0)
  99. #define ND_INTEL_SMART_TEMP_TRIP (1 << 1)
  100. #define ND_INTEL_SMART_CTEMP_TRIP (1 << 2)
  101. #define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)
  102. #define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)
  103. #define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)
  104. #define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)
  105. #define ND_INTEL_SMART_INJECT_SPARE (1 << 1)
  106. #define ND_INTEL_SMART_INJECT_FATAL (1 << 2)
  107. #define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)
  108. struct nd_intel_smart {
  109. __u32 status;
  110. union {
  111. struct {
  112. __u32 flags;
  113. __u8 reserved0[4];
  114. __u8 health;
  115. __u8 spares;
  116. __u8 life_used;
  117. __u8 alarm_flags;
  118. __u16 media_temperature;
  119. __u16 ctrl_temperature;
  120. __u32 shutdown_count;
  121. __u8 ait_status;
  122. __u16 pmic_temperature;
  123. __u8 reserved1[8];
  124. __u8 shutdown_state;
  125. __u32 vendor_size;
  126. __u8 vendor_data[92];
  127. } __packed;
  128. __u8 data[128];
  129. };
  130. } __packed;
  131. struct nd_intel_smart_threshold {
  132. __u32 status;
  133. union {
  134. struct {
  135. __u16 alarm_control;
  136. __u8 spares;
  137. __u16 media_temperature;
  138. __u16 ctrl_temperature;
  139. __u8 reserved[1];
  140. } __packed;
  141. __u8 data[8];
  142. };
  143. } __packed;
  144. struct nd_intel_smart_set_threshold {
  145. __u16 alarm_control;
  146. __u8 spares;
  147. __u16 media_temperature;
  148. __u16 ctrl_temperature;
  149. __u32 status;
  150. } __packed;
  151. struct nd_intel_smart_inject {
  152. __u64 flags;
  153. __u8 mtemp_enable;
  154. __u16 media_temperature;
  155. __u8 spare_enable;
  156. __u8 spares;
  157. __u8 fatal_enable;
  158. __u8 unsafe_shutdown_enable;
  159. __u32 status;
  160. } __packed;
  161. #define INTEL_FW_STORAGE_SIZE 0x100000
  162. #define INTEL_FW_MAX_SEND_LEN 0xFFEC
  163. #define INTEL_FW_QUERY_INTERVAL 250000
  164. #define INTEL_FW_QUERY_MAX_TIME 3000000
  165. #define INTEL_FW_FIS_VERSION 0x0105
  166. #define INTEL_FW_FAKE_VERSION 0xffffffffabcd
  167. enum intel_fw_update_state {
  168. FW_STATE_NEW = 0,
  169. FW_STATE_IN_PROGRESS,
  170. FW_STATE_VERIFY,
  171. FW_STATE_UPDATED,
  172. };
  173. struct nd_intel_fw_info {
  174. __u32 status;
  175. __u32 storage_size;
  176. __u32 max_send_len;
  177. __u32 query_interval;
  178. __u32 max_query_time;
  179. __u8 update_cap;
  180. __u8 reserved[3];
  181. __u32 fis_version;
  182. __u64 run_version;
  183. __u64 updated_version;
  184. } __packed;
  185. struct nd_intel_fw_start {
  186. __u32 status;
  187. __u32 context;
  188. } __packed;
  189. /* this one has the output first because the variable input data size */
  190. struct nd_intel_fw_send_data {
  191. __u32 context;
  192. __u32 offset;
  193. __u32 length;
  194. __u8 data[0];
  195. /* this field is not declared due ot variable data from input */
  196. /* __u32 status; */
  197. } __packed;
  198. struct nd_intel_fw_finish_update {
  199. __u8 ctrl_flags;
  200. __u8 reserved[3];
  201. __u32 context;
  202. __u32 status;
  203. } __packed;
  204. struct nd_intel_fw_finish_query {
  205. __u32 context;
  206. __u32 status;
  207. __u64 updated_fw_rev;
  208. } __packed;
  209. struct nd_intel_lss {
  210. __u8 enable;
  211. __u32 status;
  212. } __packed;
  213. typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
  214. typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
  215. const guid_t *guid, u64 rev, u64 func,
  216. union acpi_object *argv4);
  217. void __iomem *__wrap_ioremap_nocache(resource_size_t offset,
  218. unsigned long size);
  219. void __wrap_iounmap(volatile void __iomem *addr);
  220. void nfit_test_setup(nfit_test_lookup_fn lookup,
  221. nfit_test_evaluate_dsm_fn evaluate);
  222. void nfit_test_teardown(void);
  223. struct nfit_test_resource *get_nfit_res(resource_size_t resource);
  224. #endif