sb16_main.c 26 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Routines for control of 16-bit SoundBlaster cards and clones
  4. * Note: This is very ugly hardware which uses one 8-bit DMA channel and
  5. * second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
  6. * transfer 16-bit samples and 16-bit DMA channels can't transfer
  7. * 8-bit samples. This make full duplex more complicated than
  8. * can be... People, don't buy these soundcards for full 16-bit
  9. * duplex!!!
  10. * Note: 16-bit wide is assigned to first direction which made request.
  11. * With full duplex - playback is preferred with abstract layer.
  12. *
  13. * Note: Some chip revisions have hardware bug. Changing capture
  14. * channel from full-duplex 8bit DMA to 16bit DMA will block
  15. * 16bit DMA transfers from DSP chip (capture) until 8bit transfer
  16. * to DSP chip (playback) starts. This bug can be avoided with
  17. * "16bit DMA Allocation" setting set to Playback or Capture.
  18. *
  19. *
  20. * This program is free software; you can redistribute it and/or modify
  21. * it under the terms of the GNU General Public License as published by
  22. * the Free Software Foundation; either version 2 of the License, or
  23. * (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  33. *
  34. */
  35. #include <linux/io.h>
  36. #include <asm/dma.h>
  37. #include <linux/init.h>
  38. #include <linux/time.h>
  39. #include <linux/module.h>
  40. #include <sound/core.h>
  41. #include <sound/sb.h>
  42. #include <sound/sb16_csp.h>
  43. #include <sound/mpu401.h>
  44. #include <sound/control.h>
  45. #include <sound/info.h>
  46. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  47. MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
  48. MODULE_LICENSE("GPL");
  49. #define runtime_format_bits(runtime) \
  50. ((unsigned int)pcm_format_to_bits((runtime)->format))
  51. #ifdef CONFIG_SND_SB16_CSP
  52. static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  53. {
  54. if (chip->hardware == SB_HW_16CSP) {
  55. struct snd_sb_csp *csp = chip->csp;
  56. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  57. /* manually loaded codec */
  58. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
  59. (runtime_format_bits(runtime) == csp->acc_format)) {
  60. /* Supported runtime PCM format for playback */
  61. if (csp->ops.csp_use(csp) == 0) {
  62. /* If CSP was successfully acquired */
  63. goto __start_CSP;
  64. }
  65. } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
  66. /* QSound decoder is loaded and enabled */
  67. if (runtime_format_bits(runtime) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  68. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
  69. /* Only for simple PCM formats */
  70. if (csp->ops.csp_use(csp) == 0) {
  71. /* If CSP was successfully acquired */
  72. goto __start_CSP;
  73. }
  74. }
  75. }
  76. } else if (csp->ops.csp_use(csp) == 0) {
  77. /* Acquire CSP and try to autoload hardware codec */
  78. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  79. /* Unsupported format, release CSP */
  80. csp->ops.csp_unuse(csp);
  81. } else {
  82. __start_CSP:
  83. /* Try to start CSP */
  84. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
  85. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  86. (runtime->channels > 1) ?
  87. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  88. /* Failed, release CSP */
  89. csp->ops.csp_unuse(csp);
  90. } else {
  91. /* Success, CSP acquired and running */
  92. chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
  93. }
  94. }
  95. }
  96. }
  97. }
  98. static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  99. {
  100. if (chip->hardware == SB_HW_16CSP) {
  101. struct snd_sb_csp *csp = chip->csp;
  102. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  103. /* manually loaded codec */
  104. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
  105. (runtime_format_bits(runtime) == csp->acc_format)) {
  106. /* Supported runtime PCM format for capture */
  107. if (csp->ops.csp_use(csp) == 0) {
  108. /* If CSP was successfully acquired */
  109. goto __start_CSP;
  110. }
  111. }
  112. } else if (csp->ops.csp_use(csp) == 0) {
  113. /* Acquire CSP and try to autoload hardware codec */
  114. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
  115. /* Unsupported format, release CSP */
  116. csp->ops.csp_unuse(csp);
  117. } else {
  118. __start_CSP:
  119. /* Try to start CSP */
  120. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
  121. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  122. (runtime->channels > 1) ?
  123. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  124. /* Failed, release CSP */
  125. csp->ops.csp_unuse(csp);
  126. } else {
  127. /* Success, CSP acquired and running */
  128. chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
  129. }
  130. }
  131. }
  132. }
  133. }
  134. static void snd_sb16_csp_update(struct snd_sb *chip)
  135. {
  136. if (chip->hardware == SB_HW_16CSP) {
  137. struct snd_sb_csp *csp = chip->csp;
  138. if (csp->qpos_changed) {
  139. spin_lock(&chip->reg_lock);
  140. csp->ops.csp_qsound_transfer (csp);
  141. spin_unlock(&chip->reg_lock);
  142. }
  143. }
  144. }
  145. static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  146. {
  147. /* CSP decoders (QSound excluded) support only 16bit transfers */
  148. if (chip->hardware == SB_HW_16CSP) {
  149. struct snd_sb_csp *csp = chip->csp;
  150. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  151. /* manually loaded codec */
  152. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
  153. runtime->hw.formats |= csp->acc_format;
  154. }
  155. } else {
  156. /* autoloaded codecs */
  157. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  158. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  159. }
  160. }
  161. }
  162. static void snd_sb16_csp_playback_close(struct snd_sb *chip)
  163. {
  164. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  165. struct snd_sb_csp *csp = chip->csp;
  166. if (csp->ops.csp_stop(csp) == 0) {
  167. csp->ops.csp_unuse(csp);
  168. chip->open = 0;
  169. }
  170. }
  171. }
  172. static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  173. {
  174. /* CSP coders support only 16bit transfers */
  175. if (chip->hardware == SB_HW_16CSP) {
  176. struct snd_sb_csp *csp = chip->csp;
  177. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  178. /* manually loaded codec */
  179. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
  180. runtime->hw.formats |= csp->acc_format;
  181. }
  182. } else {
  183. /* autoloaded codecs */
  184. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  185. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  186. }
  187. }
  188. }
  189. static void snd_sb16_csp_capture_close(struct snd_sb *chip)
  190. {
  191. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
  192. struct snd_sb_csp *csp = chip->csp;
  193. if (csp->ops.csp_stop(csp) == 0) {
  194. csp->ops.csp_unuse(csp);
  195. chip->open = 0;
  196. }
  197. }
  198. }
  199. #else
  200. #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/
  201. #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/
  202. #define snd_sb16_csp_update(chip) /*nop*/
  203. #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/
  204. #define snd_sb16_csp_playback_close(chip) /*nop*/
  205. #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/
  206. #define snd_sb16_csp_capture_close(chip) /*nop*/
  207. #endif
  208. static void snd_sb16_setup_rate(struct snd_sb *chip,
  209. unsigned short rate,
  210. int channel)
  211. {
  212. unsigned long flags;
  213. spin_lock_irqsave(&chip->reg_lock, flags);
  214. if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
  215. snd_sb_ack_16bit(chip);
  216. else
  217. snd_sb_ack_8bit(chip);
  218. if (!(chip->mode & SB_RATE_LOCK)) {
  219. chip->locked_rate = rate;
  220. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
  221. snd_sbdsp_command(chip, rate >> 8);
  222. snd_sbdsp_command(chip, rate & 0xff);
  223. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
  224. snd_sbdsp_command(chip, rate >> 8);
  225. snd_sbdsp_command(chip, rate & 0xff);
  226. }
  227. spin_unlock_irqrestore(&chip->reg_lock, flags);
  228. }
  229. static int snd_sb16_hw_params(struct snd_pcm_substream *substream,
  230. struct snd_pcm_hw_params *hw_params)
  231. {
  232. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  233. }
  234. static int snd_sb16_hw_free(struct snd_pcm_substream *substream)
  235. {
  236. snd_pcm_lib_free_pages(substream);
  237. return 0;
  238. }
  239. static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
  240. {
  241. unsigned long flags;
  242. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  243. struct snd_pcm_runtime *runtime = substream->runtime;
  244. unsigned char format;
  245. unsigned int size, count, dma;
  246. snd_sb16_csp_playback_prepare(chip, runtime);
  247. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  248. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  249. } else {
  250. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  251. }
  252. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
  253. size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
  254. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  255. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  256. count = snd_pcm_lib_period_bytes(substream);
  257. spin_lock_irqsave(&chip->reg_lock, flags);
  258. if (chip->mode & SB_MODE_PLAYBACK_16) {
  259. count >>= 1;
  260. count--;
  261. snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
  262. snd_sbdsp_command(chip, format);
  263. snd_sbdsp_command(chip, count & 0xff);
  264. snd_sbdsp_command(chip, count >> 8);
  265. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  266. } else {
  267. count--;
  268. snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
  269. snd_sbdsp_command(chip, format);
  270. snd_sbdsp_command(chip, count & 0xff);
  271. snd_sbdsp_command(chip, count >> 8);
  272. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  273. }
  274. spin_unlock_irqrestore(&chip->reg_lock, flags);
  275. return 0;
  276. }
  277. static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
  278. int cmd)
  279. {
  280. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  281. int result = 0;
  282. spin_lock(&chip->reg_lock);
  283. switch (cmd) {
  284. case SNDRV_PCM_TRIGGER_START:
  285. case SNDRV_PCM_TRIGGER_RESUME:
  286. chip->mode |= SB_RATE_LOCK_PLAYBACK;
  287. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  288. break;
  289. case SNDRV_PCM_TRIGGER_STOP:
  290. case SNDRV_PCM_TRIGGER_SUSPEND:
  291. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  292. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  293. if (chip->mode & SB_RATE_LOCK_CAPTURE)
  294. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  295. chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
  296. break;
  297. default:
  298. result = -EINVAL;
  299. }
  300. spin_unlock(&chip->reg_lock);
  301. return result;
  302. }
  303. static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
  304. {
  305. unsigned long flags;
  306. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  307. struct snd_pcm_runtime *runtime = substream->runtime;
  308. unsigned char format;
  309. unsigned int size, count, dma;
  310. snd_sb16_csp_capture_prepare(chip, runtime);
  311. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  312. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  313. } else {
  314. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  315. }
  316. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
  317. size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
  318. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  319. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  320. count = snd_pcm_lib_period_bytes(substream);
  321. spin_lock_irqsave(&chip->reg_lock, flags);
  322. if (chip->mode & SB_MODE_CAPTURE_16) {
  323. count >>= 1;
  324. count--;
  325. snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
  326. snd_sbdsp_command(chip, format);
  327. snd_sbdsp_command(chip, count & 0xff);
  328. snd_sbdsp_command(chip, count >> 8);
  329. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  330. } else {
  331. count--;
  332. snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
  333. snd_sbdsp_command(chip, format);
  334. snd_sbdsp_command(chip, count & 0xff);
  335. snd_sbdsp_command(chip, count >> 8);
  336. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  337. }
  338. spin_unlock_irqrestore(&chip->reg_lock, flags);
  339. return 0;
  340. }
  341. static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
  342. int cmd)
  343. {
  344. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  345. int result = 0;
  346. spin_lock(&chip->reg_lock);
  347. switch (cmd) {
  348. case SNDRV_PCM_TRIGGER_START:
  349. case SNDRV_PCM_TRIGGER_RESUME:
  350. chip->mode |= SB_RATE_LOCK_CAPTURE;
  351. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  352. break;
  353. case SNDRV_PCM_TRIGGER_STOP:
  354. case SNDRV_PCM_TRIGGER_SUSPEND:
  355. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  356. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  357. if (chip->mode & SB_RATE_LOCK_PLAYBACK)
  358. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  359. chip->mode &= ~SB_RATE_LOCK_CAPTURE;
  360. break;
  361. default:
  362. result = -EINVAL;
  363. }
  364. spin_unlock(&chip->reg_lock);
  365. return result;
  366. }
  367. irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
  368. {
  369. struct snd_sb *chip = dev_id;
  370. unsigned char status;
  371. int ok;
  372. spin_lock(&chip->mixer_lock);
  373. status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
  374. spin_unlock(&chip->mixer_lock);
  375. if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
  376. chip->rmidi_callback(irq, chip->rmidi->private_data);
  377. if (status & SB_IRQTYPE_8BIT) {
  378. ok = 0;
  379. if (chip->mode & SB_MODE_PLAYBACK_8) {
  380. snd_pcm_period_elapsed(chip->playback_substream);
  381. snd_sb16_csp_update(chip);
  382. ok++;
  383. }
  384. if (chip->mode & SB_MODE_CAPTURE_8) {
  385. snd_pcm_period_elapsed(chip->capture_substream);
  386. ok++;
  387. }
  388. spin_lock(&chip->reg_lock);
  389. if (!ok)
  390. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  391. snd_sb_ack_8bit(chip);
  392. spin_unlock(&chip->reg_lock);
  393. }
  394. if (status & SB_IRQTYPE_16BIT) {
  395. ok = 0;
  396. if (chip->mode & SB_MODE_PLAYBACK_16) {
  397. snd_pcm_period_elapsed(chip->playback_substream);
  398. snd_sb16_csp_update(chip);
  399. ok++;
  400. }
  401. if (chip->mode & SB_MODE_CAPTURE_16) {
  402. snd_pcm_period_elapsed(chip->capture_substream);
  403. ok++;
  404. }
  405. spin_lock(&chip->reg_lock);
  406. if (!ok)
  407. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  408. snd_sb_ack_16bit(chip);
  409. spin_unlock(&chip->reg_lock);
  410. }
  411. return IRQ_HANDLED;
  412. }
  413. /*
  414. */
  415. static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
  416. {
  417. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  418. unsigned int dma;
  419. size_t ptr;
  420. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  421. ptr = snd_dma_pointer(dma, chip->p_dma_size);
  422. return bytes_to_frames(substream->runtime, ptr);
  423. }
  424. static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
  425. {
  426. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  427. unsigned int dma;
  428. size_t ptr;
  429. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  430. ptr = snd_dma_pointer(dma, chip->c_dma_size);
  431. return bytes_to_frames(substream->runtime, ptr);
  432. }
  433. /*
  434. */
  435. static const struct snd_pcm_hardware snd_sb16_playback =
  436. {
  437. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  438. SNDRV_PCM_INFO_MMAP_VALID),
  439. .formats = 0,
  440. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  441. .rate_min = 4000,
  442. .rate_max = 44100,
  443. .channels_min = 1,
  444. .channels_max = 2,
  445. .buffer_bytes_max = (128*1024),
  446. .period_bytes_min = 64,
  447. .period_bytes_max = (128*1024),
  448. .periods_min = 1,
  449. .periods_max = 1024,
  450. .fifo_size = 0,
  451. };
  452. static const struct snd_pcm_hardware snd_sb16_capture =
  453. {
  454. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  455. SNDRV_PCM_INFO_MMAP_VALID),
  456. .formats = 0,
  457. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  458. .rate_min = 4000,
  459. .rate_max = 44100,
  460. .channels_min = 1,
  461. .channels_max = 2,
  462. .buffer_bytes_max = (128*1024),
  463. .period_bytes_min = 64,
  464. .period_bytes_max = (128*1024),
  465. .periods_min = 1,
  466. .periods_max = 1024,
  467. .fifo_size = 0,
  468. };
  469. /*
  470. * open/close
  471. */
  472. static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
  473. {
  474. unsigned long flags;
  475. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  476. struct snd_pcm_runtime *runtime = substream->runtime;
  477. spin_lock_irqsave(&chip->open_lock, flags);
  478. if (chip->mode & SB_MODE_PLAYBACK) {
  479. spin_unlock_irqrestore(&chip->open_lock, flags);
  480. return -EAGAIN;
  481. }
  482. runtime->hw = snd_sb16_playback;
  483. /* skip if 16 bit DMA was reserved for capture */
  484. if (chip->force_mode16 & SB_MODE_CAPTURE_16)
  485. goto __skip_16bit;
  486. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
  487. chip->mode |= SB_MODE_PLAYBACK_16;
  488. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  489. /* Vibra16X hack */
  490. if (chip->dma16 <= 3) {
  491. runtime->hw.buffer_bytes_max =
  492. runtime->hw.period_bytes_max = 64 * 1024;
  493. } else {
  494. snd_sb16_csp_playback_open(chip, runtime);
  495. }
  496. goto __open_ok;
  497. }
  498. __skip_16bit:
  499. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
  500. chip->mode |= SB_MODE_PLAYBACK_8;
  501. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  502. if (chip->dma16 < 0) {
  503. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  504. chip->mode |= SB_MODE_PLAYBACK_16;
  505. } else {
  506. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  507. }
  508. runtime->hw.buffer_bytes_max =
  509. runtime->hw.period_bytes_max = 64 * 1024;
  510. goto __open_ok;
  511. }
  512. spin_unlock_irqrestore(&chip->open_lock, flags);
  513. return -EAGAIN;
  514. __open_ok:
  515. if (chip->hardware == SB_HW_ALS100)
  516. runtime->hw.rate_max = 48000;
  517. if (chip->hardware == SB_HW_CS5530) {
  518. runtime->hw.buffer_bytes_max = 32 * 1024;
  519. runtime->hw.periods_min = 2;
  520. runtime->hw.rate_min = 44100;
  521. }
  522. if (chip->mode & SB_RATE_LOCK)
  523. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  524. chip->playback_substream = substream;
  525. spin_unlock_irqrestore(&chip->open_lock, flags);
  526. return 0;
  527. }
  528. static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
  529. {
  530. unsigned long flags;
  531. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  532. snd_sb16_csp_playback_close(chip);
  533. spin_lock_irqsave(&chip->open_lock, flags);
  534. chip->playback_substream = NULL;
  535. chip->mode &= ~SB_MODE_PLAYBACK;
  536. spin_unlock_irqrestore(&chip->open_lock, flags);
  537. return 0;
  538. }
  539. static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
  540. {
  541. unsigned long flags;
  542. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  543. struct snd_pcm_runtime *runtime = substream->runtime;
  544. spin_lock_irqsave(&chip->open_lock, flags);
  545. if (chip->mode & SB_MODE_CAPTURE) {
  546. spin_unlock_irqrestore(&chip->open_lock, flags);
  547. return -EAGAIN;
  548. }
  549. runtime->hw = snd_sb16_capture;
  550. /* skip if 16 bit DMA was reserved for playback */
  551. if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
  552. goto __skip_16bit;
  553. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
  554. chip->mode |= SB_MODE_CAPTURE_16;
  555. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  556. /* Vibra16X hack */
  557. if (chip->dma16 <= 3) {
  558. runtime->hw.buffer_bytes_max =
  559. runtime->hw.period_bytes_max = 64 * 1024;
  560. } else {
  561. snd_sb16_csp_capture_open(chip, runtime);
  562. }
  563. goto __open_ok;
  564. }
  565. __skip_16bit:
  566. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
  567. chip->mode |= SB_MODE_CAPTURE_8;
  568. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  569. if (chip->dma16 < 0) {
  570. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  571. chip->mode |= SB_MODE_CAPTURE_16;
  572. } else {
  573. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  574. }
  575. runtime->hw.buffer_bytes_max =
  576. runtime->hw.period_bytes_max = 64 * 1024;
  577. goto __open_ok;
  578. }
  579. spin_unlock_irqrestore(&chip->open_lock, flags);
  580. return -EAGAIN;
  581. __open_ok:
  582. if (chip->hardware == SB_HW_ALS100)
  583. runtime->hw.rate_max = 48000;
  584. if (chip->hardware == SB_HW_CS5530) {
  585. runtime->hw.buffer_bytes_max = 32 * 1024;
  586. runtime->hw.periods_min = 2;
  587. runtime->hw.rate_min = 44100;
  588. }
  589. if (chip->mode & SB_RATE_LOCK)
  590. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  591. chip->capture_substream = substream;
  592. spin_unlock_irqrestore(&chip->open_lock, flags);
  593. return 0;
  594. }
  595. static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
  596. {
  597. unsigned long flags;
  598. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  599. snd_sb16_csp_capture_close(chip);
  600. spin_lock_irqsave(&chip->open_lock, flags);
  601. chip->capture_substream = NULL;
  602. chip->mode &= ~SB_MODE_CAPTURE;
  603. spin_unlock_irqrestore(&chip->open_lock, flags);
  604. return 0;
  605. }
  606. /*
  607. * DMA control interface
  608. */
  609. static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
  610. {
  611. if (chip->dma8 < 0 || chip->dma16 < 0) {
  612. if (snd_BUG_ON(what))
  613. return -EINVAL;
  614. return 0;
  615. }
  616. if (what == 0) {
  617. chip->force_mode16 = 0;
  618. } else if (what == 1) {
  619. chip->force_mode16 = SB_MODE_PLAYBACK_16;
  620. } else if (what == 2) {
  621. chip->force_mode16 = SB_MODE_CAPTURE_16;
  622. } else {
  623. return -EINVAL;
  624. }
  625. return 0;
  626. }
  627. static int snd_sb16_get_dma_mode(struct snd_sb *chip)
  628. {
  629. if (chip->dma8 < 0 || chip->dma16 < 0)
  630. return 0;
  631. switch (chip->force_mode16) {
  632. case SB_MODE_PLAYBACK_16:
  633. return 1;
  634. case SB_MODE_CAPTURE_16:
  635. return 2;
  636. default:
  637. return 0;
  638. }
  639. }
  640. static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  641. {
  642. static const char * const texts[3] = {
  643. "Auto", "Playback", "Capture"
  644. };
  645. return snd_ctl_enum_info(uinfo, 1, 3, texts);
  646. }
  647. static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  648. {
  649. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  650. unsigned long flags;
  651. spin_lock_irqsave(&chip->reg_lock, flags);
  652. ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
  653. spin_unlock_irqrestore(&chip->reg_lock, flags);
  654. return 0;
  655. }
  656. static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  657. {
  658. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  659. unsigned long flags;
  660. unsigned char nval, oval;
  661. int change;
  662. if ((nval = ucontrol->value.enumerated.item[0]) > 2)
  663. return -EINVAL;
  664. spin_lock_irqsave(&chip->reg_lock, flags);
  665. oval = snd_sb16_get_dma_mode(chip);
  666. change = nval != oval;
  667. snd_sb16_set_dma_mode(chip, nval);
  668. spin_unlock_irqrestore(&chip->reg_lock, flags);
  669. return change;
  670. }
  671. static const struct snd_kcontrol_new snd_sb16_dma_control = {
  672. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  673. .name = "16-bit DMA Allocation",
  674. .info = snd_sb16_dma_control_info,
  675. .get = snd_sb16_dma_control_get,
  676. .put = snd_sb16_dma_control_put
  677. };
  678. /*
  679. * Initialization part
  680. */
  681. int snd_sb16dsp_configure(struct snd_sb * chip)
  682. {
  683. unsigned long flags;
  684. unsigned char irqreg = 0, dmareg = 0, mpureg;
  685. unsigned char realirq, realdma, realmpureg;
  686. /* note: mpu register should be present only on SB16 Vibra soundcards */
  687. // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16);
  688. spin_lock_irqsave(&chip->mixer_lock, flags);
  689. mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
  690. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  691. switch (chip->irq) {
  692. case 2:
  693. case 9:
  694. irqreg |= SB_IRQSETUP_IRQ9;
  695. break;
  696. case 5:
  697. irqreg |= SB_IRQSETUP_IRQ5;
  698. break;
  699. case 7:
  700. irqreg |= SB_IRQSETUP_IRQ7;
  701. break;
  702. case 10:
  703. irqreg |= SB_IRQSETUP_IRQ10;
  704. break;
  705. default:
  706. return -EINVAL;
  707. }
  708. if (chip->dma8 >= 0) {
  709. switch (chip->dma8) {
  710. case 0:
  711. dmareg |= SB_DMASETUP_DMA0;
  712. break;
  713. case 1:
  714. dmareg |= SB_DMASETUP_DMA1;
  715. break;
  716. case 3:
  717. dmareg |= SB_DMASETUP_DMA3;
  718. break;
  719. default:
  720. return -EINVAL;
  721. }
  722. }
  723. if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
  724. switch (chip->dma16) {
  725. case 5:
  726. dmareg |= SB_DMASETUP_DMA5;
  727. break;
  728. case 6:
  729. dmareg |= SB_DMASETUP_DMA6;
  730. break;
  731. case 7:
  732. dmareg |= SB_DMASETUP_DMA7;
  733. break;
  734. default:
  735. return -EINVAL;
  736. }
  737. }
  738. switch (chip->mpu_port) {
  739. case 0x300:
  740. mpureg |= 0x04;
  741. break;
  742. case 0x330:
  743. mpureg |= 0x00;
  744. break;
  745. default:
  746. mpureg |= 0x02; /* disable MPU */
  747. }
  748. spin_lock_irqsave(&chip->mixer_lock, flags);
  749. snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
  750. realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
  751. snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
  752. realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
  753. snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
  754. realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
  755. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  756. if ((~realirq) & irqreg || (~realdma) & dmareg) {
  757. snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port);
  758. snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg);
  759. snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg);
  760. return -ENODEV;
  761. }
  762. return 0;
  763. }
  764. static const struct snd_pcm_ops snd_sb16_playback_ops = {
  765. .open = snd_sb16_playback_open,
  766. .close = snd_sb16_playback_close,
  767. .ioctl = snd_pcm_lib_ioctl,
  768. .hw_params = snd_sb16_hw_params,
  769. .hw_free = snd_sb16_hw_free,
  770. .prepare = snd_sb16_playback_prepare,
  771. .trigger = snd_sb16_playback_trigger,
  772. .pointer = snd_sb16_playback_pointer,
  773. };
  774. static const struct snd_pcm_ops snd_sb16_capture_ops = {
  775. .open = snd_sb16_capture_open,
  776. .close = snd_sb16_capture_close,
  777. .ioctl = snd_pcm_lib_ioctl,
  778. .hw_params = snd_sb16_hw_params,
  779. .hw_free = snd_sb16_hw_free,
  780. .prepare = snd_sb16_capture_prepare,
  781. .trigger = snd_sb16_capture_trigger,
  782. .pointer = snd_sb16_capture_pointer,
  783. };
  784. int snd_sb16dsp_pcm(struct snd_sb *chip, int device)
  785. {
  786. struct snd_card *card = chip->card;
  787. struct snd_pcm *pcm;
  788. int err;
  789. if ((err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm)) < 0)
  790. return err;
  791. sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
  792. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  793. pcm->private_data = chip;
  794. chip->pcm = pcm;
  795. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
  796. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
  797. if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
  798. snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
  799. else
  800. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  801. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  802. snd_dma_isa_data(),
  803. 64*1024, 128*1024);
  804. return 0;
  805. }
  806. const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
  807. {
  808. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  809. &snd_sb16_playback_ops : &snd_sb16_capture_ops;
  810. }
  811. EXPORT_SYMBOL(snd_sb16dsp_pcm);
  812. EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
  813. EXPORT_SYMBOL(snd_sb16dsp_configure);
  814. EXPORT_SYMBOL(snd_sb16dsp_interrupt);