chip.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  4. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  5. *
  6. * This file contains the core interrupt handling code, for irq-chip based
  7. * architectures. Detailed information is available in
  8. * Documentation/core-api/genericirq.rst
  9. */
  10. #include <linux/irq.h>
  11. #include <linux/msi.h>
  12. #include <linux/module.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/irqdomain.h>
  16. #include <trace/events/irq.h>
  17. #include "internals.h"
  18. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  19. {
  20. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  21. return IRQ_NONE;
  22. }
  23. /*
  24. * Chained handlers should never call action on their IRQ. This default
  25. * action will emit warning if such thing happens.
  26. */
  27. struct irqaction chained_action = {
  28. .handler = bad_chained_irq,
  29. };
  30. /**
  31. * irq_set_chip - set the irq chip for an irq
  32. * @irq: irq number
  33. * @chip: pointer to irq chip description structure
  34. */
  35. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  36. {
  37. unsigned long flags;
  38. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  39. if (!desc)
  40. return -EINVAL;
  41. if (!chip)
  42. chip = &no_irq_chip;
  43. desc->irq_data.chip = chip;
  44. irq_put_desc_unlock(desc, flags);
  45. /*
  46. * For !CONFIG_SPARSE_IRQ make the irq show up in
  47. * allocated_irqs.
  48. */
  49. irq_mark_irq(irq);
  50. return 0;
  51. }
  52. EXPORT_SYMBOL(irq_set_chip);
  53. /**
  54. * irq_set_type - set the irq trigger type for an irq
  55. * @irq: irq number
  56. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  57. */
  58. int irq_set_irq_type(unsigned int irq, unsigned int type)
  59. {
  60. unsigned long flags;
  61. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  62. int ret = 0;
  63. if (!desc)
  64. return -EINVAL;
  65. ret = __irq_set_trigger(desc, type);
  66. irq_put_desc_busunlock(desc, flags);
  67. return ret;
  68. }
  69. EXPORT_SYMBOL(irq_set_irq_type);
  70. /**
  71. * irq_set_handler_data - set irq handler data for an irq
  72. * @irq: Interrupt number
  73. * @data: Pointer to interrupt specific data
  74. *
  75. * Set the hardware irq controller data for an irq
  76. */
  77. int irq_set_handler_data(unsigned int irq, void *data)
  78. {
  79. unsigned long flags;
  80. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  81. if (!desc)
  82. return -EINVAL;
  83. desc->irq_common_data.handler_data = data;
  84. irq_put_desc_unlock(desc, flags);
  85. return 0;
  86. }
  87. EXPORT_SYMBOL(irq_set_handler_data);
  88. /**
  89. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  90. * @irq_base: Interrupt number base
  91. * @irq_offset: Interrupt number offset
  92. * @entry: Pointer to MSI descriptor data
  93. *
  94. * Set the MSI descriptor entry for an irq at offset
  95. */
  96. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  97. struct msi_desc *entry)
  98. {
  99. unsigned long flags;
  100. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  101. if (!desc)
  102. return -EINVAL;
  103. desc->irq_common_data.msi_desc = entry;
  104. if (entry && !irq_offset)
  105. entry->irq = irq_base;
  106. irq_put_desc_unlock(desc, flags);
  107. return 0;
  108. }
  109. /**
  110. * irq_set_msi_desc - set MSI descriptor data for an irq
  111. * @irq: Interrupt number
  112. * @entry: Pointer to MSI descriptor data
  113. *
  114. * Set the MSI descriptor entry for an irq
  115. */
  116. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  117. {
  118. return irq_set_msi_desc_off(irq, 0, entry);
  119. }
  120. /**
  121. * irq_set_chip_data - set irq chip data for an irq
  122. * @irq: Interrupt number
  123. * @data: Pointer to chip specific data
  124. *
  125. * Set the hardware irq chip data for an irq
  126. */
  127. int irq_set_chip_data(unsigned int irq, void *data)
  128. {
  129. unsigned long flags;
  130. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  131. if (!desc)
  132. return -EINVAL;
  133. desc->irq_data.chip_data = data;
  134. irq_put_desc_unlock(desc, flags);
  135. return 0;
  136. }
  137. EXPORT_SYMBOL(irq_set_chip_data);
  138. struct irq_data *irq_get_irq_data(unsigned int irq)
  139. {
  140. struct irq_desc *desc = irq_to_desc(irq);
  141. return desc ? &desc->irq_data : NULL;
  142. }
  143. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  144. static void irq_state_clr_disabled(struct irq_desc *desc)
  145. {
  146. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  147. }
  148. static void irq_state_clr_masked(struct irq_desc *desc)
  149. {
  150. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  151. }
  152. static void irq_state_clr_started(struct irq_desc *desc)
  153. {
  154. irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
  155. }
  156. static void irq_state_set_started(struct irq_desc *desc)
  157. {
  158. irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
  159. }
  160. enum {
  161. IRQ_STARTUP_NORMAL,
  162. IRQ_STARTUP_MANAGED,
  163. IRQ_STARTUP_ABORT,
  164. };
  165. #ifdef CONFIG_SMP
  166. static int
  167. __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
  168. {
  169. struct irq_data *d = irq_desc_get_irq_data(desc);
  170. if (!irqd_affinity_is_managed(d))
  171. return IRQ_STARTUP_NORMAL;
  172. irqd_clr_managed_shutdown(d);
  173. if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
  174. /*
  175. * Catch code which fiddles with enable_irq() on a managed
  176. * and potentially shutdown IRQ. Chained interrupt
  177. * installment or irq auto probing should not happen on
  178. * managed irqs either.
  179. */
  180. if (WARN_ON_ONCE(force))
  181. return IRQ_STARTUP_ABORT;
  182. /*
  183. * The interrupt was requested, but there is no online CPU
  184. * in it's affinity mask. Put it into managed shutdown
  185. * state and let the cpu hotplug mechanism start it up once
  186. * a CPU in the mask becomes available.
  187. */
  188. return IRQ_STARTUP_ABORT;
  189. }
  190. /*
  191. * Managed interrupts have reserved resources, so this should not
  192. * happen.
  193. */
  194. if (WARN_ON(irq_domain_activate_irq(d, false)))
  195. return IRQ_STARTUP_ABORT;
  196. return IRQ_STARTUP_MANAGED;
  197. }
  198. #else
  199. static __always_inline int
  200. __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
  201. {
  202. return IRQ_STARTUP_NORMAL;
  203. }
  204. #endif
  205. static int __irq_startup(struct irq_desc *desc)
  206. {
  207. struct irq_data *d = irq_desc_get_irq_data(desc);
  208. int ret = 0;
  209. /* Warn if this interrupt is not activated but try nevertheless */
  210. WARN_ON_ONCE(!irqd_is_activated(d));
  211. if (d->chip->irq_startup) {
  212. ret = d->chip->irq_startup(d);
  213. irq_state_clr_disabled(desc);
  214. irq_state_clr_masked(desc);
  215. } else {
  216. irq_enable(desc);
  217. }
  218. irq_state_set_started(desc);
  219. return ret;
  220. }
  221. int irq_startup(struct irq_desc *desc, bool resend, bool force)
  222. {
  223. struct irq_data *d = irq_desc_get_irq_data(desc);
  224. struct cpumask *aff = irq_data_get_affinity_mask(d);
  225. int ret = 0;
  226. desc->depth = 0;
  227. if (irqd_is_started(d)) {
  228. irq_enable(desc);
  229. } else {
  230. switch (__irq_startup_managed(desc, aff, force)) {
  231. case IRQ_STARTUP_NORMAL:
  232. ret = __irq_startup(desc);
  233. irq_setup_affinity(desc);
  234. break;
  235. case IRQ_STARTUP_MANAGED:
  236. irq_do_set_affinity(d, aff, false);
  237. ret = __irq_startup(desc);
  238. break;
  239. case IRQ_STARTUP_ABORT:
  240. irqd_set_managed_shutdown(d);
  241. return 0;
  242. }
  243. }
  244. if (resend)
  245. check_irq_resend(desc);
  246. return ret;
  247. }
  248. int irq_activate(struct irq_desc *desc)
  249. {
  250. struct irq_data *d = irq_desc_get_irq_data(desc);
  251. if (!irqd_affinity_is_managed(d))
  252. return irq_domain_activate_irq(d, false);
  253. return 0;
  254. }
  255. int irq_activate_and_startup(struct irq_desc *desc, bool resend)
  256. {
  257. if (WARN_ON(irq_activate(desc)))
  258. return 0;
  259. return irq_startup(desc, resend, IRQ_START_FORCE);
  260. }
  261. static void __irq_disable(struct irq_desc *desc, bool mask);
  262. void irq_shutdown(struct irq_desc *desc)
  263. {
  264. if (irqd_is_started(&desc->irq_data)) {
  265. desc->depth = 1;
  266. if (desc->irq_data.chip->irq_shutdown) {
  267. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  268. irq_state_set_disabled(desc);
  269. irq_state_set_masked(desc);
  270. } else {
  271. __irq_disable(desc, true);
  272. }
  273. irq_state_clr_started(desc);
  274. }
  275. }
  276. void irq_shutdown_and_deactivate(struct irq_desc *desc)
  277. {
  278. irq_shutdown(desc);
  279. /*
  280. * This must be called even if the interrupt was never started up,
  281. * because the activation can happen before the interrupt is
  282. * available for request/startup. It has it's own state tracking so
  283. * it's safe to call it unconditionally.
  284. */
  285. irq_domain_deactivate_irq(&desc->irq_data);
  286. }
  287. void irq_enable(struct irq_desc *desc)
  288. {
  289. if (!irqd_irq_disabled(&desc->irq_data)) {
  290. unmask_irq(desc);
  291. } else {
  292. irq_state_clr_disabled(desc);
  293. if (desc->irq_data.chip->irq_enable) {
  294. desc->irq_data.chip->irq_enable(&desc->irq_data);
  295. irq_state_clr_masked(desc);
  296. } else {
  297. unmask_irq(desc);
  298. }
  299. }
  300. }
  301. static void __irq_disable(struct irq_desc *desc, bool mask)
  302. {
  303. if (irqd_irq_disabled(&desc->irq_data)) {
  304. if (mask)
  305. mask_irq(desc);
  306. } else {
  307. irq_state_set_disabled(desc);
  308. if (desc->irq_data.chip->irq_disable) {
  309. desc->irq_data.chip->irq_disable(&desc->irq_data);
  310. irq_state_set_masked(desc);
  311. } else if (mask) {
  312. mask_irq(desc);
  313. }
  314. }
  315. }
  316. /**
  317. * irq_disable - Mark interrupt disabled
  318. * @desc: irq descriptor which should be disabled
  319. *
  320. * If the chip does not implement the irq_disable callback, we
  321. * use a lazy disable approach. That means we mark the interrupt
  322. * disabled, but leave the hardware unmasked. That's an
  323. * optimization because we avoid the hardware access for the
  324. * common case where no interrupt happens after we marked it
  325. * disabled. If an interrupt happens, then the interrupt flow
  326. * handler masks the line at the hardware level and marks it
  327. * pending.
  328. *
  329. * If the interrupt chip does not implement the irq_disable callback,
  330. * a driver can disable the lazy approach for a particular irq line by
  331. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  332. * be used for devices which cannot disable the interrupt at the
  333. * device level under certain circumstances and have to use
  334. * disable_irq[_nosync] instead.
  335. */
  336. void irq_disable(struct irq_desc *desc)
  337. {
  338. __irq_disable(desc, irq_settings_disable_unlazy(desc));
  339. }
  340. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  341. {
  342. if (desc->irq_data.chip->irq_enable)
  343. desc->irq_data.chip->irq_enable(&desc->irq_data);
  344. else
  345. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  346. cpumask_set_cpu(cpu, desc->percpu_enabled);
  347. }
  348. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  349. {
  350. if (desc->irq_data.chip->irq_disable)
  351. desc->irq_data.chip->irq_disable(&desc->irq_data);
  352. else
  353. desc->irq_data.chip->irq_mask(&desc->irq_data);
  354. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  355. }
  356. static inline void mask_ack_irq(struct irq_desc *desc)
  357. {
  358. if (desc->irq_data.chip->irq_mask_ack) {
  359. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  360. irq_state_set_masked(desc);
  361. } else {
  362. mask_irq(desc);
  363. if (desc->irq_data.chip->irq_ack)
  364. desc->irq_data.chip->irq_ack(&desc->irq_data);
  365. }
  366. }
  367. void mask_irq(struct irq_desc *desc)
  368. {
  369. if (irqd_irq_masked(&desc->irq_data))
  370. return;
  371. if (desc->irq_data.chip->irq_mask) {
  372. desc->irq_data.chip->irq_mask(&desc->irq_data);
  373. irq_state_set_masked(desc);
  374. }
  375. }
  376. void unmask_irq(struct irq_desc *desc)
  377. {
  378. if (!irqd_irq_masked(&desc->irq_data))
  379. return;
  380. if (desc->irq_data.chip->irq_unmask) {
  381. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  382. irq_state_clr_masked(desc);
  383. }
  384. }
  385. void unmask_threaded_irq(struct irq_desc *desc)
  386. {
  387. struct irq_chip *chip = desc->irq_data.chip;
  388. if (chip->flags & IRQCHIP_EOI_THREADED)
  389. chip->irq_eoi(&desc->irq_data);
  390. unmask_irq(desc);
  391. }
  392. /*
  393. * handle_nested_irq - Handle a nested irq from a irq thread
  394. * @irq: the interrupt number
  395. *
  396. * Handle interrupts which are nested into a threaded interrupt
  397. * handler. The handler function is called inside the calling
  398. * threads context.
  399. */
  400. void handle_nested_irq(unsigned int irq)
  401. {
  402. struct irq_desc *desc = irq_to_desc(irq);
  403. struct irqaction *action;
  404. irqreturn_t action_ret;
  405. might_sleep();
  406. raw_spin_lock_irq(&desc->lock);
  407. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  408. action = desc->action;
  409. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  410. desc->istate |= IRQS_PENDING;
  411. goto out_unlock;
  412. }
  413. kstat_incr_irqs_this_cpu(desc);
  414. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  415. raw_spin_unlock_irq(&desc->lock);
  416. action_ret = IRQ_NONE;
  417. for_each_action_of_desc(desc, action)
  418. action_ret |= action->thread_fn(action->irq, action->dev_id);
  419. if (!noirqdebug)
  420. note_interrupt(desc, action_ret);
  421. raw_spin_lock_irq(&desc->lock);
  422. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  423. out_unlock:
  424. raw_spin_unlock_irq(&desc->lock);
  425. }
  426. EXPORT_SYMBOL_GPL(handle_nested_irq);
  427. static bool irq_check_poll(struct irq_desc *desc)
  428. {
  429. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  430. return false;
  431. return irq_wait_for_poll(desc);
  432. }
  433. static bool irq_may_run(struct irq_desc *desc)
  434. {
  435. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  436. /*
  437. * If the interrupt is not in progress and is not an armed
  438. * wakeup interrupt, proceed.
  439. */
  440. if (!irqd_has_set(&desc->irq_data, mask))
  441. return true;
  442. /*
  443. * If the interrupt is an armed wakeup source, mark it pending
  444. * and suspended, disable it and notify the pm core about the
  445. * event.
  446. */
  447. if (irq_pm_check_wakeup(desc))
  448. return false;
  449. /*
  450. * Handle a potential concurrent poll on a different core.
  451. */
  452. return irq_check_poll(desc);
  453. }
  454. /**
  455. * handle_simple_irq - Simple and software-decoded IRQs.
  456. * @desc: the interrupt description structure for this irq
  457. *
  458. * Simple interrupts are either sent from a demultiplexing interrupt
  459. * handler or come from hardware, where no interrupt hardware control
  460. * is necessary.
  461. *
  462. * Note: The caller is expected to handle the ack, clear, mask and
  463. * unmask issues if necessary.
  464. */
  465. void handle_simple_irq(struct irq_desc *desc)
  466. {
  467. raw_spin_lock(&desc->lock);
  468. if (!irq_may_run(desc))
  469. goto out_unlock;
  470. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  471. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  472. desc->istate |= IRQS_PENDING;
  473. goto out_unlock;
  474. }
  475. kstat_incr_irqs_this_cpu(desc);
  476. handle_irq_event(desc);
  477. out_unlock:
  478. raw_spin_unlock(&desc->lock);
  479. }
  480. EXPORT_SYMBOL_GPL(handle_simple_irq);
  481. /**
  482. * handle_untracked_irq - Simple and software-decoded IRQs.
  483. * @desc: the interrupt description structure for this irq
  484. *
  485. * Untracked interrupts are sent from a demultiplexing interrupt
  486. * handler when the demultiplexer does not know which device it its
  487. * multiplexed irq domain generated the interrupt. IRQ's handled
  488. * through here are not subjected to stats tracking, randomness, or
  489. * spurious interrupt detection.
  490. *
  491. * Note: Like handle_simple_irq, the caller is expected to handle
  492. * the ack, clear, mask and unmask issues if necessary.
  493. */
  494. void handle_untracked_irq(struct irq_desc *desc)
  495. {
  496. unsigned int flags = 0;
  497. raw_spin_lock(&desc->lock);
  498. if (!irq_may_run(desc))
  499. goto out_unlock;
  500. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  501. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  502. desc->istate |= IRQS_PENDING;
  503. goto out_unlock;
  504. }
  505. desc->istate &= ~IRQS_PENDING;
  506. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  507. raw_spin_unlock(&desc->lock);
  508. __handle_irq_event_percpu(desc, &flags);
  509. raw_spin_lock(&desc->lock);
  510. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  511. out_unlock:
  512. raw_spin_unlock(&desc->lock);
  513. }
  514. EXPORT_SYMBOL_GPL(handle_untracked_irq);
  515. /*
  516. * Called unconditionally from handle_level_irq() and only for oneshot
  517. * interrupts from handle_fasteoi_irq()
  518. */
  519. static void cond_unmask_irq(struct irq_desc *desc)
  520. {
  521. /*
  522. * We need to unmask in the following cases:
  523. * - Standard level irq (IRQF_ONESHOT is not set)
  524. * - Oneshot irq which did not wake the thread (caused by a
  525. * spurious interrupt or a primary handler handling it
  526. * completely).
  527. */
  528. if (!irqd_irq_disabled(&desc->irq_data) &&
  529. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  530. unmask_irq(desc);
  531. }
  532. /**
  533. * handle_level_irq - Level type irq handler
  534. * @desc: the interrupt description structure for this irq
  535. *
  536. * Level type interrupts are active as long as the hardware line has
  537. * the active level. This may require to mask the interrupt and unmask
  538. * it after the associated handler has acknowledged the device, so the
  539. * interrupt line is back to inactive.
  540. */
  541. void handle_level_irq(struct irq_desc *desc)
  542. {
  543. raw_spin_lock(&desc->lock);
  544. mask_ack_irq(desc);
  545. if (!irq_may_run(desc))
  546. goto out_unlock;
  547. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  548. /*
  549. * If its disabled or no action available
  550. * keep it masked and get out of here
  551. */
  552. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  553. desc->istate |= IRQS_PENDING;
  554. goto out_unlock;
  555. }
  556. kstat_incr_irqs_this_cpu(desc);
  557. handle_irq_event(desc);
  558. cond_unmask_irq(desc);
  559. out_unlock:
  560. raw_spin_unlock(&desc->lock);
  561. }
  562. EXPORT_SYMBOL_GPL(handle_level_irq);
  563. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  564. static inline void preflow_handler(struct irq_desc *desc)
  565. {
  566. if (desc->preflow_handler)
  567. desc->preflow_handler(&desc->irq_data);
  568. }
  569. #else
  570. static inline void preflow_handler(struct irq_desc *desc) { }
  571. #endif
  572. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  573. {
  574. if (!(desc->istate & IRQS_ONESHOT)) {
  575. chip->irq_eoi(&desc->irq_data);
  576. return;
  577. }
  578. /*
  579. * We need to unmask in the following cases:
  580. * - Oneshot irq which did not wake the thread (caused by a
  581. * spurious interrupt or a primary handler handling it
  582. * completely).
  583. */
  584. if (!irqd_irq_disabled(&desc->irq_data) &&
  585. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  586. chip->irq_eoi(&desc->irq_data);
  587. unmask_irq(desc);
  588. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  589. chip->irq_eoi(&desc->irq_data);
  590. }
  591. }
  592. /**
  593. * handle_fasteoi_irq - irq handler for transparent controllers
  594. * @desc: the interrupt description structure for this irq
  595. *
  596. * Only a single callback will be issued to the chip: an ->eoi()
  597. * call when the interrupt has been serviced. This enables support
  598. * for modern forms of interrupt handlers, which handle the flow
  599. * details in hardware, transparently.
  600. */
  601. void handle_fasteoi_irq(struct irq_desc *desc)
  602. {
  603. struct irq_chip *chip = desc->irq_data.chip;
  604. raw_spin_lock(&desc->lock);
  605. if (!irq_may_run(desc))
  606. goto out;
  607. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  608. /*
  609. * If its disabled or no action available
  610. * then mask it and get out of here:
  611. */
  612. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  613. desc->istate |= IRQS_PENDING;
  614. mask_irq(desc);
  615. goto out;
  616. }
  617. kstat_incr_irqs_this_cpu(desc);
  618. if (desc->istate & IRQS_ONESHOT)
  619. mask_irq(desc);
  620. preflow_handler(desc);
  621. handle_irq_event(desc);
  622. cond_unmask_eoi_irq(desc, chip);
  623. raw_spin_unlock(&desc->lock);
  624. return;
  625. out:
  626. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  627. chip->irq_eoi(&desc->irq_data);
  628. raw_spin_unlock(&desc->lock);
  629. }
  630. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  631. /**
  632. * handle_edge_irq - edge type IRQ handler
  633. * @desc: the interrupt description structure for this irq
  634. *
  635. * Interrupt occures on the falling and/or rising edge of a hardware
  636. * signal. The occurrence is latched into the irq controller hardware
  637. * and must be acked in order to be reenabled. After the ack another
  638. * interrupt can happen on the same source even before the first one
  639. * is handled by the associated event handler. If this happens it
  640. * might be necessary to disable (mask) the interrupt depending on the
  641. * controller hardware. This requires to reenable the interrupt inside
  642. * of the loop which handles the interrupts which have arrived while
  643. * the handler was running. If all pending interrupts are handled, the
  644. * loop is left.
  645. */
  646. void handle_edge_irq(struct irq_desc *desc)
  647. {
  648. raw_spin_lock(&desc->lock);
  649. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  650. if (!irq_may_run(desc)) {
  651. desc->istate |= IRQS_PENDING;
  652. mask_ack_irq(desc);
  653. goto out_unlock;
  654. }
  655. /*
  656. * If its disabled or no action available then mask it and get
  657. * out of here.
  658. */
  659. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  660. desc->istate |= IRQS_PENDING;
  661. mask_ack_irq(desc);
  662. goto out_unlock;
  663. }
  664. kstat_incr_irqs_this_cpu(desc);
  665. /* Start handling the irq */
  666. desc->irq_data.chip->irq_ack(&desc->irq_data);
  667. do {
  668. if (unlikely(!desc->action)) {
  669. mask_irq(desc);
  670. goto out_unlock;
  671. }
  672. /*
  673. * When another irq arrived while we were handling
  674. * one, we could have masked the irq.
  675. * Renable it, if it was not disabled in meantime.
  676. */
  677. if (unlikely(desc->istate & IRQS_PENDING)) {
  678. if (!irqd_irq_disabled(&desc->irq_data) &&
  679. irqd_irq_masked(&desc->irq_data))
  680. unmask_irq(desc);
  681. }
  682. handle_irq_event(desc);
  683. } while ((desc->istate & IRQS_PENDING) &&
  684. !irqd_irq_disabled(&desc->irq_data));
  685. out_unlock:
  686. raw_spin_unlock(&desc->lock);
  687. }
  688. EXPORT_SYMBOL(handle_edge_irq);
  689. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  690. /**
  691. * handle_edge_eoi_irq - edge eoi type IRQ handler
  692. * @desc: the interrupt description structure for this irq
  693. *
  694. * Similar as the above handle_edge_irq, but using eoi and w/o the
  695. * mask/unmask logic.
  696. */
  697. void handle_edge_eoi_irq(struct irq_desc *desc)
  698. {
  699. struct irq_chip *chip = irq_desc_get_chip(desc);
  700. raw_spin_lock(&desc->lock);
  701. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  702. if (!irq_may_run(desc)) {
  703. desc->istate |= IRQS_PENDING;
  704. goto out_eoi;
  705. }
  706. /*
  707. * If its disabled or no action available then mask it and get
  708. * out of here.
  709. */
  710. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  711. desc->istate |= IRQS_PENDING;
  712. goto out_eoi;
  713. }
  714. kstat_incr_irqs_this_cpu(desc);
  715. do {
  716. if (unlikely(!desc->action))
  717. goto out_eoi;
  718. handle_irq_event(desc);
  719. } while ((desc->istate & IRQS_PENDING) &&
  720. !irqd_irq_disabled(&desc->irq_data));
  721. out_eoi:
  722. chip->irq_eoi(&desc->irq_data);
  723. raw_spin_unlock(&desc->lock);
  724. }
  725. #endif
  726. /**
  727. * handle_percpu_irq - Per CPU local irq handler
  728. * @desc: the interrupt description structure for this irq
  729. *
  730. * Per CPU interrupts on SMP machines without locking requirements
  731. */
  732. void handle_percpu_irq(struct irq_desc *desc)
  733. {
  734. struct irq_chip *chip = irq_desc_get_chip(desc);
  735. /*
  736. * PER CPU interrupts are not serialized. Do not touch
  737. * desc->tot_count.
  738. */
  739. __kstat_incr_irqs_this_cpu(desc);
  740. if (chip->irq_ack)
  741. chip->irq_ack(&desc->irq_data);
  742. handle_irq_event_percpu(desc);
  743. if (chip->irq_eoi)
  744. chip->irq_eoi(&desc->irq_data);
  745. }
  746. /**
  747. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  748. * @desc: the interrupt description structure for this irq
  749. *
  750. * Per CPU interrupts on SMP machines without locking requirements. Same as
  751. * handle_percpu_irq() above but with the following extras:
  752. *
  753. * action->percpu_dev_id is a pointer to percpu variables which
  754. * contain the real device id for the cpu on which this handler is
  755. * called
  756. */
  757. void handle_percpu_devid_irq(struct irq_desc *desc)
  758. {
  759. struct irq_chip *chip = irq_desc_get_chip(desc);
  760. struct irqaction *action = desc->action;
  761. unsigned int irq = irq_desc_get_irq(desc);
  762. irqreturn_t res;
  763. /*
  764. * PER CPU interrupts are not serialized. Do not touch
  765. * desc->tot_count.
  766. */
  767. __kstat_incr_irqs_this_cpu(desc);
  768. if (chip->irq_ack)
  769. chip->irq_ack(&desc->irq_data);
  770. if (likely(action)) {
  771. trace_irq_handler_entry(irq, action);
  772. res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
  773. trace_irq_handler_exit(irq, action, res);
  774. } else {
  775. unsigned int cpu = smp_processor_id();
  776. bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
  777. if (enabled)
  778. irq_percpu_disable(desc, cpu);
  779. pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
  780. enabled ? " and unmasked" : "", irq, cpu);
  781. }
  782. if (chip->irq_eoi)
  783. chip->irq_eoi(&desc->irq_data);
  784. }
  785. static void
  786. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  787. int is_chained, const char *name)
  788. {
  789. if (!handle) {
  790. handle = handle_bad_irq;
  791. } else {
  792. struct irq_data *irq_data = &desc->irq_data;
  793. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  794. /*
  795. * With hierarchical domains we might run into a
  796. * situation where the outermost chip is not yet set
  797. * up, but the inner chips are there. Instead of
  798. * bailing we install the handler, but obviously we
  799. * cannot enable/startup the interrupt at this point.
  800. */
  801. while (irq_data) {
  802. if (irq_data->chip != &no_irq_chip)
  803. break;
  804. /*
  805. * Bail out if the outer chip is not set up
  806. * and the interrrupt supposed to be started
  807. * right away.
  808. */
  809. if (WARN_ON(is_chained))
  810. return;
  811. /* Try the parent */
  812. irq_data = irq_data->parent_data;
  813. }
  814. #endif
  815. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  816. return;
  817. }
  818. /* Uninstall? */
  819. if (handle == handle_bad_irq) {
  820. if (desc->irq_data.chip != &no_irq_chip)
  821. mask_ack_irq(desc);
  822. irq_state_set_disabled(desc);
  823. if (is_chained)
  824. desc->action = NULL;
  825. desc->depth = 1;
  826. }
  827. desc->handle_irq = handle;
  828. desc->name = name;
  829. if (handle != handle_bad_irq && is_chained) {
  830. unsigned int type = irqd_get_trigger_type(&desc->irq_data);
  831. /*
  832. * We're about to start this interrupt immediately,
  833. * hence the need to set the trigger configuration.
  834. * But the .set_type callback may have overridden the
  835. * flow handler, ignoring that we're dealing with a
  836. * chained interrupt. Reset it immediately because we
  837. * do know better.
  838. */
  839. if (type != IRQ_TYPE_NONE) {
  840. __irq_set_trigger(desc, type);
  841. desc->handle_irq = handle;
  842. }
  843. irq_settings_set_noprobe(desc);
  844. irq_settings_set_norequest(desc);
  845. irq_settings_set_nothread(desc);
  846. desc->action = &chained_action;
  847. irq_activate_and_startup(desc, IRQ_RESEND);
  848. }
  849. }
  850. void
  851. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  852. const char *name)
  853. {
  854. unsigned long flags;
  855. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  856. if (!desc)
  857. return;
  858. __irq_do_set_handler(desc, handle, is_chained, name);
  859. irq_put_desc_busunlock(desc, flags);
  860. }
  861. EXPORT_SYMBOL_GPL(__irq_set_handler);
  862. void
  863. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  864. void *data)
  865. {
  866. unsigned long flags;
  867. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  868. if (!desc)
  869. return;
  870. desc->irq_common_data.handler_data = data;
  871. __irq_do_set_handler(desc, handle, 1, NULL);
  872. irq_put_desc_busunlock(desc, flags);
  873. }
  874. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  875. void
  876. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  877. irq_flow_handler_t handle, const char *name)
  878. {
  879. irq_set_chip(irq, chip);
  880. __irq_set_handler(irq, handle, 0, name);
  881. }
  882. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  883. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  884. {
  885. unsigned long flags, trigger, tmp;
  886. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  887. if (!desc)
  888. return;
  889. /*
  890. * Warn when a driver sets the no autoenable flag on an already
  891. * active interrupt.
  892. */
  893. WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
  894. irq_settings_clr_and_set(desc, clr, set);
  895. trigger = irqd_get_trigger_type(&desc->irq_data);
  896. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  897. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  898. if (irq_settings_has_no_balance_set(desc))
  899. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  900. if (irq_settings_is_per_cpu(desc))
  901. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  902. if (irq_settings_can_move_pcntxt(desc))
  903. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  904. if (irq_settings_is_level(desc))
  905. irqd_set(&desc->irq_data, IRQD_LEVEL);
  906. tmp = irq_settings_get_trigger_mask(desc);
  907. if (tmp != IRQ_TYPE_NONE)
  908. trigger = tmp;
  909. irqd_set(&desc->irq_data, trigger);
  910. irq_put_desc_unlock(desc, flags);
  911. }
  912. EXPORT_SYMBOL_GPL(irq_modify_status);
  913. /**
  914. * irq_cpu_online - Invoke all irq_cpu_online functions.
  915. *
  916. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  917. * for each.
  918. */
  919. void irq_cpu_online(void)
  920. {
  921. struct irq_desc *desc;
  922. struct irq_chip *chip;
  923. unsigned long flags;
  924. unsigned int irq;
  925. for_each_active_irq(irq) {
  926. desc = irq_to_desc(irq);
  927. if (!desc)
  928. continue;
  929. raw_spin_lock_irqsave(&desc->lock, flags);
  930. chip = irq_data_get_irq_chip(&desc->irq_data);
  931. if (chip && chip->irq_cpu_online &&
  932. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  933. !irqd_irq_disabled(&desc->irq_data)))
  934. chip->irq_cpu_online(&desc->irq_data);
  935. raw_spin_unlock_irqrestore(&desc->lock, flags);
  936. }
  937. }
  938. /**
  939. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  940. *
  941. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  942. * for each.
  943. */
  944. void irq_cpu_offline(void)
  945. {
  946. struct irq_desc *desc;
  947. struct irq_chip *chip;
  948. unsigned long flags;
  949. unsigned int irq;
  950. for_each_active_irq(irq) {
  951. desc = irq_to_desc(irq);
  952. if (!desc)
  953. continue;
  954. raw_spin_lock_irqsave(&desc->lock, flags);
  955. chip = irq_data_get_irq_chip(&desc->irq_data);
  956. if (chip && chip->irq_cpu_offline &&
  957. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  958. !irqd_irq_disabled(&desc->irq_data)))
  959. chip->irq_cpu_offline(&desc->irq_data);
  960. raw_spin_unlock_irqrestore(&desc->lock, flags);
  961. }
  962. }
  963. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  964. #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
  965. /**
  966. * handle_fasteoi_ack_irq - irq handler for edge hierarchy
  967. * stacked on transparent controllers
  968. *
  969. * @desc: the interrupt description structure for this irq
  970. *
  971. * Like handle_fasteoi_irq(), but for use with hierarchy where
  972. * the irq_chip also needs to have its ->irq_ack() function
  973. * called.
  974. */
  975. void handle_fasteoi_ack_irq(struct irq_desc *desc)
  976. {
  977. struct irq_chip *chip = desc->irq_data.chip;
  978. raw_spin_lock(&desc->lock);
  979. if (!irq_may_run(desc))
  980. goto out;
  981. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  982. /*
  983. * If its disabled or no action available
  984. * then mask it and get out of here:
  985. */
  986. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  987. desc->istate |= IRQS_PENDING;
  988. mask_irq(desc);
  989. goto out;
  990. }
  991. kstat_incr_irqs_this_cpu(desc);
  992. if (desc->istate & IRQS_ONESHOT)
  993. mask_irq(desc);
  994. /* Start handling the irq */
  995. desc->irq_data.chip->irq_ack(&desc->irq_data);
  996. preflow_handler(desc);
  997. handle_irq_event(desc);
  998. cond_unmask_eoi_irq(desc, chip);
  999. raw_spin_unlock(&desc->lock);
  1000. return;
  1001. out:
  1002. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1003. chip->irq_eoi(&desc->irq_data);
  1004. raw_spin_unlock(&desc->lock);
  1005. }
  1006. EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
  1007. /**
  1008. * handle_fasteoi_mask_irq - irq handler for level hierarchy
  1009. * stacked on transparent controllers
  1010. *
  1011. * @desc: the interrupt description structure for this irq
  1012. *
  1013. * Like handle_fasteoi_irq(), but for use with hierarchy where
  1014. * the irq_chip also needs to have its ->irq_mask_ack() function
  1015. * called.
  1016. */
  1017. void handle_fasteoi_mask_irq(struct irq_desc *desc)
  1018. {
  1019. struct irq_chip *chip = desc->irq_data.chip;
  1020. raw_spin_lock(&desc->lock);
  1021. mask_ack_irq(desc);
  1022. if (!irq_may_run(desc))
  1023. goto out;
  1024. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  1025. /*
  1026. * If its disabled or no action available
  1027. * then mask it and get out of here:
  1028. */
  1029. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  1030. desc->istate |= IRQS_PENDING;
  1031. mask_irq(desc);
  1032. goto out;
  1033. }
  1034. kstat_incr_irqs_this_cpu(desc);
  1035. if (desc->istate & IRQS_ONESHOT)
  1036. mask_irq(desc);
  1037. preflow_handler(desc);
  1038. handle_irq_event(desc);
  1039. cond_unmask_eoi_irq(desc, chip);
  1040. raw_spin_unlock(&desc->lock);
  1041. return;
  1042. out:
  1043. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  1044. chip->irq_eoi(&desc->irq_data);
  1045. raw_spin_unlock(&desc->lock);
  1046. }
  1047. EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
  1048. #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
  1049. /**
  1050. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  1051. * NULL)
  1052. * @data: Pointer to interrupt specific data
  1053. */
  1054. void irq_chip_enable_parent(struct irq_data *data)
  1055. {
  1056. data = data->parent_data;
  1057. if (data->chip->irq_enable)
  1058. data->chip->irq_enable(data);
  1059. else
  1060. data->chip->irq_unmask(data);
  1061. }
  1062. EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
  1063. /**
  1064. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  1065. * NULL)
  1066. * @data: Pointer to interrupt specific data
  1067. */
  1068. void irq_chip_disable_parent(struct irq_data *data)
  1069. {
  1070. data = data->parent_data;
  1071. if (data->chip->irq_disable)
  1072. data->chip->irq_disable(data);
  1073. else
  1074. data->chip->irq_mask(data);
  1075. }
  1076. EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
  1077. /**
  1078. * irq_chip_ack_parent - Acknowledge the parent interrupt
  1079. * @data: Pointer to interrupt specific data
  1080. */
  1081. void irq_chip_ack_parent(struct irq_data *data)
  1082. {
  1083. data = data->parent_data;
  1084. data->chip->irq_ack(data);
  1085. }
  1086. EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
  1087. /**
  1088. * irq_chip_mask_parent - Mask the parent interrupt
  1089. * @data: Pointer to interrupt specific data
  1090. */
  1091. void irq_chip_mask_parent(struct irq_data *data)
  1092. {
  1093. data = data->parent_data;
  1094. data->chip->irq_mask(data);
  1095. }
  1096. EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
  1097. /**
  1098. * irq_chip_unmask_parent - Unmask the parent interrupt
  1099. * @data: Pointer to interrupt specific data
  1100. */
  1101. void irq_chip_unmask_parent(struct irq_data *data)
  1102. {
  1103. data = data->parent_data;
  1104. data->chip->irq_unmask(data);
  1105. }
  1106. EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
  1107. /**
  1108. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  1109. * @data: Pointer to interrupt specific data
  1110. */
  1111. void irq_chip_eoi_parent(struct irq_data *data)
  1112. {
  1113. data = data->parent_data;
  1114. data->chip->irq_eoi(data);
  1115. }
  1116. EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
  1117. /**
  1118. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  1119. * @data: Pointer to interrupt specific data
  1120. * @dest: The affinity mask to set
  1121. * @force: Flag to enforce setting (disable online checks)
  1122. *
  1123. * Conditinal, as the underlying parent chip might not implement it.
  1124. */
  1125. int irq_chip_set_affinity_parent(struct irq_data *data,
  1126. const struct cpumask *dest, bool force)
  1127. {
  1128. data = data->parent_data;
  1129. if (data->chip->irq_set_affinity)
  1130. return data->chip->irq_set_affinity(data, dest, force);
  1131. return -ENOSYS;
  1132. }
  1133. EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
  1134. /**
  1135. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  1136. * @data: Pointer to interrupt specific data
  1137. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  1138. *
  1139. * Conditional, as the underlying parent chip might not implement it.
  1140. */
  1141. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  1142. {
  1143. data = data->parent_data;
  1144. if (data->chip->irq_set_type)
  1145. return data->chip->irq_set_type(data, type);
  1146. return -ENOSYS;
  1147. }
  1148. EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
  1149. /**
  1150. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  1151. * @data: Pointer to interrupt specific data
  1152. *
  1153. * Iterate through the domain hierarchy of the interrupt and check
  1154. * whether a hw retrigger function exists. If yes, invoke it.
  1155. */
  1156. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  1157. {
  1158. for (data = data->parent_data; data; data = data->parent_data)
  1159. if (data->chip && data->chip->irq_retrigger)
  1160. return data->chip->irq_retrigger(data);
  1161. return 0;
  1162. }
  1163. /**
  1164. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  1165. * @data: Pointer to interrupt specific data
  1166. * @vcpu_info: The vcpu affinity information
  1167. */
  1168. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  1169. {
  1170. data = data->parent_data;
  1171. if (data->chip->irq_set_vcpu_affinity)
  1172. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  1173. return -ENOSYS;
  1174. }
  1175. /**
  1176. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  1177. * @data: Pointer to interrupt specific data
  1178. * @on: Whether to set or reset the wake-up capability of this irq
  1179. *
  1180. * Conditional, as the underlying parent chip might not implement it.
  1181. */
  1182. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  1183. {
  1184. data = data->parent_data;
  1185. if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
  1186. return 0;
  1187. if (data->chip->irq_set_wake)
  1188. return data->chip->irq_set_wake(data, on);
  1189. return -ENOSYS;
  1190. }
  1191. #endif
  1192. /**
  1193. * irq_chip_compose_msi_msg - Componse msi message for a irq chip
  1194. * @data: Pointer to interrupt specific data
  1195. * @msg: Pointer to the MSI message
  1196. *
  1197. * For hierarchical domains we find the first chip in the hierarchy
  1198. * which implements the irq_compose_msi_msg callback. For non
  1199. * hierarchical we use the top level chip.
  1200. */
  1201. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  1202. {
  1203. struct irq_data *pos = NULL;
  1204. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  1205. for (; data; data = data->parent_data)
  1206. #endif
  1207. if (data->chip && data->chip->irq_compose_msi_msg)
  1208. pos = data;
  1209. if (!pos)
  1210. return -ENOSYS;
  1211. pos->chip->irq_compose_msi_msg(pos, msg);
  1212. return 0;
  1213. }
  1214. /**
  1215. * irq_chip_pm_get - Enable power for an IRQ chip
  1216. * @data: Pointer to interrupt specific data
  1217. *
  1218. * Enable the power to the IRQ chip referenced by the interrupt data
  1219. * structure.
  1220. */
  1221. int irq_chip_pm_get(struct irq_data *data)
  1222. {
  1223. int retval;
  1224. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
  1225. retval = pm_runtime_get_sync(data->chip->parent_device);
  1226. if (retval < 0) {
  1227. pm_runtime_put_noidle(data->chip->parent_device);
  1228. return retval;
  1229. }
  1230. }
  1231. return 0;
  1232. }
  1233. /**
  1234. * irq_chip_pm_put - Disable power for an IRQ chip
  1235. * @data: Pointer to interrupt specific data
  1236. *
  1237. * Disable the power to the IRQ chip referenced by the interrupt data
  1238. * structure, belongs. Note that power will only be disabled, once this
  1239. * function has been called for all IRQs that have called irq_chip_pm_get().
  1240. */
  1241. int irq_chip_pm_put(struct irq_data *data)
  1242. {
  1243. int retval = 0;
  1244. if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
  1245. retval = pm_runtime_put(data->chip->parent_device);
  1246. return (retval < 0) ? retval : 0;
  1247. }