12345678910111213141516171819202122232425 |
- #ifndef __DT_BINDINGS_POWER_RK3366_POWER_H__
- #define __DT_BINDINGS_POWER_RK3366_POWER_H__
- /* VD_CORE */
- #define RK3366_PD_A53_0 0
- #define RK3366_PD_A53_1 1
- #define RK3366_PD_A53_2 2
- #define RK3366_PD_A53_3 3
- /* VD_LOGIC */
- #define RK3366_PD_BUS 4
- #define RK3366_PD_PERI 5
- #define RK3366_PD_VIO 6
- #define RK3366_PD_VIDEO 7
- #define RK3366_PD_RKVDEC 8
- #define RK3366_PD_WIFIBT 9
- #define RK3366_PD_VPU 10
- #define RK3366_PD_GPU 11
- #define RK3366_PD_ALIVE 12
- /* VD_PMU */
- #define RK3366_PD_PMU 13
- #endif
|