imx6sll-clock.h 6.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  4. * Copyright 2017-2018 NXP.
  5. *
  6. */
  7. #ifndef __DT_BINDINGS_CLOCK_IMX6SLL_H
  8. #define __DT_BINDINGS_CLOCK_IMX6SLL_H
  9. #define IMX6SLL_CLK_DUMMY 0
  10. #define IMX6SLL_CLK_CKIL 1
  11. #define IMX6SLL_CLK_OSC 2
  12. #define IMX6SLL_PLL1_BYPASS_SRC 3
  13. #define IMX6SLL_PLL2_BYPASS_SRC 4
  14. #define IMX6SLL_PLL3_BYPASS_SRC 5
  15. #define IMX6SLL_PLL4_BYPASS_SRC 6
  16. #define IMX6SLL_PLL5_BYPASS_SRC 7
  17. #define IMX6SLL_PLL6_BYPASS_SRC 8
  18. #define IMX6SLL_PLL7_BYPASS_SRC 9
  19. #define IMX6SLL_CLK_PLL1 10
  20. #define IMX6SLL_CLK_PLL2 11
  21. #define IMX6SLL_CLK_PLL3 12
  22. #define IMX6SLL_CLK_PLL4 13
  23. #define IMX6SLL_CLK_PLL5 14
  24. #define IMX6SLL_CLK_PLL6 15
  25. #define IMX6SLL_CLK_PLL7 16
  26. #define IMX6SLL_PLL1_BYPASS 17
  27. #define IMX6SLL_PLL2_BYPASS 18
  28. #define IMX6SLL_PLL3_BYPASS 19
  29. #define IMX6SLL_PLL4_BYPASS 20
  30. #define IMX6SLL_PLL5_BYPASS 21
  31. #define IMX6SLL_PLL6_BYPASS 22
  32. #define IMX6SLL_PLL7_BYPASS 23
  33. #define IMX6SLL_CLK_PLL1_SYS 24
  34. #define IMX6SLL_CLK_PLL2_BUS 25
  35. #define IMX6SLL_CLK_PLL3_USB_OTG 26
  36. #define IMX6SLL_CLK_PLL4_AUDIO 27
  37. #define IMX6SLL_CLK_PLL5_VIDEO 28
  38. #define IMX6SLL_CLK_PLL6_ENET 29
  39. #define IMX6SLL_CLK_PLL7_USB_HOST 30
  40. #define IMX6SLL_CLK_USBPHY1 31
  41. #define IMX6SLL_CLK_USBPHY2 32
  42. #define IMX6SLL_CLK_USBPHY1_GATE 33
  43. #define IMX6SLL_CLK_USBPHY2_GATE 34
  44. #define IMX6SLL_CLK_PLL2_PFD0 35
  45. #define IMX6SLL_CLK_PLL2_PFD1 36
  46. #define IMX6SLL_CLK_PLL2_PFD2 37
  47. #define IMX6SLL_CLK_PLL2_PFD3 38
  48. #define IMX6SLL_CLK_PLL3_PFD0 39
  49. #define IMX6SLL_CLK_PLL3_PFD1 40
  50. #define IMX6SLL_CLK_PLL3_PFD2 41
  51. #define IMX6SLL_CLK_PLL3_PFD3 42
  52. #define IMX6SLL_CLK_PLL4_POST_DIV 43
  53. #define IMX6SLL_CLK_PLL4_AUDIO_DIV 44
  54. #define IMX6SLL_CLK_PLL5_POST_DIV 45
  55. #define IMX6SLL_CLK_PLL5_VIDEO_DIV 46
  56. #define IMX6SLL_CLK_PLL2_198M 47
  57. #define IMX6SLL_CLK_PLL3_120M 48
  58. #define IMX6SLL_CLK_PLL3_80M 49
  59. #define IMX6SLL_CLK_PLL3_60M 50
  60. #define IMX6SLL_CLK_STEP 51
  61. #define IMX6SLL_CLK_PLL1_SW 52
  62. #define IMX6SLL_CLK_AXI_ALT_SEL 53
  63. #define IMX6SLL_CLK_AXI_SEL 54
  64. #define IMX6SLL_CLK_PERIPH_PRE 55
  65. #define IMX6SLL_CLK_PERIPH2_PRE 56
  66. #define IMX6SLL_CLK_PERIPH_CLK2_SEL 57
  67. #define IMX6SLL_CLK_PERIPH2_CLK2_SEL 58
  68. #define IMX6SLL_CLK_PERCLK_SEL 59
  69. #define IMX6SLL_CLK_USDHC1_SEL 60
  70. #define IMX6SLL_CLK_USDHC2_SEL 61
  71. #define IMX6SLL_CLK_USDHC3_SEL 62
  72. #define IMX6SLL_CLK_SSI1_SEL 63
  73. #define IMX6SLL_CLK_SSI2_SEL 64
  74. #define IMX6SLL_CLK_SSI3_SEL 65
  75. #define IMX6SLL_CLK_PXP_SEL 66
  76. #define IMX6SLL_CLK_LCDIF_PRE_SEL 67
  77. #define IMX6SLL_CLK_LCDIF_SEL 68
  78. #define IMX6SLL_CLK_EPDC_PRE_SEL 69
  79. #define IMX6SLL_CLK_SPDIF_SEL 70
  80. #define IMX6SLL_CLK_ECSPI_SEL 71
  81. #define IMX6SLL_CLK_UART_SEL 72
  82. #define IMX6SLL_CLK_ARM 73
  83. #define IMX6SLL_CLK_PERIPH 74
  84. #define IMX6SLL_CLK_PERIPH2 75
  85. #define IMX6SLL_CLK_PERIPH2_CLK2 76
  86. #define IMX6SLL_CLK_PERIPH_CLK2 77
  87. #define IMX6SLL_CLK_MMDC_PODF 78
  88. #define IMX6SLL_CLK_AXI_PODF 79
  89. #define IMX6SLL_CLK_AHB 80
  90. #define IMX6SLL_CLK_IPG 81
  91. #define IMX6SLL_CLK_PERCLK 82
  92. #define IMX6SLL_CLK_USDHC1_PODF 83
  93. #define IMX6SLL_CLK_USDHC2_PODF 84
  94. #define IMX6SLL_CLK_USDHC3_PODF 85
  95. #define IMX6SLL_CLK_SSI1_PRED 86
  96. #define IMX6SLL_CLK_SSI2_PRED 87
  97. #define IMX6SLL_CLK_SSI3_PRED 88
  98. #define IMX6SLL_CLK_SSI1_PODF 89
  99. #define IMX6SLL_CLK_SSI2_PODF 90
  100. #define IMX6SLL_CLK_SSI3_PODF 91
  101. #define IMX6SLL_CLK_PXP_PODF 92
  102. #define IMX6SLL_CLK_LCDIF_PRED 93
  103. #define IMX6SLL_CLK_LCDIF_PODF 94
  104. #define IMX6SLL_CLK_EPDC_SEL 95
  105. #define IMX6SLL_CLK_EPDC_PODF 96
  106. #define IMX6SLL_CLK_SPDIF_PRED 97
  107. #define IMX6SLL_CLK_SPDIF_PODF 98
  108. #define IMX6SLL_CLK_ECSPI_PODF 99
  109. #define IMX6SLL_CLK_UART_PODF 100
  110. /* CCGR 0 */
  111. #define IMX6SLL_CLK_AIPSTZ1 101
  112. #define IMX6SLL_CLK_AIPSTZ2 102
  113. #define IMX6SLL_CLK_DCP 103
  114. #define IMX6SLL_CLK_UART2_IPG 104
  115. #define IMX6SLL_CLK_UART2_SERIAL 105
  116. /* CCGR 1 */
  117. #define IMX6SLL_CLK_ECSPI1 106
  118. #define IMX6SLL_CLK_ECSPI2 107
  119. #define IMX6SLL_CLK_ECSPI3 108
  120. #define IMX6SLL_CLK_ECSPI4 109
  121. #define IMX6SLL_CLK_UART3_IPG 110
  122. #define IMX6SLL_CLK_UART3_SERIAL 111
  123. #define IMX6SLL_CLK_UART4_IPG 112
  124. #define IMX6SLL_CLK_UART4_SERIAL 113
  125. #define IMX6SLL_CLK_EPIT1 114
  126. #define IMX6SLL_CLK_EPIT2 115
  127. #define IMX6SLL_CLK_GPT_BUS 116
  128. #define IMX6SLL_CLK_GPT_SERIAL 117
  129. /* CCGR2 */
  130. #define IMX6SLL_CLK_CSI 118
  131. #define IMX6SLL_CLK_I2C1 119
  132. #define IMX6SLL_CLK_I2C2 120
  133. #define IMX6SLL_CLK_I2C3 121
  134. #define IMX6SLL_CLK_OCOTP 122
  135. #define IMX6SLL_CLK_LCDIF_APB 123
  136. #define IMX6SLL_CLK_PXP 124
  137. /* CCGR3 */
  138. #define IMX6SLL_CLK_UART5_IPG 125
  139. #define IMX6SLL_CLK_UART5_SERIAL 126
  140. #define IMX6SLL_CLK_EPDC_AXI 127
  141. #define IMX6SLL_CLK_EPDC_PIX 128
  142. #define IMX6SLL_CLK_LCDIF_PIX 129
  143. #define IMX6SLL_CLK_WDOG1 130
  144. #define IMX6SLL_CLK_MMDC_P0_FAST 131
  145. #define IMX6SLL_CLK_MMDC_P0_IPG 132
  146. #define IMX6SLL_CLK_OCRAM 133
  147. /* CCGR4 */
  148. #define IMX6SLL_CLK_PWM1 134
  149. #define IMX6SLL_CLK_PWM2 135
  150. #define IMX6SLL_CLK_PWM3 136
  151. #define IMX6SLL_CLK_PWM4 137
  152. /* CCGR 5 */
  153. #define IMX6SLL_CLK_ROM 138
  154. #define IMX6SLL_CLK_SDMA 139
  155. #define IMX6SLL_CLK_KPP 140
  156. #define IMX6SLL_CLK_WDOG2 141
  157. #define IMX6SLL_CLK_SPBA 142
  158. #define IMX6SLL_CLK_SPDIF 143
  159. #define IMX6SLL_CLK_SPDIF_GCLK 144
  160. #define IMX6SLL_CLK_SSI1 145
  161. #define IMX6SLL_CLK_SSI1_IPG 146
  162. #define IMX6SLL_CLK_SSI2 147
  163. #define IMX6SLL_CLK_SSI2_IPG 148
  164. #define IMX6SLL_CLK_SSI3 149
  165. #define IMX6SLL_CLK_SSI3_IPG 150
  166. #define IMX6SLL_CLK_UART1_IPG 151
  167. #define IMX6SLL_CLK_UART1_SERIAL 152
  168. /* CCGR 6 */
  169. #define IMX6SLL_CLK_USBOH3 153
  170. #define IMX6SLL_CLK_USDHC1 154
  171. #define IMX6SLL_CLK_USDHC2 155
  172. #define IMX6SLL_CLK_USDHC3 156
  173. #define IMX6SLL_CLK_IPP_DI0 157
  174. #define IMX6SLL_CLK_IPP_DI1 158
  175. #define IMX6SLL_CLK_LDB_DI0_SEL 159
  176. #define IMX6SLL_CLK_LDB_DI0_DIV_3_5 160
  177. #define IMX6SLL_CLK_LDB_DI0_DIV_7 161
  178. #define IMX6SLL_CLK_LDB_DI0_DIV_SEL 162
  179. #define IMX6SLL_CLK_LDB_DI0 163
  180. #define IMX6SLL_CLK_LDB_DI1_SEL 164
  181. #define IMX6SLL_CLK_LDB_DI1_DIV_3_5 165
  182. #define IMX6SLL_CLK_LDB_DI1_DIV_7 166
  183. #define IMX6SLL_CLK_LDB_DI1_DIV_SEL 167
  184. #define IMX6SLL_CLK_LDB_DI1 168
  185. #define IMX6SLL_CLK_EXTERN_AUDIO_SEL 169
  186. #define IMX6SLL_CLK_EXTERN_AUDIO_PRED 170
  187. #define IMX6SLL_CLK_EXTERN_AUDIO_PODF 171
  188. #define IMX6SLL_CLK_EXTERN_AUDIO 172
  189. #define IMX6SLL_CLK_GPIO1 173
  190. #define IMX6SLL_CLK_GPIO2 174
  191. #define IMX6SLL_CLK_GPIO3 175
  192. #define IMX6SLL_CLK_GPIO4 176
  193. #define IMX6SLL_CLK_GPIO5 177
  194. #define IMX6SLL_CLK_GPIO6 178
  195. #define IMX6SLL_CLK_END 179
  196. #endif /* __DT_BINDINGS_CLOCK_IMX6SLL_H */