tlb.h 9.4 KB

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  1. /* include/asm-generic/tlb.h
  2. *
  3. * Generic TLB shootdown code
  4. *
  5. * Copyright 2001 Red Hat, Inc.
  6. * Based on code from mm/memory.c Copyright Linus Torvalds and others.
  7. *
  8. * Copyright 2011 Red Hat, Inc., Peter Zijlstra
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * as published by the Free Software Foundation; either version
  13. * 2 of the License, or (at your option) any later version.
  14. */
  15. #ifndef _ASM_GENERIC__TLB_H
  16. #define _ASM_GENERIC__TLB_H
  17. #include <linux/mmu_notifier.h>
  18. #include <linux/swap.h>
  19. #include <asm/pgalloc.h>
  20. #include <asm/tlbflush.h>
  21. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  22. /*
  23. * Semi RCU freeing of the page directories.
  24. *
  25. * This is needed by some architectures to implement software pagetable walkers.
  26. *
  27. * gup_fast() and other software pagetable walkers do a lockless page-table
  28. * walk and therefore needs some synchronization with the freeing of the page
  29. * directories. The chosen means to accomplish that is by disabling IRQs over
  30. * the walk.
  31. *
  32. * Architectures that use IPIs to flush TLBs will then automagically DTRT,
  33. * since we unlink the page, flush TLBs, free the page. Since the disabling of
  34. * IRQs delays the completion of the TLB flush we can never observe an already
  35. * freed page.
  36. *
  37. * Architectures that do not have this (PPC) need to delay the freeing by some
  38. * other means, this is that means.
  39. *
  40. * What we do is batch the freed directory pages (tables) and RCU free them.
  41. * We use the sched RCU variant, as that guarantees that IRQ/preempt disabling
  42. * holds off grace periods.
  43. *
  44. * However, in order to batch these pages we need to allocate storage, this
  45. * allocation is deep inside the MM code and can thus easily fail on memory
  46. * pressure. To guarantee progress we fall back to single table freeing, see
  47. * the implementation of tlb_remove_table_one().
  48. *
  49. */
  50. struct mmu_table_batch {
  51. struct rcu_head rcu;
  52. unsigned int nr;
  53. void *tables[0];
  54. };
  55. #define MAX_TABLE_BATCH \
  56. ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
  57. extern void tlb_table_flush(struct mmu_gather *tlb);
  58. extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
  59. #endif
  60. /*
  61. * If we can't allocate a page to make a big batch of page pointers
  62. * to work on, then just handle a few from the on-stack structure.
  63. */
  64. #define MMU_GATHER_BUNDLE 8
  65. struct mmu_gather_batch {
  66. struct mmu_gather_batch *next;
  67. unsigned int nr;
  68. unsigned int max;
  69. struct page *pages[0];
  70. };
  71. #define MAX_GATHER_BATCH \
  72. ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *))
  73. /*
  74. * Limit the maximum number of mmu_gather batches to reduce a risk of soft
  75. * lockups for non-preemptible kernels on huge machines when a lot of memory
  76. * is zapped during unmapping.
  77. * 10K pages freed at once should be safe even without a preemption point.
  78. */
  79. #define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH)
  80. /* struct mmu_gather is an opaque type used by the mm code for passing around
  81. * any data needed by arch specific code for tlb_remove_page.
  82. */
  83. struct mmu_gather {
  84. struct mm_struct *mm;
  85. #ifdef CONFIG_HAVE_RCU_TABLE_FREE
  86. struct mmu_table_batch *batch;
  87. #endif
  88. unsigned long start;
  89. unsigned long end;
  90. /* we are in the middle of an operation to clear
  91. * a full mm and can make some optimizations */
  92. unsigned int fullmm : 1,
  93. /* we have performed an operation which
  94. * requires a complete flush of the tlb */
  95. need_flush_all : 1;
  96. struct mmu_gather_batch *active;
  97. struct mmu_gather_batch local;
  98. struct page *__pages[MMU_GATHER_BUNDLE];
  99. unsigned int batch_count;
  100. int page_size;
  101. };
  102. #define HAVE_GENERIC_MMU_GATHER
  103. void arch_tlb_gather_mmu(struct mmu_gather *tlb,
  104. struct mm_struct *mm, unsigned long start, unsigned long end);
  105. void tlb_flush_mmu(struct mmu_gather *tlb);
  106. void arch_tlb_finish_mmu(struct mmu_gather *tlb,
  107. unsigned long start, unsigned long end, bool force);
  108. extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page,
  109. int page_size);
  110. static inline void __tlb_adjust_range(struct mmu_gather *tlb,
  111. unsigned long address,
  112. unsigned int range_size)
  113. {
  114. tlb->start = min(tlb->start, address);
  115. tlb->end = max(tlb->end, address + range_size);
  116. }
  117. static inline void __tlb_reset_range(struct mmu_gather *tlb)
  118. {
  119. if (tlb->fullmm) {
  120. tlb->start = tlb->end = ~0;
  121. } else {
  122. tlb->start = TASK_SIZE;
  123. tlb->end = 0;
  124. }
  125. }
  126. static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
  127. {
  128. if (!tlb->end)
  129. return;
  130. tlb_flush(tlb);
  131. mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end);
  132. __tlb_reset_range(tlb);
  133. }
  134. static inline void tlb_remove_page_size(struct mmu_gather *tlb,
  135. struct page *page, int page_size)
  136. {
  137. if (__tlb_remove_page_size(tlb, page, page_size))
  138. tlb_flush_mmu(tlb);
  139. }
  140. static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
  141. {
  142. return __tlb_remove_page_size(tlb, page, PAGE_SIZE);
  143. }
  144. /* tlb_remove_page
  145. * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when
  146. * required.
  147. */
  148. static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
  149. {
  150. return tlb_remove_page_size(tlb, page, PAGE_SIZE);
  151. }
  152. #ifndef tlb_remove_check_page_size_change
  153. #define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
  154. static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
  155. unsigned int page_size)
  156. {
  157. /*
  158. * We don't care about page size change, just update
  159. * mmu_gather page size here so that debug checks
  160. * doesn't throw false warning.
  161. */
  162. #ifdef CONFIG_DEBUG_VM
  163. tlb->page_size = page_size;
  164. #endif
  165. }
  166. #endif
  167. /*
  168. * In the case of tlb vma handling, we can optimise these away in the
  169. * case where we're doing a full MM flush. When we're doing a munmap,
  170. * the vmas are adjusted to only cover the region to be torn down.
  171. */
  172. #ifndef tlb_start_vma
  173. #define tlb_start_vma(tlb, vma) do { } while (0)
  174. #endif
  175. #define __tlb_end_vma(tlb, vma) \
  176. do { \
  177. if (!tlb->fullmm) \
  178. tlb_flush_mmu_tlbonly(tlb); \
  179. } while (0)
  180. #ifndef tlb_end_vma
  181. #define tlb_end_vma __tlb_end_vma
  182. #endif
  183. #ifndef __tlb_remove_tlb_entry
  184. #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
  185. #endif
  186. /**
  187. * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
  188. *
  189. * Record the fact that pte's were really unmapped by updating the range,
  190. * so we can later optimise away the tlb invalidate. This helps when
  191. * userspace is unmapping already-unmapped pages, which happens quite a lot.
  192. */
  193. #define tlb_remove_tlb_entry(tlb, ptep, address) \
  194. do { \
  195. __tlb_adjust_range(tlb, address, PAGE_SIZE); \
  196. __tlb_remove_tlb_entry(tlb, ptep, address); \
  197. } while (0)
  198. #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
  199. do { \
  200. __tlb_adjust_range(tlb, address, huge_page_size(h)); \
  201. __tlb_remove_tlb_entry(tlb, ptep, address); \
  202. } while (0)
  203. /**
  204. * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation
  205. * This is a nop so far, because only x86 needs it.
  206. */
  207. #ifndef __tlb_remove_pmd_tlb_entry
  208. #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0)
  209. #endif
  210. #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \
  211. do { \
  212. __tlb_adjust_range(tlb, address, HPAGE_PMD_SIZE); \
  213. __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \
  214. } while (0)
  215. /**
  216. * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb
  217. * invalidation. This is a nop so far, because only x86 needs it.
  218. */
  219. #ifndef __tlb_remove_pud_tlb_entry
  220. #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0)
  221. #endif
  222. #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \
  223. do { \
  224. __tlb_adjust_range(tlb, address, HPAGE_PUD_SIZE); \
  225. __tlb_remove_pud_tlb_entry(tlb, pudp, address); \
  226. } while (0)
  227. /*
  228. * For things like page tables caches (ie caching addresses "inside" the
  229. * page tables, like x86 does), for legacy reasons, flushing an
  230. * individual page had better flush the page table caches behind it. This
  231. * is definitely how x86 works, for example. And if you have an
  232. * architected non-legacy page table cache (which I'm not aware of
  233. * anybody actually doing), you're going to have some architecturally
  234. * explicit flushing for that, likely *separate* from a regular TLB entry
  235. * flush, and thus you'd need more than just some range expansion..
  236. *
  237. * So if we ever find an architecture
  238. * that would want something that odd, I think it is up to that
  239. * architecture to do its own odd thing, not cause pain for others
  240. * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com
  241. *
  242. * For now w.r.t page table cache, mark the range_size as PAGE_SIZE
  243. */
  244. #ifndef pte_free_tlb
  245. #define pte_free_tlb(tlb, ptep, address) \
  246. do { \
  247. __tlb_adjust_range(tlb, address, PAGE_SIZE); \
  248. __pte_free_tlb(tlb, ptep, address); \
  249. } while (0)
  250. #endif
  251. #ifndef pmd_free_tlb
  252. #define pmd_free_tlb(tlb, pmdp, address) \
  253. do { \
  254. __tlb_adjust_range(tlb, address, PAGE_SIZE); \
  255. __pmd_free_tlb(tlb, pmdp, address); \
  256. } while (0)
  257. #endif
  258. #ifndef __ARCH_HAS_4LEVEL_HACK
  259. #ifndef pud_free_tlb
  260. #define pud_free_tlb(tlb, pudp, address) \
  261. do { \
  262. __tlb_adjust_range(tlb, address, PAGE_SIZE); \
  263. __pud_free_tlb(tlb, pudp, address); \
  264. } while (0)
  265. #endif
  266. #endif
  267. #ifndef __ARCH_HAS_5LEVEL_HACK
  268. #ifndef p4d_free_tlb
  269. #define p4d_free_tlb(tlb, pudp, address) \
  270. do { \
  271. __tlb_adjust_range(tlb, address, PAGE_SIZE); \
  272. __p4d_free_tlb(tlb, pudp, address); \
  273. } while (0)
  274. #endif
  275. #endif
  276. #define tlb_migrate_finish(mm) do {} while (0)
  277. #endif /* _ASM_GENERIC__TLB_H */