iop_wdt.c 5.9 KB

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  1. /*
  2. * drivers/char/watchdog/iop_wdt.c
  3. *
  4. * WDT driver for Intel I/O Processors
  5. * Copyright (C) 2005, Intel Corporation.
  6. *
  7. * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  20. * Place - Suite 330, Boston, MA 02111-1307 USA.
  21. *
  22. * Curt E Bruns <curt.e.bruns@intel.com>
  23. * Peter Milne <peter.milne@d-tacq.com>
  24. * Dan Williams <dan.j.williams@intel.com>
  25. */
  26. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/fs.h>
  30. #include <linux/init.h>
  31. #include <linux/device.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/watchdog.h>
  34. #include <linux/uaccess.h>
  35. #include <mach/hardware.h>
  36. static bool nowayout = WATCHDOG_NOWAYOUT;
  37. static unsigned long wdt_status;
  38. static unsigned long boot_status;
  39. static DEFINE_SPINLOCK(wdt_lock);
  40. #define WDT_IN_USE 0
  41. #define WDT_OK_TO_CLOSE 1
  42. #define WDT_ENABLED 2
  43. static unsigned long iop_watchdog_timeout(void)
  44. {
  45. return (0xffffffffUL / get_iop_tick_rate());
  46. }
  47. /**
  48. * wdt_supports_disable - determine if we are accessing a iop13xx watchdog
  49. * or iop3xx by whether it has a disable command
  50. */
  51. static int wdt_supports_disable(void)
  52. {
  53. int can_disable;
  54. if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
  55. can_disable = 1;
  56. else
  57. can_disable = 0;
  58. return can_disable;
  59. }
  60. static void wdt_enable(void)
  61. {
  62. /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
  63. * Takes approx. 10.7s to timeout
  64. */
  65. spin_lock(&wdt_lock);
  66. write_wdtcr(IOP_WDTCR_EN_ARM);
  67. write_wdtcr(IOP_WDTCR_EN);
  68. spin_unlock(&wdt_lock);
  69. }
  70. /* returns 0 if the timer was successfully disabled */
  71. static int wdt_disable(void)
  72. {
  73. /* Stop Counting */
  74. if (wdt_supports_disable()) {
  75. spin_lock(&wdt_lock);
  76. write_wdtcr(IOP_WDTCR_DIS_ARM);
  77. write_wdtcr(IOP_WDTCR_DIS);
  78. clear_bit(WDT_ENABLED, &wdt_status);
  79. spin_unlock(&wdt_lock);
  80. pr_info("Disabled\n");
  81. return 0;
  82. } else
  83. return 1;
  84. }
  85. static int iop_wdt_open(struct inode *inode, struct file *file)
  86. {
  87. if (test_and_set_bit(WDT_IN_USE, &wdt_status))
  88. return -EBUSY;
  89. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  90. wdt_enable();
  91. set_bit(WDT_ENABLED, &wdt_status);
  92. return nonseekable_open(inode, file);
  93. }
  94. static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len,
  95. loff_t *ppos)
  96. {
  97. if (len) {
  98. if (!nowayout) {
  99. size_t i;
  100. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  101. for (i = 0; i != len; i++) {
  102. char c;
  103. if (get_user(c, data + i))
  104. return -EFAULT;
  105. if (c == 'V')
  106. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  107. }
  108. }
  109. wdt_enable();
  110. }
  111. return len;
  112. }
  113. static const struct watchdog_info ident = {
  114. .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  115. .identity = "iop watchdog",
  116. };
  117. static long iop_wdt_ioctl(struct file *file,
  118. unsigned int cmd, unsigned long arg)
  119. {
  120. int options;
  121. int ret = -ENOTTY;
  122. int __user *argp = (int __user *)arg;
  123. switch (cmd) {
  124. case WDIOC_GETSUPPORT:
  125. if (copy_to_user(argp, &ident, sizeof(ident)))
  126. ret = -EFAULT;
  127. else
  128. ret = 0;
  129. break;
  130. case WDIOC_GETSTATUS:
  131. ret = put_user(0, argp);
  132. break;
  133. case WDIOC_GETBOOTSTATUS:
  134. ret = put_user(boot_status, argp);
  135. break;
  136. case WDIOC_SETOPTIONS:
  137. if (get_user(options, (int *)arg))
  138. return -EFAULT;
  139. if (options & WDIOS_DISABLECARD) {
  140. if (!nowayout) {
  141. if (wdt_disable() == 0) {
  142. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  143. ret = 0;
  144. } else
  145. ret = -ENXIO;
  146. } else
  147. ret = 0;
  148. }
  149. if (options & WDIOS_ENABLECARD) {
  150. wdt_enable();
  151. ret = 0;
  152. }
  153. break;
  154. case WDIOC_KEEPALIVE:
  155. wdt_enable();
  156. ret = 0;
  157. break;
  158. case WDIOC_GETTIMEOUT:
  159. ret = put_user(iop_watchdog_timeout(), argp);
  160. break;
  161. }
  162. return ret;
  163. }
  164. static int iop_wdt_release(struct inode *inode, struct file *file)
  165. {
  166. int state = 1;
  167. if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
  168. if (test_bit(WDT_ENABLED, &wdt_status))
  169. state = wdt_disable();
  170. /* if the timer is not disabled reload and notify that we are still
  171. * going down
  172. */
  173. if (state != 0) {
  174. wdt_enable();
  175. pr_crit("Device closed unexpectedly - reset in %lu seconds\n",
  176. iop_watchdog_timeout());
  177. }
  178. clear_bit(WDT_IN_USE, &wdt_status);
  179. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  180. return 0;
  181. }
  182. static const struct file_operations iop_wdt_fops = {
  183. .owner = THIS_MODULE,
  184. .llseek = no_llseek,
  185. .write = iop_wdt_write,
  186. .unlocked_ioctl = iop_wdt_ioctl,
  187. .open = iop_wdt_open,
  188. .release = iop_wdt_release,
  189. };
  190. static struct miscdevice iop_wdt_miscdev = {
  191. .minor = WATCHDOG_MINOR,
  192. .name = "watchdog",
  193. .fops = &iop_wdt_fops,
  194. };
  195. static int __init iop_wdt_init(void)
  196. {
  197. int ret;
  198. /* check if the reset was caused by the watchdog timer */
  199. boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
  200. /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
  201. * NOTE: An IB Reset will Reset both cores in the IOP342
  202. */
  203. write_wdtsr(IOP13XX_WDTCR_IB_RESET);
  204. /* Register after we have the device set up so we cannot race
  205. with an open */
  206. ret = misc_register(&iop_wdt_miscdev);
  207. if (ret == 0)
  208. pr_info("timeout %lu sec\n", iop_watchdog_timeout());
  209. return ret;
  210. }
  211. static void __exit iop_wdt_exit(void)
  212. {
  213. misc_deregister(&iop_wdt_miscdev);
  214. }
  215. module_init(iop_wdt_init);
  216. module_exit(iop_wdt_exit);
  217. module_param(nowayout, bool, 0);
  218. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
  219. MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
  220. MODULE_DESCRIPTION("iop watchdog timer driver");
  221. MODULE_LICENSE("GPL");