musb_dma.h 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * MUSB OTG driver DMA controller abstraction
  4. *
  5. * Copyright 2005 Mentor Graphics Corporation
  6. * Copyright (C) 2005-2006 by Texas Instruments
  7. * Copyright (C) 2006-2007 Nokia Corporation
  8. */
  9. #ifndef __MUSB_DMA_H__
  10. #define __MUSB_DMA_H__
  11. struct musb_hw_ep;
  12. /*
  13. * DMA Controller Abstraction
  14. *
  15. * DMA Controllers are abstracted to allow use of a variety of different
  16. * implementations of DMA, as allowed by the Inventra USB cores. On the
  17. * host side, usbcore sets up the DMA mappings and flushes caches; on the
  18. * peripheral side, the gadget controller driver does. Responsibilities
  19. * of a DMA controller driver include:
  20. *
  21. * - Handling the details of moving multiple USB packets
  22. * in cooperation with the Inventra USB core, including especially
  23. * the correct RX side treatment of short packets and buffer-full
  24. * states (both of which terminate transfers).
  25. *
  26. * - Knowing the correlation between dma channels and the
  27. * Inventra core's local endpoint resources and data direction.
  28. *
  29. * - Maintaining a list of allocated/available channels.
  30. *
  31. * - Updating channel status on interrupts,
  32. * whether shared with the Inventra core or separate.
  33. */
  34. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  35. #ifdef CONFIG_MUSB_PIO_ONLY
  36. #define is_dma_capable() (0)
  37. #else
  38. #define is_dma_capable() (1)
  39. #endif
  40. #ifdef CONFIG_USB_UX500_DMA
  41. #define musb_dma_ux500(musb) (musb->ops->quirks & MUSB_DMA_UX500)
  42. #else
  43. #define musb_dma_ux500(musb) 0
  44. #endif
  45. #ifdef CONFIG_USB_TI_CPPI41_DMA
  46. #define musb_dma_cppi41(musb) (musb->ops->quirks & MUSB_DMA_CPPI41)
  47. #else
  48. #define musb_dma_cppi41(musb) 0
  49. #endif
  50. #ifdef CONFIG_USB_TI_CPPI_DMA
  51. #define musb_dma_cppi(musb) (musb->ops->quirks & MUSB_DMA_CPPI)
  52. #else
  53. #define musb_dma_cppi(musb) 0
  54. #endif
  55. #ifdef CONFIG_USB_TUSB_OMAP_DMA
  56. #define tusb_dma_omap(musb) (musb->ops->quirks & MUSB_DMA_TUSB_OMAP)
  57. #else
  58. #define tusb_dma_omap(musb) 0
  59. #endif
  60. #ifdef CONFIG_USB_INVENTRA_DMA
  61. #define musb_dma_inventra(musb) (musb->ops->quirks & MUSB_DMA_INVENTRA)
  62. #else
  63. #define musb_dma_inventra(musb) 0
  64. #endif
  65. #if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
  66. #define is_cppi_enabled(musb) \
  67. (musb_dma_cppi(musb) || musb_dma_cppi41(musb))
  68. #else
  69. #define is_cppi_enabled(musb) 0
  70. #endif
  71. /*
  72. * DMA channel status ... updated by the dma controller driver whenever that
  73. * status changes, and protected by the overall controller spinlock.
  74. */
  75. enum dma_channel_status {
  76. /* unallocated */
  77. MUSB_DMA_STATUS_UNKNOWN,
  78. /* allocated ... but not busy, no errors */
  79. MUSB_DMA_STATUS_FREE,
  80. /* busy ... transactions are active */
  81. MUSB_DMA_STATUS_BUSY,
  82. /* transaction(s) aborted due to ... dma or memory bus error */
  83. MUSB_DMA_STATUS_BUS_ABORT,
  84. /* transaction(s) aborted due to ... core error or USB fault */
  85. MUSB_DMA_STATUS_CORE_ABORT
  86. };
  87. struct dma_controller;
  88. /**
  89. * struct dma_channel - A DMA channel.
  90. * @private_data: channel-private data
  91. * @max_len: the maximum number of bytes the channel can move in one
  92. * transaction (typically representing many USB maximum-sized packets)
  93. * @actual_len: how many bytes have been transferred
  94. * @status: current channel status (updated e.g. on interrupt)
  95. * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
  96. *
  97. * channels are associated with an endpoint for the duration of at least
  98. * one usb transfer.
  99. */
  100. struct dma_channel {
  101. void *private_data;
  102. /* FIXME not void* private_data, but a dma_controller * */
  103. size_t max_len;
  104. size_t actual_len;
  105. enum dma_channel_status status;
  106. bool desired_mode;
  107. bool rx_packet_done;
  108. };
  109. /*
  110. * dma_channel_status - return status of dma channel
  111. * @c: the channel
  112. *
  113. * Returns the software's view of the channel status. If that status is BUSY
  114. * then it's possible that the hardware has completed (or aborted) a transfer,
  115. * so the driver needs to update that status.
  116. */
  117. static inline enum dma_channel_status
  118. dma_channel_status(struct dma_channel *c)
  119. {
  120. return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
  121. }
  122. /**
  123. * struct dma_controller - A DMA Controller.
  124. * @musb: the usb controller
  125. * @start: call this to start a DMA controller;
  126. * return 0 on success, else negative errno
  127. * @stop: call this to stop a DMA controller
  128. * return 0 on success, else negative errno
  129. * @channel_alloc: call this to allocate a DMA channel
  130. * @channel_release: call this to release a DMA channel
  131. * @channel_abort: call this to abort a pending DMA transaction,
  132. * returning it to FREE (but allocated) state
  133. * @dma_callback: invoked on DMA completion, useful to run platform
  134. * code such IRQ acknowledgment.
  135. *
  136. * Controllers manage dma channels.
  137. */
  138. struct dma_controller {
  139. struct musb *musb;
  140. struct dma_channel *(*channel_alloc)(struct dma_controller *,
  141. struct musb_hw_ep *, u8 is_tx);
  142. void (*channel_release)(struct dma_channel *);
  143. int (*channel_program)(struct dma_channel *channel,
  144. u16 maxpacket, u8 mode,
  145. dma_addr_t dma_addr,
  146. u32 length);
  147. int (*channel_abort)(struct dma_channel *);
  148. int (*is_compatible)(struct dma_channel *channel,
  149. u16 maxpacket,
  150. void *buf, u32 length);
  151. void (*dma_callback)(struct dma_controller *);
  152. };
  153. /* called after channel_program(), may indicate a fault */
  154. extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
  155. #ifdef CONFIG_MUSB_PIO_ONLY
  156. static inline struct dma_controller *
  157. musb_dma_controller_create(struct musb *m, void __iomem *io)
  158. {
  159. return NULL;
  160. }
  161. static inline void musb_dma_controller_destroy(struct dma_controller *d) { }
  162. #else
  163. extern struct dma_controller *
  164. (*musb_dma_controller_create)(struct musb *, void __iomem *);
  165. extern void (*musb_dma_controller_destroy)(struct dma_controller *);
  166. #endif
  167. /* Platform specific DMA functions */
  168. extern struct dma_controller *
  169. musbhs_dma_controller_create(struct musb *musb, void __iomem *base);
  170. extern void musbhs_dma_controller_destroy(struct dma_controller *c);
  171. extern struct dma_controller *
  172. tusb_dma_controller_create(struct musb *musb, void __iomem *base);
  173. extern void tusb_dma_controller_destroy(struct dma_controller *c);
  174. extern struct dma_controller *
  175. cppi_dma_controller_create(struct musb *musb, void __iomem *base);
  176. extern void cppi_dma_controller_destroy(struct dma_controller *c);
  177. extern struct dma_controller *
  178. cppi41_dma_controller_create(struct musb *musb, void __iomem *base);
  179. extern void cppi41_dma_controller_destroy(struct dma_controller *c);
  180. extern struct dma_controller *
  181. ux500_dma_controller_create(struct musb *musb, void __iomem *base);
  182. extern void ux500_dma_controller_destroy(struct dma_controller *c);
  183. #endif /* __MUSB_DMA_H__ */