udc.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * udc.c - ChipIdea UDC driver
  4. *
  5. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  6. *
  7. * Author: David Lopo
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/device.h>
  11. #include <linux/dmapool.h>
  12. #include <linux/err.h>
  13. #include <linux/irqreturn.h>
  14. #include <linux/kernel.h>
  15. #include <linux/slab.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/usb/ch9.h>
  18. #include <linux/usb/gadget.h>
  19. #include <linux/usb/otg-fsm.h>
  20. #include <linux/usb/chipidea.h>
  21. #include "ci.h"
  22. #include "udc.h"
  23. #include "bits.h"
  24. #include "otg.h"
  25. #include "otg_fsm.h"
  26. /* control endpoint description */
  27. static const struct usb_endpoint_descriptor
  28. ctrl_endpt_out_desc = {
  29. .bLength = USB_DT_ENDPOINT_SIZE,
  30. .bDescriptorType = USB_DT_ENDPOINT,
  31. .bEndpointAddress = USB_DIR_OUT,
  32. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  33. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  34. };
  35. static const struct usb_endpoint_descriptor
  36. ctrl_endpt_in_desc = {
  37. .bLength = USB_DT_ENDPOINT_SIZE,
  38. .bDescriptorType = USB_DT_ENDPOINT,
  39. .bEndpointAddress = USB_DIR_IN,
  40. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  41. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  42. };
  43. /**
  44. * hw_ep_bit: calculates the bit number
  45. * @num: endpoint number
  46. * @dir: endpoint direction
  47. *
  48. * This function returns bit number
  49. */
  50. static inline int hw_ep_bit(int num, int dir)
  51. {
  52. return num + ((dir == TX) ? 16 : 0);
  53. }
  54. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  55. {
  56. int fill = 16 - ci->hw_ep_max / 2;
  57. if (n >= ci->hw_ep_max / 2)
  58. n += fill;
  59. return n;
  60. }
  61. /**
  62. * hw_device_state: enables/disables interrupts (execute without interruption)
  63. * @dma: 0 => disable, !0 => enable and set dma engine
  64. *
  65. * This function returns an error code
  66. */
  67. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  68. {
  69. if (dma) {
  70. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  71. /* interrupt, error, port change, reset, sleep/suspend */
  72. hw_write(ci, OP_USBINTR, ~0,
  73. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  74. } else {
  75. hw_write(ci, OP_USBINTR, ~0, 0);
  76. }
  77. return 0;
  78. }
  79. /**
  80. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  81. * @num: endpoint number
  82. * @dir: endpoint direction
  83. *
  84. * This function returns an error code
  85. */
  86. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  87. {
  88. int n = hw_ep_bit(num, dir);
  89. do {
  90. /* flush any pending transfer */
  91. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  92. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  93. cpu_relax();
  94. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  95. return 0;
  96. }
  97. /**
  98. * hw_ep_disable: disables endpoint (execute without interruption)
  99. * @num: endpoint number
  100. * @dir: endpoint direction
  101. *
  102. * This function returns an error code
  103. */
  104. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  105. {
  106. hw_write(ci, OP_ENDPTCTRL + num,
  107. (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  108. return 0;
  109. }
  110. /**
  111. * hw_ep_enable: enables endpoint (execute without interruption)
  112. * @num: endpoint number
  113. * @dir: endpoint direction
  114. * @type: endpoint type
  115. *
  116. * This function returns an error code
  117. */
  118. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  119. {
  120. u32 mask, data;
  121. if (dir == TX) {
  122. mask = ENDPTCTRL_TXT; /* type */
  123. data = type << __ffs(mask);
  124. mask |= ENDPTCTRL_TXS; /* unstall */
  125. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  126. data |= ENDPTCTRL_TXR;
  127. mask |= ENDPTCTRL_TXE; /* enable */
  128. data |= ENDPTCTRL_TXE;
  129. } else {
  130. mask = ENDPTCTRL_RXT; /* type */
  131. data = type << __ffs(mask);
  132. mask |= ENDPTCTRL_RXS; /* unstall */
  133. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  134. data |= ENDPTCTRL_RXR;
  135. mask |= ENDPTCTRL_RXE; /* enable */
  136. data |= ENDPTCTRL_RXE;
  137. }
  138. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  139. return 0;
  140. }
  141. /**
  142. * hw_ep_get_halt: return endpoint halt status
  143. * @num: endpoint number
  144. * @dir: endpoint direction
  145. *
  146. * This function returns 1 if endpoint halted
  147. */
  148. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  149. {
  150. u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  151. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  152. }
  153. /**
  154. * hw_ep_prime: primes endpoint (execute without interruption)
  155. * @num: endpoint number
  156. * @dir: endpoint direction
  157. * @is_ctrl: true if control endpoint
  158. *
  159. * This function returns an error code
  160. */
  161. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  162. {
  163. int n = hw_ep_bit(num, dir);
  164. /* Synchronize before ep prime */
  165. wmb();
  166. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  167. return -EAGAIN;
  168. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  169. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  170. cpu_relax();
  171. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  172. return -EAGAIN;
  173. /* status shoult be tested according with manual but it doesn't work */
  174. return 0;
  175. }
  176. /**
  177. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  178. * without interruption)
  179. * @num: endpoint number
  180. * @dir: endpoint direction
  181. * @value: true => stall, false => unstall
  182. *
  183. * This function returns an error code
  184. */
  185. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  186. {
  187. if (value != 0 && value != 1)
  188. return -EINVAL;
  189. do {
  190. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  191. u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  192. u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  193. /* data toggle - reserved for EP0 but it's in ESS */
  194. hw_write(ci, reg, mask_xs|mask_xr,
  195. value ? mask_xs : mask_xr);
  196. } while (value != hw_ep_get_halt(ci, num, dir));
  197. return 0;
  198. }
  199. /**
  200. * hw_is_port_high_speed: test if port is high speed
  201. *
  202. * This function returns true if high speed port
  203. */
  204. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  205. {
  206. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  207. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  208. }
  209. /**
  210. * hw_test_and_clear_complete: test & clear complete status (execute without
  211. * interruption)
  212. * @n: endpoint number
  213. *
  214. * This function returns complete status
  215. */
  216. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  217. {
  218. n = ep_to_bit(ci, n);
  219. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  220. }
  221. /**
  222. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  223. * without interruption)
  224. *
  225. * This function returns active interrutps
  226. */
  227. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  228. {
  229. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  230. hw_write(ci, OP_USBSTS, ~0, reg);
  231. return reg;
  232. }
  233. /**
  234. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  235. * interruption)
  236. *
  237. * This function returns guard value
  238. */
  239. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  240. {
  241. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  242. }
  243. /**
  244. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  245. * interruption)
  246. *
  247. * This function returns guard value
  248. */
  249. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  250. {
  251. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  252. }
  253. /**
  254. * hw_usb_set_address: configures USB address (execute without interruption)
  255. * @value: new USB address
  256. *
  257. * This function explicitly sets the address, without the "USBADRA" (advance)
  258. * feature, which is not supported by older versions of the controller.
  259. */
  260. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  261. {
  262. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  263. value << __ffs(DEVICEADDR_USBADR));
  264. }
  265. /**
  266. * hw_usb_reset: restart device after a bus reset (execute without
  267. * interruption)
  268. *
  269. * This function returns an error code
  270. */
  271. static int hw_usb_reset(struct ci_hdrc *ci)
  272. {
  273. hw_usb_set_address(ci, 0);
  274. /* ESS flushes only at end?!? */
  275. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  276. /* clear setup token semaphores */
  277. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  278. /* clear complete status */
  279. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  280. /* wait until all bits cleared */
  281. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  282. udelay(10); /* not RTOS friendly */
  283. /* reset all endpoints ? */
  284. /* reset internal status and wait for further instructions
  285. no need to verify the port reset status (ESS does it) */
  286. return 0;
  287. }
  288. /******************************************************************************
  289. * UTIL block
  290. *****************************************************************************/
  291. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  292. unsigned length)
  293. {
  294. int i;
  295. u32 temp;
  296. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  297. GFP_ATOMIC);
  298. if (node == NULL)
  299. return -ENOMEM;
  300. node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
  301. if (node->ptr == NULL) {
  302. kfree(node);
  303. return -ENOMEM;
  304. }
  305. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  306. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  307. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  308. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  309. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  310. if (hwreq->req.length == 0
  311. || hwreq->req.length % hwep->ep.maxpacket)
  312. mul++;
  313. node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
  314. }
  315. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  316. if (length) {
  317. node->ptr->page[0] = cpu_to_le32(temp);
  318. for (i = 1; i < TD_PAGE_COUNT; i++) {
  319. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  320. page &= ~TD_RESERVED_MASK;
  321. node->ptr->page[i] = cpu_to_le32(page);
  322. }
  323. }
  324. hwreq->req.actual += length;
  325. if (!list_empty(&hwreq->tds)) {
  326. /* get the last entry */
  327. lastnode = list_entry(hwreq->tds.prev,
  328. struct td_node, td);
  329. lastnode->ptr->next = cpu_to_le32(node->dma);
  330. }
  331. INIT_LIST_HEAD(&node->td);
  332. list_add_tail(&node->td, &hwreq->tds);
  333. return 0;
  334. }
  335. /**
  336. * _usb_addr: calculates endpoint address from direction & number
  337. * @ep: endpoint
  338. */
  339. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  340. {
  341. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  342. }
  343. /**
  344. * _hardware_enqueue: configures a request at hardware level
  345. * @hwep: endpoint
  346. * @hwreq: request
  347. *
  348. * This function returns an error code
  349. */
  350. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  351. {
  352. struct ci_hdrc *ci = hwep->ci;
  353. int ret = 0;
  354. unsigned rest = hwreq->req.length;
  355. int pages = TD_PAGE_COUNT;
  356. struct td_node *firstnode, *lastnode;
  357. /* don't queue twice */
  358. if (hwreq->req.status == -EALREADY)
  359. return -EALREADY;
  360. hwreq->req.status = -EALREADY;
  361. ret = usb_gadget_map_request_by_dev(ci->dev->parent,
  362. &hwreq->req, hwep->dir);
  363. if (ret)
  364. return ret;
  365. /*
  366. * The first buffer could be not page aligned.
  367. * In that case we have to span into one extra td.
  368. */
  369. if (hwreq->req.dma % PAGE_SIZE)
  370. pages--;
  371. if (rest == 0) {
  372. ret = add_td_to_list(hwep, hwreq, 0);
  373. if (ret < 0)
  374. goto done;
  375. }
  376. while (rest > 0) {
  377. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  378. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  379. ret = add_td_to_list(hwep, hwreq, count);
  380. if (ret < 0)
  381. goto done;
  382. rest -= count;
  383. }
  384. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  385. && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
  386. ret = add_td_to_list(hwep, hwreq, 0);
  387. if (ret < 0)
  388. goto done;
  389. }
  390. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  391. lastnode = list_entry(hwreq->tds.prev,
  392. struct td_node, td);
  393. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  394. if (!hwreq->req.no_interrupt)
  395. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  396. wmb();
  397. hwreq->req.actual = 0;
  398. if (!list_empty(&hwep->qh.queue)) {
  399. struct ci_hw_req *hwreqprev;
  400. int n = hw_ep_bit(hwep->num, hwep->dir);
  401. int tmp_stat;
  402. struct td_node *prevlastnode;
  403. u32 next = firstnode->dma & TD_ADDR_MASK;
  404. hwreqprev = list_entry(hwep->qh.queue.prev,
  405. struct ci_hw_req, queue);
  406. prevlastnode = list_entry(hwreqprev->tds.prev,
  407. struct td_node, td);
  408. prevlastnode->ptr->next = cpu_to_le32(next);
  409. wmb();
  410. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  411. goto done;
  412. do {
  413. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  414. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  415. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  416. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  417. if (tmp_stat)
  418. goto done;
  419. }
  420. /* QH configuration */
  421. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  422. hwep->qh.ptr->td.token &=
  423. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  424. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  425. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  426. if (hwreq->req.length == 0
  427. || hwreq->req.length % hwep->ep.maxpacket)
  428. mul++;
  429. hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
  430. }
  431. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  432. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  433. done:
  434. return ret;
  435. }
  436. /*
  437. * free_pending_td: remove a pending request for the endpoint
  438. * @hwep: endpoint
  439. */
  440. static void free_pending_td(struct ci_hw_ep *hwep)
  441. {
  442. struct td_node *pending = hwep->pending_td;
  443. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  444. hwep->pending_td = NULL;
  445. kfree(pending);
  446. }
  447. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  448. struct td_node *node)
  449. {
  450. hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
  451. hwep->qh.ptr->td.token &=
  452. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  453. return hw_ep_prime(ci, hwep->num, hwep->dir,
  454. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  455. }
  456. /**
  457. * _hardware_dequeue: handles a request at hardware level
  458. * @gadget: gadget
  459. * @hwep: endpoint
  460. *
  461. * This function returns an error code
  462. */
  463. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  464. {
  465. u32 tmptoken;
  466. struct td_node *node, *tmpnode;
  467. unsigned remaining_length;
  468. unsigned actual = hwreq->req.length;
  469. struct ci_hdrc *ci = hwep->ci;
  470. if (hwreq->req.status != -EALREADY)
  471. return -EINVAL;
  472. hwreq->req.status = 0;
  473. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  474. tmptoken = le32_to_cpu(node->ptr->token);
  475. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  476. int n = hw_ep_bit(hwep->num, hwep->dir);
  477. if (ci->rev == CI_REVISION_24)
  478. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  479. reprime_dtd(ci, hwep, node);
  480. hwreq->req.status = -EALREADY;
  481. return -EBUSY;
  482. }
  483. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  484. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  485. actual -= remaining_length;
  486. hwreq->req.status = tmptoken & TD_STATUS;
  487. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  488. hwreq->req.status = -EPIPE;
  489. break;
  490. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  491. hwreq->req.status = -EPROTO;
  492. break;
  493. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  494. hwreq->req.status = -EILSEQ;
  495. break;
  496. }
  497. if (remaining_length) {
  498. if (hwep->dir == TX) {
  499. hwreq->req.status = -EPROTO;
  500. break;
  501. }
  502. }
  503. /*
  504. * As the hardware could still address the freed td
  505. * which will run the udc unusable, the cleanup of the
  506. * td has to be delayed by one.
  507. */
  508. if (hwep->pending_td)
  509. free_pending_td(hwep);
  510. hwep->pending_td = node;
  511. list_del_init(&node->td);
  512. }
  513. usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
  514. &hwreq->req, hwep->dir);
  515. hwreq->req.actual += actual;
  516. if (hwreq->req.status)
  517. return hwreq->req.status;
  518. return hwreq->req.actual;
  519. }
  520. /**
  521. * _ep_nuke: dequeues all endpoint requests
  522. * @hwep: endpoint
  523. *
  524. * This function returns an error code
  525. * Caller must hold lock
  526. */
  527. static int _ep_nuke(struct ci_hw_ep *hwep)
  528. __releases(hwep->lock)
  529. __acquires(hwep->lock)
  530. {
  531. struct td_node *node, *tmpnode;
  532. if (hwep == NULL)
  533. return -EINVAL;
  534. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  535. while (!list_empty(&hwep->qh.queue)) {
  536. /* pop oldest request */
  537. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  538. struct ci_hw_req, queue);
  539. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  540. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  541. list_del_init(&node->td);
  542. node->ptr = NULL;
  543. kfree(node);
  544. }
  545. list_del_init(&hwreq->queue);
  546. hwreq->req.status = -ESHUTDOWN;
  547. if (hwreq->req.complete != NULL) {
  548. spin_unlock(hwep->lock);
  549. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  550. spin_lock(hwep->lock);
  551. }
  552. }
  553. if (hwep->pending_td)
  554. free_pending_td(hwep);
  555. return 0;
  556. }
  557. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  558. {
  559. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  560. int direction, retval = 0;
  561. unsigned long flags;
  562. if (ep == NULL || hwep->ep.desc == NULL)
  563. return -EINVAL;
  564. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  565. return -EOPNOTSUPP;
  566. spin_lock_irqsave(hwep->lock, flags);
  567. if (value && hwep->dir == TX && check_transfer &&
  568. !list_empty(&hwep->qh.queue) &&
  569. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  570. spin_unlock_irqrestore(hwep->lock, flags);
  571. return -EAGAIN;
  572. }
  573. direction = hwep->dir;
  574. do {
  575. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  576. if (!value)
  577. hwep->wedge = 0;
  578. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  579. hwep->dir = (hwep->dir == TX) ? RX : TX;
  580. } while (hwep->dir != direction);
  581. spin_unlock_irqrestore(hwep->lock, flags);
  582. return retval;
  583. }
  584. /**
  585. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  586. * @gadget: gadget
  587. *
  588. * This function returns an error code
  589. */
  590. static int _gadget_stop_activity(struct usb_gadget *gadget)
  591. {
  592. struct usb_ep *ep;
  593. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  594. unsigned long flags;
  595. /* flush all endpoints */
  596. gadget_for_each_ep(ep, gadget) {
  597. usb_ep_fifo_flush(ep);
  598. }
  599. usb_ep_fifo_flush(&ci->ep0out->ep);
  600. usb_ep_fifo_flush(&ci->ep0in->ep);
  601. /* make sure to disable all endpoints */
  602. gadget_for_each_ep(ep, gadget) {
  603. usb_ep_disable(ep);
  604. }
  605. if (ci->status != NULL) {
  606. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  607. ci->status = NULL;
  608. }
  609. spin_lock_irqsave(&ci->lock, flags);
  610. ci->gadget.speed = USB_SPEED_UNKNOWN;
  611. ci->remote_wakeup = 0;
  612. ci->suspended = 0;
  613. spin_unlock_irqrestore(&ci->lock, flags);
  614. return 0;
  615. }
  616. /******************************************************************************
  617. * ISR block
  618. *****************************************************************************/
  619. /**
  620. * isr_reset_handler: USB reset interrupt handler
  621. * @ci: UDC device
  622. *
  623. * This function resets USB engine after a bus reset occurred
  624. */
  625. static void isr_reset_handler(struct ci_hdrc *ci)
  626. __releases(ci->lock)
  627. __acquires(ci->lock)
  628. {
  629. int retval;
  630. spin_unlock(&ci->lock);
  631. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  632. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  633. retval = _gadget_stop_activity(&ci->gadget);
  634. if (retval)
  635. goto done;
  636. retval = hw_usb_reset(ci);
  637. if (retval)
  638. goto done;
  639. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  640. if (ci->status == NULL)
  641. retval = -ENOMEM;
  642. done:
  643. spin_lock(&ci->lock);
  644. if (retval)
  645. dev_err(ci->dev, "error: %i\n", retval);
  646. }
  647. /**
  648. * isr_get_status_complete: get_status request complete function
  649. * @ep: endpoint
  650. * @req: request handled
  651. *
  652. * Caller must release lock
  653. */
  654. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  655. {
  656. if (ep == NULL || req == NULL)
  657. return;
  658. kfree(req->buf);
  659. usb_ep_free_request(ep, req);
  660. }
  661. /**
  662. * _ep_queue: queues (submits) an I/O request to an endpoint
  663. * @ep: endpoint
  664. * @req: request
  665. * @gfp_flags: GFP flags (not used)
  666. *
  667. * Caller must hold lock
  668. * This function returns an error code
  669. */
  670. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  671. gfp_t __maybe_unused gfp_flags)
  672. {
  673. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  674. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  675. struct ci_hdrc *ci = hwep->ci;
  676. int retval = 0;
  677. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  678. return -EINVAL;
  679. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  680. if (req->length)
  681. hwep = (ci->ep0_dir == RX) ?
  682. ci->ep0out : ci->ep0in;
  683. if (!list_empty(&hwep->qh.queue)) {
  684. _ep_nuke(hwep);
  685. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  686. _usb_addr(hwep));
  687. }
  688. }
  689. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  690. hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
  691. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  692. return -EMSGSIZE;
  693. }
  694. /* first nuke then test link, e.g. previous status has not sent */
  695. if (!list_empty(&hwreq->queue)) {
  696. dev_err(hwep->ci->dev, "request already in queue\n");
  697. return -EBUSY;
  698. }
  699. /* push request */
  700. hwreq->req.status = -EINPROGRESS;
  701. hwreq->req.actual = 0;
  702. retval = _hardware_enqueue(hwep, hwreq);
  703. if (retval == -EALREADY)
  704. retval = 0;
  705. if (!retval)
  706. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  707. return retval;
  708. }
  709. /**
  710. * isr_get_status_response: get_status request response
  711. * @ci: ci struct
  712. * @setup: setup request packet
  713. *
  714. * This function returns an error code
  715. */
  716. static int isr_get_status_response(struct ci_hdrc *ci,
  717. struct usb_ctrlrequest *setup)
  718. __releases(hwep->lock)
  719. __acquires(hwep->lock)
  720. {
  721. struct ci_hw_ep *hwep = ci->ep0in;
  722. struct usb_request *req = NULL;
  723. gfp_t gfp_flags = GFP_ATOMIC;
  724. int dir, num, retval;
  725. if (hwep == NULL || setup == NULL)
  726. return -EINVAL;
  727. spin_unlock(hwep->lock);
  728. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  729. spin_lock(hwep->lock);
  730. if (req == NULL)
  731. return -ENOMEM;
  732. req->complete = isr_get_status_complete;
  733. req->length = 2;
  734. req->buf = kzalloc(req->length, gfp_flags);
  735. if (req->buf == NULL) {
  736. retval = -ENOMEM;
  737. goto err_free_req;
  738. }
  739. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  740. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  741. ci->gadget.is_selfpowered;
  742. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  743. == USB_RECIP_ENDPOINT) {
  744. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  745. TX : RX;
  746. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  747. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  748. }
  749. /* else do nothing; reserved for future use */
  750. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  751. if (retval)
  752. goto err_free_buf;
  753. return 0;
  754. err_free_buf:
  755. kfree(req->buf);
  756. err_free_req:
  757. spin_unlock(hwep->lock);
  758. usb_ep_free_request(&hwep->ep, req);
  759. spin_lock(hwep->lock);
  760. return retval;
  761. }
  762. /**
  763. * isr_setup_status_complete: setup_status request complete function
  764. * @ep: endpoint
  765. * @req: request handled
  766. *
  767. * Caller must release lock. Put the port in test mode if test mode
  768. * feature is selected.
  769. */
  770. static void
  771. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  772. {
  773. struct ci_hdrc *ci = req->context;
  774. unsigned long flags;
  775. if (ci->setaddr) {
  776. hw_usb_set_address(ci, ci->address);
  777. ci->setaddr = false;
  778. if (ci->address)
  779. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  780. }
  781. spin_lock_irqsave(&ci->lock, flags);
  782. if (ci->test_mode)
  783. hw_port_test_set(ci, ci->test_mode);
  784. spin_unlock_irqrestore(&ci->lock, flags);
  785. }
  786. /**
  787. * isr_setup_status_phase: queues the status phase of a setup transation
  788. * @ci: ci struct
  789. *
  790. * This function returns an error code
  791. */
  792. static int isr_setup_status_phase(struct ci_hdrc *ci)
  793. {
  794. struct ci_hw_ep *hwep;
  795. /*
  796. * Unexpected USB controller behavior, caused by bad signal integrity
  797. * or ground reference problems, can lead to isr_setup_status_phase
  798. * being called with ci->status equal to NULL.
  799. * If this situation occurs, you should review your USB hardware design.
  800. */
  801. if (WARN_ON_ONCE(!ci->status))
  802. return -EPIPE;
  803. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  804. ci->status->context = ci;
  805. ci->status->complete = isr_setup_status_complete;
  806. return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  807. }
  808. /**
  809. * isr_tr_complete_low: transaction complete low level handler
  810. * @hwep: endpoint
  811. *
  812. * This function returns an error code
  813. * Caller must hold lock
  814. */
  815. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  816. __releases(hwep->lock)
  817. __acquires(hwep->lock)
  818. {
  819. struct ci_hw_req *hwreq, *hwreqtemp;
  820. struct ci_hw_ep *hweptemp = hwep;
  821. int retval = 0;
  822. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  823. queue) {
  824. retval = _hardware_dequeue(hwep, hwreq);
  825. if (retval < 0)
  826. break;
  827. list_del_init(&hwreq->queue);
  828. if (hwreq->req.complete != NULL) {
  829. spin_unlock(hwep->lock);
  830. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  831. hwreq->req.length)
  832. hweptemp = hwep->ci->ep0in;
  833. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  834. spin_lock(hwep->lock);
  835. }
  836. }
  837. if (retval == -EBUSY)
  838. retval = 0;
  839. return retval;
  840. }
  841. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  842. {
  843. dev_warn(&ci->gadget.dev,
  844. "connect the device to an alternate port if you want HNP\n");
  845. return isr_setup_status_phase(ci);
  846. }
  847. /**
  848. * isr_setup_packet_handler: setup packet handler
  849. * @ci: UDC descriptor
  850. *
  851. * This function handles setup packet
  852. */
  853. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  854. __releases(ci->lock)
  855. __acquires(ci->lock)
  856. {
  857. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  858. struct usb_ctrlrequest req;
  859. int type, num, dir, err = -EINVAL;
  860. u8 tmode = 0;
  861. /*
  862. * Flush data and handshake transactions of previous
  863. * setup packet.
  864. */
  865. _ep_nuke(ci->ep0out);
  866. _ep_nuke(ci->ep0in);
  867. /* read_setup_packet */
  868. do {
  869. hw_test_and_set_setup_guard(ci);
  870. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  871. } while (!hw_test_and_clear_setup_guard(ci));
  872. type = req.bRequestType;
  873. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  874. switch (req.bRequest) {
  875. case USB_REQ_CLEAR_FEATURE:
  876. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  877. le16_to_cpu(req.wValue) ==
  878. USB_ENDPOINT_HALT) {
  879. if (req.wLength != 0)
  880. break;
  881. num = le16_to_cpu(req.wIndex);
  882. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  883. num &= USB_ENDPOINT_NUMBER_MASK;
  884. if (dir == TX)
  885. num += ci->hw_ep_max / 2;
  886. if (!ci->ci_hw_ep[num].wedge) {
  887. spin_unlock(&ci->lock);
  888. err = usb_ep_clear_halt(
  889. &ci->ci_hw_ep[num].ep);
  890. spin_lock(&ci->lock);
  891. if (err)
  892. break;
  893. }
  894. err = isr_setup_status_phase(ci);
  895. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  896. le16_to_cpu(req.wValue) ==
  897. USB_DEVICE_REMOTE_WAKEUP) {
  898. if (req.wLength != 0)
  899. break;
  900. ci->remote_wakeup = 0;
  901. err = isr_setup_status_phase(ci);
  902. } else {
  903. goto delegate;
  904. }
  905. break;
  906. case USB_REQ_GET_STATUS:
  907. if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
  908. le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
  909. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  910. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  911. goto delegate;
  912. if (le16_to_cpu(req.wLength) != 2 ||
  913. le16_to_cpu(req.wValue) != 0)
  914. break;
  915. err = isr_get_status_response(ci, &req);
  916. break;
  917. case USB_REQ_SET_ADDRESS:
  918. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  919. goto delegate;
  920. if (le16_to_cpu(req.wLength) != 0 ||
  921. le16_to_cpu(req.wIndex) != 0)
  922. break;
  923. ci->address = (u8)le16_to_cpu(req.wValue);
  924. ci->setaddr = true;
  925. err = isr_setup_status_phase(ci);
  926. break;
  927. case USB_REQ_SET_FEATURE:
  928. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  929. le16_to_cpu(req.wValue) ==
  930. USB_ENDPOINT_HALT) {
  931. if (req.wLength != 0)
  932. break;
  933. num = le16_to_cpu(req.wIndex);
  934. dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
  935. num &= USB_ENDPOINT_NUMBER_MASK;
  936. if (dir == TX)
  937. num += ci->hw_ep_max / 2;
  938. spin_unlock(&ci->lock);
  939. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  940. spin_lock(&ci->lock);
  941. if (!err)
  942. isr_setup_status_phase(ci);
  943. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  944. if (req.wLength != 0)
  945. break;
  946. switch (le16_to_cpu(req.wValue)) {
  947. case USB_DEVICE_REMOTE_WAKEUP:
  948. ci->remote_wakeup = 1;
  949. err = isr_setup_status_phase(ci);
  950. break;
  951. case USB_DEVICE_TEST_MODE:
  952. tmode = le16_to_cpu(req.wIndex) >> 8;
  953. switch (tmode) {
  954. case TEST_J:
  955. case TEST_K:
  956. case TEST_SE0_NAK:
  957. case TEST_PACKET:
  958. case TEST_FORCE_EN:
  959. ci->test_mode = tmode;
  960. err = isr_setup_status_phase(
  961. ci);
  962. break;
  963. default:
  964. break;
  965. }
  966. break;
  967. case USB_DEVICE_B_HNP_ENABLE:
  968. if (ci_otg_is_fsm_mode(ci)) {
  969. ci->gadget.b_hnp_enable = 1;
  970. err = isr_setup_status_phase(
  971. ci);
  972. }
  973. break;
  974. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  975. if (ci_otg_is_fsm_mode(ci))
  976. err = otg_a_alt_hnp_support(ci);
  977. break;
  978. case USB_DEVICE_A_HNP_SUPPORT:
  979. if (ci_otg_is_fsm_mode(ci)) {
  980. ci->gadget.a_hnp_support = 1;
  981. err = isr_setup_status_phase(
  982. ci);
  983. }
  984. break;
  985. default:
  986. goto delegate;
  987. }
  988. } else {
  989. goto delegate;
  990. }
  991. break;
  992. default:
  993. delegate:
  994. if (req.wLength == 0) /* no data phase */
  995. ci->ep0_dir = TX;
  996. spin_unlock(&ci->lock);
  997. err = ci->driver->setup(&ci->gadget, &req);
  998. spin_lock(&ci->lock);
  999. break;
  1000. }
  1001. if (err < 0) {
  1002. spin_unlock(&ci->lock);
  1003. if (_ep_set_halt(&hwep->ep, 1, false))
  1004. dev_err(ci->dev, "error: _ep_set_halt\n");
  1005. spin_lock(&ci->lock);
  1006. }
  1007. }
  1008. /**
  1009. * isr_tr_complete_handler: transaction complete interrupt handler
  1010. * @ci: UDC descriptor
  1011. *
  1012. * This function handles traffic events
  1013. */
  1014. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1015. __releases(ci->lock)
  1016. __acquires(ci->lock)
  1017. {
  1018. unsigned i;
  1019. int err;
  1020. for (i = 0; i < ci->hw_ep_max; i++) {
  1021. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1022. if (hwep->ep.desc == NULL)
  1023. continue; /* not configured */
  1024. if (hw_test_and_clear_complete(ci, i)) {
  1025. err = isr_tr_complete_low(hwep);
  1026. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1027. if (err > 0) /* needs status phase */
  1028. err = isr_setup_status_phase(ci);
  1029. if (err < 0) {
  1030. spin_unlock(&ci->lock);
  1031. if (_ep_set_halt(&hwep->ep, 1, false))
  1032. dev_err(ci->dev,
  1033. "error: _ep_set_halt\n");
  1034. spin_lock(&ci->lock);
  1035. }
  1036. }
  1037. }
  1038. /* Only handle setup packet below */
  1039. if (i == 0 &&
  1040. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1041. isr_setup_packet_handler(ci);
  1042. }
  1043. }
  1044. /******************************************************************************
  1045. * ENDPT block
  1046. *****************************************************************************/
  1047. /**
  1048. * ep_enable: configure endpoint, making it usable
  1049. *
  1050. * Check usb_ep_enable() at "usb_gadget.h" for details
  1051. */
  1052. static int ep_enable(struct usb_ep *ep,
  1053. const struct usb_endpoint_descriptor *desc)
  1054. {
  1055. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1056. int retval = 0;
  1057. unsigned long flags;
  1058. u32 cap = 0;
  1059. if (ep == NULL || desc == NULL)
  1060. return -EINVAL;
  1061. spin_lock_irqsave(hwep->lock, flags);
  1062. /* only internal SW should enable ctrl endpts */
  1063. if (!list_empty(&hwep->qh.queue)) {
  1064. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1065. spin_unlock_irqrestore(hwep->lock, flags);
  1066. return -EBUSY;
  1067. }
  1068. hwep->ep.desc = desc;
  1069. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1070. hwep->num = usb_endpoint_num(desc);
  1071. hwep->type = usb_endpoint_type(desc);
  1072. hwep->ep.maxpacket = usb_endpoint_maxp(desc);
  1073. hwep->ep.mult = usb_endpoint_maxp_mult(desc);
  1074. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1075. cap |= QH_IOS;
  1076. cap |= QH_ZLT;
  1077. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1078. /*
  1079. * For ISO-TX, we set mult at QH as the largest value, and use
  1080. * MultO at TD as real mult value.
  1081. */
  1082. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1083. cap |= 3 << __ffs(QH_MULT);
  1084. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1085. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1086. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1087. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1088. retval = -EINVAL;
  1089. }
  1090. /*
  1091. * Enable endpoints in the HW other than ep0 as ep0
  1092. * is always enabled
  1093. */
  1094. if (hwep->num)
  1095. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1096. hwep->type);
  1097. spin_unlock_irqrestore(hwep->lock, flags);
  1098. return retval;
  1099. }
  1100. /**
  1101. * ep_disable: endpoint is no longer usable
  1102. *
  1103. * Check usb_ep_disable() at "usb_gadget.h" for details
  1104. */
  1105. static int ep_disable(struct usb_ep *ep)
  1106. {
  1107. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1108. int direction, retval = 0;
  1109. unsigned long flags;
  1110. if (ep == NULL)
  1111. return -EINVAL;
  1112. else if (hwep->ep.desc == NULL)
  1113. return -EBUSY;
  1114. spin_lock_irqsave(hwep->lock, flags);
  1115. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1116. spin_unlock_irqrestore(hwep->lock, flags);
  1117. return 0;
  1118. }
  1119. /* only internal SW should disable ctrl endpts */
  1120. direction = hwep->dir;
  1121. do {
  1122. retval |= _ep_nuke(hwep);
  1123. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1124. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1125. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1126. } while (hwep->dir != direction);
  1127. hwep->ep.desc = NULL;
  1128. spin_unlock_irqrestore(hwep->lock, flags);
  1129. return retval;
  1130. }
  1131. /**
  1132. * ep_alloc_request: allocate a request object to use with this endpoint
  1133. *
  1134. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1135. */
  1136. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1137. {
  1138. struct ci_hw_req *hwreq = NULL;
  1139. if (ep == NULL)
  1140. return NULL;
  1141. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1142. if (hwreq != NULL) {
  1143. INIT_LIST_HEAD(&hwreq->queue);
  1144. INIT_LIST_HEAD(&hwreq->tds);
  1145. }
  1146. return (hwreq == NULL) ? NULL : &hwreq->req;
  1147. }
  1148. /**
  1149. * ep_free_request: frees a request object
  1150. *
  1151. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1152. */
  1153. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1154. {
  1155. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1156. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1157. struct td_node *node, *tmpnode;
  1158. unsigned long flags;
  1159. if (ep == NULL || req == NULL) {
  1160. return;
  1161. } else if (!list_empty(&hwreq->queue)) {
  1162. dev_err(hwep->ci->dev, "freeing queued request\n");
  1163. return;
  1164. }
  1165. spin_lock_irqsave(hwep->lock, flags);
  1166. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1167. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1168. list_del_init(&node->td);
  1169. node->ptr = NULL;
  1170. kfree(node);
  1171. }
  1172. kfree(hwreq);
  1173. spin_unlock_irqrestore(hwep->lock, flags);
  1174. }
  1175. /**
  1176. * ep_queue: queues (submits) an I/O request to an endpoint
  1177. *
  1178. * Check usb_ep_queue()* at usb_gadget.h" for details
  1179. */
  1180. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1181. gfp_t __maybe_unused gfp_flags)
  1182. {
  1183. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1184. int retval = 0;
  1185. unsigned long flags;
  1186. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1187. return -EINVAL;
  1188. spin_lock_irqsave(hwep->lock, flags);
  1189. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1190. spin_unlock_irqrestore(hwep->lock, flags);
  1191. return 0;
  1192. }
  1193. retval = _ep_queue(ep, req, gfp_flags);
  1194. spin_unlock_irqrestore(hwep->lock, flags);
  1195. return retval;
  1196. }
  1197. /**
  1198. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1199. *
  1200. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1201. */
  1202. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1203. {
  1204. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1205. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1206. unsigned long flags;
  1207. struct td_node *node, *tmpnode;
  1208. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1209. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1210. list_empty(&hwep->qh.queue))
  1211. return -EINVAL;
  1212. spin_lock_irqsave(hwep->lock, flags);
  1213. if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
  1214. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1215. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1216. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1217. list_del(&node->td);
  1218. kfree(node);
  1219. }
  1220. /* pop request */
  1221. list_del_init(&hwreq->queue);
  1222. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1223. req->status = -ECONNRESET;
  1224. if (hwreq->req.complete != NULL) {
  1225. spin_unlock(hwep->lock);
  1226. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1227. spin_lock(hwep->lock);
  1228. }
  1229. spin_unlock_irqrestore(hwep->lock, flags);
  1230. return 0;
  1231. }
  1232. /**
  1233. * ep_set_halt: sets the endpoint halt feature
  1234. *
  1235. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1236. */
  1237. static int ep_set_halt(struct usb_ep *ep, int value)
  1238. {
  1239. return _ep_set_halt(ep, value, true);
  1240. }
  1241. /**
  1242. * ep_set_wedge: sets the halt feature and ignores clear requests
  1243. *
  1244. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1245. */
  1246. static int ep_set_wedge(struct usb_ep *ep)
  1247. {
  1248. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1249. unsigned long flags;
  1250. if (ep == NULL || hwep->ep.desc == NULL)
  1251. return -EINVAL;
  1252. spin_lock_irqsave(hwep->lock, flags);
  1253. hwep->wedge = 1;
  1254. spin_unlock_irqrestore(hwep->lock, flags);
  1255. return usb_ep_set_halt(ep);
  1256. }
  1257. /**
  1258. * ep_fifo_flush: flushes contents of a fifo
  1259. *
  1260. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1261. */
  1262. static void ep_fifo_flush(struct usb_ep *ep)
  1263. {
  1264. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1265. unsigned long flags;
  1266. if (ep == NULL) {
  1267. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1268. return;
  1269. }
  1270. spin_lock_irqsave(hwep->lock, flags);
  1271. if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1272. spin_unlock_irqrestore(hwep->lock, flags);
  1273. return;
  1274. }
  1275. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1276. spin_unlock_irqrestore(hwep->lock, flags);
  1277. }
  1278. /**
  1279. * Endpoint-specific part of the API to the USB controller hardware
  1280. * Check "usb_gadget.h" for details
  1281. */
  1282. static const struct usb_ep_ops usb_ep_ops = {
  1283. .enable = ep_enable,
  1284. .disable = ep_disable,
  1285. .alloc_request = ep_alloc_request,
  1286. .free_request = ep_free_request,
  1287. .queue = ep_queue,
  1288. .dequeue = ep_dequeue,
  1289. .set_halt = ep_set_halt,
  1290. .set_wedge = ep_set_wedge,
  1291. .fifo_flush = ep_fifo_flush,
  1292. };
  1293. /******************************************************************************
  1294. * GADGET block
  1295. *****************************************************************************/
  1296. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1297. {
  1298. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1299. unsigned long flags;
  1300. int gadget_ready = 0;
  1301. spin_lock_irqsave(&ci->lock, flags);
  1302. ci->vbus_active = is_active;
  1303. if (ci->driver)
  1304. gadget_ready = 1;
  1305. spin_unlock_irqrestore(&ci->lock, flags);
  1306. if (ci->usb_phy)
  1307. usb_phy_set_charger_state(ci->usb_phy, is_active ?
  1308. USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
  1309. if (gadget_ready) {
  1310. if (is_active) {
  1311. pm_runtime_get_sync(&_gadget->dev);
  1312. hw_device_reset(ci);
  1313. hw_device_state(ci, ci->ep0out->qh.dma);
  1314. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1315. usb_udc_vbus_handler(_gadget, true);
  1316. } else {
  1317. usb_udc_vbus_handler(_gadget, false);
  1318. if (ci->driver)
  1319. ci->driver->disconnect(&ci->gadget);
  1320. hw_device_state(ci, 0);
  1321. if (ci->platdata->notify_event)
  1322. ci->platdata->notify_event(ci,
  1323. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1324. _gadget_stop_activity(&ci->gadget);
  1325. pm_runtime_put_sync(&_gadget->dev);
  1326. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1327. }
  1328. }
  1329. return 0;
  1330. }
  1331. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1332. {
  1333. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1334. unsigned long flags;
  1335. int ret = 0;
  1336. spin_lock_irqsave(&ci->lock, flags);
  1337. if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
  1338. spin_unlock_irqrestore(&ci->lock, flags);
  1339. return 0;
  1340. }
  1341. if (!ci->remote_wakeup) {
  1342. ret = -EOPNOTSUPP;
  1343. goto out;
  1344. }
  1345. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1346. ret = -EINVAL;
  1347. goto out;
  1348. }
  1349. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1350. out:
  1351. spin_unlock_irqrestore(&ci->lock, flags);
  1352. return ret;
  1353. }
  1354. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1355. {
  1356. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1357. if (ci->usb_phy)
  1358. return usb_phy_set_power(ci->usb_phy, ma);
  1359. return -ENOTSUPP;
  1360. }
  1361. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1362. {
  1363. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1364. struct ci_hw_ep *hwep = ci->ep0in;
  1365. unsigned long flags;
  1366. spin_lock_irqsave(hwep->lock, flags);
  1367. _gadget->is_selfpowered = (is_on != 0);
  1368. spin_unlock_irqrestore(hwep->lock, flags);
  1369. return 0;
  1370. }
  1371. /* Change Data+ pullup status
  1372. * this func is used by usb_gadget_connect/disconnet
  1373. */
  1374. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1375. {
  1376. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1377. /*
  1378. * Data+ pullup controlled by OTG state machine in OTG fsm mode;
  1379. * and don't touch Data+ in host mode for dual role config.
  1380. */
  1381. if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
  1382. return 0;
  1383. pm_runtime_get_sync(&ci->gadget.dev);
  1384. if (is_on)
  1385. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1386. else
  1387. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1388. pm_runtime_put_sync(&ci->gadget.dev);
  1389. return 0;
  1390. }
  1391. static int ci_udc_start(struct usb_gadget *gadget,
  1392. struct usb_gadget_driver *driver);
  1393. static int ci_udc_stop(struct usb_gadget *gadget);
  1394. /* Match ISOC IN from the highest endpoint */
  1395. static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
  1396. struct usb_endpoint_descriptor *desc,
  1397. struct usb_ss_ep_comp_descriptor *comp_desc)
  1398. {
  1399. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1400. struct usb_ep *ep;
  1401. if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
  1402. list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
  1403. if (ep->caps.dir_in && !ep->claimed)
  1404. return ep;
  1405. }
  1406. }
  1407. return NULL;
  1408. }
  1409. /**
  1410. * Device operations part of the API to the USB controller hardware,
  1411. * which don't involve endpoints (or i/o)
  1412. * Check "usb_gadget.h" for details
  1413. */
  1414. static const struct usb_gadget_ops usb_gadget_ops = {
  1415. .vbus_session = ci_udc_vbus_session,
  1416. .wakeup = ci_udc_wakeup,
  1417. .set_selfpowered = ci_udc_selfpowered,
  1418. .pullup = ci_udc_pullup,
  1419. .vbus_draw = ci_udc_vbus_draw,
  1420. .udc_start = ci_udc_start,
  1421. .udc_stop = ci_udc_stop,
  1422. .match_ep = ci_udc_match_ep,
  1423. };
  1424. static int init_eps(struct ci_hdrc *ci)
  1425. {
  1426. int retval = 0, i, j;
  1427. for (i = 0; i < ci->hw_ep_max/2; i++)
  1428. for (j = RX; j <= TX; j++) {
  1429. int k = i + j * ci->hw_ep_max/2;
  1430. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1431. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1432. (j == TX) ? "in" : "out");
  1433. hwep->ci = ci;
  1434. hwep->lock = &ci->lock;
  1435. hwep->td_pool = ci->td_pool;
  1436. hwep->ep.name = hwep->name;
  1437. hwep->ep.ops = &usb_ep_ops;
  1438. if (i == 0) {
  1439. hwep->ep.caps.type_control = true;
  1440. } else {
  1441. hwep->ep.caps.type_iso = true;
  1442. hwep->ep.caps.type_bulk = true;
  1443. hwep->ep.caps.type_int = true;
  1444. }
  1445. if (j == TX)
  1446. hwep->ep.caps.dir_in = true;
  1447. else
  1448. hwep->ep.caps.dir_out = true;
  1449. /*
  1450. * for ep0: maxP defined in desc, for other
  1451. * eps, maxP is set by epautoconfig() called
  1452. * by gadget layer
  1453. */
  1454. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1455. INIT_LIST_HEAD(&hwep->qh.queue);
  1456. hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
  1457. &hwep->qh.dma);
  1458. if (hwep->qh.ptr == NULL)
  1459. retval = -ENOMEM;
  1460. /*
  1461. * set up shorthands for ep0 out and in endpoints,
  1462. * don't add to gadget's ep_list
  1463. */
  1464. if (i == 0) {
  1465. if (j == RX)
  1466. ci->ep0out = hwep;
  1467. else
  1468. ci->ep0in = hwep;
  1469. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1470. continue;
  1471. }
  1472. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1473. }
  1474. return retval;
  1475. }
  1476. static void destroy_eps(struct ci_hdrc *ci)
  1477. {
  1478. int i;
  1479. for (i = 0; i < ci->hw_ep_max; i++) {
  1480. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1481. if (hwep->pending_td)
  1482. free_pending_td(hwep);
  1483. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1484. }
  1485. }
  1486. /**
  1487. * ci_udc_start: register a gadget driver
  1488. * @gadget: our gadget
  1489. * @driver: the driver being registered
  1490. *
  1491. * Interrupts are enabled here.
  1492. */
  1493. static int ci_udc_start(struct usb_gadget *gadget,
  1494. struct usb_gadget_driver *driver)
  1495. {
  1496. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1497. int retval = -ENOMEM;
  1498. if (driver->disconnect == NULL)
  1499. return -EINVAL;
  1500. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1501. retval = usb_ep_enable(&ci->ep0out->ep);
  1502. if (retval)
  1503. return retval;
  1504. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1505. retval = usb_ep_enable(&ci->ep0in->ep);
  1506. if (retval)
  1507. return retval;
  1508. ci->driver = driver;
  1509. /* Start otg fsm for B-device */
  1510. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1511. ci_hdrc_otg_fsm_start(ci);
  1512. return retval;
  1513. }
  1514. pm_runtime_get_sync(&ci->gadget.dev);
  1515. if (ci->vbus_active) {
  1516. hw_device_reset(ci);
  1517. } else {
  1518. usb_udc_vbus_handler(&ci->gadget, false);
  1519. pm_runtime_put_sync(&ci->gadget.dev);
  1520. return retval;
  1521. }
  1522. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1523. if (retval)
  1524. pm_runtime_put_sync(&ci->gadget.dev);
  1525. return retval;
  1526. }
  1527. static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
  1528. {
  1529. if (!ci_otg_is_fsm_mode(ci))
  1530. return;
  1531. mutex_lock(&ci->fsm.lock);
  1532. if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
  1533. ci->fsm.a_bidl_adis_tmout = 1;
  1534. ci_hdrc_otg_fsm_start(ci);
  1535. } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
  1536. ci->fsm.protocol = PROTO_UNDEF;
  1537. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  1538. }
  1539. mutex_unlock(&ci->fsm.lock);
  1540. }
  1541. /**
  1542. * ci_udc_stop: unregister a gadget driver
  1543. */
  1544. static int ci_udc_stop(struct usb_gadget *gadget)
  1545. {
  1546. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1547. unsigned long flags;
  1548. spin_lock_irqsave(&ci->lock, flags);
  1549. if (ci->vbus_active) {
  1550. hw_device_state(ci, 0);
  1551. spin_unlock_irqrestore(&ci->lock, flags);
  1552. if (ci->platdata->notify_event)
  1553. ci->platdata->notify_event(ci,
  1554. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1555. _gadget_stop_activity(&ci->gadget);
  1556. spin_lock_irqsave(&ci->lock, flags);
  1557. pm_runtime_put(&ci->gadget.dev);
  1558. }
  1559. ci->driver = NULL;
  1560. spin_unlock_irqrestore(&ci->lock, flags);
  1561. ci_udc_stop_for_otg_fsm(ci);
  1562. return 0;
  1563. }
  1564. /******************************************************************************
  1565. * BUS block
  1566. *****************************************************************************/
  1567. /**
  1568. * udc_irq: ci interrupt handler
  1569. *
  1570. * This function returns IRQ_HANDLED if the IRQ has been handled
  1571. * It locks access to registers
  1572. */
  1573. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1574. {
  1575. irqreturn_t retval;
  1576. u32 intr;
  1577. if (ci == NULL)
  1578. return IRQ_HANDLED;
  1579. spin_lock(&ci->lock);
  1580. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1581. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1582. USBMODE_CM_DC) {
  1583. spin_unlock(&ci->lock);
  1584. return IRQ_NONE;
  1585. }
  1586. }
  1587. intr = hw_test_and_clear_intr_active(ci);
  1588. if (intr) {
  1589. /* order defines priority - do NOT change it */
  1590. if (USBi_URI & intr)
  1591. isr_reset_handler(ci);
  1592. if (USBi_PCI & intr) {
  1593. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1594. USB_SPEED_HIGH : USB_SPEED_FULL;
  1595. if (ci->suspended) {
  1596. if (ci->driver->resume) {
  1597. spin_unlock(&ci->lock);
  1598. ci->driver->resume(&ci->gadget);
  1599. spin_lock(&ci->lock);
  1600. }
  1601. ci->suspended = 0;
  1602. usb_gadget_set_state(&ci->gadget,
  1603. ci->resume_state);
  1604. }
  1605. }
  1606. if (USBi_UI & intr)
  1607. isr_tr_complete_handler(ci);
  1608. if ((USBi_SLI & intr) && !(ci->suspended)) {
  1609. ci->suspended = 1;
  1610. ci->resume_state = ci->gadget.state;
  1611. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1612. ci->driver->suspend) {
  1613. spin_unlock(&ci->lock);
  1614. ci->driver->suspend(&ci->gadget);
  1615. spin_lock(&ci->lock);
  1616. }
  1617. usb_gadget_set_state(&ci->gadget,
  1618. USB_STATE_SUSPENDED);
  1619. }
  1620. retval = IRQ_HANDLED;
  1621. } else {
  1622. retval = IRQ_NONE;
  1623. }
  1624. spin_unlock(&ci->lock);
  1625. return retval;
  1626. }
  1627. /**
  1628. * udc_start: initialize gadget role
  1629. * @ci: chipidea controller
  1630. */
  1631. static int udc_start(struct ci_hdrc *ci)
  1632. {
  1633. struct device *dev = ci->dev;
  1634. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1635. int retval = 0;
  1636. ci->gadget.ops = &usb_gadget_ops;
  1637. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1638. ci->gadget.max_speed = USB_SPEED_HIGH;
  1639. ci->gadget.name = ci->platdata->name;
  1640. ci->gadget.otg_caps = otg_caps;
  1641. if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
  1642. ci->gadget.quirk_avoids_skb_reserve = 1;
  1643. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1644. otg_caps->adp_support))
  1645. ci->gadget.is_otg = 1;
  1646. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1647. /* alloc resources */
  1648. ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
  1649. sizeof(struct ci_hw_qh),
  1650. 64, CI_HDRC_PAGE_SIZE);
  1651. if (ci->qh_pool == NULL)
  1652. return -ENOMEM;
  1653. ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
  1654. sizeof(struct ci_hw_td),
  1655. 64, CI_HDRC_PAGE_SIZE);
  1656. if (ci->td_pool == NULL) {
  1657. retval = -ENOMEM;
  1658. goto free_qh_pool;
  1659. }
  1660. retval = init_eps(ci);
  1661. if (retval)
  1662. goto free_pools;
  1663. ci->gadget.ep0 = &ci->ep0in->ep;
  1664. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1665. if (retval)
  1666. goto destroy_eps;
  1667. pm_runtime_no_callbacks(&ci->gadget.dev);
  1668. pm_runtime_enable(&ci->gadget.dev);
  1669. return retval;
  1670. destroy_eps:
  1671. destroy_eps(ci);
  1672. free_pools:
  1673. dma_pool_destroy(ci->td_pool);
  1674. free_qh_pool:
  1675. dma_pool_destroy(ci->qh_pool);
  1676. return retval;
  1677. }
  1678. /**
  1679. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1680. *
  1681. * No interrupts active, the IRQ has been released
  1682. */
  1683. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1684. {
  1685. if (!ci->roles[CI_ROLE_GADGET])
  1686. return;
  1687. usb_del_gadget_udc(&ci->gadget);
  1688. destroy_eps(ci);
  1689. dma_pool_destroy(ci->td_pool);
  1690. dma_pool_destroy(ci->qh_pool);
  1691. }
  1692. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1693. {
  1694. if (ci->is_otg)
  1695. /* Clear and enable BSV irq */
  1696. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1697. OTGSC_BSVIS | OTGSC_BSVIE);
  1698. return 0;
  1699. }
  1700. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1701. {
  1702. /*
  1703. * host doesn't care B_SESSION_VALID event
  1704. * so clear and disbale BSV irq
  1705. */
  1706. if (ci->is_otg)
  1707. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1708. ci->vbus_active = 0;
  1709. }
  1710. /**
  1711. * ci_hdrc_gadget_init - initialize device related bits
  1712. * ci: the controller
  1713. *
  1714. * This function initializes the gadget, if the device is "device capable".
  1715. */
  1716. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1717. {
  1718. struct ci_role_driver *rdrv;
  1719. int ret;
  1720. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1721. return -ENXIO;
  1722. rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
  1723. if (!rdrv)
  1724. return -ENOMEM;
  1725. rdrv->start = udc_id_switch_for_device;
  1726. rdrv->stop = udc_id_switch_for_host;
  1727. rdrv->irq = udc_irq;
  1728. rdrv->name = "gadget";
  1729. ret = udc_start(ci);
  1730. if (!ret)
  1731. ci->roles[CI_ROLE_GADGET] = rdrv;
  1732. return ret;
  1733. }