embedded.c 6.2 KB

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  1. /*
  2. * Sonics Silicon Backplane
  3. * Embedded systems support code
  4. *
  5. * Copyright 2005-2008, Broadcom Corporation
  6. * Copyright 2006-2008, Michael Buesch <m@bues.ch>
  7. * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
  8. *
  9. * Licensed under the GNU/GPL. See COPYING for details.
  10. */
  11. #include "ssb_private.h"
  12. #include <linux/export.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/ssb/ssb.h>
  15. #include <linux/ssb/ssb_embedded.h>
  16. #include <linux/ssb/ssb_driver_pci.h>
  17. #include <linux/ssb/ssb_driver_gige.h>
  18. #include <linux/pci.h>
  19. int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
  20. {
  21. if (ssb_chipco_available(&bus->chipco)) {
  22. ssb_chipco_watchdog_timer_set(&bus->chipco, ticks);
  23. return 0;
  24. }
  25. if (ssb_extif_available(&bus->extif)) {
  26. ssb_extif_watchdog_timer_set(&bus->extif, ticks);
  27. return 0;
  28. }
  29. return -ENODEV;
  30. }
  31. EXPORT_SYMBOL(ssb_watchdog_timer_set);
  32. int ssb_watchdog_register(struct ssb_bus *bus)
  33. {
  34. struct bcm47xx_wdt wdt = {};
  35. struct platform_device *pdev;
  36. if (ssb_chipco_available(&bus->chipco)) {
  37. wdt.driver_data = &bus->chipco;
  38. wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;
  39. wdt.timer_set_ms = ssb_chipco_watchdog_timer_set_ms;
  40. wdt.max_timer_ms = bus->chipco.max_timer_ms;
  41. } else if (ssb_extif_available(&bus->extif)) {
  42. wdt.driver_data = &bus->extif;
  43. wdt.timer_set = ssb_extif_watchdog_timer_set_wdt;
  44. wdt.timer_set_ms = ssb_extif_watchdog_timer_set_ms;
  45. wdt.max_timer_ms = SSB_EXTIF_WATCHDOG_MAX_TIMER_MS;
  46. } else {
  47. return -ENODEV;
  48. }
  49. pdev = platform_device_register_data(NULL, "bcm47xx-wdt",
  50. bus->busnumber, &wdt,
  51. sizeof(wdt));
  52. if (IS_ERR(pdev)) {
  53. pr_debug("can not register watchdog device, err: %li\n",
  54. PTR_ERR(pdev));
  55. return PTR_ERR(pdev);
  56. }
  57. bus->watchdog = pdev;
  58. return 0;
  59. }
  60. u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
  61. {
  62. unsigned long flags;
  63. u32 res = 0;
  64. spin_lock_irqsave(&bus->gpio_lock, flags);
  65. if (ssb_chipco_available(&bus->chipco))
  66. res = ssb_chipco_gpio_in(&bus->chipco, mask);
  67. else if (ssb_extif_available(&bus->extif))
  68. res = ssb_extif_gpio_in(&bus->extif, mask);
  69. else
  70. WARN_ON(1);
  71. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  72. return res;
  73. }
  74. EXPORT_SYMBOL(ssb_gpio_in);
  75. u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
  76. {
  77. unsigned long flags;
  78. u32 res = 0;
  79. spin_lock_irqsave(&bus->gpio_lock, flags);
  80. if (ssb_chipco_available(&bus->chipco))
  81. res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
  82. else if (ssb_extif_available(&bus->extif))
  83. res = ssb_extif_gpio_out(&bus->extif, mask, value);
  84. else
  85. WARN_ON(1);
  86. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  87. return res;
  88. }
  89. EXPORT_SYMBOL(ssb_gpio_out);
  90. u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
  91. {
  92. unsigned long flags;
  93. u32 res = 0;
  94. spin_lock_irqsave(&bus->gpio_lock, flags);
  95. if (ssb_chipco_available(&bus->chipco))
  96. res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
  97. else if (ssb_extif_available(&bus->extif))
  98. res = ssb_extif_gpio_outen(&bus->extif, mask, value);
  99. else
  100. WARN_ON(1);
  101. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  102. return res;
  103. }
  104. EXPORT_SYMBOL(ssb_gpio_outen);
  105. u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
  106. {
  107. unsigned long flags;
  108. u32 res = 0;
  109. spin_lock_irqsave(&bus->gpio_lock, flags);
  110. if (ssb_chipco_available(&bus->chipco))
  111. res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
  112. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  113. return res;
  114. }
  115. EXPORT_SYMBOL(ssb_gpio_control);
  116. u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
  117. {
  118. unsigned long flags;
  119. u32 res = 0;
  120. spin_lock_irqsave(&bus->gpio_lock, flags);
  121. if (ssb_chipco_available(&bus->chipco))
  122. res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
  123. else if (ssb_extif_available(&bus->extif))
  124. res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
  125. else
  126. WARN_ON(1);
  127. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  128. return res;
  129. }
  130. EXPORT_SYMBOL(ssb_gpio_intmask);
  131. u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
  132. {
  133. unsigned long flags;
  134. u32 res = 0;
  135. spin_lock_irqsave(&bus->gpio_lock, flags);
  136. if (ssb_chipco_available(&bus->chipco))
  137. res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
  138. else if (ssb_extif_available(&bus->extif))
  139. res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
  140. else
  141. WARN_ON(1);
  142. spin_unlock_irqrestore(&bus->gpio_lock, flags);
  143. return res;
  144. }
  145. EXPORT_SYMBOL(ssb_gpio_polarity);
  146. #ifdef CONFIG_SSB_DRIVER_GIGE
  147. static int gige_pci_init_callback(struct ssb_bus *bus, unsigned long data)
  148. {
  149. struct pci_dev *pdev = (struct pci_dev *)data;
  150. struct ssb_device *dev;
  151. unsigned int i;
  152. int res;
  153. for (i = 0; i < bus->nr_devices; i++) {
  154. dev = &(bus->devices[i]);
  155. if (dev->id.coreid != SSB_DEV_ETHERNET_GBIT)
  156. continue;
  157. if (!dev->dev ||
  158. !dev->dev->driver ||
  159. !device_is_registered(dev->dev))
  160. continue;
  161. res = ssb_gige_pcibios_plat_dev_init(dev, pdev);
  162. if (res >= 0)
  163. return res;
  164. }
  165. return -ENODEV;
  166. }
  167. #endif /* CONFIG_SSB_DRIVER_GIGE */
  168. int ssb_pcibios_plat_dev_init(struct pci_dev *dev)
  169. {
  170. int err;
  171. err = ssb_pcicore_plat_dev_init(dev);
  172. if (!err)
  173. return 0;
  174. #ifdef CONFIG_SSB_DRIVER_GIGE
  175. err = ssb_for_each_bus_call((unsigned long)dev, gige_pci_init_callback);
  176. if (err >= 0)
  177. return err;
  178. #endif
  179. /* This is not a PCI device on any SSB device. */
  180. return -ENODEV;
  181. }
  182. #ifdef CONFIG_SSB_DRIVER_GIGE
  183. static int gige_map_irq_callback(struct ssb_bus *bus, unsigned long data)
  184. {
  185. const struct pci_dev *pdev = (const struct pci_dev *)data;
  186. struct ssb_device *dev;
  187. unsigned int i;
  188. int res;
  189. for (i = 0; i < bus->nr_devices; i++) {
  190. dev = &(bus->devices[i]);
  191. if (dev->id.coreid != SSB_DEV_ETHERNET_GBIT)
  192. continue;
  193. if (!dev->dev ||
  194. !dev->dev->driver ||
  195. !device_is_registered(dev->dev))
  196. continue;
  197. res = ssb_gige_map_irq(dev, pdev);
  198. if (res >= 0)
  199. return res;
  200. }
  201. return -ENODEV;
  202. }
  203. #endif /* CONFIG_SSB_DRIVER_GIGE */
  204. int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  205. {
  206. int res;
  207. /* Check if this PCI device is a device on a SSB bus or device
  208. * and return the IRQ number for it. */
  209. res = ssb_pcicore_pcibios_map_irq(dev, slot, pin);
  210. if (res >= 0)
  211. return res;
  212. #ifdef CONFIG_SSB_DRIVER_GIGE
  213. res = ssb_for_each_bus_call((unsigned long)dev, gige_map_irq_callback);
  214. if (res >= 0)
  215. return res;
  216. #endif
  217. /* This is not a PCI device on any SSB device. */
  218. return -ENODEV;
  219. }