ipr.c 302 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749775077517752775377547755775677577758775977607761776277637764776577667767776877697770777177727773777477757776777777787779778077817782778377847785778677877788778977907791779277937794779577967797779877997800780178027803780478057806780778087809781078117812781378147815781678177818781978207821782278237824782578267827782878297830783178327833783478357836783778387839784078417842784378447845784678477848784978507851785278537854785578567857785878597860786178627863786478657866786778687869787078717872787378747875787678777878787978807881788278837884788578867887788878897890789178927893789478957896789778987899790079017902790379047905790679077908790979107911791279137914791579167917791879197920792179227923792479257926792779287929793079317932793379347935793679377938793979407941794279437944794579467947794879497950795179527953795479557956795779587959796079617962796379647965796679677968796979707971797279737974797579767977797879797980798179827983798479857986798779887989799079917992799379947995799679977998799980008001800280038004800580068007800880098010801180128013801480158016801780188019802080218022802380248025802680278028802980308031803280338034803580368037803880398040804180428043804480458046804780488049805080518052805380548055805680578058805980608061806280638064806580668067806880698070807180728073807480758076807780788079808080818082808380848085808680878088808980908091809280938094809580968097809880998100810181028103810481058106810781088109811081118112811381148115811681178118811981208121812281238124812581268127812881298130813181328133813481358136813781388139814081418142814381448145814681478148814981508151815281538154815581568157815881598160816181628163816481658166816781688169817081718172817381748175817681778178817981808181818281838184818581868187818881898190819181928193819481958196819781988199820082018202820382048205820682078208820982108211821282138214821582168217821882198220822182228223822482258226822782288229823082318232823382348235823682378238823982408241824282438244824582468247824882498250825182528253825482558256825782588259826082618262826382648265826682678268826982708271827282738274827582768277827882798280828182828283828482858286828782888289829082918292829382948295829682978298829983008301830283038304830583068307830883098310831183128313831483158316831783188319832083218322832383248325832683278328832983308331833283338334833583368337833883398340834183428343834483458346834783488349835083518352835383548355835683578358835983608361836283638364836583668367836883698370837183728373837483758376837783788379838083818382838383848385838683878388838983908391839283938394839583968397839883998400840184028403840484058406840784088409841084118412841384148415841684178418841984208421842284238424842584268427842884298430843184328433843484358436843784388439844084418442844384448445844684478448844984508451845284538454845584568457845884598460846184628463846484658466846784688469847084718472847384748475847684778478847984808481848284838484848584868487848884898490849184928493849484958496849784988499850085018502850385048505850685078508850985108511851285138514851585168517851885198520852185228523852485258526852785288529853085318532853385348535853685378538853985408541854285438544854585468547854885498550855185528553855485558556855785588559856085618562856385648565856685678568856985708571857285738574857585768577857885798580858185828583858485858586858785888589859085918592859385948595859685978598859986008601860286038604860586068607860886098610861186128613861486158616861786188619862086218622862386248625862686278628862986308631863286338634863586368637863886398640864186428643864486458646864786488649865086518652865386548655865686578658865986608661866286638664866586668667866886698670867186728673867486758676867786788679868086818682868386848685868686878688868986908691869286938694869586968697869886998700870187028703870487058706870787088709871087118712871387148715871687178718871987208721872287238724872587268727872887298730873187328733873487358736873787388739874087418742874387448745874687478748874987508751875287538754875587568757875887598760876187628763876487658766876787688769877087718772877387748775877687778778877987808781878287838784878587868787878887898790879187928793879487958796879787988799880088018802880388048805880688078808880988108811881288138814881588168817881888198820882188228823882488258826882788288829883088318832883388348835883688378838883988408841884288438844884588468847884888498850885188528853885488558856885788588859886088618862886388648865886688678868886988708871887288738874887588768877887888798880888188828883888488858886888788888889889088918892889388948895889688978898889989008901890289038904890589068907890889098910891189128913891489158916891789188919892089218922892389248925892689278928892989308931893289338934893589368937893889398940894189428943894489458946894789488949895089518952895389548955895689578958895989608961896289638964896589668967896889698970897189728973897489758976897789788979898089818982898389848985898689878988898989908991899289938994899589968997899889999000900190029003900490059006900790089009901090119012901390149015901690179018901990209021902290239024902590269027902890299030903190329033903490359036903790389039904090419042904390449045904690479048904990509051905290539054905590569057905890599060906190629063906490659066906790689069907090719072907390749075907690779078907990809081908290839084908590869087908890899090909190929093909490959096909790989099910091019102910391049105910691079108910991109111911291139114911591169117911891199120912191229123912491259126912791289129913091319132913391349135913691379138913991409141914291439144914591469147914891499150915191529153915491559156915791589159916091619162916391649165916691679168916991709171917291739174917591769177917891799180918191829183918491859186918791889189919091919192919391949195919691979198919992009201920292039204920592069207920892099210921192129213921492159216921792189219922092219222922392249225922692279228922992309231923292339234923592369237923892399240924192429243924492459246924792489249925092519252925392549255925692579258925992609261926292639264926592669267926892699270927192729273927492759276927792789279928092819282928392849285928692879288928992909291929292939294929592969297929892999300930193029303930493059306930793089309931093119312931393149315931693179318931993209321932293239324932593269327932893299330933193329333933493359336933793389339934093419342934393449345934693479348934993509351935293539354935593569357935893599360936193629363936493659366936793689369937093719372937393749375937693779378937993809381938293839384938593869387938893899390939193929393939493959396939793989399940094019402940394049405940694079408940994109411941294139414941594169417941894199420942194229423942494259426942794289429943094319432943394349435943694379438943994409441944294439444944594469447944894499450945194529453945494559456945794589459946094619462946394649465946694679468946994709471947294739474947594769477947894799480948194829483948494859486948794889489949094919492949394949495949694979498949995009501950295039504950595069507950895099510951195129513951495159516951795189519952095219522952395249525952695279528952995309531953295339534953595369537953895399540954195429543954495459546954795489549955095519552955395549555955695579558955995609561956295639564956595669567956895699570957195729573957495759576957795789579958095819582958395849585958695879588958995909591959295939594959595969597959895999600960196029603960496059606960796089609961096119612961396149615961696179618961996209621962296239624962596269627962896299630963196329633963496359636963796389639964096419642964396449645964696479648964996509651965296539654965596569657965896599660966196629663966496659666966796689669967096719672967396749675967696779678967996809681968296839684968596869687968896899690969196929693969496959696969796989699970097019702970397049705970697079708970997109711971297139714971597169717971897199720972197229723972497259726972797289729973097319732973397349735973697379738973997409741974297439744974597469747974897499750975197529753975497559756975797589759976097619762976397649765976697679768976997709771977297739774977597769777977897799780978197829783978497859786978797889789979097919792979397949795979697979798979998009801980298039804980598069807980898099810981198129813981498159816981798189819982098219822982398249825982698279828982998309831983298339834983598369837983898399840984198429843984498459846984798489849985098519852985398549855985698579858985998609861986298639864986598669867986898699870987198729873987498759876987798789879988098819882988398849885988698879888988998909891989298939894989598969897989898999900990199029903990499059906990799089909991099119912991399149915991699179918991999209921992299239924992599269927992899299930993199329933993499359936993799389939994099419942994399449945994699479948994999509951995299539954995599569957995899599960996199629963996499659966996799689969997099719972997399749975997699779978997999809981998299839984998599869987998899899990999199929993999499959996999799989999100001000110002100031000410005100061000710008100091001010011100121001310014100151001610017100181001910020100211002210023100241002510026100271002810029100301003110032100331003410035100361003710038100391004010041100421004310044100451004610047100481004910050100511005210053100541005510056100571005810059100601006110062100631006410065100661006710068100691007010071100721007310074100751007610077100781007910080100811008210083100841008510086100871008810089100901009110092100931009410095100961009710098100991010010101101021010310104101051010610107101081010910110101111011210113101141011510116101171011810119101201012110122101231012410125101261012710128101291013010131101321013310134101351013610137101381013910140101411014210143101441014510146101471014810149101501015110152101531015410155101561015710158101591016010161101621016310164101651016610167101681016910170101711017210173101741017510176101771017810179101801018110182101831018410185101861018710188101891019010191101921019310194101951019610197101981019910200102011020210203102041020510206102071020810209102101021110212102131021410215102161021710218102191022010221102221022310224102251022610227102281022910230102311023210233102341023510236102371023810239102401024110242102431024410245102461024710248102491025010251102521025310254102551025610257102581025910260102611026210263102641026510266102671026810269102701027110272102731027410275102761027710278102791028010281102821028310284102851028610287102881028910290102911029210293102941029510296102971029810299103001030110302103031030410305103061030710308103091031010311103121031310314103151031610317103181031910320103211032210323103241032510326103271032810329103301033110332103331033410335103361033710338103391034010341103421034310344103451034610347103481034910350103511035210353103541035510356103571035810359103601036110362103631036410365103661036710368103691037010371103721037310374103751037610377103781037910380103811038210383103841038510386103871038810389103901039110392103931039410395103961039710398103991040010401104021040310404104051040610407104081040910410104111041210413104141041510416104171041810419104201042110422104231042410425104261042710428104291043010431104321043310434104351043610437104381043910440104411044210443104441044510446104471044810449104501045110452104531045410455104561045710458104591046010461104621046310464104651046610467104681046910470104711047210473104741047510476104771047810479104801048110482104831048410485104861048710488104891049010491104921049310494104951049610497104981049910500105011050210503105041050510506105071050810509105101051110512105131051410515105161051710518105191052010521105221052310524105251052610527105281052910530105311053210533105341053510536105371053810539105401054110542105431054410545105461054710548105491055010551105521055310554105551055610557105581055910560105611056210563105641056510566105671056810569105701057110572105731057410575105761057710578105791058010581105821058310584105851058610587105881058910590105911059210593105941059510596105971059810599106001060110602106031060410605106061060710608106091061010611106121061310614106151061610617106181061910620106211062210623106241062510626106271062810629106301063110632106331063410635106361063710638106391064010641106421064310644106451064610647106481064910650106511065210653106541065510656106571065810659106601066110662106631066410665106661066710668106691067010671106721067310674106751067610677106781067910680106811068210683106841068510686106871068810689106901069110692106931069410695106961069710698106991070010701107021070310704107051070610707107081070910710107111071210713107141071510716107171071810719107201072110722107231072410725107261072710728107291073010731107321073310734107351073610737107381073910740107411074210743107441074510746107471074810749107501075110752107531075410755107561075710758107591076010761107621076310764107651076610767107681076910770107711077210773107741077510776107771077810779107801078110782107831078410785107861078710788107891079010791107921079310794107951079610797107981079910800108011080210803108041080510806108071080810809108101081110812108131081410815108161081710818108191082010821108221082310824108251082610827108281082910830108311083210833108341083510836108371083810839108401084110842108431084410845108461084710848108491085010851108521085310854108551085610857108581085910860108611086210863108641086510866108671086810869108701087110872108731087410875108761087710878
  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 16;
  99. static unsigned int ipr_fast_reboot;
  100. static DEFINE_SPINLOCK(ipr_driver_lock);
  101. /* This table describes the differences between DMA controller chips */
  102. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  103. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  104. .mailbox = 0x0042C,
  105. .max_cmds = 100,
  106. .cache_line_size = 0x20,
  107. .clear_isr = 1,
  108. .iopoll_weight = 0,
  109. {
  110. .set_interrupt_mask_reg = 0x0022C,
  111. .clr_interrupt_mask_reg = 0x00230,
  112. .clr_interrupt_mask_reg32 = 0x00230,
  113. .sense_interrupt_mask_reg = 0x0022C,
  114. .sense_interrupt_mask_reg32 = 0x0022C,
  115. .clr_interrupt_reg = 0x00228,
  116. .clr_interrupt_reg32 = 0x00228,
  117. .sense_interrupt_reg = 0x00224,
  118. .sense_interrupt_reg32 = 0x00224,
  119. .ioarrin_reg = 0x00404,
  120. .sense_uproc_interrupt_reg = 0x00214,
  121. .sense_uproc_interrupt_reg32 = 0x00214,
  122. .set_uproc_interrupt_reg = 0x00214,
  123. .set_uproc_interrupt_reg32 = 0x00214,
  124. .clr_uproc_interrupt_reg = 0x00218,
  125. .clr_uproc_interrupt_reg32 = 0x00218
  126. }
  127. },
  128. { /* Snipe and Scamp */
  129. .mailbox = 0x0052C,
  130. .max_cmds = 100,
  131. .cache_line_size = 0x20,
  132. .clear_isr = 1,
  133. .iopoll_weight = 0,
  134. {
  135. .set_interrupt_mask_reg = 0x00288,
  136. .clr_interrupt_mask_reg = 0x0028C,
  137. .clr_interrupt_mask_reg32 = 0x0028C,
  138. .sense_interrupt_mask_reg = 0x00288,
  139. .sense_interrupt_mask_reg32 = 0x00288,
  140. .clr_interrupt_reg = 0x00284,
  141. .clr_interrupt_reg32 = 0x00284,
  142. .sense_interrupt_reg = 0x00280,
  143. .sense_interrupt_reg32 = 0x00280,
  144. .ioarrin_reg = 0x00504,
  145. .sense_uproc_interrupt_reg = 0x00290,
  146. .sense_uproc_interrupt_reg32 = 0x00290,
  147. .set_uproc_interrupt_reg = 0x00290,
  148. .set_uproc_interrupt_reg32 = 0x00290,
  149. .clr_uproc_interrupt_reg = 0x00294,
  150. .clr_uproc_interrupt_reg32 = 0x00294
  151. }
  152. },
  153. { /* CRoC */
  154. .mailbox = 0x00044,
  155. .max_cmds = 1000,
  156. .cache_line_size = 0x20,
  157. .clear_isr = 0,
  158. .iopoll_weight = 64,
  159. {
  160. .set_interrupt_mask_reg = 0x00010,
  161. .clr_interrupt_mask_reg = 0x00018,
  162. .clr_interrupt_mask_reg32 = 0x0001C,
  163. .sense_interrupt_mask_reg = 0x00010,
  164. .sense_interrupt_mask_reg32 = 0x00014,
  165. .clr_interrupt_reg = 0x00008,
  166. .clr_interrupt_reg32 = 0x0000C,
  167. .sense_interrupt_reg = 0x00000,
  168. .sense_interrupt_reg32 = 0x00004,
  169. .ioarrin_reg = 0x00070,
  170. .sense_uproc_interrupt_reg = 0x00020,
  171. .sense_uproc_interrupt_reg32 = 0x00024,
  172. .set_uproc_interrupt_reg = 0x00020,
  173. .set_uproc_interrupt_reg32 = 0x00024,
  174. .clr_uproc_interrupt_reg = 0x00028,
  175. .clr_uproc_interrupt_reg32 = 0x0002C,
  176. .init_feedback_reg = 0x0005C,
  177. .dump_addr_reg = 0x00064,
  178. .dump_data_reg = 0x00068,
  179. .endian_swap_reg = 0x00084
  180. }
  181. },
  182. };
  183. static const struct ipr_chip_t ipr_chip[] = {
  184. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  186. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, true, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  189. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  190. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  192. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  193. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  194. };
  195. static int ipr_max_bus_speeds[] = {
  196. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  197. };
  198. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  199. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  200. module_param_named(max_speed, ipr_max_speed, uint, 0);
  201. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  202. module_param_named(log_level, ipr_log_level, uint, 0);
  203. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  204. module_param_named(testmode, ipr_testmode, int, 0);
  205. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  206. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  207. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  208. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  209. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  210. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  211. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  212. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  213. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  214. module_param_named(max_devs, ipr_max_devs, int, 0);
  215. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  216. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  217. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  218. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:16)");
  219. module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
  220. MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
  221. MODULE_LICENSE("GPL");
  222. MODULE_VERSION(IPR_DRIVER_VERSION);
  223. /* A constant array of IOASCs/URCs/Error Messages */
  224. static const
  225. struct ipr_error_table_t ipr_error_table[] = {
  226. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  227. "8155: An unknown error was received"},
  228. {0x00330000, 0, 0,
  229. "Soft underlength error"},
  230. {0x005A0000, 0, 0,
  231. "Command to be cancelled not found"},
  232. {0x00808000, 0, 0,
  233. "Qualified success"},
  234. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFE: Soft device bus error recovered by the IOA"},
  236. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "4101: Soft device bus fabric error"},
  238. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "FFFC: Logical block guard error recovered by the device"},
  240. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FFFC: Logical block reference tag error recovered by the device"},
  242. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "4171: Recovered scatter list tag / sequence number error"},
  244. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  246. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  248. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  250. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  251. "FFFD: Logical block guard error recovered by the IOA"},
  252. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "FFF9: Device sector reassign successful"},
  254. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  255. "FFF7: Media error recovered by device rewrite procedures"},
  256. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "7001: IOA sector reassignment successful"},
  258. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FFF9: Soft media error. Sector reassignment recommended"},
  260. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  261. "FFF7: Media error recovered by IOA rewrite procedures"},
  262. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "FF3D: Soft PCI bus error recovered by the IOA"},
  264. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  265. "FFF6: Device hardware error recovered by the IOA"},
  266. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  267. "FFF6: Device hardware error recovered by the device"},
  268. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  269. "FF3D: Soft IOA error recovered by the IOA"},
  270. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  271. "FFFA: Undefined device response recovered by the IOA"},
  272. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  273. "FFF6: Device bus error, message or command phase"},
  274. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "FFFE: Task Management Function failed"},
  276. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  277. "FFF6: Failure prediction threshold exceeded"},
  278. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  279. "8009: Impending cache battery pack failure"},
  280. {0x02040100, 0, 0,
  281. "Logical Unit in process of becoming ready"},
  282. {0x02040200, 0, 0,
  283. "Initializing command required"},
  284. {0x02040400, 0, 0,
  285. "34FF: Disk device format in progress"},
  286. {0x02040C00, 0, 0,
  287. "Logical unit not accessible, target port in unavailable state"},
  288. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  289. "9070: IOA requested reset"},
  290. {0x023F0000, 0, 0,
  291. "Synchronization required"},
  292. {0x02408500, 0, 0,
  293. "IOA microcode download required"},
  294. {0x02408600, 0, 0,
  295. "Device bus connection is prohibited by host"},
  296. {0x024E0000, 0, 0,
  297. "No ready, IOA shutdown"},
  298. {0x025A0000, 0, 0,
  299. "Not ready, IOA has been shutdown"},
  300. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  301. "3020: Storage subsystem configuration error"},
  302. {0x03110B00, 0, 0,
  303. "FFF5: Medium error, data unreadable, recommend reassign"},
  304. {0x03110C00, 0, 0,
  305. "7000: Medium error, data unreadable, do not reassign"},
  306. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  307. "FFF3: Disk media format bad"},
  308. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  309. "3002: Addressed device failed to respond to selection"},
  310. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  311. "3100: Device bus error"},
  312. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  313. "3109: IOA timed out a device command"},
  314. {0x04088000, 0, 0,
  315. "3120: SCSI bus is not operational"},
  316. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "4100: Hard device bus fabric error"},
  318. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  319. "310C: Logical block guard error detected by the device"},
  320. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  321. "310C: Logical block reference tag error detected by the device"},
  322. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  323. "4170: Scatter list tag / sequence number error"},
  324. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "8150: Logical block CRC error on IOA to Host transfer"},
  326. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  327. "4170: Logical block sequence number error on IOA to Host transfer"},
  328. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  329. "310D: Logical block reference tag error detected by the IOA"},
  330. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  331. "310D: Logical block guard error detected by the IOA"},
  332. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "9000: IOA reserved area data check"},
  334. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  335. "9001: IOA reserved area invalid data pattern"},
  336. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  337. "9002: IOA reserved area LRC error"},
  338. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  339. "Hardware Error, IOA metadata access error"},
  340. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  341. "102E: Out of alternate sectors for disk storage"},
  342. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  343. "FFF4: Data transfer underlength error"},
  344. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  345. "FFF4: Data transfer overlength error"},
  346. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "3400: Logical unit failure"},
  348. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  349. "FFF4: Device microcode is corrupt"},
  350. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  351. "8150: PCI bus error"},
  352. {0x04430000, 1, 0,
  353. "Unsupported device bus message received"},
  354. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  355. "FFF4: Disk device problem"},
  356. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  357. "8150: Permanent IOA failure"},
  358. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "3010: Disk device returned wrong response to IOA"},
  360. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "8151: IOA microcode error"},
  362. {0x04448500, 0, 0,
  363. "Device bus status error"},
  364. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  365. "8157: IOA error requiring IOA reset to recover"},
  366. {0x04448700, 0, 0,
  367. "ATA device status error"},
  368. {0x04490000, 0, 0,
  369. "Message reject received from the device"},
  370. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "8008: A permanent cache battery pack failure occurred"},
  372. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "9090: Disk unit has been modified after the last known status"},
  374. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  375. "9081: IOA detected device error"},
  376. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  377. "9082: IOA detected device error"},
  378. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  379. "3110: Device bus error, message or command phase"},
  380. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  381. "3110: SAS Command / Task Management Function failed"},
  382. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  383. "9091: Incorrect hardware configuration change has been detected"},
  384. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  385. "9073: Invalid multi-adapter configuration"},
  386. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  387. "4010: Incorrect connection between cascaded expanders"},
  388. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  389. "4020: Connections exceed IOA design limits"},
  390. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  391. "4030: Incorrect multipath connection"},
  392. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  393. "4110: Unsupported enclosure function"},
  394. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  395. "4120: SAS cable VPD cannot be read"},
  396. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  397. "FFF4: Command to logical unit failed"},
  398. {0x05240000, 1, 0,
  399. "Illegal request, invalid request type or request packet"},
  400. {0x05250000, 0, 0,
  401. "Illegal request, invalid resource handle"},
  402. {0x05258000, 0, 0,
  403. "Illegal request, commands not allowed to this device"},
  404. {0x05258100, 0, 0,
  405. "Illegal request, command not allowed to a secondary adapter"},
  406. {0x05258200, 0, 0,
  407. "Illegal request, command not allowed to a non-optimized resource"},
  408. {0x05260000, 0, 0,
  409. "Illegal request, invalid field in parameter list"},
  410. {0x05260100, 0, 0,
  411. "Illegal request, parameter not supported"},
  412. {0x05260200, 0, 0,
  413. "Illegal request, parameter value invalid"},
  414. {0x052C0000, 0, 0,
  415. "Illegal request, command sequence error"},
  416. {0x052C8000, 1, 0,
  417. "Illegal request, dual adapter support not enabled"},
  418. {0x052C8100, 1, 0,
  419. "Illegal request, another cable connector was physically disabled"},
  420. {0x054E8000, 1, 0,
  421. "Illegal request, inconsistent group id/group count"},
  422. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "9031: Array protection temporarily suspended, protection resuming"},
  424. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "9040: Array protection temporarily suspended, protection resuming"},
  426. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "4080: IOA exceeded maximum operating temperature"},
  428. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "4085: Service required"},
  430. {0x060B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "4086: SAS Adapter Hardware Configuration Error"},
  432. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "3140: Device bus not ready to ready transition"},
  434. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "FFFB: SCSI bus was reset"},
  436. {0x06290500, 0, 0,
  437. "FFFE: SCSI bus transition to single ended"},
  438. {0x06290600, 0, 0,
  439. "FFFE: SCSI bus transition to LVD"},
  440. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "FFFB: SCSI bus was reset by another initiator"},
  442. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "3029: A device replacement has occurred"},
  444. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "4102: Device bus fabric performance degradation"},
  446. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "9051: IOA cache data exists for a missing or failed device"},
  448. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  450. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "9025: Disk unit is not supported at its physical location"},
  452. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "3020: IOA detected a SCSI bus configuration error"},
  454. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "3150: SCSI bus configuration error"},
  456. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "9074: Asymmetric advanced function disk configuration"},
  458. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "4040: Incomplete multipath connection between IOA and enclosure"},
  460. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "4041: Incomplete multipath connection between enclosure and device"},
  462. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "9075: Incomplete multipath connection between IOA and remote IOA"},
  464. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "9076: Configuration error, missing remote IOA"},
  466. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "4050: Enclosure does not support a required multipath function"},
  468. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "4121: Configuration error, required cable is missing"},
  470. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "4122: Cable is not plugged into the correct location on remote IOA"},
  472. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "4123: Configuration error, invalid cable vital product data"},
  474. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  476. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "4070: Logically bad block written on device"},
  478. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "9041: Array protection temporarily suspended"},
  480. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "9042: Corrupt array parity detected on specified device"},
  482. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  483. "9030: Array no longer protected due to missing or failed disk unit"},
  484. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  485. "9071: Link operational transition"},
  486. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "9072: Link not operational transition"},
  488. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "9032: Array exposed but still protected"},
  490. {0x066B8300, 0, IPR_DEBUG_LOG_LEVEL,
  491. "70DD: Device forced failed by disrupt device command"},
  492. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "4061: Multipath redundancy level got better"},
  494. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  495. "4060: Multipath redundancy level got worse"},
  496. {0x06808100, 0, IPR_DEBUG_LOG_LEVEL,
  497. "9083: Device raw mode enabled"},
  498. {0x06808200, 0, IPR_DEBUG_LOG_LEVEL,
  499. "9084: Device raw mode disabled"},
  500. {0x07270000, 0, 0,
  501. "Failure due to other device"},
  502. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  503. "9008: IOA does not support functions expected by devices"},
  504. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  505. "9010: Cache data associated with attached devices cannot be found"},
  506. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  507. "9011: Cache data belongs to devices other than those attached"},
  508. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  509. "9020: Array missing 2 or more devices with only 1 device present"},
  510. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  511. "9021: Array missing 2 or more devices with 2 or more devices present"},
  512. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  513. "9022: Exposed array is missing a required device"},
  514. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  515. "9023: Array member(s) not at required physical locations"},
  516. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  517. "9024: Array not functional due to present hardware configuration"},
  518. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  519. "9026: Array not functional due to present hardware configuration"},
  520. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  521. "9027: Array is missing a device and parity is out of sync"},
  522. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  523. "9028: Maximum number of arrays already exist"},
  524. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  525. "9050: Required cache data cannot be located for a disk unit"},
  526. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  527. "9052: Cache data exists for a device that has been modified"},
  528. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  529. "9054: IOA resources not available due to previous problems"},
  530. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  531. "9092: Disk unit requires initialization before use"},
  532. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  533. "9029: Incorrect hardware configuration change has been detected"},
  534. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  535. "9060: One or more disk pairs are missing from an array"},
  536. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  537. "9061: One or more disks are missing from an array"},
  538. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  539. "9062: One or more disks are missing from an array"},
  540. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  541. "9063: Maximum number of functional arrays has been exceeded"},
  542. {0x07279A00, 0, 0,
  543. "Data protect, other volume set problem"},
  544. {0x0B260000, 0, 0,
  545. "Aborted command, invalid descriptor"},
  546. {0x0B3F9000, 0, 0,
  547. "Target operating conditions have changed, dual adapter takeover"},
  548. {0x0B530200, 0, 0,
  549. "Aborted command, medium removal prevented"},
  550. {0x0B5A0000, 0, 0,
  551. "Command terminated by host"},
  552. {0x0B5B8000, 0, 0,
  553. "Aborted command, command terminated by host"}
  554. };
  555. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  556. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  557. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  558. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  559. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  560. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  561. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  562. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  563. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  564. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  565. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  566. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  567. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  568. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  569. };
  570. /*
  571. * Function Prototypes
  572. */
  573. static int ipr_reset_alert(struct ipr_cmnd *);
  574. static void ipr_process_ccn(struct ipr_cmnd *);
  575. static void ipr_process_error(struct ipr_cmnd *);
  576. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  577. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  578. enum ipr_shutdown_type);
  579. #ifdef CONFIG_SCSI_IPR_TRACE
  580. /**
  581. * ipr_trc_hook - Add a trace entry to the driver trace
  582. * @ipr_cmd: ipr command struct
  583. * @type: trace type
  584. * @add_data: additional data
  585. *
  586. * Return value:
  587. * none
  588. **/
  589. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  590. u8 type, u32 add_data)
  591. {
  592. struct ipr_trace_entry *trace_entry;
  593. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  594. unsigned int trace_index;
  595. trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
  596. trace_entry = &ioa_cfg->trace[trace_index];
  597. trace_entry->time = jiffies;
  598. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  599. trace_entry->type = type;
  600. if (ipr_cmd->ioa_cfg->sis64)
  601. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  602. else
  603. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  604. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  605. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  606. trace_entry->u.add_data = add_data;
  607. wmb();
  608. }
  609. #else
  610. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  611. #endif
  612. /**
  613. * ipr_lock_and_done - Acquire lock and complete command
  614. * @ipr_cmd: ipr command struct
  615. *
  616. * Return value:
  617. * none
  618. **/
  619. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  620. {
  621. unsigned long lock_flags;
  622. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  623. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  624. ipr_cmd->done(ipr_cmd);
  625. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  626. }
  627. /**
  628. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  629. * @ipr_cmd: ipr command struct
  630. *
  631. * Return value:
  632. * none
  633. **/
  634. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  635. {
  636. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  637. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  638. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  639. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  640. int hrrq_id;
  641. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  642. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  643. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  644. ioarcb->data_transfer_length = 0;
  645. ioarcb->read_data_transfer_length = 0;
  646. ioarcb->ioadl_len = 0;
  647. ioarcb->read_ioadl_len = 0;
  648. if (ipr_cmd->ioa_cfg->sis64) {
  649. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  650. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  651. ioasa64->u.gata.status = 0;
  652. } else {
  653. ioarcb->write_ioadl_addr =
  654. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  655. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  656. ioasa->u.gata.status = 0;
  657. }
  658. ioasa->hdr.ioasc = 0;
  659. ioasa->hdr.residual_data_len = 0;
  660. ipr_cmd->scsi_cmd = NULL;
  661. ipr_cmd->qc = NULL;
  662. ipr_cmd->sense_buffer[0] = 0;
  663. ipr_cmd->dma_use_sg = 0;
  664. }
  665. /**
  666. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  667. * @ipr_cmd: ipr command struct
  668. *
  669. * Return value:
  670. * none
  671. **/
  672. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  673. void (*fast_done) (struct ipr_cmnd *))
  674. {
  675. ipr_reinit_ipr_cmnd(ipr_cmd);
  676. ipr_cmd->u.scratch = 0;
  677. ipr_cmd->sibling = NULL;
  678. ipr_cmd->eh_comp = NULL;
  679. ipr_cmd->fast_done = fast_done;
  680. timer_setup(&ipr_cmd->timer, NULL, 0);
  681. }
  682. /**
  683. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  684. * @ioa_cfg: ioa config struct
  685. *
  686. * Return value:
  687. * pointer to ipr command struct
  688. **/
  689. static
  690. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  691. {
  692. struct ipr_cmnd *ipr_cmd = NULL;
  693. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  694. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  695. struct ipr_cmnd, queue);
  696. list_del(&ipr_cmd->queue);
  697. }
  698. return ipr_cmd;
  699. }
  700. /**
  701. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  702. * @ioa_cfg: ioa config struct
  703. *
  704. * Return value:
  705. * pointer to ipr command struct
  706. **/
  707. static
  708. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  709. {
  710. struct ipr_cmnd *ipr_cmd =
  711. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  712. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  713. return ipr_cmd;
  714. }
  715. /**
  716. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  717. * @ioa_cfg: ioa config struct
  718. * @clr_ints: interrupts to clear
  719. *
  720. * This function masks all interrupts on the adapter, then clears the
  721. * interrupts specified in the mask
  722. *
  723. * Return value:
  724. * none
  725. **/
  726. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  727. u32 clr_ints)
  728. {
  729. volatile u32 int_reg;
  730. int i;
  731. /* Stop new interrupts */
  732. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  733. spin_lock(&ioa_cfg->hrrq[i]._lock);
  734. ioa_cfg->hrrq[i].allow_interrupts = 0;
  735. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  736. }
  737. /* Set interrupt mask to stop all new interrupts */
  738. if (ioa_cfg->sis64)
  739. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  740. else
  741. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  742. /* Clear any pending interrupts */
  743. if (ioa_cfg->sis64)
  744. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  745. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  746. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  747. }
  748. /**
  749. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  750. * @ioa_cfg: ioa config struct
  751. *
  752. * Return value:
  753. * 0 on success / -EIO on failure
  754. **/
  755. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  756. {
  757. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  758. if (pcix_cmd_reg == 0)
  759. return 0;
  760. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  761. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  762. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  763. return -EIO;
  764. }
  765. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  766. return 0;
  767. }
  768. /**
  769. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  770. * @ioa_cfg: ioa config struct
  771. *
  772. * Return value:
  773. * 0 on success / -EIO on failure
  774. **/
  775. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  776. {
  777. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  778. if (pcix_cmd_reg) {
  779. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  780. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  781. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  782. return -EIO;
  783. }
  784. }
  785. return 0;
  786. }
  787. /**
  788. * __ipr_sata_eh_done - done function for aborted SATA commands
  789. * @ipr_cmd: ipr command struct
  790. *
  791. * This function is invoked for ops generated to SATA
  792. * devices which are being aborted.
  793. *
  794. * Return value:
  795. * none
  796. **/
  797. static void __ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  798. {
  799. struct ata_queued_cmd *qc = ipr_cmd->qc;
  800. struct ipr_sata_port *sata_port = qc->ap->private_data;
  801. qc->err_mask |= AC_ERR_OTHER;
  802. sata_port->ioasa.status |= ATA_BUSY;
  803. ata_qc_complete(qc);
  804. if (ipr_cmd->eh_comp)
  805. complete(ipr_cmd->eh_comp);
  806. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  807. }
  808. /**
  809. * ipr_sata_eh_done - done function for aborted SATA commands
  810. * @ipr_cmd: ipr command struct
  811. *
  812. * This function is invoked for ops generated to SATA
  813. * devices which are being aborted.
  814. *
  815. * Return value:
  816. * none
  817. **/
  818. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  819. {
  820. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  821. unsigned long hrrq_flags;
  822. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  823. __ipr_sata_eh_done(ipr_cmd);
  824. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  825. }
  826. /**
  827. * __ipr_scsi_eh_done - mid-layer done function for aborted ops
  828. * @ipr_cmd: ipr command struct
  829. *
  830. * This function is invoked by the interrupt handler for
  831. * ops generated by the SCSI mid-layer which are being aborted.
  832. *
  833. * Return value:
  834. * none
  835. **/
  836. static void __ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  837. {
  838. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  839. scsi_cmd->result |= (DID_ERROR << 16);
  840. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  841. scsi_cmd->scsi_done(scsi_cmd);
  842. if (ipr_cmd->eh_comp)
  843. complete(ipr_cmd->eh_comp);
  844. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  845. }
  846. /**
  847. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  848. * @ipr_cmd: ipr command struct
  849. *
  850. * This function is invoked by the interrupt handler for
  851. * ops generated by the SCSI mid-layer which are being aborted.
  852. *
  853. * Return value:
  854. * none
  855. **/
  856. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  857. {
  858. unsigned long hrrq_flags;
  859. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  860. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  861. __ipr_scsi_eh_done(ipr_cmd);
  862. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  863. }
  864. /**
  865. * ipr_fail_all_ops - Fails all outstanding ops.
  866. * @ioa_cfg: ioa config struct
  867. *
  868. * This function fails all outstanding ops.
  869. *
  870. * Return value:
  871. * none
  872. **/
  873. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  874. {
  875. struct ipr_cmnd *ipr_cmd, *temp;
  876. struct ipr_hrr_queue *hrrq;
  877. ENTER;
  878. for_each_hrrq(hrrq, ioa_cfg) {
  879. spin_lock(&hrrq->_lock);
  880. list_for_each_entry_safe(ipr_cmd,
  881. temp, &hrrq->hrrq_pending_q, queue) {
  882. list_del(&ipr_cmd->queue);
  883. ipr_cmd->s.ioasa.hdr.ioasc =
  884. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  885. ipr_cmd->s.ioasa.hdr.ilid =
  886. cpu_to_be32(IPR_DRIVER_ILID);
  887. if (ipr_cmd->scsi_cmd)
  888. ipr_cmd->done = __ipr_scsi_eh_done;
  889. else if (ipr_cmd->qc)
  890. ipr_cmd->done = __ipr_sata_eh_done;
  891. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  892. IPR_IOASC_IOA_WAS_RESET);
  893. del_timer(&ipr_cmd->timer);
  894. ipr_cmd->done(ipr_cmd);
  895. }
  896. spin_unlock(&hrrq->_lock);
  897. }
  898. LEAVE;
  899. }
  900. /**
  901. * ipr_send_command - Send driver initiated requests.
  902. * @ipr_cmd: ipr command struct
  903. *
  904. * This function sends a command to the adapter using the correct write call.
  905. * In the case of sis64, calculate the ioarcb size required. Then or in the
  906. * appropriate bits.
  907. *
  908. * Return value:
  909. * none
  910. **/
  911. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  912. {
  913. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  914. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  915. if (ioa_cfg->sis64) {
  916. /* The default size is 256 bytes */
  917. send_dma_addr |= 0x1;
  918. /* If the number of ioadls * size of ioadl > 128 bytes,
  919. then use a 512 byte ioarcb */
  920. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  921. send_dma_addr |= 0x4;
  922. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  923. } else
  924. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  925. }
  926. /**
  927. * ipr_do_req - Send driver initiated requests.
  928. * @ipr_cmd: ipr command struct
  929. * @done: done function
  930. * @timeout_func: timeout function
  931. * @timeout: timeout value
  932. *
  933. * This function sends the specified command to the adapter with the
  934. * timeout given. The done function is invoked on command completion.
  935. *
  936. * Return value:
  937. * none
  938. **/
  939. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  940. void (*done) (struct ipr_cmnd *),
  941. void (*timeout_func) (struct timer_list *), u32 timeout)
  942. {
  943. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  944. ipr_cmd->done = done;
  945. ipr_cmd->timer.expires = jiffies + timeout;
  946. ipr_cmd->timer.function = timeout_func;
  947. add_timer(&ipr_cmd->timer);
  948. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  949. ipr_send_command(ipr_cmd);
  950. }
  951. /**
  952. * ipr_internal_cmd_done - Op done function for an internally generated op.
  953. * @ipr_cmd: ipr command struct
  954. *
  955. * This function is the op done function for an internally generated,
  956. * blocking op. It simply wakes the sleeping thread.
  957. *
  958. * Return value:
  959. * none
  960. **/
  961. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  962. {
  963. if (ipr_cmd->sibling)
  964. ipr_cmd->sibling = NULL;
  965. else
  966. complete(&ipr_cmd->completion);
  967. }
  968. /**
  969. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  970. * @ipr_cmd: ipr command struct
  971. * @dma_addr: dma address
  972. * @len: transfer length
  973. * @flags: ioadl flag value
  974. *
  975. * This function initializes an ioadl in the case where there is only a single
  976. * descriptor.
  977. *
  978. * Return value:
  979. * nothing
  980. **/
  981. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  982. u32 len, int flags)
  983. {
  984. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  985. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  986. ipr_cmd->dma_use_sg = 1;
  987. if (ipr_cmd->ioa_cfg->sis64) {
  988. ioadl64->flags = cpu_to_be32(flags);
  989. ioadl64->data_len = cpu_to_be32(len);
  990. ioadl64->address = cpu_to_be64(dma_addr);
  991. ipr_cmd->ioarcb.ioadl_len =
  992. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  993. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  994. } else {
  995. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  996. ioadl->address = cpu_to_be32(dma_addr);
  997. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  998. ipr_cmd->ioarcb.read_ioadl_len =
  999. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  1000. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  1001. } else {
  1002. ipr_cmd->ioarcb.ioadl_len =
  1003. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  1004. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  1005. }
  1006. }
  1007. }
  1008. /**
  1009. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  1010. * @ipr_cmd: ipr command struct
  1011. * @timeout_func: function to invoke if command times out
  1012. * @timeout: timeout
  1013. *
  1014. * Return value:
  1015. * none
  1016. **/
  1017. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  1018. void (*timeout_func) (struct timer_list *),
  1019. u32 timeout)
  1020. {
  1021. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1022. init_completion(&ipr_cmd->completion);
  1023. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  1024. spin_unlock_irq(ioa_cfg->host->host_lock);
  1025. wait_for_completion(&ipr_cmd->completion);
  1026. spin_lock_irq(ioa_cfg->host->host_lock);
  1027. }
  1028. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  1029. {
  1030. unsigned int hrrq;
  1031. if (ioa_cfg->hrrq_num == 1)
  1032. hrrq = 0;
  1033. else {
  1034. hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
  1035. hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
  1036. }
  1037. return hrrq;
  1038. }
  1039. /**
  1040. * ipr_send_hcam - Send an HCAM to the adapter.
  1041. * @ioa_cfg: ioa config struct
  1042. * @type: HCAM type
  1043. * @hostrcb: hostrcb struct
  1044. *
  1045. * This function will send a Host Controlled Async command to the adapter.
  1046. * If HCAMs are currently not allowed to be issued to the adapter, it will
  1047. * place the hostrcb on the free queue.
  1048. *
  1049. * Return value:
  1050. * none
  1051. **/
  1052. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  1053. struct ipr_hostrcb *hostrcb)
  1054. {
  1055. struct ipr_cmnd *ipr_cmd;
  1056. struct ipr_ioarcb *ioarcb;
  1057. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  1058. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  1059. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  1060. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  1061. ipr_cmd->u.hostrcb = hostrcb;
  1062. ioarcb = &ipr_cmd->ioarcb;
  1063. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1064. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1065. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1066. ioarcb->cmd_pkt.cdb[1] = type;
  1067. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1068. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1069. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1070. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1071. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1072. ipr_cmd->done = ipr_process_ccn;
  1073. else
  1074. ipr_cmd->done = ipr_process_error;
  1075. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1076. ipr_send_command(ipr_cmd);
  1077. } else {
  1078. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1079. }
  1080. }
  1081. /**
  1082. * ipr_update_ata_class - Update the ata class in the resource entry
  1083. * @res: resource entry struct
  1084. * @proto: cfgte device bus protocol value
  1085. *
  1086. * Return value:
  1087. * none
  1088. **/
  1089. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  1090. {
  1091. switch (proto) {
  1092. case IPR_PROTO_SATA:
  1093. case IPR_PROTO_SAS_STP:
  1094. res->ata_class = ATA_DEV_ATA;
  1095. break;
  1096. case IPR_PROTO_SATA_ATAPI:
  1097. case IPR_PROTO_SAS_STP_ATAPI:
  1098. res->ata_class = ATA_DEV_ATAPI;
  1099. break;
  1100. default:
  1101. res->ata_class = ATA_DEV_UNKNOWN;
  1102. break;
  1103. };
  1104. }
  1105. /**
  1106. * ipr_init_res_entry - Initialize a resource entry struct.
  1107. * @res: resource entry struct
  1108. * @cfgtew: config table entry wrapper struct
  1109. *
  1110. * Return value:
  1111. * none
  1112. **/
  1113. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1114. struct ipr_config_table_entry_wrapper *cfgtew)
  1115. {
  1116. int found = 0;
  1117. unsigned int proto;
  1118. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1119. struct ipr_resource_entry *gscsi_res = NULL;
  1120. res->needs_sync_complete = 0;
  1121. res->in_erp = 0;
  1122. res->add_to_ml = 0;
  1123. res->del_from_ml = 0;
  1124. res->resetting_device = 0;
  1125. res->reset_occurred = 0;
  1126. res->sdev = NULL;
  1127. res->sata_port = NULL;
  1128. if (ioa_cfg->sis64) {
  1129. proto = cfgtew->u.cfgte64->proto;
  1130. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1131. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1132. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1133. res->type = cfgtew->u.cfgte64->res_type;
  1134. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1135. sizeof(res->res_path));
  1136. res->bus = 0;
  1137. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1138. sizeof(res->dev_lun.scsi_lun));
  1139. res->lun = scsilun_to_int(&res->dev_lun);
  1140. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1141. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1142. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1143. found = 1;
  1144. res->target = gscsi_res->target;
  1145. break;
  1146. }
  1147. }
  1148. if (!found) {
  1149. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1150. ioa_cfg->max_devs_supported);
  1151. set_bit(res->target, ioa_cfg->target_ids);
  1152. }
  1153. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1154. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1155. res->target = 0;
  1156. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1157. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1158. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1159. ioa_cfg->max_devs_supported);
  1160. set_bit(res->target, ioa_cfg->array_ids);
  1161. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1162. res->bus = IPR_VSET_VIRTUAL_BUS;
  1163. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1164. ioa_cfg->max_devs_supported);
  1165. set_bit(res->target, ioa_cfg->vset_ids);
  1166. } else {
  1167. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1168. ioa_cfg->max_devs_supported);
  1169. set_bit(res->target, ioa_cfg->target_ids);
  1170. }
  1171. } else {
  1172. proto = cfgtew->u.cfgte->proto;
  1173. res->qmodel = IPR_QUEUEING_MODEL(res);
  1174. res->flags = cfgtew->u.cfgte->flags;
  1175. if (res->flags & IPR_IS_IOA_RESOURCE)
  1176. res->type = IPR_RES_TYPE_IOAFP;
  1177. else
  1178. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1179. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1180. res->target = cfgtew->u.cfgte->res_addr.target;
  1181. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1182. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1183. }
  1184. ipr_update_ata_class(res, proto);
  1185. }
  1186. /**
  1187. * ipr_is_same_device - Determine if two devices are the same.
  1188. * @res: resource entry struct
  1189. * @cfgtew: config table entry wrapper struct
  1190. *
  1191. * Return value:
  1192. * 1 if the devices are the same / 0 otherwise
  1193. **/
  1194. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1195. struct ipr_config_table_entry_wrapper *cfgtew)
  1196. {
  1197. if (res->ioa_cfg->sis64) {
  1198. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1199. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1200. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1201. sizeof(cfgtew->u.cfgte64->lun))) {
  1202. return 1;
  1203. }
  1204. } else {
  1205. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1206. res->target == cfgtew->u.cfgte->res_addr.target &&
  1207. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1208. return 1;
  1209. }
  1210. return 0;
  1211. }
  1212. /**
  1213. * __ipr_format_res_path - Format the resource path for printing.
  1214. * @res_path: resource path
  1215. * @buf: buffer
  1216. * @len: length of buffer provided
  1217. *
  1218. * Return value:
  1219. * pointer to buffer
  1220. **/
  1221. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1222. {
  1223. int i;
  1224. char *p = buffer;
  1225. *p = '\0';
  1226. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1227. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1228. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1229. return buffer;
  1230. }
  1231. /**
  1232. * ipr_format_res_path - Format the resource path for printing.
  1233. * @ioa_cfg: ioa config struct
  1234. * @res_path: resource path
  1235. * @buf: buffer
  1236. * @len: length of buffer provided
  1237. *
  1238. * Return value:
  1239. * pointer to buffer
  1240. **/
  1241. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1242. u8 *res_path, char *buffer, int len)
  1243. {
  1244. char *p = buffer;
  1245. *p = '\0';
  1246. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1247. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1248. return buffer;
  1249. }
  1250. /**
  1251. * ipr_update_res_entry - Update the resource entry.
  1252. * @res: resource entry struct
  1253. * @cfgtew: config table entry wrapper struct
  1254. *
  1255. * Return value:
  1256. * none
  1257. **/
  1258. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1259. struct ipr_config_table_entry_wrapper *cfgtew)
  1260. {
  1261. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1262. unsigned int proto;
  1263. int new_path = 0;
  1264. if (res->ioa_cfg->sis64) {
  1265. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1266. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1267. res->type = cfgtew->u.cfgte64->res_type;
  1268. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1269. sizeof(struct ipr_std_inq_data));
  1270. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1271. proto = cfgtew->u.cfgte64->proto;
  1272. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1273. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1274. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1275. sizeof(res->dev_lun.scsi_lun));
  1276. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1277. sizeof(res->res_path))) {
  1278. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1279. sizeof(res->res_path));
  1280. new_path = 1;
  1281. }
  1282. if (res->sdev && new_path)
  1283. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1284. ipr_format_res_path(res->ioa_cfg,
  1285. res->res_path, buffer, sizeof(buffer)));
  1286. } else {
  1287. res->flags = cfgtew->u.cfgte->flags;
  1288. if (res->flags & IPR_IS_IOA_RESOURCE)
  1289. res->type = IPR_RES_TYPE_IOAFP;
  1290. else
  1291. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1292. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1293. sizeof(struct ipr_std_inq_data));
  1294. res->qmodel = IPR_QUEUEING_MODEL(res);
  1295. proto = cfgtew->u.cfgte->proto;
  1296. res->res_handle = cfgtew->u.cfgte->res_handle;
  1297. }
  1298. ipr_update_ata_class(res, proto);
  1299. }
  1300. /**
  1301. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1302. * for the resource.
  1303. * @res: resource entry struct
  1304. * @cfgtew: config table entry wrapper struct
  1305. *
  1306. * Return value:
  1307. * none
  1308. **/
  1309. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1310. {
  1311. struct ipr_resource_entry *gscsi_res = NULL;
  1312. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1313. if (!ioa_cfg->sis64)
  1314. return;
  1315. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1316. clear_bit(res->target, ioa_cfg->array_ids);
  1317. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1318. clear_bit(res->target, ioa_cfg->vset_ids);
  1319. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1320. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1321. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1322. return;
  1323. clear_bit(res->target, ioa_cfg->target_ids);
  1324. } else if (res->bus == 0)
  1325. clear_bit(res->target, ioa_cfg->target_ids);
  1326. }
  1327. /**
  1328. * ipr_handle_config_change - Handle a config change from the adapter
  1329. * @ioa_cfg: ioa config struct
  1330. * @hostrcb: hostrcb
  1331. *
  1332. * Return value:
  1333. * none
  1334. **/
  1335. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1336. struct ipr_hostrcb *hostrcb)
  1337. {
  1338. struct ipr_resource_entry *res = NULL;
  1339. struct ipr_config_table_entry_wrapper cfgtew;
  1340. __be32 cc_res_handle;
  1341. u32 is_ndn = 1;
  1342. if (ioa_cfg->sis64) {
  1343. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1344. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1345. } else {
  1346. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1347. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1348. }
  1349. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1350. if (res->res_handle == cc_res_handle) {
  1351. is_ndn = 0;
  1352. break;
  1353. }
  1354. }
  1355. if (is_ndn) {
  1356. if (list_empty(&ioa_cfg->free_res_q)) {
  1357. ipr_send_hcam(ioa_cfg,
  1358. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1359. hostrcb);
  1360. return;
  1361. }
  1362. res = list_entry(ioa_cfg->free_res_q.next,
  1363. struct ipr_resource_entry, queue);
  1364. list_del(&res->queue);
  1365. ipr_init_res_entry(res, &cfgtew);
  1366. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1367. }
  1368. ipr_update_res_entry(res, &cfgtew);
  1369. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1370. if (res->sdev) {
  1371. res->del_from_ml = 1;
  1372. res->res_handle = IPR_INVALID_RES_HANDLE;
  1373. schedule_work(&ioa_cfg->work_q);
  1374. } else {
  1375. ipr_clear_res_target(res);
  1376. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1377. }
  1378. } else if (!res->sdev || res->del_from_ml) {
  1379. res->add_to_ml = 1;
  1380. schedule_work(&ioa_cfg->work_q);
  1381. }
  1382. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1383. }
  1384. /**
  1385. * ipr_process_ccn - Op done function for a CCN.
  1386. * @ipr_cmd: ipr command struct
  1387. *
  1388. * This function is the op done function for a configuration
  1389. * change notification host controlled async from the adapter.
  1390. *
  1391. * Return value:
  1392. * none
  1393. **/
  1394. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1395. {
  1396. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1397. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1398. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1399. list_del_init(&hostrcb->queue);
  1400. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1401. if (ioasc) {
  1402. if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  1403. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
  1404. dev_err(&ioa_cfg->pdev->dev,
  1405. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1406. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1407. } else {
  1408. ipr_handle_config_change(ioa_cfg, hostrcb);
  1409. }
  1410. }
  1411. /**
  1412. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1413. * @i: index into buffer
  1414. * @buf: string to modify
  1415. *
  1416. * This function will strip all trailing whitespace, pad the end
  1417. * of the string with a single space, and NULL terminate the string.
  1418. *
  1419. * Return value:
  1420. * new length of string
  1421. **/
  1422. static int strip_and_pad_whitespace(int i, char *buf)
  1423. {
  1424. while (i && buf[i] == ' ')
  1425. i--;
  1426. buf[i+1] = ' ';
  1427. buf[i+2] = '\0';
  1428. return i + 2;
  1429. }
  1430. /**
  1431. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1432. * @prefix: string to print at start of printk
  1433. * @hostrcb: hostrcb pointer
  1434. * @vpd: vendor/product id/sn struct
  1435. *
  1436. * Return value:
  1437. * none
  1438. **/
  1439. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1440. struct ipr_vpd *vpd)
  1441. {
  1442. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1443. int i = 0;
  1444. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1445. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1446. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1447. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1448. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1449. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1450. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1451. }
  1452. /**
  1453. * ipr_log_vpd - Log the passed VPD to the error log.
  1454. * @vpd: vendor/product id/sn struct
  1455. *
  1456. * Return value:
  1457. * none
  1458. **/
  1459. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1460. {
  1461. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1462. + IPR_SERIAL_NUM_LEN];
  1463. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1464. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1465. IPR_PROD_ID_LEN);
  1466. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1467. ipr_err("Vendor/Product ID: %s\n", buffer);
  1468. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1469. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1470. ipr_err(" Serial Number: %s\n", buffer);
  1471. }
  1472. /**
  1473. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1474. * @prefix: string to print at start of printk
  1475. * @hostrcb: hostrcb pointer
  1476. * @vpd: vendor/product id/sn/wwn struct
  1477. *
  1478. * Return value:
  1479. * none
  1480. **/
  1481. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1482. struct ipr_ext_vpd *vpd)
  1483. {
  1484. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1485. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1486. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1487. }
  1488. /**
  1489. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1490. * @vpd: vendor/product id/sn/wwn struct
  1491. *
  1492. * Return value:
  1493. * none
  1494. **/
  1495. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1496. {
  1497. ipr_log_vpd(&vpd->vpd);
  1498. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1499. be32_to_cpu(vpd->wwid[1]));
  1500. }
  1501. /**
  1502. * ipr_log_enhanced_cache_error - Log a cache error.
  1503. * @ioa_cfg: ioa config struct
  1504. * @hostrcb: hostrcb struct
  1505. *
  1506. * Return value:
  1507. * none
  1508. **/
  1509. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1510. struct ipr_hostrcb *hostrcb)
  1511. {
  1512. struct ipr_hostrcb_type_12_error *error;
  1513. if (ioa_cfg->sis64)
  1514. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1515. else
  1516. error = &hostrcb->hcam.u.error.u.type_12_error;
  1517. ipr_err("-----Current Configuration-----\n");
  1518. ipr_err("Cache Directory Card Information:\n");
  1519. ipr_log_ext_vpd(&error->ioa_vpd);
  1520. ipr_err("Adapter Card Information:\n");
  1521. ipr_log_ext_vpd(&error->cfc_vpd);
  1522. ipr_err("-----Expected Configuration-----\n");
  1523. ipr_err("Cache Directory Card Information:\n");
  1524. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1525. ipr_err("Adapter Card Information:\n");
  1526. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1527. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1528. be32_to_cpu(error->ioa_data[0]),
  1529. be32_to_cpu(error->ioa_data[1]),
  1530. be32_to_cpu(error->ioa_data[2]));
  1531. }
  1532. /**
  1533. * ipr_log_cache_error - Log a cache error.
  1534. * @ioa_cfg: ioa config struct
  1535. * @hostrcb: hostrcb struct
  1536. *
  1537. * Return value:
  1538. * none
  1539. **/
  1540. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1541. struct ipr_hostrcb *hostrcb)
  1542. {
  1543. struct ipr_hostrcb_type_02_error *error =
  1544. &hostrcb->hcam.u.error.u.type_02_error;
  1545. ipr_err("-----Current Configuration-----\n");
  1546. ipr_err("Cache Directory Card Information:\n");
  1547. ipr_log_vpd(&error->ioa_vpd);
  1548. ipr_err("Adapter Card Information:\n");
  1549. ipr_log_vpd(&error->cfc_vpd);
  1550. ipr_err("-----Expected Configuration-----\n");
  1551. ipr_err("Cache Directory Card Information:\n");
  1552. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1553. ipr_err("Adapter Card Information:\n");
  1554. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1555. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1556. be32_to_cpu(error->ioa_data[0]),
  1557. be32_to_cpu(error->ioa_data[1]),
  1558. be32_to_cpu(error->ioa_data[2]));
  1559. }
  1560. /**
  1561. * ipr_log_enhanced_config_error - Log a configuration error.
  1562. * @ioa_cfg: ioa config struct
  1563. * @hostrcb: hostrcb struct
  1564. *
  1565. * Return value:
  1566. * none
  1567. **/
  1568. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1569. struct ipr_hostrcb *hostrcb)
  1570. {
  1571. int errors_logged, i;
  1572. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1573. struct ipr_hostrcb_type_13_error *error;
  1574. error = &hostrcb->hcam.u.error.u.type_13_error;
  1575. errors_logged = be32_to_cpu(error->errors_logged);
  1576. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1577. be32_to_cpu(error->errors_detected), errors_logged);
  1578. dev_entry = error->dev;
  1579. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1580. ipr_err_separator;
  1581. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1582. ipr_log_ext_vpd(&dev_entry->vpd);
  1583. ipr_err("-----New Device Information-----\n");
  1584. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1585. ipr_err("Cache Directory Card Information:\n");
  1586. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1587. ipr_err("Adapter Card Information:\n");
  1588. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1589. }
  1590. }
  1591. /**
  1592. * ipr_log_sis64_config_error - Log a device error.
  1593. * @ioa_cfg: ioa config struct
  1594. * @hostrcb: hostrcb struct
  1595. *
  1596. * Return value:
  1597. * none
  1598. **/
  1599. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1600. struct ipr_hostrcb *hostrcb)
  1601. {
  1602. int errors_logged, i;
  1603. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1604. struct ipr_hostrcb_type_23_error *error;
  1605. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1606. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1607. errors_logged = be32_to_cpu(error->errors_logged);
  1608. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1609. be32_to_cpu(error->errors_detected), errors_logged);
  1610. dev_entry = error->dev;
  1611. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1612. ipr_err_separator;
  1613. ipr_err("Device %d : %s", i + 1,
  1614. __ipr_format_res_path(dev_entry->res_path,
  1615. buffer, sizeof(buffer)));
  1616. ipr_log_ext_vpd(&dev_entry->vpd);
  1617. ipr_err("-----New Device Information-----\n");
  1618. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1619. ipr_err("Cache Directory Card Information:\n");
  1620. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1621. ipr_err("Adapter Card Information:\n");
  1622. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1623. }
  1624. }
  1625. /**
  1626. * ipr_log_config_error - Log a configuration error.
  1627. * @ioa_cfg: ioa config struct
  1628. * @hostrcb: hostrcb struct
  1629. *
  1630. * Return value:
  1631. * none
  1632. **/
  1633. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1634. struct ipr_hostrcb *hostrcb)
  1635. {
  1636. int errors_logged, i;
  1637. struct ipr_hostrcb_device_data_entry *dev_entry;
  1638. struct ipr_hostrcb_type_03_error *error;
  1639. error = &hostrcb->hcam.u.error.u.type_03_error;
  1640. errors_logged = be32_to_cpu(error->errors_logged);
  1641. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1642. be32_to_cpu(error->errors_detected), errors_logged);
  1643. dev_entry = error->dev;
  1644. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1645. ipr_err_separator;
  1646. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1647. ipr_log_vpd(&dev_entry->vpd);
  1648. ipr_err("-----New Device Information-----\n");
  1649. ipr_log_vpd(&dev_entry->new_vpd);
  1650. ipr_err("Cache Directory Card Information:\n");
  1651. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1652. ipr_err("Adapter Card Information:\n");
  1653. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1654. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1655. be32_to_cpu(dev_entry->ioa_data[0]),
  1656. be32_to_cpu(dev_entry->ioa_data[1]),
  1657. be32_to_cpu(dev_entry->ioa_data[2]),
  1658. be32_to_cpu(dev_entry->ioa_data[3]),
  1659. be32_to_cpu(dev_entry->ioa_data[4]));
  1660. }
  1661. }
  1662. /**
  1663. * ipr_log_enhanced_array_error - Log an array configuration error.
  1664. * @ioa_cfg: ioa config struct
  1665. * @hostrcb: hostrcb struct
  1666. *
  1667. * Return value:
  1668. * none
  1669. **/
  1670. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1671. struct ipr_hostrcb *hostrcb)
  1672. {
  1673. int i, num_entries;
  1674. struct ipr_hostrcb_type_14_error *error;
  1675. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1676. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1677. error = &hostrcb->hcam.u.error.u.type_14_error;
  1678. ipr_err_separator;
  1679. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1680. error->protection_level,
  1681. ioa_cfg->host->host_no,
  1682. error->last_func_vset_res_addr.bus,
  1683. error->last_func_vset_res_addr.target,
  1684. error->last_func_vset_res_addr.lun);
  1685. ipr_err_separator;
  1686. array_entry = error->array_member;
  1687. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1688. ARRAY_SIZE(error->array_member));
  1689. for (i = 0; i < num_entries; i++, array_entry++) {
  1690. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1691. continue;
  1692. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1693. ipr_err("Exposed Array Member %d:\n", i);
  1694. else
  1695. ipr_err("Array Member %d:\n", i);
  1696. ipr_log_ext_vpd(&array_entry->vpd);
  1697. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1698. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1699. "Expected Location");
  1700. ipr_err_separator;
  1701. }
  1702. }
  1703. /**
  1704. * ipr_log_array_error - Log an array configuration error.
  1705. * @ioa_cfg: ioa config struct
  1706. * @hostrcb: hostrcb struct
  1707. *
  1708. * Return value:
  1709. * none
  1710. **/
  1711. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1712. struct ipr_hostrcb *hostrcb)
  1713. {
  1714. int i;
  1715. struct ipr_hostrcb_type_04_error *error;
  1716. struct ipr_hostrcb_array_data_entry *array_entry;
  1717. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1718. error = &hostrcb->hcam.u.error.u.type_04_error;
  1719. ipr_err_separator;
  1720. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1721. error->protection_level,
  1722. ioa_cfg->host->host_no,
  1723. error->last_func_vset_res_addr.bus,
  1724. error->last_func_vset_res_addr.target,
  1725. error->last_func_vset_res_addr.lun);
  1726. ipr_err_separator;
  1727. array_entry = error->array_member;
  1728. for (i = 0; i < 18; i++) {
  1729. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1730. continue;
  1731. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1732. ipr_err("Exposed Array Member %d:\n", i);
  1733. else
  1734. ipr_err("Array Member %d:\n", i);
  1735. ipr_log_vpd(&array_entry->vpd);
  1736. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1737. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1738. "Expected Location");
  1739. ipr_err_separator;
  1740. if (i == 9)
  1741. array_entry = error->array_member2;
  1742. else
  1743. array_entry++;
  1744. }
  1745. }
  1746. /**
  1747. * ipr_log_hex_data - Log additional hex IOA error data.
  1748. * @ioa_cfg: ioa config struct
  1749. * @data: IOA error data
  1750. * @len: data length
  1751. *
  1752. * Return value:
  1753. * none
  1754. **/
  1755. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, __be32 *data, int len)
  1756. {
  1757. int i;
  1758. if (len == 0)
  1759. return;
  1760. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1761. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1762. for (i = 0; i < len / 4; i += 4) {
  1763. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1764. be32_to_cpu(data[i]),
  1765. be32_to_cpu(data[i+1]),
  1766. be32_to_cpu(data[i+2]),
  1767. be32_to_cpu(data[i+3]));
  1768. }
  1769. }
  1770. /**
  1771. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1772. * @ioa_cfg: ioa config struct
  1773. * @hostrcb: hostrcb struct
  1774. *
  1775. * Return value:
  1776. * none
  1777. **/
  1778. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1779. struct ipr_hostrcb *hostrcb)
  1780. {
  1781. struct ipr_hostrcb_type_17_error *error;
  1782. if (ioa_cfg->sis64)
  1783. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1784. else
  1785. error = &hostrcb->hcam.u.error.u.type_17_error;
  1786. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1787. strim(error->failure_reason);
  1788. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1789. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1790. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1791. ipr_log_hex_data(ioa_cfg, error->data,
  1792. be32_to_cpu(hostrcb->hcam.length) -
  1793. (offsetof(struct ipr_hostrcb_error, u) +
  1794. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1795. }
  1796. /**
  1797. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1798. * @ioa_cfg: ioa config struct
  1799. * @hostrcb: hostrcb struct
  1800. *
  1801. * Return value:
  1802. * none
  1803. **/
  1804. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1805. struct ipr_hostrcb *hostrcb)
  1806. {
  1807. struct ipr_hostrcb_type_07_error *error;
  1808. error = &hostrcb->hcam.u.error.u.type_07_error;
  1809. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1810. strim(error->failure_reason);
  1811. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1812. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1813. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1814. ipr_log_hex_data(ioa_cfg, error->data,
  1815. be32_to_cpu(hostrcb->hcam.length) -
  1816. (offsetof(struct ipr_hostrcb_error, u) +
  1817. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1818. }
  1819. static const struct {
  1820. u8 active;
  1821. char *desc;
  1822. } path_active_desc[] = {
  1823. { IPR_PATH_NO_INFO, "Path" },
  1824. { IPR_PATH_ACTIVE, "Active path" },
  1825. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1826. };
  1827. static const struct {
  1828. u8 state;
  1829. char *desc;
  1830. } path_state_desc[] = {
  1831. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1832. { IPR_PATH_HEALTHY, "is healthy" },
  1833. { IPR_PATH_DEGRADED, "is degraded" },
  1834. { IPR_PATH_FAILED, "is failed" }
  1835. };
  1836. /**
  1837. * ipr_log_fabric_path - Log a fabric path error
  1838. * @hostrcb: hostrcb struct
  1839. * @fabric: fabric descriptor
  1840. *
  1841. * Return value:
  1842. * none
  1843. **/
  1844. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1845. struct ipr_hostrcb_fabric_desc *fabric)
  1846. {
  1847. int i, j;
  1848. u8 path_state = fabric->path_state;
  1849. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1850. u8 state = path_state & IPR_PATH_STATE_MASK;
  1851. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1852. if (path_active_desc[i].active != active)
  1853. continue;
  1854. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1855. if (path_state_desc[j].state != state)
  1856. continue;
  1857. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1858. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1859. path_active_desc[i].desc, path_state_desc[j].desc,
  1860. fabric->ioa_port);
  1861. } else if (fabric->cascaded_expander == 0xff) {
  1862. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1863. path_active_desc[i].desc, path_state_desc[j].desc,
  1864. fabric->ioa_port, fabric->phy);
  1865. } else if (fabric->phy == 0xff) {
  1866. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1867. path_active_desc[i].desc, path_state_desc[j].desc,
  1868. fabric->ioa_port, fabric->cascaded_expander);
  1869. } else {
  1870. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1871. path_active_desc[i].desc, path_state_desc[j].desc,
  1872. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1873. }
  1874. return;
  1875. }
  1876. }
  1877. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1878. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1879. }
  1880. /**
  1881. * ipr_log64_fabric_path - Log a fabric path error
  1882. * @hostrcb: hostrcb struct
  1883. * @fabric: fabric descriptor
  1884. *
  1885. * Return value:
  1886. * none
  1887. **/
  1888. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1889. struct ipr_hostrcb64_fabric_desc *fabric)
  1890. {
  1891. int i, j;
  1892. u8 path_state = fabric->path_state;
  1893. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1894. u8 state = path_state & IPR_PATH_STATE_MASK;
  1895. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1896. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1897. if (path_active_desc[i].active != active)
  1898. continue;
  1899. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1900. if (path_state_desc[j].state != state)
  1901. continue;
  1902. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1903. path_active_desc[i].desc, path_state_desc[j].desc,
  1904. ipr_format_res_path(hostrcb->ioa_cfg,
  1905. fabric->res_path,
  1906. buffer, sizeof(buffer)));
  1907. return;
  1908. }
  1909. }
  1910. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1911. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1912. buffer, sizeof(buffer)));
  1913. }
  1914. static const struct {
  1915. u8 type;
  1916. char *desc;
  1917. } path_type_desc[] = {
  1918. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1919. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1920. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1921. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1922. };
  1923. static const struct {
  1924. u8 status;
  1925. char *desc;
  1926. } path_status_desc[] = {
  1927. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1928. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1929. { IPR_PATH_CFG_FAILED, "Failed" },
  1930. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1931. { IPR_PATH_NOT_DETECTED, "Missing" },
  1932. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1933. };
  1934. static const char *link_rate[] = {
  1935. "unknown",
  1936. "disabled",
  1937. "phy reset problem",
  1938. "spinup hold",
  1939. "port selector",
  1940. "unknown",
  1941. "unknown",
  1942. "unknown",
  1943. "1.5Gbps",
  1944. "3.0Gbps",
  1945. "unknown",
  1946. "unknown",
  1947. "unknown",
  1948. "unknown",
  1949. "unknown",
  1950. "unknown"
  1951. };
  1952. /**
  1953. * ipr_log_path_elem - Log a fabric path element.
  1954. * @hostrcb: hostrcb struct
  1955. * @cfg: fabric path element struct
  1956. *
  1957. * Return value:
  1958. * none
  1959. **/
  1960. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1961. struct ipr_hostrcb_config_element *cfg)
  1962. {
  1963. int i, j;
  1964. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1965. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1966. if (type == IPR_PATH_CFG_NOT_EXIST)
  1967. return;
  1968. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1969. if (path_type_desc[i].type != type)
  1970. continue;
  1971. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1972. if (path_status_desc[j].status != status)
  1973. continue;
  1974. if (type == IPR_PATH_CFG_IOA_PORT) {
  1975. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1976. path_status_desc[j].desc, path_type_desc[i].desc,
  1977. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1978. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1979. } else {
  1980. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1981. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1982. path_status_desc[j].desc, path_type_desc[i].desc,
  1983. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1984. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1985. } else if (cfg->cascaded_expander == 0xff) {
  1986. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1987. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1988. path_type_desc[i].desc, cfg->phy,
  1989. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1990. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1991. } else if (cfg->phy == 0xff) {
  1992. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1993. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1994. path_type_desc[i].desc, cfg->cascaded_expander,
  1995. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1996. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1997. } else {
  1998. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1999. "WWN=%08X%08X\n", path_status_desc[j].desc,
  2000. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  2001. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2002. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  2003. }
  2004. }
  2005. return;
  2006. }
  2007. }
  2008. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  2009. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  2010. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2011. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  2012. }
  2013. /**
  2014. * ipr_log64_path_elem - Log a fabric path element.
  2015. * @hostrcb: hostrcb struct
  2016. * @cfg: fabric path element struct
  2017. *
  2018. * Return value:
  2019. * none
  2020. **/
  2021. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  2022. struct ipr_hostrcb64_config_element *cfg)
  2023. {
  2024. int i, j;
  2025. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  2026. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  2027. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  2028. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2029. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  2030. return;
  2031. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  2032. if (path_type_desc[i].type != type)
  2033. continue;
  2034. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  2035. if (path_status_desc[j].status != status)
  2036. continue;
  2037. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  2038. path_status_desc[j].desc, path_type_desc[i].desc,
  2039. ipr_format_res_path(hostrcb->ioa_cfg,
  2040. cfg->res_path, buffer, sizeof(buffer)),
  2041. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2042. be32_to_cpu(cfg->wwid[0]),
  2043. be32_to_cpu(cfg->wwid[1]));
  2044. return;
  2045. }
  2046. }
  2047. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  2048. "WWN=%08X%08X\n", cfg->type_status,
  2049. ipr_format_res_path(hostrcb->ioa_cfg,
  2050. cfg->res_path, buffer, sizeof(buffer)),
  2051. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  2052. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  2053. }
  2054. /**
  2055. * ipr_log_fabric_error - Log a fabric error.
  2056. * @ioa_cfg: ioa config struct
  2057. * @hostrcb: hostrcb struct
  2058. *
  2059. * Return value:
  2060. * none
  2061. **/
  2062. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2063. struct ipr_hostrcb *hostrcb)
  2064. {
  2065. struct ipr_hostrcb_type_20_error *error;
  2066. struct ipr_hostrcb_fabric_desc *fabric;
  2067. struct ipr_hostrcb_config_element *cfg;
  2068. int i, add_len;
  2069. error = &hostrcb->hcam.u.error.u.type_20_error;
  2070. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2071. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2072. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2073. (offsetof(struct ipr_hostrcb_error, u) +
  2074. offsetof(struct ipr_hostrcb_type_20_error, desc));
  2075. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2076. ipr_log_fabric_path(hostrcb, fabric);
  2077. for_each_fabric_cfg(fabric, cfg)
  2078. ipr_log_path_elem(hostrcb, cfg);
  2079. add_len -= be16_to_cpu(fabric->length);
  2080. fabric = (struct ipr_hostrcb_fabric_desc *)
  2081. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2082. }
  2083. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2084. }
  2085. /**
  2086. * ipr_log_sis64_array_error - Log a sis64 array error.
  2087. * @ioa_cfg: ioa config struct
  2088. * @hostrcb: hostrcb struct
  2089. *
  2090. * Return value:
  2091. * none
  2092. **/
  2093. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  2094. struct ipr_hostrcb *hostrcb)
  2095. {
  2096. int i, num_entries;
  2097. struct ipr_hostrcb_type_24_error *error;
  2098. struct ipr_hostrcb64_array_data_entry *array_entry;
  2099. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2100. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2101. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2102. ipr_err_separator;
  2103. ipr_err("RAID %s Array Configuration: %s\n",
  2104. error->protection_level,
  2105. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2106. buffer, sizeof(buffer)));
  2107. ipr_err_separator;
  2108. array_entry = error->array_member;
  2109. num_entries = min_t(u32, error->num_entries,
  2110. ARRAY_SIZE(error->array_member));
  2111. for (i = 0; i < num_entries; i++, array_entry++) {
  2112. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2113. continue;
  2114. if (error->exposed_mode_adn == i)
  2115. ipr_err("Exposed Array Member %d:\n", i);
  2116. else
  2117. ipr_err("Array Member %d:\n", i);
  2118. ipr_err("Array Member %d:\n", i);
  2119. ipr_log_ext_vpd(&array_entry->vpd);
  2120. ipr_err("Current Location: %s\n",
  2121. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2122. buffer, sizeof(buffer)));
  2123. ipr_err("Expected Location: %s\n",
  2124. ipr_format_res_path(ioa_cfg,
  2125. array_entry->expected_res_path,
  2126. buffer, sizeof(buffer)));
  2127. ipr_err_separator;
  2128. }
  2129. }
  2130. /**
  2131. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2132. * @ioa_cfg: ioa config struct
  2133. * @hostrcb: hostrcb struct
  2134. *
  2135. * Return value:
  2136. * none
  2137. **/
  2138. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2139. struct ipr_hostrcb *hostrcb)
  2140. {
  2141. struct ipr_hostrcb_type_30_error *error;
  2142. struct ipr_hostrcb64_fabric_desc *fabric;
  2143. struct ipr_hostrcb64_config_element *cfg;
  2144. int i, add_len;
  2145. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2146. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2147. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2148. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2149. (offsetof(struct ipr_hostrcb64_error, u) +
  2150. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2151. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2152. ipr_log64_fabric_path(hostrcb, fabric);
  2153. for_each_fabric_cfg(fabric, cfg)
  2154. ipr_log64_path_elem(hostrcb, cfg);
  2155. add_len -= be16_to_cpu(fabric->length);
  2156. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2157. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2158. }
  2159. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2160. }
  2161. /**
  2162. * ipr_log_sis64_service_required_error - Log a sis64 service required error.
  2163. * @ioa_cfg: ioa config struct
  2164. * @hostrcb: hostrcb struct
  2165. *
  2166. * Return value:
  2167. * none
  2168. **/
  2169. static void ipr_log_sis64_service_required_error(struct ipr_ioa_cfg *ioa_cfg,
  2170. struct ipr_hostrcb *hostrcb)
  2171. {
  2172. struct ipr_hostrcb_type_41_error *error;
  2173. error = &hostrcb->hcam.u.error64.u.type_41_error;
  2174. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2175. ipr_err("Primary Failure Reason: %s\n", error->failure_reason);
  2176. ipr_log_hex_data(ioa_cfg, error->data,
  2177. be32_to_cpu(hostrcb->hcam.length) -
  2178. (offsetof(struct ipr_hostrcb_error, u) +
  2179. offsetof(struct ipr_hostrcb_type_41_error, data)));
  2180. }
  2181. /**
  2182. * ipr_log_generic_error - Log an adapter error.
  2183. * @ioa_cfg: ioa config struct
  2184. * @hostrcb: hostrcb struct
  2185. *
  2186. * Return value:
  2187. * none
  2188. **/
  2189. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2190. struct ipr_hostrcb *hostrcb)
  2191. {
  2192. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2193. be32_to_cpu(hostrcb->hcam.length));
  2194. }
  2195. /**
  2196. * ipr_log_sis64_device_error - Log a cache error.
  2197. * @ioa_cfg: ioa config struct
  2198. * @hostrcb: hostrcb struct
  2199. *
  2200. * Return value:
  2201. * none
  2202. **/
  2203. static void ipr_log_sis64_device_error(struct ipr_ioa_cfg *ioa_cfg,
  2204. struct ipr_hostrcb *hostrcb)
  2205. {
  2206. struct ipr_hostrcb_type_21_error *error;
  2207. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2208. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2209. ipr_err("-----Failing Device Information-----\n");
  2210. ipr_err("World Wide Unique ID: %08X%08X%08X%08X\n",
  2211. be32_to_cpu(error->wwn[0]), be32_to_cpu(error->wwn[1]),
  2212. be32_to_cpu(error->wwn[2]), be32_to_cpu(error->wwn[3]));
  2213. ipr_err("Device Resource Path: %s\n",
  2214. __ipr_format_res_path(error->res_path,
  2215. buffer, sizeof(buffer)));
  2216. error->primary_problem_desc[sizeof(error->primary_problem_desc) - 1] = '\0';
  2217. error->second_problem_desc[sizeof(error->second_problem_desc) - 1] = '\0';
  2218. ipr_err("Primary Problem Description: %s\n", error->primary_problem_desc);
  2219. ipr_err("Secondary Problem Description: %s\n", error->second_problem_desc);
  2220. ipr_err("SCSI Sense Data:\n");
  2221. ipr_log_hex_data(ioa_cfg, error->sense_data, sizeof(error->sense_data));
  2222. ipr_err("SCSI Command Descriptor Block: \n");
  2223. ipr_log_hex_data(ioa_cfg, error->cdb, sizeof(error->cdb));
  2224. ipr_err("Additional IOA Data:\n");
  2225. ipr_log_hex_data(ioa_cfg, error->ioa_data, be32_to_cpu(error->length_of_error));
  2226. }
  2227. /**
  2228. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2229. * @ioasc: IOASC
  2230. *
  2231. * This function will return the index of into the ipr_error_table
  2232. * for the specified IOASC. If the IOASC is not in the table,
  2233. * 0 will be returned, which points to the entry used for unknown errors.
  2234. *
  2235. * Return value:
  2236. * index into the ipr_error_table
  2237. **/
  2238. static u32 ipr_get_error(u32 ioasc)
  2239. {
  2240. int i;
  2241. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2242. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2243. return i;
  2244. return 0;
  2245. }
  2246. /**
  2247. * ipr_handle_log_data - Log an adapter error.
  2248. * @ioa_cfg: ioa config struct
  2249. * @hostrcb: hostrcb struct
  2250. *
  2251. * This function logs an adapter error to the system.
  2252. *
  2253. * Return value:
  2254. * none
  2255. **/
  2256. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2257. struct ipr_hostrcb *hostrcb)
  2258. {
  2259. u32 ioasc;
  2260. int error_index;
  2261. struct ipr_hostrcb_type_21_error *error;
  2262. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2263. return;
  2264. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2265. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2266. if (ioa_cfg->sis64)
  2267. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2268. else
  2269. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2270. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2271. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2272. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2273. scsi_report_bus_reset(ioa_cfg->host,
  2274. hostrcb->hcam.u.error.fd_res_addr.bus);
  2275. }
  2276. error_index = ipr_get_error(ioasc);
  2277. if (!ipr_error_table[error_index].log_hcam)
  2278. return;
  2279. if (ioasc == IPR_IOASC_HW_CMD_FAILED &&
  2280. hostrcb->hcam.overlay_id == IPR_HOST_RCB_OVERLAY_ID_21) {
  2281. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2282. if (((be32_to_cpu(error->sense_data[0]) & 0x0000ff00) >> 8) == ILLEGAL_REQUEST &&
  2283. ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  2284. return;
  2285. }
  2286. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2287. /* Set indication we have logged an error */
  2288. ioa_cfg->errors_logged++;
  2289. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2290. return;
  2291. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2292. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2293. switch (hostrcb->hcam.overlay_id) {
  2294. case IPR_HOST_RCB_OVERLAY_ID_2:
  2295. ipr_log_cache_error(ioa_cfg, hostrcb);
  2296. break;
  2297. case IPR_HOST_RCB_OVERLAY_ID_3:
  2298. ipr_log_config_error(ioa_cfg, hostrcb);
  2299. break;
  2300. case IPR_HOST_RCB_OVERLAY_ID_4:
  2301. case IPR_HOST_RCB_OVERLAY_ID_6:
  2302. ipr_log_array_error(ioa_cfg, hostrcb);
  2303. break;
  2304. case IPR_HOST_RCB_OVERLAY_ID_7:
  2305. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2306. break;
  2307. case IPR_HOST_RCB_OVERLAY_ID_12:
  2308. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2309. break;
  2310. case IPR_HOST_RCB_OVERLAY_ID_13:
  2311. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2312. break;
  2313. case IPR_HOST_RCB_OVERLAY_ID_14:
  2314. case IPR_HOST_RCB_OVERLAY_ID_16:
  2315. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2316. break;
  2317. case IPR_HOST_RCB_OVERLAY_ID_17:
  2318. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2319. break;
  2320. case IPR_HOST_RCB_OVERLAY_ID_20:
  2321. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2322. break;
  2323. case IPR_HOST_RCB_OVERLAY_ID_21:
  2324. ipr_log_sis64_device_error(ioa_cfg, hostrcb);
  2325. break;
  2326. case IPR_HOST_RCB_OVERLAY_ID_23:
  2327. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2328. break;
  2329. case IPR_HOST_RCB_OVERLAY_ID_24:
  2330. case IPR_HOST_RCB_OVERLAY_ID_26:
  2331. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2332. break;
  2333. case IPR_HOST_RCB_OVERLAY_ID_30:
  2334. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2335. break;
  2336. case IPR_HOST_RCB_OVERLAY_ID_41:
  2337. ipr_log_sis64_service_required_error(ioa_cfg, hostrcb);
  2338. break;
  2339. case IPR_HOST_RCB_OVERLAY_ID_1:
  2340. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2341. default:
  2342. ipr_log_generic_error(ioa_cfg, hostrcb);
  2343. break;
  2344. }
  2345. }
  2346. static struct ipr_hostrcb *ipr_get_free_hostrcb(struct ipr_ioa_cfg *ioa)
  2347. {
  2348. struct ipr_hostrcb *hostrcb;
  2349. hostrcb = list_first_entry_or_null(&ioa->hostrcb_free_q,
  2350. struct ipr_hostrcb, queue);
  2351. if (unlikely(!hostrcb)) {
  2352. dev_info(&ioa->pdev->dev, "Reclaiming async error buffers.");
  2353. hostrcb = list_first_entry_or_null(&ioa->hostrcb_report_q,
  2354. struct ipr_hostrcb, queue);
  2355. }
  2356. list_del_init(&hostrcb->queue);
  2357. return hostrcb;
  2358. }
  2359. /**
  2360. * ipr_process_error - Op done function for an adapter error log.
  2361. * @ipr_cmd: ipr command struct
  2362. *
  2363. * This function is the op done function for an error log host
  2364. * controlled async from the adapter. It will log the error and
  2365. * send the HCAM back to the adapter.
  2366. *
  2367. * Return value:
  2368. * none
  2369. **/
  2370. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2371. {
  2372. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2373. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2374. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2375. u32 fd_ioasc;
  2376. if (ioa_cfg->sis64)
  2377. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2378. else
  2379. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2380. list_del_init(&hostrcb->queue);
  2381. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2382. if (!ioasc) {
  2383. ipr_handle_log_data(ioa_cfg, hostrcb);
  2384. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2385. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2386. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  2387. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST) {
  2388. dev_err(&ioa_cfg->pdev->dev,
  2389. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2390. }
  2391. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_report_q);
  2392. schedule_work(&ioa_cfg->work_q);
  2393. hostrcb = ipr_get_free_hostrcb(ioa_cfg);
  2394. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2395. }
  2396. /**
  2397. * ipr_timeout - An internally generated op has timed out.
  2398. * @ipr_cmd: ipr command struct
  2399. *
  2400. * This function blocks host requests and initiates an
  2401. * adapter reset.
  2402. *
  2403. * Return value:
  2404. * none
  2405. **/
  2406. static void ipr_timeout(struct timer_list *t)
  2407. {
  2408. struct ipr_cmnd *ipr_cmd = from_timer(ipr_cmd, t, timer);
  2409. unsigned long lock_flags = 0;
  2410. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2411. ENTER;
  2412. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2413. ioa_cfg->errors_logged++;
  2414. dev_err(&ioa_cfg->pdev->dev,
  2415. "Adapter being reset due to command timeout.\n");
  2416. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2417. ioa_cfg->sdt_state = GET_DUMP;
  2418. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2419. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2420. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2421. LEAVE;
  2422. }
  2423. /**
  2424. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2425. * @ipr_cmd: ipr command struct
  2426. *
  2427. * This function blocks host requests and initiates an
  2428. * adapter reset.
  2429. *
  2430. * Return value:
  2431. * none
  2432. **/
  2433. static void ipr_oper_timeout(struct timer_list *t)
  2434. {
  2435. struct ipr_cmnd *ipr_cmd = from_timer(ipr_cmd, t, timer);
  2436. unsigned long lock_flags = 0;
  2437. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2438. ENTER;
  2439. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2440. ioa_cfg->errors_logged++;
  2441. dev_err(&ioa_cfg->pdev->dev,
  2442. "Adapter timed out transitioning to operational.\n");
  2443. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2444. ioa_cfg->sdt_state = GET_DUMP;
  2445. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2446. if (ipr_fastfail)
  2447. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2448. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2449. }
  2450. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2451. LEAVE;
  2452. }
  2453. /**
  2454. * ipr_find_ses_entry - Find matching SES in SES table
  2455. * @res: resource entry struct of SES
  2456. *
  2457. * Return value:
  2458. * pointer to SES table entry / NULL on failure
  2459. **/
  2460. static const struct ipr_ses_table_entry *
  2461. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2462. {
  2463. int i, j, matches;
  2464. struct ipr_std_inq_vpids *vpids;
  2465. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2466. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2467. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2468. if (ste->compare_product_id_byte[j] == 'X') {
  2469. vpids = &res->std_inq_data.vpids;
  2470. if (vpids->product_id[j] == ste->product_id[j])
  2471. matches++;
  2472. else
  2473. break;
  2474. } else
  2475. matches++;
  2476. }
  2477. if (matches == IPR_PROD_ID_LEN)
  2478. return ste;
  2479. }
  2480. return NULL;
  2481. }
  2482. /**
  2483. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2484. * @ioa_cfg: ioa config struct
  2485. * @bus: SCSI bus
  2486. * @bus_width: bus width
  2487. *
  2488. * Return value:
  2489. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2490. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2491. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2492. * max 160MHz = max 320MB/sec).
  2493. **/
  2494. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2495. {
  2496. struct ipr_resource_entry *res;
  2497. const struct ipr_ses_table_entry *ste;
  2498. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2499. /* Loop through each config table entry in the config table buffer */
  2500. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2501. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2502. continue;
  2503. if (bus != res->bus)
  2504. continue;
  2505. if (!(ste = ipr_find_ses_entry(res)))
  2506. continue;
  2507. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2508. }
  2509. return max_xfer_rate;
  2510. }
  2511. /**
  2512. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2513. * @ioa_cfg: ioa config struct
  2514. * @max_delay: max delay in micro-seconds to wait
  2515. *
  2516. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2517. *
  2518. * Return value:
  2519. * 0 on success / other on failure
  2520. **/
  2521. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2522. {
  2523. volatile u32 pcii_reg;
  2524. int delay = 1;
  2525. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2526. while (delay < max_delay) {
  2527. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2528. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2529. return 0;
  2530. /* udelay cannot be used if delay is more than a few milliseconds */
  2531. if ((delay / 1000) > MAX_UDELAY_MS)
  2532. mdelay(delay / 1000);
  2533. else
  2534. udelay(delay);
  2535. delay += delay;
  2536. }
  2537. return -EIO;
  2538. }
  2539. /**
  2540. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2541. * @ioa_cfg: ioa config struct
  2542. * @start_addr: adapter address to dump
  2543. * @dest: destination kernel buffer
  2544. * @length_in_words: length to dump in 4 byte words
  2545. *
  2546. * Return value:
  2547. * 0 on success
  2548. **/
  2549. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2550. u32 start_addr,
  2551. __be32 *dest, u32 length_in_words)
  2552. {
  2553. int i;
  2554. for (i = 0; i < length_in_words; i++) {
  2555. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2556. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2557. dest++;
  2558. }
  2559. return 0;
  2560. }
  2561. /**
  2562. * ipr_get_ldump_data_section - Dump IOA memory
  2563. * @ioa_cfg: ioa config struct
  2564. * @start_addr: adapter address to dump
  2565. * @dest: destination kernel buffer
  2566. * @length_in_words: length to dump in 4 byte words
  2567. *
  2568. * Return value:
  2569. * 0 on success / -EIO on failure
  2570. **/
  2571. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2572. u32 start_addr,
  2573. __be32 *dest, u32 length_in_words)
  2574. {
  2575. volatile u32 temp_pcii_reg;
  2576. int i, delay = 0;
  2577. if (ioa_cfg->sis64)
  2578. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2579. dest, length_in_words);
  2580. /* Write IOA interrupt reg starting LDUMP state */
  2581. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2582. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2583. /* Wait for IO debug acknowledge */
  2584. if (ipr_wait_iodbg_ack(ioa_cfg,
  2585. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2586. dev_err(&ioa_cfg->pdev->dev,
  2587. "IOA dump long data transfer timeout\n");
  2588. return -EIO;
  2589. }
  2590. /* Signal LDUMP interlocked - clear IO debug ack */
  2591. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2592. ioa_cfg->regs.clr_interrupt_reg);
  2593. /* Write Mailbox with starting address */
  2594. writel(start_addr, ioa_cfg->ioa_mailbox);
  2595. /* Signal address valid - clear IOA Reset alert */
  2596. writel(IPR_UPROCI_RESET_ALERT,
  2597. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2598. for (i = 0; i < length_in_words; i++) {
  2599. /* Wait for IO debug acknowledge */
  2600. if (ipr_wait_iodbg_ack(ioa_cfg,
  2601. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2602. dev_err(&ioa_cfg->pdev->dev,
  2603. "IOA dump short data transfer timeout\n");
  2604. return -EIO;
  2605. }
  2606. /* Read data from mailbox and increment destination pointer */
  2607. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2608. dest++;
  2609. /* For all but the last word of data, signal data received */
  2610. if (i < (length_in_words - 1)) {
  2611. /* Signal dump data received - Clear IO debug Ack */
  2612. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2613. ioa_cfg->regs.clr_interrupt_reg);
  2614. }
  2615. }
  2616. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2617. writel(IPR_UPROCI_RESET_ALERT,
  2618. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2619. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2620. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2621. /* Signal dump data received - Clear IO debug Ack */
  2622. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2623. ioa_cfg->regs.clr_interrupt_reg);
  2624. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2625. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2626. temp_pcii_reg =
  2627. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2628. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2629. return 0;
  2630. udelay(10);
  2631. delay += 10;
  2632. }
  2633. return 0;
  2634. }
  2635. #ifdef CONFIG_SCSI_IPR_DUMP
  2636. /**
  2637. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2638. * @ioa_cfg: ioa config struct
  2639. * @pci_address: adapter address
  2640. * @length: length of data to copy
  2641. *
  2642. * Copy data from PCI adapter to kernel buffer.
  2643. * Note: length MUST be a 4 byte multiple
  2644. * Return value:
  2645. * 0 on success / other on failure
  2646. **/
  2647. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2648. unsigned long pci_address, u32 length)
  2649. {
  2650. int bytes_copied = 0;
  2651. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2652. __be32 *page;
  2653. unsigned long lock_flags = 0;
  2654. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2655. if (ioa_cfg->sis64)
  2656. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2657. else
  2658. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2659. while (bytes_copied < length &&
  2660. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2661. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2662. ioa_dump->page_offset == 0) {
  2663. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2664. if (!page) {
  2665. ipr_trace;
  2666. return bytes_copied;
  2667. }
  2668. ioa_dump->page_offset = 0;
  2669. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2670. ioa_dump->next_page_index++;
  2671. } else
  2672. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2673. rem_len = length - bytes_copied;
  2674. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2675. cur_len = min(rem_len, rem_page_len);
  2676. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2677. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2678. rc = -EIO;
  2679. } else {
  2680. rc = ipr_get_ldump_data_section(ioa_cfg,
  2681. pci_address + bytes_copied,
  2682. &page[ioa_dump->page_offset / 4],
  2683. (cur_len / sizeof(u32)));
  2684. }
  2685. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2686. if (!rc) {
  2687. ioa_dump->page_offset += cur_len;
  2688. bytes_copied += cur_len;
  2689. } else {
  2690. ipr_trace;
  2691. break;
  2692. }
  2693. schedule();
  2694. }
  2695. return bytes_copied;
  2696. }
  2697. /**
  2698. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2699. * @hdr: dump entry header struct
  2700. *
  2701. * Return value:
  2702. * nothing
  2703. **/
  2704. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2705. {
  2706. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2707. hdr->num_elems = 1;
  2708. hdr->offset = sizeof(*hdr);
  2709. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2710. }
  2711. /**
  2712. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2713. * @ioa_cfg: ioa config struct
  2714. * @driver_dump: driver dump struct
  2715. *
  2716. * Return value:
  2717. * nothing
  2718. **/
  2719. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2720. struct ipr_driver_dump *driver_dump)
  2721. {
  2722. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2723. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2724. driver_dump->ioa_type_entry.hdr.len =
  2725. sizeof(struct ipr_dump_ioa_type_entry) -
  2726. sizeof(struct ipr_dump_entry_header);
  2727. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2728. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2729. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2730. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2731. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2732. ucode_vpd->minor_release[1];
  2733. driver_dump->hdr.num_entries++;
  2734. }
  2735. /**
  2736. * ipr_dump_version_data - Fill in the driver version in the dump.
  2737. * @ioa_cfg: ioa config struct
  2738. * @driver_dump: driver dump struct
  2739. *
  2740. * Return value:
  2741. * nothing
  2742. **/
  2743. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2744. struct ipr_driver_dump *driver_dump)
  2745. {
  2746. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2747. driver_dump->version_entry.hdr.len =
  2748. sizeof(struct ipr_dump_version_entry) -
  2749. sizeof(struct ipr_dump_entry_header);
  2750. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2751. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2752. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2753. driver_dump->hdr.num_entries++;
  2754. }
  2755. /**
  2756. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2757. * @ioa_cfg: ioa config struct
  2758. * @driver_dump: driver dump struct
  2759. *
  2760. * Return value:
  2761. * nothing
  2762. **/
  2763. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2764. struct ipr_driver_dump *driver_dump)
  2765. {
  2766. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2767. driver_dump->trace_entry.hdr.len =
  2768. sizeof(struct ipr_dump_trace_entry) -
  2769. sizeof(struct ipr_dump_entry_header);
  2770. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2771. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2772. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2773. driver_dump->hdr.num_entries++;
  2774. }
  2775. /**
  2776. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2777. * @ioa_cfg: ioa config struct
  2778. * @driver_dump: driver dump struct
  2779. *
  2780. * Return value:
  2781. * nothing
  2782. **/
  2783. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2784. struct ipr_driver_dump *driver_dump)
  2785. {
  2786. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2787. driver_dump->location_entry.hdr.len =
  2788. sizeof(struct ipr_dump_location_entry) -
  2789. sizeof(struct ipr_dump_entry_header);
  2790. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2791. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2792. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2793. driver_dump->hdr.num_entries++;
  2794. }
  2795. /**
  2796. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2797. * @ioa_cfg: ioa config struct
  2798. * @dump: dump struct
  2799. *
  2800. * Return value:
  2801. * nothing
  2802. **/
  2803. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2804. {
  2805. unsigned long start_addr, sdt_word;
  2806. unsigned long lock_flags = 0;
  2807. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2808. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2809. u32 num_entries, max_num_entries, start_off, end_off;
  2810. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2811. struct ipr_sdt *sdt;
  2812. int valid = 1;
  2813. int i;
  2814. ENTER;
  2815. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2816. if (ioa_cfg->sdt_state != READ_DUMP) {
  2817. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2818. return;
  2819. }
  2820. if (ioa_cfg->sis64) {
  2821. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2822. ssleep(IPR_DUMP_DELAY_SECONDS);
  2823. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2824. }
  2825. start_addr = readl(ioa_cfg->ioa_mailbox);
  2826. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2827. dev_err(&ioa_cfg->pdev->dev,
  2828. "Invalid dump table format: %lx\n", start_addr);
  2829. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2830. return;
  2831. }
  2832. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2833. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2834. /* Initialize the overall dump header */
  2835. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2836. driver_dump->hdr.num_entries = 1;
  2837. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2838. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2839. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2840. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2841. ipr_dump_version_data(ioa_cfg, driver_dump);
  2842. ipr_dump_location_data(ioa_cfg, driver_dump);
  2843. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2844. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2845. /* Update dump_header */
  2846. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2847. /* IOA Dump entry */
  2848. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2849. ioa_dump->hdr.len = 0;
  2850. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2851. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2852. /* First entries in sdt are actually a list of dump addresses and
  2853. lengths to gather the real dump data. sdt represents the pointer
  2854. to the ioa generated dump table. Dump data will be extracted based
  2855. on entries in this table */
  2856. sdt = &ioa_dump->sdt;
  2857. if (ioa_cfg->sis64) {
  2858. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2859. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2860. } else {
  2861. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2862. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2863. }
  2864. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2865. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2866. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2867. bytes_to_copy / sizeof(__be32));
  2868. /* Smart Dump table is ready to use and the first entry is valid */
  2869. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2870. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2871. dev_err(&ioa_cfg->pdev->dev,
  2872. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2873. rc, be32_to_cpu(sdt->hdr.state));
  2874. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2875. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2876. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2877. return;
  2878. }
  2879. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2880. if (num_entries > max_num_entries)
  2881. num_entries = max_num_entries;
  2882. /* Update dump length to the actual data to be copied */
  2883. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2884. if (ioa_cfg->sis64)
  2885. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2886. else
  2887. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2888. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2889. for (i = 0; i < num_entries; i++) {
  2890. if (ioa_dump->hdr.len > max_dump_size) {
  2891. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2892. break;
  2893. }
  2894. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2895. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2896. if (ioa_cfg->sis64)
  2897. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2898. else {
  2899. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2900. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2901. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2902. bytes_to_copy = end_off - start_off;
  2903. else
  2904. valid = 0;
  2905. }
  2906. if (valid) {
  2907. if (bytes_to_copy > max_dump_size) {
  2908. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2909. continue;
  2910. }
  2911. /* Copy data from adapter to driver buffers */
  2912. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2913. bytes_to_copy);
  2914. ioa_dump->hdr.len += bytes_copied;
  2915. if (bytes_copied != bytes_to_copy) {
  2916. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2917. break;
  2918. }
  2919. }
  2920. }
  2921. }
  2922. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2923. /* Update dump_header */
  2924. driver_dump->hdr.len += ioa_dump->hdr.len;
  2925. wmb();
  2926. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2927. LEAVE;
  2928. }
  2929. #else
  2930. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2931. #endif
  2932. /**
  2933. * ipr_release_dump - Free adapter dump memory
  2934. * @kref: kref struct
  2935. *
  2936. * Return value:
  2937. * nothing
  2938. **/
  2939. static void ipr_release_dump(struct kref *kref)
  2940. {
  2941. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2942. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2943. unsigned long lock_flags = 0;
  2944. int i;
  2945. ENTER;
  2946. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2947. ioa_cfg->dump = NULL;
  2948. ioa_cfg->sdt_state = INACTIVE;
  2949. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2950. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2951. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2952. vfree(dump->ioa_dump.ioa_data);
  2953. kfree(dump);
  2954. LEAVE;
  2955. }
  2956. static void ipr_add_remove_thread(struct work_struct *work)
  2957. {
  2958. unsigned long lock_flags;
  2959. struct ipr_resource_entry *res;
  2960. struct scsi_device *sdev;
  2961. struct ipr_ioa_cfg *ioa_cfg =
  2962. container_of(work, struct ipr_ioa_cfg, scsi_add_work_q);
  2963. u8 bus, target, lun;
  2964. int did_work;
  2965. ENTER;
  2966. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2967. restart:
  2968. do {
  2969. did_work = 0;
  2970. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  2971. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2972. return;
  2973. }
  2974. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2975. if (res->del_from_ml && res->sdev) {
  2976. did_work = 1;
  2977. sdev = res->sdev;
  2978. if (!scsi_device_get(sdev)) {
  2979. if (!res->add_to_ml)
  2980. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2981. else
  2982. res->del_from_ml = 0;
  2983. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2984. scsi_remove_device(sdev);
  2985. scsi_device_put(sdev);
  2986. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2987. }
  2988. break;
  2989. }
  2990. }
  2991. } while (did_work);
  2992. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2993. if (res->add_to_ml) {
  2994. bus = res->bus;
  2995. target = res->target;
  2996. lun = res->lun;
  2997. res->add_to_ml = 0;
  2998. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2999. scsi_add_device(ioa_cfg->host, bus, target, lun);
  3000. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3001. goto restart;
  3002. }
  3003. }
  3004. ioa_cfg->scan_done = 1;
  3005. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3006. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  3007. LEAVE;
  3008. }
  3009. /**
  3010. * ipr_worker_thread - Worker thread
  3011. * @work: ioa config struct
  3012. *
  3013. * Called at task level from a work thread. This function takes care
  3014. * of adding and removing device from the mid-layer as configuration
  3015. * changes are detected by the adapter.
  3016. *
  3017. * Return value:
  3018. * nothing
  3019. **/
  3020. static void ipr_worker_thread(struct work_struct *work)
  3021. {
  3022. unsigned long lock_flags;
  3023. struct ipr_dump *dump;
  3024. struct ipr_ioa_cfg *ioa_cfg =
  3025. container_of(work, struct ipr_ioa_cfg, work_q);
  3026. ENTER;
  3027. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3028. if (ioa_cfg->sdt_state == READ_DUMP) {
  3029. dump = ioa_cfg->dump;
  3030. if (!dump) {
  3031. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3032. return;
  3033. }
  3034. kref_get(&dump->kref);
  3035. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3036. ipr_get_ioa_dump(ioa_cfg, dump);
  3037. kref_put(&dump->kref, ipr_release_dump);
  3038. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3039. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  3040. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3041. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3042. return;
  3043. }
  3044. if (ioa_cfg->scsi_unblock) {
  3045. ioa_cfg->scsi_unblock = 0;
  3046. ioa_cfg->scsi_blocked = 0;
  3047. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3048. scsi_unblock_requests(ioa_cfg->host);
  3049. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3050. if (ioa_cfg->scsi_blocked)
  3051. scsi_block_requests(ioa_cfg->host);
  3052. }
  3053. if (!ioa_cfg->scan_enabled) {
  3054. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3055. return;
  3056. }
  3057. schedule_work(&ioa_cfg->scsi_add_work_q);
  3058. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3059. LEAVE;
  3060. }
  3061. #ifdef CONFIG_SCSI_IPR_TRACE
  3062. /**
  3063. * ipr_read_trace - Dump the adapter trace
  3064. * @filp: open sysfs file
  3065. * @kobj: kobject struct
  3066. * @bin_attr: bin_attribute struct
  3067. * @buf: buffer
  3068. * @off: offset
  3069. * @count: buffer size
  3070. *
  3071. * Return value:
  3072. * number of bytes printed to buffer
  3073. **/
  3074. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  3075. struct bin_attribute *bin_attr,
  3076. char *buf, loff_t off, size_t count)
  3077. {
  3078. struct device *dev = container_of(kobj, struct device, kobj);
  3079. struct Scsi_Host *shost = class_to_shost(dev);
  3080. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3081. unsigned long lock_flags = 0;
  3082. ssize_t ret;
  3083. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3084. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  3085. IPR_TRACE_SIZE);
  3086. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3087. return ret;
  3088. }
  3089. static struct bin_attribute ipr_trace_attr = {
  3090. .attr = {
  3091. .name = "trace",
  3092. .mode = S_IRUGO,
  3093. },
  3094. .size = 0,
  3095. .read = ipr_read_trace,
  3096. };
  3097. #endif
  3098. /**
  3099. * ipr_show_fw_version - Show the firmware version
  3100. * @dev: class device struct
  3101. * @buf: buffer
  3102. *
  3103. * Return value:
  3104. * number of bytes printed to buffer
  3105. **/
  3106. static ssize_t ipr_show_fw_version(struct device *dev,
  3107. struct device_attribute *attr, char *buf)
  3108. {
  3109. struct Scsi_Host *shost = class_to_shost(dev);
  3110. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3111. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  3112. unsigned long lock_flags = 0;
  3113. int len;
  3114. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3115. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  3116. ucode_vpd->major_release, ucode_vpd->card_type,
  3117. ucode_vpd->minor_release[0],
  3118. ucode_vpd->minor_release[1]);
  3119. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3120. return len;
  3121. }
  3122. static struct device_attribute ipr_fw_version_attr = {
  3123. .attr = {
  3124. .name = "fw_version",
  3125. .mode = S_IRUGO,
  3126. },
  3127. .show = ipr_show_fw_version,
  3128. };
  3129. /**
  3130. * ipr_show_log_level - Show the adapter's error logging level
  3131. * @dev: class device struct
  3132. * @buf: buffer
  3133. *
  3134. * Return value:
  3135. * number of bytes printed to buffer
  3136. **/
  3137. static ssize_t ipr_show_log_level(struct device *dev,
  3138. struct device_attribute *attr, char *buf)
  3139. {
  3140. struct Scsi_Host *shost = class_to_shost(dev);
  3141. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3142. unsigned long lock_flags = 0;
  3143. int len;
  3144. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3145. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  3146. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3147. return len;
  3148. }
  3149. /**
  3150. * ipr_store_log_level - Change the adapter's error logging level
  3151. * @dev: class device struct
  3152. * @buf: buffer
  3153. *
  3154. * Return value:
  3155. * number of bytes printed to buffer
  3156. **/
  3157. static ssize_t ipr_store_log_level(struct device *dev,
  3158. struct device_attribute *attr,
  3159. const char *buf, size_t count)
  3160. {
  3161. struct Scsi_Host *shost = class_to_shost(dev);
  3162. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3163. unsigned long lock_flags = 0;
  3164. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3165. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  3166. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3167. return strlen(buf);
  3168. }
  3169. static struct device_attribute ipr_log_level_attr = {
  3170. .attr = {
  3171. .name = "log_level",
  3172. .mode = S_IRUGO | S_IWUSR,
  3173. },
  3174. .show = ipr_show_log_level,
  3175. .store = ipr_store_log_level
  3176. };
  3177. /**
  3178. * ipr_store_diagnostics - IOA Diagnostics interface
  3179. * @dev: device struct
  3180. * @buf: buffer
  3181. * @count: buffer size
  3182. *
  3183. * This function will reset the adapter and wait a reasonable
  3184. * amount of time for any errors that the adapter might log.
  3185. *
  3186. * Return value:
  3187. * count on success / other on failure
  3188. **/
  3189. static ssize_t ipr_store_diagnostics(struct device *dev,
  3190. struct device_attribute *attr,
  3191. const char *buf, size_t count)
  3192. {
  3193. struct Scsi_Host *shost = class_to_shost(dev);
  3194. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3195. unsigned long lock_flags = 0;
  3196. int rc = count;
  3197. if (!capable(CAP_SYS_ADMIN))
  3198. return -EACCES;
  3199. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3200. while (ioa_cfg->in_reset_reload) {
  3201. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3202. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3203. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3204. }
  3205. ioa_cfg->errors_logged = 0;
  3206. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3207. if (ioa_cfg->in_reset_reload) {
  3208. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3209. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3210. /* Wait for a second for any errors to be logged */
  3211. msleep(1000);
  3212. } else {
  3213. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3214. return -EIO;
  3215. }
  3216. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3217. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3218. rc = -EIO;
  3219. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3220. return rc;
  3221. }
  3222. static struct device_attribute ipr_diagnostics_attr = {
  3223. .attr = {
  3224. .name = "run_diagnostics",
  3225. .mode = S_IWUSR,
  3226. },
  3227. .store = ipr_store_diagnostics
  3228. };
  3229. /**
  3230. * ipr_show_adapter_state - Show the adapter's state
  3231. * @class_dev: device struct
  3232. * @buf: buffer
  3233. *
  3234. * Return value:
  3235. * number of bytes printed to buffer
  3236. **/
  3237. static ssize_t ipr_show_adapter_state(struct device *dev,
  3238. struct device_attribute *attr, char *buf)
  3239. {
  3240. struct Scsi_Host *shost = class_to_shost(dev);
  3241. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3242. unsigned long lock_flags = 0;
  3243. int len;
  3244. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3245. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3246. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3247. else
  3248. len = snprintf(buf, PAGE_SIZE, "online\n");
  3249. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3250. return len;
  3251. }
  3252. /**
  3253. * ipr_store_adapter_state - Change adapter state
  3254. * @dev: device struct
  3255. * @buf: buffer
  3256. * @count: buffer size
  3257. *
  3258. * This function will change the adapter's state.
  3259. *
  3260. * Return value:
  3261. * count on success / other on failure
  3262. **/
  3263. static ssize_t ipr_store_adapter_state(struct device *dev,
  3264. struct device_attribute *attr,
  3265. const char *buf, size_t count)
  3266. {
  3267. struct Scsi_Host *shost = class_to_shost(dev);
  3268. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3269. unsigned long lock_flags;
  3270. int result = count, i;
  3271. if (!capable(CAP_SYS_ADMIN))
  3272. return -EACCES;
  3273. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3274. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3275. !strncmp(buf, "online", 6)) {
  3276. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3277. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3278. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3279. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3280. }
  3281. wmb();
  3282. ioa_cfg->reset_retries = 0;
  3283. ioa_cfg->in_ioa_bringdown = 0;
  3284. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3285. }
  3286. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3287. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3288. return result;
  3289. }
  3290. static struct device_attribute ipr_ioa_state_attr = {
  3291. .attr = {
  3292. .name = "online_state",
  3293. .mode = S_IRUGO | S_IWUSR,
  3294. },
  3295. .show = ipr_show_adapter_state,
  3296. .store = ipr_store_adapter_state
  3297. };
  3298. /**
  3299. * ipr_store_reset_adapter - Reset the adapter
  3300. * @dev: device struct
  3301. * @buf: buffer
  3302. * @count: buffer size
  3303. *
  3304. * This function will reset the adapter.
  3305. *
  3306. * Return value:
  3307. * count on success / other on failure
  3308. **/
  3309. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3310. struct device_attribute *attr,
  3311. const char *buf, size_t count)
  3312. {
  3313. struct Scsi_Host *shost = class_to_shost(dev);
  3314. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3315. unsigned long lock_flags;
  3316. int result = count;
  3317. if (!capable(CAP_SYS_ADMIN))
  3318. return -EACCES;
  3319. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3320. if (!ioa_cfg->in_reset_reload)
  3321. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3322. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3323. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3324. return result;
  3325. }
  3326. static struct device_attribute ipr_ioa_reset_attr = {
  3327. .attr = {
  3328. .name = "reset_host",
  3329. .mode = S_IWUSR,
  3330. },
  3331. .store = ipr_store_reset_adapter
  3332. };
  3333. static int ipr_iopoll(struct irq_poll *iop, int budget);
  3334. /**
  3335. * ipr_show_iopoll_weight - Show ipr polling mode
  3336. * @dev: class device struct
  3337. * @buf: buffer
  3338. *
  3339. * Return value:
  3340. * number of bytes printed to buffer
  3341. **/
  3342. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3343. struct device_attribute *attr, char *buf)
  3344. {
  3345. struct Scsi_Host *shost = class_to_shost(dev);
  3346. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3347. unsigned long lock_flags = 0;
  3348. int len;
  3349. spin_lock_irqsave(shost->host_lock, lock_flags);
  3350. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3351. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3352. return len;
  3353. }
  3354. /**
  3355. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3356. * @dev: class device struct
  3357. * @buf: buffer
  3358. *
  3359. * Return value:
  3360. * number of bytes printed to buffer
  3361. **/
  3362. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3363. struct device_attribute *attr,
  3364. const char *buf, size_t count)
  3365. {
  3366. struct Scsi_Host *shost = class_to_shost(dev);
  3367. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3368. unsigned long user_iopoll_weight;
  3369. unsigned long lock_flags = 0;
  3370. int i;
  3371. if (!ioa_cfg->sis64) {
  3372. dev_info(&ioa_cfg->pdev->dev, "irq_poll not supported on this adapter\n");
  3373. return -EINVAL;
  3374. }
  3375. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3376. return -EINVAL;
  3377. if (user_iopoll_weight > 256) {
  3378. dev_info(&ioa_cfg->pdev->dev, "Invalid irq_poll weight. It must be less than 256\n");
  3379. return -EINVAL;
  3380. }
  3381. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3382. dev_info(&ioa_cfg->pdev->dev, "Current irq_poll weight has the same weight\n");
  3383. return strlen(buf);
  3384. }
  3385. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3386. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3387. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  3388. }
  3389. spin_lock_irqsave(shost->host_lock, lock_flags);
  3390. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3391. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3392. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3393. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  3394. ioa_cfg->iopoll_weight, ipr_iopoll);
  3395. }
  3396. }
  3397. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3398. return strlen(buf);
  3399. }
  3400. static struct device_attribute ipr_iopoll_weight_attr = {
  3401. .attr = {
  3402. .name = "iopoll_weight",
  3403. .mode = S_IRUGO | S_IWUSR,
  3404. },
  3405. .show = ipr_show_iopoll_weight,
  3406. .store = ipr_store_iopoll_weight
  3407. };
  3408. /**
  3409. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3410. * @buf_len: buffer length
  3411. *
  3412. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3413. * list to use for microcode download
  3414. *
  3415. * Return value:
  3416. * pointer to sglist / NULL on failure
  3417. **/
  3418. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3419. {
  3420. int sg_size, order;
  3421. struct ipr_sglist *sglist;
  3422. /* Get the minimum size per scatter/gather element */
  3423. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3424. /* Get the actual size per element */
  3425. order = get_order(sg_size);
  3426. /* Allocate a scatter/gather list for the DMA */
  3427. sglist = kzalloc(sizeof(struct ipr_sglist), GFP_KERNEL);
  3428. if (sglist == NULL) {
  3429. ipr_trace;
  3430. return NULL;
  3431. }
  3432. sglist->order = order;
  3433. sglist->scatterlist = sgl_alloc_order(buf_len, order, false, GFP_KERNEL,
  3434. &sglist->num_sg);
  3435. if (!sglist->scatterlist) {
  3436. kfree(sglist);
  3437. return NULL;
  3438. }
  3439. return sglist;
  3440. }
  3441. /**
  3442. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3443. * @p_dnld: scatter/gather list pointer
  3444. *
  3445. * Free a DMA'able ucode download buffer previously allocated with
  3446. * ipr_alloc_ucode_buffer
  3447. *
  3448. * Return value:
  3449. * nothing
  3450. **/
  3451. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3452. {
  3453. sgl_free_order(sglist->scatterlist, sglist->order);
  3454. kfree(sglist);
  3455. }
  3456. /**
  3457. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3458. * @sglist: scatter/gather list pointer
  3459. * @buffer: buffer pointer
  3460. * @len: buffer length
  3461. *
  3462. * Copy a microcode image from a user buffer into a buffer allocated by
  3463. * ipr_alloc_ucode_buffer
  3464. *
  3465. * Return value:
  3466. * 0 on success / other on failure
  3467. **/
  3468. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3469. u8 *buffer, u32 len)
  3470. {
  3471. int bsize_elem, i, result = 0;
  3472. struct scatterlist *scatterlist;
  3473. void *kaddr;
  3474. /* Determine the actual number of bytes per element */
  3475. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3476. scatterlist = sglist->scatterlist;
  3477. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3478. struct page *page = sg_page(&scatterlist[i]);
  3479. kaddr = kmap(page);
  3480. memcpy(kaddr, buffer, bsize_elem);
  3481. kunmap(page);
  3482. scatterlist[i].length = bsize_elem;
  3483. if (result != 0) {
  3484. ipr_trace;
  3485. return result;
  3486. }
  3487. }
  3488. if (len % bsize_elem) {
  3489. struct page *page = sg_page(&scatterlist[i]);
  3490. kaddr = kmap(page);
  3491. memcpy(kaddr, buffer, len % bsize_elem);
  3492. kunmap(page);
  3493. scatterlist[i].length = len % bsize_elem;
  3494. }
  3495. sglist->buffer_len = len;
  3496. return result;
  3497. }
  3498. /**
  3499. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3500. * @ipr_cmd: ipr command struct
  3501. * @sglist: scatter/gather list
  3502. *
  3503. * Builds a microcode download IOA data list (IOADL).
  3504. *
  3505. **/
  3506. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3507. struct ipr_sglist *sglist)
  3508. {
  3509. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3510. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3511. struct scatterlist *scatterlist = sglist->scatterlist;
  3512. int i;
  3513. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3514. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3515. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3516. ioarcb->ioadl_len =
  3517. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3518. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3519. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3520. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3521. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3522. }
  3523. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3524. }
  3525. /**
  3526. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3527. * @ipr_cmd: ipr command struct
  3528. * @sglist: scatter/gather list
  3529. *
  3530. * Builds a microcode download IOA data list (IOADL).
  3531. *
  3532. **/
  3533. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3534. struct ipr_sglist *sglist)
  3535. {
  3536. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3537. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3538. struct scatterlist *scatterlist = sglist->scatterlist;
  3539. int i;
  3540. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3541. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3542. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3543. ioarcb->ioadl_len =
  3544. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3545. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3546. ioadl[i].flags_and_data_len =
  3547. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3548. ioadl[i].address =
  3549. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3550. }
  3551. ioadl[i-1].flags_and_data_len |=
  3552. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3553. }
  3554. /**
  3555. * ipr_update_ioa_ucode - Update IOA's microcode
  3556. * @ioa_cfg: ioa config struct
  3557. * @sglist: scatter/gather list
  3558. *
  3559. * Initiate an adapter reset to update the IOA's microcode
  3560. *
  3561. * Return value:
  3562. * 0 on success / -EIO on failure
  3563. **/
  3564. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3565. struct ipr_sglist *sglist)
  3566. {
  3567. unsigned long lock_flags;
  3568. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3569. while (ioa_cfg->in_reset_reload) {
  3570. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3571. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3572. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3573. }
  3574. if (ioa_cfg->ucode_sglist) {
  3575. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3576. dev_err(&ioa_cfg->pdev->dev,
  3577. "Microcode download already in progress\n");
  3578. return -EIO;
  3579. }
  3580. sglist->num_dma_sg = dma_map_sg(&ioa_cfg->pdev->dev,
  3581. sglist->scatterlist, sglist->num_sg,
  3582. DMA_TO_DEVICE);
  3583. if (!sglist->num_dma_sg) {
  3584. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3585. dev_err(&ioa_cfg->pdev->dev,
  3586. "Failed to map microcode download buffer!\n");
  3587. return -EIO;
  3588. }
  3589. ioa_cfg->ucode_sglist = sglist;
  3590. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3591. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3592. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3593. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3594. ioa_cfg->ucode_sglist = NULL;
  3595. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3596. return 0;
  3597. }
  3598. /**
  3599. * ipr_store_update_fw - Update the firmware on the adapter
  3600. * @class_dev: device struct
  3601. * @buf: buffer
  3602. * @count: buffer size
  3603. *
  3604. * This function will update the firmware on the adapter.
  3605. *
  3606. * Return value:
  3607. * count on success / other on failure
  3608. **/
  3609. static ssize_t ipr_store_update_fw(struct device *dev,
  3610. struct device_attribute *attr,
  3611. const char *buf, size_t count)
  3612. {
  3613. struct Scsi_Host *shost = class_to_shost(dev);
  3614. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3615. struct ipr_ucode_image_header *image_hdr;
  3616. const struct firmware *fw_entry;
  3617. struct ipr_sglist *sglist;
  3618. char fname[100];
  3619. char *src;
  3620. char *endline;
  3621. int result, dnld_size;
  3622. if (!capable(CAP_SYS_ADMIN))
  3623. return -EACCES;
  3624. snprintf(fname, sizeof(fname), "%s", buf);
  3625. endline = strchr(fname, '\n');
  3626. if (endline)
  3627. *endline = '\0';
  3628. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev))
  3629. return -EIO;
  3630. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3631. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3632. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3633. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3634. if (!sglist) {
  3635. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3636. release_firmware(fw_entry);
  3637. return -ENOMEM;
  3638. }
  3639. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3640. if (result) {
  3641. dev_err(&ioa_cfg->pdev->dev,
  3642. "Microcode buffer copy to DMA buffer failed\n");
  3643. goto out;
  3644. }
  3645. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3646. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3647. if (!result)
  3648. result = count;
  3649. out:
  3650. ipr_free_ucode_buffer(sglist);
  3651. release_firmware(fw_entry);
  3652. return result;
  3653. }
  3654. static struct device_attribute ipr_update_fw_attr = {
  3655. .attr = {
  3656. .name = "update_fw",
  3657. .mode = S_IWUSR,
  3658. },
  3659. .store = ipr_store_update_fw
  3660. };
  3661. /**
  3662. * ipr_show_fw_type - Show the adapter's firmware type.
  3663. * @dev: class device struct
  3664. * @buf: buffer
  3665. *
  3666. * Return value:
  3667. * number of bytes printed to buffer
  3668. **/
  3669. static ssize_t ipr_show_fw_type(struct device *dev,
  3670. struct device_attribute *attr, char *buf)
  3671. {
  3672. struct Scsi_Host *shost = class_to_shost(dev);
  3673. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3674. unsigned long lock_flags = 0;
  3675. int len;
  3676. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3677. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3678. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3679. return len;
  3680. }
  3681. static struct device_attribute ipr_ioa_fw_type_attr = {
  3682. .attr = {
  3683. .name = "fw_type",
  3684. .mode = S_IRUGO,
  3685. },
  3686. .show = ipr_show_fw_type
  3687. };
  3688. static ssize_t ipr_read_async_err_log(struct file *filep, struct kobject *kobj,
  3689. struct bin_attribute *bin_attr, char *buf,
  3690. loff_t off, size_t count)
  3691. {
  3692. struct device *cdev = container_of(kobj, struct device, kobj);
  3693. struct Scsi_Host *shost = class_to_shost(cdev);
  3694. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3695. struct ipr_hostrcb *hostrcb;
  3696. unsigned long lock_flags = 0;
  3697. int ret;
  3698. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3699. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3700. struct ipr_hostrcb, queue);
  3701. if (!hostrcb) {
  3702. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3703. return 0;
  3704. }
  3705. ret = memory_read_from_buffer(buf, count, &off, &hostrcb->hcam,
  3706. sizeof(hostrcb->hcam));
  3707. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3708. return ret;
  3709. }
  3710. static ssize_t ipr_next_async_err_log(struct file *filep, struct kobject *kobj,
  3711. struct bin_attribute *bin_attr, char *buf,
  3712. loff_t off, size_t count)
  3713. {
  3714. struct device *cdev = container_of(kobj, struct device, kobj);
  3715. struct Scsi_Host *shost = class_to_shost(cdev);
  3716. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3717. struct ipr_hostrcb *hostrcb;
  3718. unsigned long lock_flags = 0;
  3719. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3720. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3721. struct ipr_hostrcb, queue);
  3722. if (!hostrcb) {
  3723. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3724. return count;
  3725. }
  3726. /* Reclaim hostrcb before exit */
  3727. list_move_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  3728. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3729. return count;
  3730. }
  3731. static struct bin_attribute ipr_ioa_async_err_log = {
  3732. .attr = {
  3733. .name = "async_err_log",
  3734. .mode = S_IRUGO | S_IWUSR,
  3735. },
  3736. .size = 0,
  3737. .read = ipr_read_async_err_log,
  3738. .write = ipr_next_async_err_log
  3739. };
  3740. static struct device_attribute *ipr_ioa_attrs[] = {
  3741. &ipr_fw_version_attr,
  3742. &ipr_log_level_attr,
  3743. &ipr_diagnostics_attr,
  3744. &ipr_ioa_state_attr,
  3745. &ipr_ioa_reset_attr,
  3746. &ipr_update_fw_attr,
  3747. &ipr_ioa_fw_type_attr,
  3748. &ipr_iopoll_weight_attr,
  3749. NULL,
  3750. };
  3751. #ifdef CONFIG_SCSI_IPR_DUMP
  3752. /**
  3753. * ipr_read_dump - Dump the adapter
  3754. * @filp: open sysfs file
  3755. * @kobj: kobject struct
  3756. * @bin_attr: bin_attribute struct
  3757. * @buf: buffer
  3758. * @off: offset
  3759. * @count: buffer size
  3760. *
  3761. * Return value:
  3762. * number of bytes printed to buffer
  3763. **/
  3764. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3765. struct bin_attribute *bin_attr,
  3766. char *buf, loff_t off, size_t count)
  3767. {
  3768. struct device *cdev = container_of(kobj, struct device, kobj);
  3769. struct Scsi_Host *shost = class_to_shost(cdev);
  3770. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3771. struct ipr_dump *dump;
  3772. unsigned long lock_flags = 0;
  3773. char *src;
  3774. int len, sdt_end;
  3775. size_t rc = count;
  3776. if (!capable(CAP_SYS_ADMIN))
  3777. return -EACCES;
  3778. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3779. dump = ioa_cfg->dump;
  3780. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3781. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3782. return 0;
  3783. }
  3784. kref_get(&dump->kref);
  3785. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3786. if (off > dump->driver_dump.hdr.len) {
  3787. kref_put(&dump->kref, ipr_release_dump);
  3788. return 0;
  3789. }
  3790. if (off + count > dump->driver_dump.hdr.len) {
  3791. count = dump->driver_dump.hdr.len - off;
  3792. rc = count;
  3793. }
  3794. if (count && off < sizeof(dump->driver_dump)) {
  3795. if (off + count > sizeof(dump->driver_dump))
  3796. len = sizeof(dump->driver_dump) - off;
  3797. else
  3798. len = count;
  3799. src = (u8 *)&dump->driver_dump + off;
  3800. memcpy(buf, src, len);
  3801. buf += len;
  3802. off += len;
  3803. count -= len;
  3804. }
  3805. off -= sizeof(dump->driver_dump);
  3806. if (ioa_cfg->sis64)
  3807. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3808. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3809. sizeof(struct ipr_sdt_entry));
  3810. else
  3811. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3812. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3813. if (count && off < sdt_end) {
  3814. if (off + count > sdt_end)
  3815. len = sdt_end - off;
  3816. else
  3817. len = count;
  3818. src = (u8 *)&dump->ioa_dump + off;
  3819. memcpy(buf, src, len);
  3820. buf += len;
  3821. off += len;
  3822. count -= len;
  3823. }
  3824. off -= sdt_end;
  3825. while (count) {
  3826. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3827. len = PAGE_ALIGN(off) - off;
  3828. else
  3829. len = count;
  3830. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3831. src += off & ~PAGE_MASK;
  3832. memcpy(buf, src, len);
  3833. buf += len;
  3834. off += len;
  3835. count -= len;
  3836. }
  3837. kref_put(&dump->kref, ipr_release_dump);
  3838. return rc;
  3839. }
  3840. /**
  3841. * ipr_alloc_dump - Prepare for adapter dump
  3842. * @ioa_cfg: ioa config struct
  3843. *
  3844. * Return value:
  3845. * 0 on success / other on failure
  3846. **/
  3847. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3848. {
  3849. struct ipr_dump *dump;
  3850. __be32 **ioa_data;
  3851. unsigned long lock_flags = 0;
  3852. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3853. if (!dump) {
  3854. ipr_err("Dump memory allocation failed\n");
  3855. return -ENOMEM;
  3856. }
  3857. if (ioa_cfg->sis64)
  3858. ioa_data = vmalloc(array_size(IPR_FMT3_MAX_NUM_DUMP_PAGES,
  3859. sizeof(__be32 *)));
  3860. else
  3861. ioa_data = vmalloc(array_size(IPR_FMT2_MAX_NUM_DUMP_PAGES,
  3862. sizeof(__be32 *)));
  3863. if (!ioa_data) {
  3864. ipr_err("Dump memory allocation failed\n");
  3865. kfree(dump);
  3866. return -ENOMEM;
  3867. }
  3868. dump->ioa_dump.ioa_data = ioa_data;
  3869. kref_init(&dump->kref);
  3870. dump->ioa_cfg = ioa_cfg;
  3871. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3872. if (INACTIVE != ioa_cfg->sdt_state) {
  3873. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3874. vfree(dump->ioa_dump.ioa_data);
  3875. kfree(dump);
  3876. return 0;
  3877. }
  3878. ioa_cfg->dump = dump;
  3879. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3880. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3881. ioa_cfg->dump_taken = 1;
  3882. schedule_work(&ioa_cfg->work_q);
  3883. }
  3884. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3885. return 0;
  3886. }
  3887. /**
  3888. * ipr_free_dump - Free adapter dump memory
  3889. * @ioa_cfg: ioa config struct
  3890. *
  3891. * Return value:
  3892. * 0 on success / other on failure
  3893. **/
  3894. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3895. {
  3896. struct ipr_dump *dump;
  3897. unsigned long lock_flags = 0;
  3898. ENTER;
  3899. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3900. dump = ioa_cfg->dump;
  3901. if (!dump) {
  3902. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3903. return 0;
  3904. }
  3905. ioa_cfg->dump = NULL;
  3906. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3907. kref_put(&dump->kref, ipr_release_dump);
  3908. LEAVE;
  3909. return 0;
  3910. }
  3911. /**
  3912. * ipr_write_dump - Setup dump state of adapter
  3913. * @filp: open sysfs file
  3914. * @kobj: kobject struct
  3915. * @bin_attr: bin_attribute struct
  3916. * @buf: buffer
  3917. * @off: offset
  3918. * @count: buffer size
  3919. *
  3920. * Return value:
  3921. * number of bytes printed to buffer
  3922. **/
  3923. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3924. struct bin_attribute *bin_attr,
  3925. char *buf, loff_t off, size_t count)
  3926. {
  3927. struct device *cdev = container_of(kobj, struct device, kobj);
  3928. struct Scsi_Host *shost = class_to_shost(cdev);
  3929. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3930. int rc;
  3931. if (!capable(CAP_SYS_ADMIN))
  3932. return -EACCES;
  3933. if (buf[0] == '1')
  3934. rc = ipr_alloc_dump(ioa_cfg);
  3935. else if (buf[0] == '0')
  3936. rc = ipr_free_dump(ioa_cfg);
  3937. else
  3938. return -EINVAL;
  3939. if (rc)
  3940. return rc;
  3941. else
  3942. return count;
  3943. }
  3944. static struct bin_attribute ipr_dump_attr = {
  3945. .attr = {
  3946. .name = "dump",
  3947. .mode = S_IRUSR | S_IWUSR,
  3948. },
  3949. .size = 0,
  3950. .read = ipr_read_dump,
  3951. .write = ipr_write_dump
  3952. };
  3953. #else
  3954. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3955. #endif
  3956. /**
  3957. * ipr_change_queue_depth - Change the device's queue depth
  3958. * @sdev: scsi device struct
  3959. * @qdepth: depth to set
  3960. * @reason: calling context
  3961. *
  3962. * Return value:
  3963. * actual depth set
  3964. **/
  3965. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth)
  3966. {
  3967. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3968. struct ipr_resource_entry *res;
  3969. unsigned long lock_flags = 0;
  3970. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3971. res = (struct ipr_resource_entry *)sdev->hostdata;
  3972. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3973. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3974. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3975. scsi_change_queue_depth(sdev, qdepth);
  3976. return sdev->queue_depth;
  3977. }
  3978. /**
  3979. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3980. * @dev: device struct
  3981. * @attr: device attribute structure
  3982. * @buf: buffer
  3983. *
  3984. * Return value:
  3985. * number of bytes printed to buffer
  3986. **/
  3987. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3988. {
  3989. struct scsi_device *sdev = to_scsi_device(dev);
  3990. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3991. struct ipr_resource_entry *res;
  3992. unsigned long lock_flags = 0;
  3993. ssize_t len = -ENXIO;
  3994. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3995. res = (struct ipr_resource_entry *)sdev->hostdata;
  3996. if (res)
  3997. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3998. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3999. return len;
  4000. }
  4001. static struct device_attribute ipr_adapter_handle_attr = {
  4002. .attr = {
  4003. .name = "adapter_handle",
  4004. .mode = S_IRUSR,
  4005. },
  4006. .show = ipr_show_adapter_handle
  4007. };
  4008. /**
  4009. * ipr_show_resource_path - Show the resource path or the resource address for
  4010. * this device.
  4011. * @dev: device struct
  4012. * @attr: device attribute structure
  4013. * @buf: buffer
  4014. *
  4015. * Return value:
  4016. * number of bytes printed to buffer
  4017. **/
  4018. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  4019. {
  4020. struct scsi_device *sdev = to_scsi_device(dev);
  4021. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4022. struct ipr_resource_entry *res;
  4023. unsigned long lock_flags = 0;
  4024. ssize_t len = -ENXIO;
  4025. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4026. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4027. res = (struct ipr_resource_entry *)sdev->hostdata;
  4028. if (res && ioa_cfg->sis64)
  4029. len = snprintf(buf, PAGE_SIZE, "%s\n",
  4030. __ipr_format_res_path(res->res_path, buffer,
  4031. sizeof(buffer)));
  4032. else if (res)
  4033. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  4034. res->bus, res->target, res->lun);
  4035. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4036. return len;
  4037. }
  4038. static struct device_attribute ipr_resource_path_attr = {
  4039. .attr = {
  4040. .name = "resource_path",
  4041. .mode = S_IRUGO,
  4042. },
  4043. .show = ipr_show_resource_path
  4044. };
  4045. /**
  4046. * ipr_show_device_id - Show the device_id for this device.
  4047. * @dev: device struct
  4048. * @attr: device attribute structure
  4049. * @buf: buffer
  4050. *
  4051. * Return value:
  4052. * number of bytes printed to buffer
  4053. **/
  4054. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  4055. {
  4056. struct scsi_device *sdev = to_scsi_device(dev);
  4057. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4058. struct ipr_resource_entry *res;
  4059. unsigned long lock_flags = 0;
  4060. ssize_t len = -ENXIO;
  4061. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4062. res = (struct ipr_resource_entry *)sdev->hostdata;
  4063. if (res && ioa_cfg->sis64)
  4064. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", be64_to_cpu(res->dev_id));
  4065. else if (res)
  4066. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  4067. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4068. return len;
  4069. }
  4070. static struct device_attribute ipr_device_id_attr = {
  4071. .attr = {
  4072. .name = "device_id",
  4073. .mode = S_IRUGO,
  4074. },
  4075. .show = ipr_show_device_id
  4076. };
  4077. /**
  4078. * ipr_show_resource_type - Show the resource type for this device.
  4079. * @dev: device struct
  4080. * @attr: device attribute structure
  4081. * @buf: buffer
  4082. *
  4083. * Return value:
  4084. * number of bytes printed to buffer
  4085. **/
  4086. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  4087. {
  4088. struct scsi_device *sdev = to_scsi_device(dev);
  4089. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4090. struct ipr_resource_entry *res;
  4091. unsigned long lock_flags = 0;
  4092. ssize_t len = -ENXIO;
  4093. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4094. res = (struct ipr_resource_entry *)sdev->hostdata;
  4095. if (res)
  4096. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  4097. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4098. return len;
  4099. }
  4100. static struct device_attribute ipr_resource_type_attr = {
  4101. .attr = {
  4102. .name = "resource_type",
  4103. .mode = S_IRUGO,
  4104. },
  4105. .show = ipr_show_resource_type
  4106. };
  4107. /**
  4108. * ipr_show_raw_mode - Show the adapter's raw mode
  4109. * @dev: class device struct
  4110. * @buf: buffer
  4111. *
  4112. * Return value:
  4113. * number of bytes printed to buffer
  4114. **/
  4115. static ssize_t ipr_show_raw_mode(struct device *dev,
  4116. struct device_attribute *attr, char *buf)
  4117. {
  4118. struct scsi_device *sdev = to_scsi_device(dev);
  4119. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4120. struct ipr_resource_entry *res;
  4121. unsigned long lock_flags = 0;
  4122. ssize_t len;
  4123. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4124. res = (struct ipr_resource_entry *)sdev->hostdata;
  4125. if (res)
  4126. len = snprintf(buf, PAGE_SIZE, "%d\n", res->raw_mode);
  4127. else
  4128. len = -ENXIO;
  4129. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4130. return len;
  4131. }
  4132. /**
  4133. * ipr_store_raw_mode - Change the adapter's raw mode
  4134. * @dev: class device struct
  4135. * @buf: buffer
  4136. *
  4137. * Return value:
  4138. * number of bytes printed to buffer
  4139. **/
  4140. static ssize_t ipr_store_raw_mode(struct device *dev,
  4141. struct device_attribute *attr,
  4142. const char *buf, size_t count)
  4143. {
  4144. struct scsi_device *sdev = to_scsi_device(dev);
  4145. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4146. struct ipr_resource_entry *res;
  4147. unsigned long lock_flags = 0;
  4148. ssize_t len;
  4149. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4150. res = (struct ipr_resource_entry *)sdev->hostdata;
  4151. if (res) {
  4152. if (ipr_is_af_dasd_device(res)) {
  4153. res->raw_mode = simple_strtoul(buf, NULL, 10);
  4154. len = strlen(buf);
  4155. if (res->sdev)
  4156. sdev_printk(KERN_INFO, res->sdev, "raw mode is %s\n",
  4157. res->raw_mode ? "enabled" : "disabled");
  4158. } else
  4159. len = -EINVAL;
  4160. } else
  4161. len = -ENXIO;
  4162. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4163. return len;
  4164. }
  4165. static struct device_attribute ipr_raw_mode_attr = {
  4166. .attr = {
  4167. .name = "raw_mode",
  4168. .mode = S_IRUGO | S_IWUSR,
  4169. },
  4170. .show = ipr_show_raw_mode,
  4171. .store = ipr_store_raw_mode
  4172. };
  4173. static struct device_attribute *ipr_dev_attrs[] = {
  4174. &ipr_adapter_handle_attr,
  4175. &ipr_resource_path_attr,
  4176. &ipr_device_id_attr,
  4177. &ipr_resource_type_attr,
  4178. &ipr_raw_mode_attr,
  4179. NULL,
  4180. };
  4181. /**
  4182. * ipr_biosparam - Return the HSC mapping
  4183. * @sdev: scsi device struct
  4184. * @block_device: block device pointer
  4185. * @capacity: capacity of the device
  4186. * @parm: Array containing returned HSC values.
  4187. *
  4188. * This function generates the HSC parms that fdisk uses.
  4189. * We want to make sure we return something that places partitions
  4190. * on 4k boundaries for best performance with the IOA.
  4191. *
  4192. * Return value:
  4193. * 0 on success
  4194. **/
  4195. static int ipr_biosparam(struct scsi_device *sdev,
  4196. struct block_device *block_device,
  4197. sector_t capacity, int *parm)
  4198. {
  4199. int heads, sectors;
  4200. sector_t cylinders;
  4201. heads = 128;
  4202. sectors = 32;
  4203. cylinders = capacity;
  4204. sector_div(cylinders, (128 * 32));
  4205. /* return result */
  4206. parm[0] = heads;
  4207. parm[1] = sectors;
  4208. parm[2] = cylinders;
  4209. return 0;
  4210. }
  4211. /**
  4212. * ipr_find_starget - Find target based on bus/target.
  4213. * @starget: scsi target struct
  4214. *
  4215. * Return value:
  4216. * resource entry pointer if found / NULL if not found
  4217. **/
  4218. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  4219. {
  4220. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4221. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4222. struct ipr_resource_entry *res;
  4223. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4224. if ((res->bus == starget->channel) &&
  4225. (res->target == starget->id)) {
  4226. return res;
  4227. }
  4228. }
  4229. return NULL;
  4230. }
  4231. static struct ata_port_info sata_port_info;
  4232. /**
  4233. * ipr_target_alloc - Prepare for commands to a SCSI target
  4234. * @starget: scsi target struct
  4235. *
  4236. * If the device is a SATA device, this function allocates an
  4237. * ATA port with libata, else it does nothing.
  4238. *
  4239. * Return value:
  4240. * 0 on success / non-0 on failure
  4241. **/
  4242. static int ipr_target_alloc(struct scsi_target *starget)
  4243. {
  4244. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4245. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4246. struct ipr_sata_port *sata_port;
  4247. struct ata_port *ap;
  4248. struct ipr_resource_entry *res;
  4249. unsigned long lock_flags;
  4250. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4251. res = ipr_find_starget(starget);
  4252. starget->hostdata = NULL;
  4253. if (res && ipr_is_gata(res)) {
  4254. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4255. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  4256. if (!sata_port)
  4257. return -ENOMEM;
  4258. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  4259. if (ap) {
  4260. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4261. sata_port->ioa_cfg = ioa_cfg;
  4262. sata_port->ap = ap;
  4263. sata_port->res = res;
  4264. res->sata_port = sata_port;
  4265. ap->private_data = sata_port;
  4266. starget->hostdata = sata_port;
  4267. } else {
  4268. kfree(sata_port);
  4269. return -ENOMEM;
  4270. }
  4271. }
  4272. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4273. return 0;
  4274. }
  4275. /**
  4276. * ipr_target_destroy - Destroy a SCSI target
  4277. * @starget: scsi target struct
  4278. *
  4279. * If the device was a SATA device, this function frees the libata
  4280. * ATA port, else it does nothing.
  4281. *
  4282. **/
  4283. static void ipr_target_destroy(struct scsi_target *starget)
  4284. {
  4285. struct ipr_sata_port *sata_port = starget->hostdata;
  4286. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4287. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4288. if (ioa_cfg->sis64) {
  4289. if (!ipr_find_starget(starget)) {
  4290. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4291. clear_bit(starget->id, ioa_cfg->array_ids);
  4292. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4293. clear_bit(starget->id, ioa_cfg->vset_ids);
  4294. else if (starget->channel == 0)
  4295. clear_bit(starget->id, ioa_cfg->target_ids);
  4296. }
  4297. }
  4298. if (sata_port) {
  4299. starget->hostdata = NULL;
  4300. ata_sas_port_destroy(sata_port->ap);
  4301. kfree(sata_port);
  4302. }
  4303. }
  4304. /**
  4305. * ipr_find_sdev - Find device based on bus/target/lun.
  4306. * @sdev: scsi device struct
  4307. *
  4308. * Return value:
  4309. * resource entry pointer if found / NULL if not found
  4310. **/
  4311. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4312. {
  4313. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4314. struct ipr_resource_entry *res;
  4315. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4316. if ((res->bus == sdev->channel) &&
  4317. (res->target == sdev->id) &&
  4318. (res->lun == sdev->lun))
  4319. return res;
  4320. }
  4321. return NULL;
  4322. }
  4323. /**
  4324. * ipr_slave_destroy - Unconfigure a SCSI device
  4325. * @sdev: scsi device struct
  4326. *
  4327. * Return value:
  4328. * nothing
  4329. **/
  4330. static void ipr_slave_destroy(struct scsi_device *sdev)
  4331. {
  4332. struct ipr_resource_entry *res;
  4333. struct ipr_ioa_cfg *ioa_cfg;
  4334. unsigned long lock_flags = 0;
  4335. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4336. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4337. res = (struct ipr_resource_entry *) sdev->hostdata;
  4338. if (res) {
  4339. if (res->sata_port)
  4340. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4341. sdev->hostdata = NULL;
  4342. res->sdev = NULL;
  4343. res->sata_port = NULL;
  4344. }
  4345. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4346. }
  4347. /**
  4348. * ipr_slave_configure - Configure a SCSI device
  4349. * @sdev: scsi device struct
  4350. *
  4351. * This function configures the specified scsi device.
  4352. *
  4353. * Return value:
  4354. * 0 on success
  4355. **/
  4356. static int ipr_slave_configure(struct scsi_device *sdev)
  4357. {
  4358. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4359. struct ipr_resource_entry *res;
  4360. struct ata_port *ap = NULL;
  4361. unsigned long lock_flags = 0;
  4362. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4363. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4364. res = sdev->hostdata;
  4365. if (res) {
  4366. if (ipr_is_af_dasd_device(res))
  4367. sdev->type = TYPE_RAID;
  4368. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4369. sdev->scsi_level = 4;
  4370. sdev->no_uld_attach = 1;
  4371. }
  4372. if (ipr_is_vset_device(res)) {
  4373. sdev->scsi_level = SCSI_SPC_3;
  4374. sdev->no_report_opcodes = 1;
  4375. blk_queue_rq_timeout(sdev->request_queue,
  4376. IPR_VSET_RW_TIMEOUT);
  4377. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4378. }
  4379. if (ipr_is_gata(res) && res->sata_port)
  4380. ap = res->sata_port->ap;
  4381. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4382. if (ap) {
  4383. scsi_change_queue_depth(sdev, IPR_MAX_CMD_PER_ATA_LUN);
  4384. ata_sas_slave_configure(sdev, ap);
  4385. }
  4386. if (ioa_cfg->sis64)
  4387. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4388. ipr_format_res_path(ioa_cfg,
  4389. res->res_path, buffer, sizeof(buffer)));
  4390. return 0;
  4391. }
  4392. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4393. return 0;
  4394. }
  4395. /**
  4396. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4397. * @sdev: scsi device struct
  4398. *
  4399. * This function initializes an ATA port so that future commands
  4400. * sent through queuecommand will work.
  4401. *
  4402. * Return value:
  4403. * 0 on success
  4404. **/
  4405. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4406. {
  4407. struct ipr_sata_port *sata_port = NULL;
  4408. int rc = -ENXIO;
  4409. ENTER;
  4410. if (sdev->sdev_target)
  4411. sata_port = sdev->sdev_target->hostdata;
  4412. if (sata_port) {
  4413. rc = ata_sas_port_init(sata_port->ap);
  4414. if (rc == 0)
  4415. rc = ata_sas_sync_probe(sata_port->ap);
  4416. }
  4417. if (rc)
  4418. ipr_slave_destroy(sdev);
  4419. LEAVE;
  4420. return rc;
  4421. }
  4422. /**
  4423. * ipr_slave_alloc - Prepare for commands to a device.
  4424. * @sdev: scsi device struct
  4425. *
  4426. * This function saves a pointer to the resource entry
  4427. * in the scsi device struct if the device exists. We
  4428. * can then use this pointer in ipr_queuecommand when
  4429. * handling new commands.
  4430. *
  4431. * Return value:
  4432. * 0 on success / -ENXIO if device does not exist
  4433. **/
  4434. static int ipr_slave_alloc(struct scsi_device *sdev)
  4435. {
  4436. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4437. struct ipr_resource_entry *res;
  4438. unsigned long lock_flags;
  4439. int rc = -ENXIO;
  4440. sdev->hostdata = NULL;
  4441. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4442. res = ipr_find_sdev(sdev);
  4443. if (res) {
  4444. res->sdev = sdev;
  4445. res->add_to_ml = 0;
  4446. res->in_erp = 0;
  4447. sdev->hostdata = res;
  4448. if (!ipr_is_naca_model(res))
  4449. res->needs_sync_complete = 1;
  4450. rc = 0;
  4451. if (ipr_is_gata(res)) {
  4452. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4453. return ipr_ata_slave_alloc(sdev);
  4454. }
  4455. }
  4456. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4457. return rc;
  4458. }
  4459. /**
  4460. * ipr_match_lun - Match function for specified LUN
  4461. * @ipr_cmd: ipr command struct
  4462. * @device: device to match (sdev)
  4463. *
  4464. * Returns:
  4465. * 1 if command matches sdev / 0 if command does not match sdev
  4466. **/
  4467. static int ipr_match_lun(struct ipr_cmnd *ipr_cmd, void *device)
  4468. {
  4469. if (ipr_cmd->scsi_cmd && ipr_cmd->scsi_cmd->device == device)
  4470. return 1;
  4471. return 0;
  4472. }
  4473. /**
  4474. * ipr_cmnd_is_free - Check if a command is free or not
  4475. * @ipr_cmd ipr command struct
  4476. *
  4477. * Returns:
  4478. * true / false
  4479. **/
  4480. static bool ipr_cmnd_is_free(struct ipr_cmnd *ipr_cmd)
  4481. {
  4482. struct ipr_cmnd *loop_cmd;
  4483. list_for_each_entry(loop_cmd, &ipr_cmd->hrrq->hrrq_free_q, queue) {
  4484. if (loop_cmd == ipr_cmd)
  4485. return true;
  4486. }
  4487. return false;
  4488. }
  4489. /**
  4490. * ipr_match_res - Match function for specified resource entry
  4491. * @ipr_cmd: ipr command struct
  4492. * @resource: resource entry to match
  4493. *
  4494. * Returns:
  4495. * 1 if command matches sdev / 0 if command does not match sdev
  4496. **/
  4497. static int ipr_match_res(struct ipr_cmnd *ipr_cmd, void *resource)
  4498. {
  4499. struct ipr_resource_entry *res = resource;
  4500. if (res && ipr_cmd->ioarcb.res_handle == res->res_handle)
  4501. return 1;
  4502. return 0;
  4503. }
  4504. /**
  4505. * ipr_wait_for_ops - Wait for matching commands to complete
  4506. * @ipr_cmd: ipr command struct
  4507. * @device: device to match (sdev)
  4508. * @match: match function to use
  4509. *
  4510. * Returns:
  4511. * SUCCESS / FAILED
  4512. **/
  4513. static int ipr_wait_for_ops(struct ipr_ioa_cfg *ioa_cfg, void *device,
  4514. int (*match)(struct ipr_cmnd *, void *))
  4515. {
  4516. struct ipr_cmnd *ipr_cmd;
  4517. int wait, i;
  4518. unsigned long flags;
  4519. struct ipr_hrr_queue *hrrq;
  4520. signed long timeout = IPR_ABORT_TASK_TIMEOUT;
  4521. DECLARE_COMPLETION_ONSTACK(comp);
  4522. ENTER;
  4523. do {
  4524. wait = 0;
  4525. for_each_hrrq(hrrq, ioa_cfg) {
  4526. spin_lock_irqsave(hrrq->lock, flags);
  4527. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4528. ipr_cmd = ioa_cfg->ipr_cmnd_list[i];
  4529. if (!ipr_cmnd_is_free(ipr_cmd)) {
  4530. if (match(ipr_cmd, device)) {
  4531. ipr_cmd->eh_comp = &comp;
  4532. wait++;
  4533. }
  4534. }
  4535. }
  4536. spin_unlock_irqrestore(hrrq->lock, flags);
  4537. }
  4538. if (wait) {
  4539. timeout = wait_for_completion_timeout(&comp, timeout);
  4540. if (!timeout) {
  4541. wait = 0;
  4542. for_each_hrrq(hrrq, ioa_cfg) {
  4543. spin_lock_irqsave(hrrq->lock, flags);
  4544. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4545. ipr_cmd = ioa_cfg->ipr_cmnd_list[i];
  4546. if (!ipr_cmnd_is_free(ipr_cmd)) {
  4547. if (match(ipr_cmd, device)) {
  4548. ipr_cmd->eh_comp = NULL;
  4549. wait++;
  4550. }
  4551. }
  4552. }
  4553. spin_unlock_irqrestore(hrrq->lock, flags);
  4554. }
  4555. if (wait)
  4556. dev_err(&ioa_cfg->pdev->dev, "Timed out waiting for aborted commands\n");
  4557. LEAVE;
  4558. return wait ? FAILED : SUCCESS;
  4559. }
  4560. }
  4561. } while (wait);
  4562. LEAVE;
  4563. return SUCCESS;
  4564. }
  4565. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4566. {
  4567. struct ipr_ioa_cfg *ioa_cfg;
  4568. unsigned long lock_flags = 0;
  4569. int rc = SUCCESS;
  4570. ENTER;
  4571. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4572. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4573. if (!ioa_cfg->in_reset_reload && !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4574. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4575. dev_err(&ioa_cfg->pdev->dev,
  4576. "Adapter being reset as a result of error recovery.\n");
  4577. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4578. ioa_cfg->sdt_state = GET_DUMP;
  4579. }
  4580. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4581. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4582. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4583. /* If we got hit with a host reset while we were already resetting
  4584. the adapter for some reason, and the reset failed. */
  4585. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4586. ipr_trace;
  4587. rc = FAILED;
  4588. }
  4589. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4590. LEAVE;
  4591. return rc;
  4592. }
  4593. /**
  4594. * ipr_device_reset - Reset the device
  4595. * @ioa_cfg: ioa config struct
  4596. * @res: resource entry struct
  4597. *
  4598. * This function issues a device reset to the affected device.
  4599. * If the device is a SCSI device, a LUN reset will be sent
  4600. * to the device first. If that does not work, a target reset
  4601. * will be sent. If the device is a SATA device, a PHY reset will
  4602. * be sent.
  4603. *
  4604. * Return value:
  4605. * 0 on success / non-zero on failure
  4606. **/
  4607. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4608. struct ipr_resource_entry *res)
  4609. {
  4610. struct ipr_cmnd *ipr_cmd;
  4611. struct ipr_ioarcb *ioarcb;
  4612. struct ipr_cmd_pkt *cmd_pkt;
  4613. struct ipr_ioarcb_ata_regs *regs;
  4614. u32 ioasc;
  4615. ENTER;
  4616. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4617. ioarcb = &ipr_cmd->ioarcb;
  4618. cmd_pkt = &ioarcb->cmd_pkt;
  4619. if (ipr_cmd->ioa_cfg->sis64) {
  4620. regs = &ipr_cmd->i.ata_ioadl.regs;
  4621. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4622. } else
  4623. regs = &ioarcb->u.add_data.u.regs;
  4624. ioarcb->res_handle = res->res_handle;
  4625. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4626. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4627. if (ipr_is_gata(res)) {
  4628. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4629. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4630. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4631. }
  4632. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4633. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4634. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4635. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4636. if (ipr_cmd->ioa_cfg->sis64)
  4637. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4638. sizeof(struct ipr_ioasa_gata));
  4639. else
  4640. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4641. sizeof(struct ipr_ioasa_gata));
  4642. }
  4643. LEAVE;
  4644. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4645. }
  4646. /**
  4647. * ipr_sata_reset - Reset the SATA port
  4648. * @link: SATA link to reset
  4649. * @classes: class of the attached device
  4650. *
  4651. * This function issues a SATA phy reset to the affected ATA link.
  4652. *
  4653. * Return value:
  4654. * 0 on success / non-zero on failure
  4655. **/
  4656. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4657. unsigned long deadline)
  4658. {
  4659. struct ipr_sata_port *sata_port = link->ap->private_data;
  4660. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4661. struct ipr_resource_entry *res;
  4662. unsigned long lock_flags = 0;
  4663. int rc = -ENXIO, ret;
  4664. ENTER;
  4665. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4666. while (ioa_cfg->in_reset_reload) {
  4667. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4668. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4669. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4670. }
  4671. res = sata_port->res;
  4672. if (res) {
  4673. rc = ipr_device_reset(ioa_cfg, res);
  4674. *classes = res->ata_class;
  4675. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4676. ret = ipr_wait_for_ops(ioa_cfg, res, ipr_match_res);
  4677. if (ret != SUCCESS) {
  4678. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4679. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4680. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4681. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4682. }
  4683. } else
  4684. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4685. LEAVE;
  4686. return rc;
  4687. }
  4688. /**
  4689. * ipr_eh_dev_reset - Reset the device
  4690. * @scsi_cmd: scsi command struct
  4691. *
  4692. * This function issues a device reset to the affected device.
  4693. * A LUN reset will be sent to the device first. If that does
  4694. * not work, a target reset will be sent.
  4695. *
  4696. * Return value:
  4697. * SUCCESS / FAILED
  4698. **/
  4699. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4700. {
  4701. struct ipr_cmnd *ipr_cmd;
  4702. struct ipr_ioa_cfg *ioa_cfg;
  4703. struct ipr_resource_entry *res;
  4704. struct ata_port *ap;
  4705. int rc = 0, i;
  4706. struct ipr_hrr_queue *hrrq;
  4707. ENTER;
  4708. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4709. res = scsi_cmd->device->hostdata;
  4710. /*
  4711. * If we are currently going through reset/reload, return failed. This will force the
  4712. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4713. * reset to complete
  4714. */
  4715. if (ioa_cfg->in_reset_reload)
  4716. return FAILED;
  4717. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4718. return FAILED;
  4719. for_each_hrrq(hrrq, ioa_cfg) {
  4720. spin_lock(&hrrq->_lock);
  4721. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4722. ipr_cmd = ioa_cfg->ipr_cmnd_list[i];
  4723. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4724. if (!ipr_cmd->qc)
  4725. continue;
  4726. if (ipr_cmnd_is_free(ipr_cmd))
  4727. continue;
  4728. ipr_cmd->done = ipr_sata_eh_done;
  4729. if (!(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4730. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4731. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4732. }
  4733. }
  4734. }
  4735. spin_unlock(&hrrq->_lock);
  4736. }
  4737. res->resetting_device = 1;
  4738. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4739. if (ipr_is_gata(res) && res->sata_port) {
  4740. ap = res->sata_port->ap;
  4741. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4742. ata_std_error_handler(ap);
  4743. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4744. } else
  4745. rc = ipr_device_reset(ioa_cfg, res);
  4746. res->resetting_device = 0;
  4747. res->reset_occurred = 1;
  4748. LEAVE;
  4749. return rc ? FAILED : SUCCESS;
  4750. }
  4751. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4752. {
  4753. int rc;
  4754. struct ipr_ioa_cfg *ioa_cfg;
  4755. struct ipr_resource_entry *res;
  4756. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4757. res = cmd->device->hostdata;
  4758. if (!res)
  4759. return FAILED;
  4760. spin_lock_irq(cmd->device->host->host_lock);
  4761. rc = __ipr_eh_dev_reset(cmd);
  4762. spin_unlock_irq(cmd->device->host->host_lock);
  4763. if (rc == SUCCESS) {
  4764. if (ipr_is_gata(res) && res->sata_port)
  4765. rc = ipr_wait_for_ops(ioa_cfg, res, ipr_match_res);
  4766. else
  4767. rc = ipr_wait_for_ops(ioa_cfg, cmd->device, ipr_match_lun);
  4768. }
  4769. return rc;
  4770. }
  4771. /**
  4772. * ipr_bus_reset_done - Op done function for bus reset.
  4773. * @ipr_cmd: ipr command struct
  4774. *
  4775. * This function is the op done function for a bus reset
  4776. *
  4777. * Return value:
  4778. * none
  4779. **/
  4780. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4781. {
  4782. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4783. struct ipr_resource_entry *res;
  4784. ENTER;
  4785. if (!ioa_cfg->sis64)
  4786. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4787. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4788. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4789. break;
  4790. }
  4791. }
  4792. /*
  4793. * If abort has not completed, indicate the reset has, else call the
  4794. * abort's done function to wake the sleeping eh thread
  4795. */
  4796. if (ipr_cmd->sibling->sibling)
  4797. ipr_cmd->sibling->sibling = NULL;
  4798. else
  4799. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4800. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4801. LEAVE;
  4802. }
  4803. /**
  4804. * ipr_abort_timeout - An abort task has timed out
  4805. * @ipr_cmd: ipr command struct
  4806. *
  4807. * This function handles when an abort task times out. If this
  4808. * happens we issue a bus reset since we have resources tied
  4809. * up that must be freed before returning to the midlayer.
  4810. *
  4811. * Return value:
  4812. * none
  4813. **/
  4814. static void ipr_abort_timeout(struct timer_list *t)
  4815. {
  4816. struct ipr_cmnd *ipr_cmd = from_timer(ipr_cmd, t, timer);
  4817. struct ipr_cmnd *reset_cmd;
  4818. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4819. struct ipr_cmd_pkt *cmd_pkt;
  4820. unsigned long lock_flags = 0;
  4821. ENTER;
  4822. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4823. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4824. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4825. return;
  4826. }
  4827. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4828. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4829. ipr_cmd->sibling = reset_cmd;
  4830. reset_cmd->sibling = ipr_cmd;
  4831. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4832. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4833. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4834. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4835. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4836. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4837. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4838. LEAVE;
  4839. }
  4840. /**
  4841. * ipr_cancel_op - Cancel specified op
  4842. * @scsi_cmd: scsi command struct
  4843. *
  4844. * This function cancels specified op.
  4845. *
  4846. * Return value:
  4847. * SUCCESS / FAILED
  4848. **/
  4849. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4850. {
  4851. struct ipr_cmnd *ipr_cmd;
  4852. struct ipr_ioa_cfg *ioa_cfg;
  4853. struct ipr_resource_entry *res;
  4854. struct ipr_cmd_pkt *cmd_pkt;
  4855. u32 ioasc, int_reg;
  4856. int i, op_found = 0;
  4857. struct ipr_hrr_queue *hrrq;
  4858. ENTER;
  4859. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4860. res = scsi_cmd->device->hostdata;
  4861. /* If we are currently going through reset/reload, return failed.
  4862. * This will force the mid-layer to call ipr_eh_host_reset,
  4863. * which will then go to sleep and wait for the reset to complete
  4864. */
  4865. if (ioa_cfg->in_reset_reload ||
  4866. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4867. return FAILED;
  4868. if (!res)
  4869. return FAILED;
  4870. /*
  4871. * If we are aborting a timed out op, chances are that the timeout was caused
  4872. * by a still not detected EEH error. In such cases, reading a register will
  4873. * trigger the EEH recovery infrastructure.
  4874. */
  4875. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4876. if (!ipr_is_gscsi(res))
  4877. return FAILED;
  4878. for_each_hrrq(hrrq, ioa_cfg) {
  4879. spin_lock(&hrrq->_lock);
  4880. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4881. if (ioa_cfg->ipr_cmnd_list[i]->scsi_cmd == scsi_cmd) {
  4882. if (!ipr_cmnd_is_free(ioa_cfg->ipr_cmnd_list[i])) {
  4883. op_found = 1;
  4884. break;
  4885. }
  4886. }
  4887. }
  4888. spin_unlock(&hrrq->_lock);
  4889. }
  4890. if (!op_found)
  4891. return SUCCESS;
  4892. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4893. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4894. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4895. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4896. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4897. ipr_cmd->u.sdev = scsi_cmd->device;
  4898. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4899. scsi_cmd->cmnd[0]);
  4900. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4901. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4902. /*
  4903. * If the abort task timed out and we sent a bus reset, we will get
  4904. * one the following responses to the abort
  4905. */
  4906. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4907. ioasc = 0;
  4908. ipr_trace;
  4909. }
  4910. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4911. if (!ipr_is_naca_model(res))
  4912. res->needs_sync_complete = 1;
  4913. LEAVE;
  4914. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4915. }
  4916. /**
  4917. * ipr_eh_abort - Abort a single op
  4918. * @scsi_cmd: scsi command struct
  4919. *
  4920. * Return value:
  4921. * 0 if scan in progress / 1 if scan is complete
  4922. **/
  4923. static int ipr_scan_finished(struct Scsi_Host *shost, unsigned long elapsed_time)
  4924. {
  4925. unsigned long lock_flags;
  4926. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4927. int rc = 0;
  4928. spin_lock_irqsave(shost->host_lock, lock_flags);
  4929. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead || ioa_cfg->scan_done)
  4930. rc = 1;
  4931. if ((elapsed_time/HZ) > (ioa_cfg->transop_timeout * 2))
  4932. rc = 1;
  4933. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  4934. return rc;
  4935. }
  4936. /**
  4937. * ipr_eh_host_reset - Reset the host adapter
  4938. * @scsi_cmd: scsi command struct
  4939. *
  4940. * Return value:
  4941. * SUCCESS / FAILED
  4942. **/
  4943. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4944. {
  4945. unsigned long flags;
  4946. int rc;
  4947. struct ipr_ioa_cfg *ioa_cfg;
  4948. ENTER;
  4949. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4950. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4951. rc = ipr_cancel_op(scsi_cmd);
  4952. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4953. if (rc == SUCCESS)
  4954. rc = ipr_wait_for_ops(ioa_cfg, scsi_cmd->device, ipr_match_lun);
  4955. LEAVE;
  4956. return rc;
  4957. }
  4958. /**
  4959. * ipr_handle_other_interrupt - Handle "other" interrupts
  4960. * @ioa_cfg: ioa config struct
  4961. * @int_reg: interrupt register
  4962. *
  4963. * Return value:
  4964. * IRQ_NONE / IRQ_HANDLED
  4965. **/
  4966. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4967. u32 int_reg)
  4968. {
  4969. irqreturn_t rc = IRQ_HANDLED;
  4970. u32 int_mask_reg;
  4971. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4972. int_reg &= ~int_mask_reg;
  4973. /* If an interrupt on the adapter did not occur, ignore it.
  4974. * Or in the case of SIS 64, check for a stage change interrupt.
  4975. */
  4976. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4977. if (ioa_cfg->sis64) {
  4978. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4979. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4980. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4981. /* clear stage change */
  4982. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4983. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4984. list_del(&ioa_cfg->reset_cmd->queue);
  4985. del_timer(&ioa_cfg->reset_cmd->timer);
  4986. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4987. return IRQ_HANDLED;
  4988. }
  4989. }
  4990. return IRQ_NONE;
  4991. }
  4992. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4993. /* Mask the interrupt */
  4994. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4995. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4996. list_del(&ioa_cfg->reset_cmd->queue);
  4997. del_timer(&ioa_cfg->reset_cmd->timer);
  4998. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4999. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  5000. if (ioa_cfg->clear_isr) {
  5001. if (ipr_debug && printk_ratelimit())
  5002. dev_err(&ioa_cfg->pdev->dev,
  5003. "Spurious interrupt detected. 0x%08X\n", int_reg);
  5004. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  5005. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  5006. return IRQ_NONE;
  5007. }
  5008. } else {
  5009. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  5010. ioa_cfg->ioa_unit_checked = 1;
  5011. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  5012. dev_err(&ioa_cfg->pdev->dev,
  5013. "No Host RRQ. 0x%08X\n", int_reg);
  5014. else
  5015. dev_err(&ioa_cfg->pdev->dev,
  5016. "Permanent IOA failure. 0x%08X\n", int_reg);
  5017. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  5018. ioa_cfg->sdt_state = GET_DUMP;
  5019. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  5020. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  5021. }
  5022. return rc;
  5023. }
  5024. /**
  5025. * ipr_isr_eh - Interrupt service routine error handler
  5026. * @ioa_cfg: ioa config struct
  5027. * @msg: message to log
  5028. *
  5029. * Return value:
  5030. * none
  5031. **/
  5032. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  5033. {
  5034. ioa_cfg->errors_logged++;
  5035. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  5036. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  5037. ioa_cfg->sdt_state = GET_DUMP;
  5038. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  5039. }
  5040. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  5041. struct list_head *doneq)
  5042. {
  5043. u32 ioasc;
  5044. u16 cmd_index;
  5045. struct ipr_cmnd *ipr_cmd;
  5046. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  5047. int num_hrrq = 0;
  5048. /* If interrupts are disabled, ignore the interrupt */
  5049. if (!hrr_queue->allow_interrupts)
  5050. return 0;
  5051. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5052. hrr_queue->toggle_bit) {
  5053. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  5054. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  5055. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  5056. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  5057. cmd_index < hrr_queue->min_cmd_id)) {
  5058. ipr_isr_eh(ioa_cfg,
  5059. "Invalid response handle from IOA: ",
  5060. cmd_index);
  5061. break;
  5062. }
  5063. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  5064. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5065. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  5066. list_move_tail(&ipr_cmd->queue, doneq);
  5067. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  5068. hrr_queue->hrrq_curr++;
  5069. } else {
  5070. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  5071. hrr_queue->toggle_bit ^= 1u;
  5072. }
  5073. num_hrrq++;
  5074. if (budget > 0 && num_hrrq >= budget)
  5075. break;
  5076. }
  5077. return num_hrrq;
  5078. }
  5079. static int ipr_iopoll(struct irq_poll *iop, int budget)
  5080. {
  5081. struct ipr_ioa_cfg *ioa_cfg;
  5082. struct ipr_hrr_queue *hrrq;
  5083. struct ipr_cmnd *ipr_cmd, *temp;
  5084. unsigned long hrrq_flags;
  5085. int completed_ops;
  5086. LIST_HEAD(doneq);
  5087. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  5088. ioa_cfg = hrrq->ioa_cfg;
  5089. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5090. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  5091. if (completed_ops < budget)
  5092. irq_poll_complete(iop);
  5093. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5094. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5095. list_del(&ipr_cmd->queue);
  5096. del_timer(&ipr_cmd->timer);
  5097. ipr_cmd->fast_done(ipr_cmd);
  5098. }
  5099. return completed_ops;
  5100. }
  5101. /**
  5102. * ipr_isr - Interrupt service routine
  5103. * @irq: irq number
  5104. * @devp: pointer to ioa config struct
  5105. *
  5106. * Return value:
  5107. * IRQ_NONE / IRQ_HANDLED
  5108. **/
  5109. static irqreturn_t ipr_isr(int irq, void *devp)
  5110. {
  5111. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  5112. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  5113. unsigned long hrrq_flags = 0;
  5114. u32 int_reg = 0;
  5115. int num_hrrq = 0;
  5116. int irq_none = 0;
  5117. struct ipr_cmnd *ipr_cmd, *temp;
  5118. irqreturn_t rc = IRQ_NONE;
  5119. LIST_HEAD(doneq);
  5120. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5121. /* If interrupts are disabled, ignore the interrupt */
  5122. if (!hrrq->allow_interrupts) {
  5123. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5124. return IRQ_NONE;
  5125. }
  5126. while (1) {
  5127. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  5128. rc = IRQ_HANDLED;
  5129. if (!ioa_cfg->clear_isr)
  5130. break;
  5131. /* Clear the PCI interrupt */
  5132. num_hrrq = 0;
  5133. do {
  5134. writel(IPR_PCII_HRRQ_UPDATED,
  5135. ioa_cfg->regs.clr_interrupt_reg32);
  5136. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  5137. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  5138. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  5139. } else if (rc == IRQ_NONE && irq_none == 0) {
  5140. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  5141. irq_none++;
  5142. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  5143. int_reg & IPR_PCII_HRRQ_UPDATED) {
  5144. ipr_isr_eh(ioa_cfg,
  5145. "Error clearing HRRQ: ", num_hrrq);
  5146. rc = IRQ_HANDLED;
  5147. break;
  5148. } else
  5149. break;
  5150. }
  5151. if (unlikely(rc == IRQ_NONE))
  5152. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  5153. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5154. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5155. list_del(&ipr_cmd->queue);
  5156. del_timer(&ipr_cmd->timer);
  5157. ipr_cmd->fast_done(ipr_cmd);
  5158. }
  5159. return rc;
  5160. }
  5161. /**
  5162. * ipr_isr_mhrrq - Interrupt service routine
  5163. * @irq: irq number
  5164. * @devp: pointer to ioa config struct
  5165. *
  5166. * Return value:
  5167. * IRQ_NONE / IRQ_HANDLED
  5168. **/
  5169. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  5170. {
  5171. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  5172. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  5173. unsigned long hrrq_flags = 0;
  5174. struct ipr_cmnd *ipr_cmd, *temp;
  5175. irqreturn_t rc = IRQ_NONE;
  5176. LIST_HEAD(doneq);
  5177. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5178. /* If interrupts are disabled, ignore the interrupt */
  5179. if (!hrrq->allow_interrupts) {
  5180. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5181. return IRQ_NONE;
  5182. }
  5183. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  5184. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5185. hrrq->toggle_bit) {
  5186. irq_poll_sched(&hrrq->iopoll);
  5187. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5188. return IRQ_HANDLED;
  5189. }
  5190. } else {
  5191. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  5192. hrrq->toggle_bit)
  5193. if (ipr_process_hrrq(hrrq, -1, &doneq))
  5194. rc = IRQ_HANDLED;
  5195. }
  5196. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5197. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  5198. list_del(&ipr_cmd->queue);
  5199. del_timer(&ipr_cmd->timer);
  5200. ipr_cmd->fast_done(ipr_cmd);
  5201. }
  5202. return rc;
  5203. }
  5204. /**
  5205. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  5206. * @ioa_cfg: ioa config struct
  5207. * @ipr_cmd: ipr command struct
  5208. *
  5209. * Return value:
  5210. * 0 on success / -1 on failure
  5211. **/
  5212. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  5213. struct ipr_cmnd *ipr_cmd)
  5214. {
  5215. int i, nseg;
  5216. struct scatterlist *sg;
  5217. u32 length;
  5218. u32 ioadl_flags = 0;
  5219. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5220. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5221. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  5222. length = scsi_bufflen(scsi_cmd);
  5223. if (!length)
  5224. return 0;
  5225. nseg = scsi_dma_map(scsi_cmd);
  5226. if (nseg < 0) {
  5227. if (printk_ratelimit())
  5228. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5229. return -1;
  5230. }
  5231. ipr_cmd->dma_use_sg = nseg;
  5232. ioarcb->data_transfer_length = cpu_to_be32(length);
  5233. ioarcb->ioadl_len =
  5234. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5235. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5236. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5237. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5238. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  5239. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5240. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5241. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  5242. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  5243. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  5244. }
  5245. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5246. return 0;
  5247. }
  5248. /**
  5249. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  5250. * @ioa_cfg: ioa config struct
  5251. * @ipr_cmd: ipr command struct
  5252. *
  5253. * Return value:
  5254. * 0 on success / -1 on failure
  5255. **/
  5256. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  5257. struct ipr_cmnd *ipr_cmd)
  5258. {
  5259. int i, nseg;
  5260. struct scatterlist *sg;
  5261. u32 length;
  5262. u32 ioadl_flags = 0;
  5263. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5264. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5265. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5266. length = scsi_bufflen(scsi_cmd);
  5267. if (!length)
  5268. return 0;
  5269. nseg = scsi_dma_map(scsi_cmd);
  5270. if (nseg < 0) {
  5271. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  5272. return -1;
  5273. }
  5274. ipr_cmd->dma_use_sg = nseg;
  5275. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  5276. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5277. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5278. ioarcb->data_transfer_length = cpu_to_be32(length);
  5279. ioarcb->ioadl_len =
  5280. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5281. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  5282. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5283. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  5284. ioarcb->read_ioadl_len =
  5285. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5286. }
  5287. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  5288. ioadl = ioarcb->u.add_data.u.ioadl;
  5289. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  5290. offsetof(struct ipr_ioarcb, u.add_data));
  5291. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5292. }
  5293. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5294. ioadl[i].flags_and_data_len =
  5295. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5296. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  5297. }
  5298. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5299. return 0;
  5300. }
  5301. /**
  5302. * __ipr_erp_done - Process completion of ERP for a device
  5303. * @ipr_cmd: ipr command struct
  5304. *
  5305. * This function copies the sense buffer into the scsi_cmd
  5306. * struct and pushes the scsi_done function.
  5307. *
  5308. * Return value:
  5309. * nothing
  5310. **/
  5311. static void __ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5312. {
  5313. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5314. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5315. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5316. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5317. scsi_cmd->result |= (DID_ERROR << 16);
  5318. scmd_printk(KERN_ERR, scsi_cmd,
  5319. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  5320. } else {
  5321. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  5322. SCSI_SENSE_BUFFERSIZE);
  5323. }
  5324. if (res) {
  5325. if (!ipr_is_naca_model(res))
  5326. res->needs_sync_complete = 1;
  5327. res->in_erp = 0;
  5328. }
  5329. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5330. scsi_cmd->scsi_done(scsi_cmd);
  5331. if (ipr_cmd->eh_comp)
  5332. complete(ipr_cmd->eh_comp);
  5333. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5334. }
  5335. /**
  5336. * ipr_erp_done - Process completion of ERP for a device
  5337. * @ipr_cmd: ipr command struct
  5338. *
  5339. * This function copies the sense buffer into the scsi_cmd
  5340. * struct and pushes the scsi_done function.
  5341. *
  5342. * Return value:
  5343. * nothing
  5344. **/
  5345. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5346. {
  5347. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  5348. unsigned long hrrq_flags;
  5349. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  5350. __ipr_erp_done(ipr_cmd);
  5351. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  5352. }
  5353. /**
  5354. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  5355. * @ipr_cmd: ipr command struct
  5356. *
  5357. * Return value:
  5358. * none
  5359. **/
  5360. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  5361. {
  5362. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5363. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5364. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5365. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  5366. ioarcb->data_transfer_length = 0;
  5367. ioarcb->read_data_transfer_length = 0;
  5368. ioarcb->ioadl_len = 0;
  5369. ioarcb->read_ioadl_len = 0;
  5370. ioasa->hdr.ioasc = 0;
  5371. ioasa->hdr.residual_data_len = 0;
  5372. if (ipr_cmd->ioa_cfg->sis64)
  5373. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5374. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  5375. else {
  5376. ioarcb->write_ioadl_addr =
  5377. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  5378. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5379. }
  5380. }
  5381. /**
  5382. * __ipr_erp_request_sense - Send request sense to a device
  5383. * @ipr_cmd: ipr command struct
  5384. *
  5385. * This function sends a request sense to a device as a result
  5386. * of a check condition.
  5387. *
  5388. * Return value:
  5389. * nothing
  5390. **/
  5391. static void __ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5392. {
  5393. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5394. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5395. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5396. __ipr_erp_done(ipr_cmd);
  5397. return;
  5398. }
  5399. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5400. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5401. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5402. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5403. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5404. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5405. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5406. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5407. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5408. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5409. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5410. }
  5411. /**
  5412. * ipr_erp_request_sense - Send request sense to a device
  5413. * @ipr_cmd: ipr command struct
  5414. *
  5415. * This function sends a request sense to a device as a result
  5416. * of a check condition.
  5417. *
  5418. * Return value:
  5419. * nothing
  5420. **/
  5421. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5422. {
  5423. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  5424. unsigned long hrrq_flags;
  5425. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  5426. __ipr_erp_request_sense(ipr_cmd);
  5427. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  5428. }
  5429. /**
  5430. * ipr_erp_cancel_all - Send cancel all to a device
  5431. * @ipr_cmd: ipr command struct
  5432. *
  5433. * This function sends a cancel all to a device to clear the
  5434. * queue. If we are running TCQ on the device, QERR is set to 1,
  5435. * which means all outstanding ops have been dropped on the floor.
  5436. * Cancel all will return them to us.
  5437. *
  5438. * Return value:
  5439. * nothing
  5440. **/
  5441. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5442. {
  5443. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5444. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5445. struct ipr_cmd_pkt *cmd_pkt;
  5446. res->in_erp = 1;
  5447. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5448. if (!scsi_cmd->device->simple_tags) {
  5449. __ipr_erp_request_sense(ipr_cmd);
  5450. return;
  5451. }
  5452. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5453. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5454. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5455. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5456. IPR_CANCEL_ALL_TIMEOUT);
  5457. }
  5458. /**
  5459. * ipr_dump_ioasa - Dump contents of IOASA
  5460. * @ioa_cfg: ioa config struct
  5461. * @ipr_cmd: ipr command struct
  5462. * @res: resource entry struct
  5463. *
  5464. * This function is invoked by the interrupt handler when ops
  5465. * fail. It will log the IOASA if appropriate. Only called
  5466. * for GPDD ops.
  5467. *
  5468. * Return value:
  5469. * none
  5470. **/
  5471. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5472. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5473. {
  5474. int i;
  5475. u16 data_len;
  5476. u32 ioasc, fd_ioasc;
  5477. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5478. __be32 *ioasa_data = (__be32 *)ioasa;
  5479. int error_index;
  5480. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5481. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5482. if (0 == ioasc)
  5483. return;
  5484. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5485. return;
  5486. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5487. error_index = ipr_get_error(fd_ioasc);
  5488. else
  5489. error_index = ipr_get_error(ioasc);
  5490. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5491. /* Don't log an error if the IOA already logged one */
  5492. if (ioasa->hdr.ilid != 0)
  5493. return;
  5494. if (!ipr_is_gscsi(res))
  5495. return;
  5496. if (ipr_error_table[error_index].log_ioasa == 0)
  5497. return;
  5498. }
  5499. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5500. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5501. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5502. data_len = sizeof(struct ipr_ioasa64);
  5503. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5504. data_len = sizeof(struct ipr_ioasa);
  5505. ipr_err("IOASA Dump:\n");
  5506. for (i = 0; i < data_len / 4; i += 4) {
  5507. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5508. be32_to_cpu(ioasa_data[i]),
  5509. be32_to_cpu(ioasa_data[i+1]),
  5510. be32_to_cpu(ioasa_data[i+2]),
  5511. be32_to_cpu(ioasa_data[i+3]));
  5512. }
  5513. }
  5514. /**
  5515. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5516. * @ioasa: IOASA
  5517. * @sense_buf: sense data buffer
  5518. *
  5519. * Return value:
  5520. * none
  5521. **/
  5522. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5523. {
  5524. u32 failing_lba;
  5525. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5526. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5527. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5528. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5529. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5530. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5531. return;
  5532. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5533. if (ipr_is_vset_device(res) &&
  5534. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5535. ioasa->u.vset.failing_lba_hi != 0) {
  5536. sense_buf[0] = 0x72;
  5537. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5538. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5539. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5540. sense_buf[7] = 12;
  5541. sense_buf[8] = 0;
  5542. sense_buf[9] = 0x0A;
  5543. sense_buf[10] = 0x80;
  5544. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5545. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5546. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5547. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5548. sense_buf[15] = failing_lba & 0x000000ff;
  5549. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5550. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5551. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5552. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5553. sense_buf[19] = failing_lba & 0x000000ff;
  5554. } else {
  5555. sense_buf[0] = 0x70;
  5556. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5557. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5558. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5559. /* Illegal request */
  5560. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5561. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5562. sense_buf[7] = 10; /* additional length */
  5563. /* IOARCB was in error */
  5564. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5565. sense_buf[15] = 0xC0;
  5566. else /* Parameter data was invalid */
  5567. sense_buf[15] = 0x80;
  5568. sense_buf[16] =
  5569. ((IPR_FIELD_POINTER_MASK &
  5570. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5571. sense_buf[17] =
  5572. (IPR_FIELD_POINTER_MASK &
  5573. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5574. } else {
  5575. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5576. if (ipr_is_vset_device(res))
  5577. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5578. else
  5579. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5580. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5581. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5582. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5583. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5584. sense_buf[6] = failing_lba & 0x000000ff;
  5585. }
  5586. sense_buf[7] = 6; /* additional length */
  5587. }
  5588. }
  5589. }
  5590. /**
  5591. * ipr_get_autosense - Copy autosense data to sense buffer
  5592. * @ipr_cmd: ipr command struct
  5593. *
  5594. * This function copies the autosense buffer to the buffer
  5595. * in the scsi_cmd, if there is autosense available.
  5596. *
  5597. * Return value:
  5598. * 1 if autosense was available / 0 if not
  5599. **/
  5600. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5601. {
  5602. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5603. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5604. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5605. return 0;
  5606. if (ipr_cmd->ioa_cfg->sis64)
  5607. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5608. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5609. SCSI_SENSE_BUFFERSIZE));
  5610. else
  5611. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5612. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5613. SCSI_SENSE_BUFFERSIZE));
  5614. return 1;
  5615. }
  5616. /**
  5617. * ipr_erp_start - Process an error response for a SCSI op
  5618. * @ioa_cfg: ioa config struct
  5619. * @ipr_cmd: ipr command struct
  5620. *
  5621. * This function determines whether or not to initiate ERP
  5622. * on the affected device.
  5623. *
  5624. * Return value:
  5625. * nothing
  5626. **/
  5627. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5628. struct ipr_cmnd *ipr_cmd)
  5629. {
  5630. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5631. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5632. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5633. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5634. if (!res) {
  5635. __ipr_scsi_eh_done(ipr_cmd);
  5636. return;
  5637. }
  5638. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5639. ipr_gen_sense(ipr_cmd);
  5640. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5641. switch (masked_ioasc) {
  5642. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5643. if (ipr_is_naca_model(res))
  5644. scsi_cmd->result |= (DID_ABORT << 16);
  5645. else
  5646. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5647. break;
  5648. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5649. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5650. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5651. break;
  5652. case IPR_IOASC_HW_SEL_TIMEOUT:
  5653. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5654. if (!ipr_is_naca_model(res))
  5655. res->needs_sync_complete = 1;
  5656. break;
  5657. case IPR_IOASC_SYNC_REQUIRED:
  5658. if (!res->in_erp)
  5659. res->needs_sync_complete = 1;
  5660. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5661. break;
  5662. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5663. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5664. /*
  5665. * exception: do not set DID_PASSTHROUGH on CHECK CONDITION
  5666. * so SCSI mid-layer and upper layers handle it accordingly.
  5667. */
  5668. if (scsi_cmd->result != SAM_STAT_CHECK_CONDITION)
  5669. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5670. break;
  5671. case IPR_IOASC_BUS_WAS_RESET:
  5672. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5673. /*
  5674. * Report the bus reset and ask for a retry. The device
  5675. * will give CC/UA the next command.
  5676. */
  5677. if (!res->resetting_device)
  5678. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5679. scsi_cmd->result |= (DID_ERROR << 16);
  5680. if (!ipr_is_naca_model(res))
  5681. res->needs_sync_complete = 1;
  5682. break;
  5683. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5684. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5685. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5686. if (!ipr_get_autosense(ipr_cmd)) {
  5687. if (!ipr_is_naca_model(res)) {
  5688. ipr_erp_cancel_all(ipr_cmd);
  5689. return;
  5690. }
  5691. }
  5692. }
  5693. if (!ipr_is_naca_model(res))
  5694. res->needs_sync_complete = 1;
  5695. break;
  5696. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5697. break;
  5698. case IPR_IOASC_IR_NON_OPTIMIZED:
  5699. if (res->raw_mode) {
  5700. res->raw_mode = 0;
  5701. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5702. } else
  5703. scsi_cmd->result |= (DID_ERROR << 16);
  5704. break;
  5705. default:
  5706. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5707. scsi_cmd->result |= (DID_ERROR << 16);
  5708. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5709. res->needs_sync_complete = 1;
  5710. break;
  5711. }
  5712. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5713. scsi_cmd->scsi_done(scsi_cmd);
  5714. if (ipr_cmd->eh_comp)
  5715. complete(ipr_cmd->eh_comp);
  5716. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5717. }
  5718. /**
  5719. * ipr_scsi_done - mid-layer done function
  5720. * @ipr_cmd: ipr command struct
  5721. *
  5722. * This function is invoked by the interrupt handler for
  5723. * ops generated by the SCSI mid-layer
  5724. *
  5725. * Return value:
  5726. * none
  5727. **/
  5728. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5729. {
  5730. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5731. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5732. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5733. unsigned long lock_flags;
  5734. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5735. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5736. scsi_dma_unmap(scsi_cmd);
  5737. spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
  5738. scsi_cmd->scsi_done(scsi_cmd);
  5739. if (ipr_cmd->eh_comp)
  5740. complete(ipr_cmd->eh_comp);
  5741. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5742. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
  5743. } else {
  5744. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5745. spin_lock(&ipr_cmd->hrrq->_lock);
  5746. ipr_erp_start(ioa_cfg, ipr_cmd);
  5747. spin_unlock(&ipr_cmd->hrrq->_lock);
  5748. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5749. }
  5750. }
  5751. /**
  5752. * ipr_queuecommand - Queue a mid-layer request
  5753. * @shost: scsi host struct
  5754. * @scsi_cmd: scsi command struct
  5755. *
  5756. * This function queues a request generated by the mid-layer.
  5757. *
  5758. * Return value:
  5759. * 0 on success
  5760. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5761. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5762. **/
  5763. static int ipr_queuecommand(struct Scsi_Host *shost,
  5764. struct scsi_cmnd *scsi_cmd)
  5765. {
  5766. struct ipr_ioa_cfg *ioa_cfg;
  5767. struct ipr_resource_entry *res;
  5768. struct ipr_ioarcb *ioarcb;
  5769. struct ipr_cmnd *ipr_cmd;
  5770. unsigned long hrrq_flags, lock_flags;
  5771. int rc;
  5772. struct ipr_hrr_queue *hrrq;
  5773. int hrrq_id;
  5774. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5775. scsi_cmd->result = (DID_OK << 16);
  5776. res = scsi_cmd->device->hostdata;
  5777. if (ipr_is_gata(res) && res->sata_port) {
  5778. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5779. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5780. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5781. return rc;
  5782. }
  5783. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5784. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5785. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5786. /*
  5787. * We are currently blocking all devices due to a host reset
  5788. * We have told the host to stop giving us new requests, but
  5789. * ERP ops don't count. FIXME
  5790. */
  5791. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5792. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5793. return SCSI_MLQUEUE_HOST_BUSY;
  5794. }
  5795. /*
  5796. * FIXME - Create scsi_set_host_offline interface
  5797. * and the ioa_is_dead check can be removed
  5798. */
  5799. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5800. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5801. goto err_nodev;
  5802. }
  5803. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5804. if (ipr_cmd == NULL) {
  5805. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5806. return SCSI_MLQUEUE_HOST_BUSY;
  5807. }
  5808. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5809. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5810. ioarcb = &ipr_cmd->ioarcb;
  5811. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5812. ipr_cmd->scsi_cmd = scsi_cmd;
  5813. ipr_cmd->done = ipr_scsi_eh_done;
  5814. if (ipr_is_gscsi(res)) {
  5815. if (scsi_cmd->underflow == 0)
  5816. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5817. if (res->reset_occurred) {
  5818. res->reset_occurred = 0;
  5819. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5820. }
  5821. }
  5822. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5823. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5824. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5825. if (scsi_cmd->flags & SCMD_TAGGED)
  5826. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_SIMPLE_TASK;
  5827. else
  5828. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_UNTAGGED_TASK;
  5829. }
  5830. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5831. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5832. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5833. }
  5834. if (res->raw_mode && ipr_is_af_dasd_device(res)) {
  5835. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_PIPE;
  5836. if (scsi_cmd->underflow == 0)
  5837. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5838. }
  5839. if (ioa_cfg->sis64)
  5840. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5841. else
  5842. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5843. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5844. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5845. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5846. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5847. if (!rc)
  5848. scsi_dma_unmap(scsi_cmd);
  5849. return SCSI_MLQUEUE_HOST_BUSY;
  5850. }
  5851. if (unlikely(hrrq->ioa_is_dead)) {
  5852. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5853. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5854. scsi_dma_unmap(scsi_cmd);
  5855. goto err_nodev;
  5856. }
  5857. ioarcb->res_handle = res->res_handle;
  5858. if (res->needs_sync_complete) {
  5859. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5860. res->needs_sync_complete = 0;
  5861. }
  5862. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5863. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5864. ipr_send_command(ipr_cmd);
  5865. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5866. return 0;
  5867. err_nodev:
  5868. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5869. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5870. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5871. scsi_cmd->scsi_done(scsi_cmd);
  5872. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5873. return 0;
  5874. }
  5875. /**
  5876. * ipr_ioctl - IOCTL handler
  5877. * @sdev: scsi device struct
  5878. * @cmd: IOCTL cmd
  5879. * @arg: IOCTL arg
  5880. *
  5881. * Return value:
  5882. * 0 on success / other on failure
  5883. **/
  5884. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5885. {
  5886. struct ipr_resource_entry *res;
  5887. res = (struct ipr_resource_entry *)sdev->hostdata;
  5888. if (res && ipr_is_gata(res)) {
  5889. if (cmd == HDIO_GET_IDENTITY)
  5890. return -ENOTTY;
  5891. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5892. }
  5893. return -EINVAL;
  5894. }
  5895. /**
  5896. * ipr_info - Get information about the card/driver
  5897. * @scsi_host: scsi host struct
  5898. *
  5899. * Return value:
  5900. * pointer to buffer with description string
  5901. **/
  5902. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5903. {
  5904. static char buffer[512];
  5905. struct ipr_ioa_cfg *ioa_cfg;
  5906. unsigned long lock_flags = 0;
  5907. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5908. spin_lock_irqsave(host->host_lock, lock_flags);
  5909. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5910. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5911. return buffer;
  5912. }
  5913. static struct scsi_host_template driver_template = {
  5914. .module = THIS_MODULE,
  5915. .name = "IPR",
  5916. .info = ipr_ioa_info,
  5917. .ioctl = ipr_ioctl,
  5918. .queuecommand = ipr_queuecommand,
  5919. .eh_abort_handler = ipr_eh_abort,
  5920. .eh_device_reset_handler = ipr_eh_dev_reset,
  5921. .eh_host_reset_handler = ipr_eh_host_reset,
  5922. .slave_alloc = ipr_slave_alloc,
  5923. .slave_configure = ipr_slave_configure,
  5924. .slave_destroy = ipr_slave_destroy,
  5925. .scan_finished = ipr_scan_finished,
  5926. .target_alloc = ipr_target_alloc,
  5927. .target_destroy = ipr_target_destroy,
  5928. .change_queue_depth = ipr_change_queue_depth,
  5929. .bios_param = ipr_biosparam,
  5930. .can_queue = IPR_MAX_COMMANDS,
  5931. .this_id = -1,
  5932. .sg_tablesize = IPR_MAX_SGLIST,
  5933. .max_sectors = IPR_IOA_MAX_SECTORS,
  5934. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5935. .use_clustering = ENABLE_CLUSTERING,
  5936. .shost_attrs = ipr_ioa_attrs,
  5937. .sdev_attrs = ipr_dev_attrs,
  5938. .proc_name = IPR_NAME,
  5939. };
  5940. /**
  5941. * ipr_ata_phy_reset - libata phy_reset handler
  5942. * @ap: ata port to reset
  5943. *
  5944. **/
  5945. static void ipr_ata_phy_reset(struct ata_port *ap)
  5946. {
  5947. unsigned long flags;
  5948. struct ipr_sata_port *sata_port = ap->private_data;
  5949. struct ipr_resource_entry *res = sata_port->res;
  5950. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5951. int rc;
  5952. ENTER;
  5953. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5954. while (ioa_cfg->in_reset_reload) {
  5955. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5956. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5957. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5958. }
  5959. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5960. goto out_unlock;
  5961. rc = ipr_device_reset(ioa_cfg, res);
  5962. if (rc) {
  5963. ap->link.device[0].class = ATA_DEV_NONE;
  5964. goto out_unlock;
  5965. }
  5966. ap->link.device[0].class = res->ata_class;
  5967. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5968. ap->link.device[0].class = ATA_DEV_NONE;
  5969. out_unlock:
  5970. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5971. LEAVE;
  5972. }
  5973. /**
  5974. * ipr_ata_post_internal - Cleanup after an internal command
  5975. * @qc: ATA queued command
  5976. *
  5977. * Return value:
  5978. * none
  5979. **/
  5980. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5981. {
  5982. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5983. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5984. struct ipr_cmnd *ipr_cmd;
  5985. struct ipr_hrr_queue *hrrq;
  5986. unsigned long flags;
  5987. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5988. while (ioa_cfg->in_reset_reload) {
  5989. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5990. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5991. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5992. }
  5993. for_each_hrrq(hrrq, ioa_cfg) {
  5994. spin_lock(&hrrq->_lock);
  5995. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5996. if (ipr_cmd->qc == qc) {
  5997. ipr_device_reset(ioa_cfg, sata_port->res);
  5998. break;
  5999. }
  6000. }
  6001. spin_unlock(&hrrq->_lock);
  6002. }
  6003. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  6004. }
  6005. /**
  6006. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  6007. * @regs: destination
  6008. * @tf: source ATA taskfile
  6009. *
  6010. * Return value:
  6011. * none
  6012. **/
  6013. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  6014. struct ata_taskfile *tf)
  6015. {
  6016. regs->feature = tf->feature;
  6017. regs->nsect = tf->nsect;
  6018. regs->lbal = tf->lbal;
  6019. regs->lbam = tf->lbam;
  6020. regs->lbah = tf->lbah;
  6021. regs->device = tf->device;
  6022. regs->command = tf->command;
  6023. regs->hob_feature = tf->hob_feature;
  6024. regs->hob_nsect = tf->hob_nsect;
  6025. regs->hob_lbal = tf->hob_lbal;
  6026. regs->hob_lbam = tf->hob_lbam;
  6027. regs->hob_lbah = tf->hob_lbah;
  6028. regs->ctl = tf->ctl;
  6029. }
  6030. /**
  6031. * ipr_sata_done - done function for SATA commands
  6032. * @ipr_cmd: ipr command struct
  6033. *
  6034. * This function is invoked by the interrupt handler for
  6035. * ops generated by the SCSI mid-layer to SATA devices
  6036. *
  6037. * Return value:
  6038. * none
  6039. **/
  6040. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  6041. {
  6042. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6043. struct ata_queued_cmd *qc = ipr_cmd->qc;
  6044. struct ipr_sata_port *sata_port = qc->ap->private_data;
  6045. struct ipr_resource_entry *res = sata_port->res;
  6046. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6047. spin_lock(&ipr_cmd->hrrq->_lock);
  6048. if (ipr_cmd->ioa_cfg->sis64)
  6049. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  6050. sizeof(struct ipr_ioasa_gata));
  6051. else
  6052. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  6053. sizeof(struct ipr_ioasa_gata));
  6054. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  6055. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  6056. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  6057. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  6058. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  6059. else
  6060. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  6061. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6062. spin_unlock(&ipr_cmd->hrrq->_lock);
  6063. ata_qc_complete(qc);
  6064. }
  6065. /**
  6066. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  6067. * @ipr_cmd: ipr command struct
  6068. * @qc: ATA queued command
  6069. *
  6070. **/
  6071. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  6072. struct ata_queued_cmd *qc)
  6073. {
  6074. u32 ioadl_flags = 0;
  6075. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6076. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ata_ioadl.ioadl64;
  6077. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  6078. int len = qc->nbytes;
  6079. struct scatterlist *sg;
  6080. unsigned int si;
  6081. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  6082. if (len == 0)
  6083. return;
  6084. if (qc->dma_dir == DMA_TO_DEVICE) {
  6085. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  6086. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6087. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  6088. ioadl_flags = IPR_IOADL_FLAGS_READ;
  6089. ioarcb->data_transfer_length = cpu_to_be32(len);
  6090. ioarcb->ioadl_len =
  6091. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  6092. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  6093. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl.ioadl64));
  6094. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  6095. ioadl64->flags = cpu_to_be32(ioadl_flags);
  6096. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  6097. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  6098. last_ioadl64 = ioadl64;
  6099. ioadl64++;
  6100. }
  6101. if (likely(last_ioadl64))
  6102. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  6103. }
  6104. /**
  6105. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  6106. * @ipr_cmd: ipr command struct
  6107. * @qc: ATA queued command
  6108. *
  6109. **/
  6110. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  6111. struct ata_queued_cmd *qc)
  6112. {
  6113. u32 ioadl_flags = 0;
  6114. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6115. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  6116. struct ipr_ioadl_desc *last_ioadl = NULL;
  6117. int len = qc->nbytes;
  6118. struct scatterlist *sg;
  6119. unsigned int si;
  6120. if (len == 0)
  6121. return;
  6122. if (qc->dma_dir == DMA_TO_DEVICE) {
  6123. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  6124. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6125. ioarcb->data_transfer_length = cpu_to_be32(len);
  6126. ioarcb->ioadl_len =
  6127. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  6128. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  6129. ioadl_flags = IPR_IOADL_FLAGS_READ;
  6130. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  6131. ioarcb->read_ioadl_len =
  6132. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  6133. }
  6134. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  6135. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  6136. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  6137. last_ioadl = ioadl;
  6138. ioadl++;
  6139. }
  6140. if (likely(last_ioadl))
  6141. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  6142. }
  6143. /**
  6144. * ipr_qc_defer - Get a free ipr_cmd
  6145. * @qc: queued command
  6146. *
  6147. * Return value:
  6148. * 0 if success
  6149. **/
  6150. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  6151. {
  6152. struct ata_port *ap = qc->ap;
  6153. struct ipr_sata_port *sata_port = ap->private_data;
  6154. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  6155. struct ipr_cmnd *ipr_cmd;
  6156. struct ipr_hrr_queue *hrrq;
  6157. int hrrq_id;
  6158. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  6159. hrrq = &ioa_cfg->hrrq[hrrq_id];
  6160. qc->lldd_task = NULL;
  6161. spin_lock(&hrrq->_lock);
  6162. if (unlikely(hrrq->ioa_is_dead)) {
  6163. spin_unlock(&hrrq->_lock);
  6164. return 0;
  6165. }
  6166. if (unlikely(!hrrq->allow_cmds)) {
  6167. spin_unlock(&hrrq->_lock);
  6168. return ATA_DEFER_LINK;
  6169. }
  6170. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  6171. if (ipr_cmd == NULL) {
  6172. spin_unlock(&hrrq->_lock);
  6173. return ATA_DEFER_LINK;
  6174. }
  6175. qc->lldd_task = ipr_cmd;
  6176. spin_unlock(&hrrq->_lock);
  6177. return 0;
  6178. }
  6179. /**
  6180. * ipr_qc_issue - Issue a SATA qc to a device
  6181. * @qc: queued command
  6182. *
  6183. * Return value:
  6184. * 0 if success
  6185. **/
  6186. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  6187. {
  6188. struct ata_port *ap = qc->ap;
  6189. struct ipr_sata_port *sata_port = ap->private_data;
  6190. struct ipr_resource_entry *res = sata_port->res;
  6191. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  6192. struct ipr_cmnd *ipr_cmd;
  6193. struct ipr_ioarcb *ioarcb;
  6194. struct ipr_ioarcb_ata_regs *regs;
  6195. if (qc->lldd_task == NULL)
  6196. ipr_qc_defer(qc);
  6197. ipr_cmd = qc->lldd_task;
  6198. if (ipr_cmd == NULL)
  6199. return AC_ERR_SYSTEM;
  6200. qc->lldd_task = NULL;
  6201. spin_lock(&ipr_cmd->hrrq->_lock);
  6202. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  6203. ipr_cmd->hrrq->ioa_is_dead)) {
  6204. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6205. spin_unlock(&ipr_cmd->hrrq->_lock);
  6206. return AC_ERR_SYSTEM;
  6207. }
  6208. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  6209. ioarcb = &ipr_cmd->ioarcb;
  6210. if (ioa_cfg->sis64) {
  6211. regs = &ipr_cmd->i.ata_ioadl.regs;
  6212. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  6213. } else
  6214. regs = &ioarcb->u.add_data.u.regs;
  6215. memset(regs, 0, sizeof(*regs));
  6216. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  6217. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6218. ipr_cmd->qc = qc;
  6219. ipr_cmd->done = ipr_sata_done;
  6220. ipr_cmd->ioarcb.res_handle = res->res_handle;
  6221. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  6222. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  6223. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  6224. ipr_cmd->dma_use_sg = qc->n_elem;
  6225. if (ioa_cfg->sis64)
  6226. ipr_build_ata_ioadl64(ipr_cmd, qc);
  6227. else
  6228. ipr_build_ata_ioadl(ipr_cmd, qc);
  6229. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  6230. ipr_copy_sata_tf(regs, &qc->tf);
  6231. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  6232. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  6233. switch (qc->tf.protocol) {
  6234. case ATA_PROT_NODATA:
  6235. case ATA_PROT_PIO:
  6236. break;
  6237. case ATA_PROT_DMA:
  6238. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6239. break;
  6240. case ATAPI_PROT_PIO:
  6241. case ATAPI_PROT_NODATA:
  6242. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6243. break;
  6244. case ATAPI_PROT_DMA:
  6245. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  6246. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  6247. break;
  6248. default:
  6249. WARN_ON(1);
  6250. spin_unlock(&ipr_cmd->hrrq->_lock);
  6251. return AC_ERR_INVALID;
  6252. }
  6253. ipr_send_command(ipr_cmd);
  6254. spin_unlock(&ipr_cmd->hrrq->_lock);
  6255. return 0;
  6256. }
  6257. /**
  6258. * ipr_qc_fill_rtf - Read result TF
  6259. * @qc: ATA queued command
  6260. *
  6261. * Return value:
  6262. * true
  6263. **/
  6264. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  6265. {
  6266. struct ipr_sata_port *sata_port = qc->ap->private_data;
  6267. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  6268. struct ata_taskfile *tf = &qc->result_tf;
  6269. tf->feature = g->error;
  6270. tf->nsect = g->nsect;
  6271. tf->lbal = g->lbal;
  6272. tf->lbam = g->lbam;
  6273. tf->lbah = g->lbah;
  6274. tf->device = g->device;
  6275. tf->command = g->status;
  6276. tf->hob_nsect = g->hob_nsect;
  6277. tf->hob_lbal = g->hob_lbal;
  6278. tf->hob_lbam = g->hob_lbam;
  6279. tf->hob_lbah = g->hob_lbah;
  6280. return true;
  6281. }
  6282. static struct ata_port_operations ipr_sata_ops = {
  6283. .phy_reset = ipr_ata_phy_reset,
  6284. .hardreset = ipr_sata_reset,
  6285. .post_internal_cmd = ipr_ata_post_internal,
  6286. .qc_prep = ata_noop_qc_prep,
  6287. .qc_defer = ipr_qc_defer,
  6288. .qc_issue = ipr_qc_issue,
  6289. .qc_fill_rtf = ipr_qc_fill_rtf,
  6290. .port_start = ata_sas_port_start,
  6291. .port_stop = ata_sas_port_stop
  6292. };
  6293. static struct ata_port_info sata_port_info = {
  6294. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA |
  6295. ATA_FLAG_SAS_HOST,
  6296. .pio_mask = ATA_PIO4_ONLY,
  6297. .mwdma_mask = ATA_MWDMA2,
  6298. .udma_mask = ATA_UDMA6,
  6299. .port_ops = &ipr_sata_ops
  6300. };
  6301. #ifdef CONFIG_PPC_PSERIES
  6302. static const u16 ipr_blocked_processors[] = {
  6303. PVR_NORTHSTAR,
  6304. PVR_PULSAR,
  6305. PVR_POWER4,
  6306. PVR_ICESTAR,
  6307. PVR_SSTAR,
  6308. PVR_POWER4p,
  6309. PVR_630,
  6310. PVR_630p
  6311. };
  6312. /**
  6313. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  6314. * @ioa_cfg: ioa cfg struct
  6315. *
  6316. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  6317. * certain pSeries hardware. This function determines if the given
  6318. * adapter is in one of these confgurations or not.
  6319. *
  6320. * Return value:
  6321. * 1 if adapter is not supported / 0 if adapter is supported
  6322. **/
  6323. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  6324. {
  6325. int i;
  6326. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  6327. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  6328. if (pvr_version_is(ipr_blocked_processors[i]))
  6329. return 1;
  6330. }
  6331. }
  6332. return 0;
  6333. }
  6334. #else
  6335. #define ipr_invalid_adapter(ioa_cfg) 0
  6336. #endif
  6337. /**
  6338. * ipr_ioa_bringdown_done - IOA bring down completion.
  6339. * @ipr_cmd: ipr command struct
  6340. *
  6341. * This function processes the completion of an adapter bring down.
  6342. * It wakes any reset sleepers.
  6343. *
  6344. * Return value:
  6345. * IPR_RC_JOB_RETURN
  6346. **/
  6347. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  6348. {
  6349. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6350. int i;
  6351. ENTER;
  6352. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  6353. ipr_trace;
  6354. ioa_cfg->scsi_unblock = 1;
  6355. schedule_work(&ioa_cfg->work_q);
  6356. }
  6357. ioa_cfg->in_reset_reload = 0;
  6358. ioa_cfg->reset_retries = 0;
  6359. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6360. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6361. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  6362. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6363. }
  6364. wmb();
  6365. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6366. wake_up_all(&ioa_cfg->reset_wait_q);
  6367. LEAVE;
  6368. return IPR_RC_JOB_RETURN;
  6369. }
  6370. /**
  6371. * ipr_ioa_reset_done - IOA reset completion.
  6372. * @ipr_cmd: ipr command struct
  6373. *
  6374. * This function processes the completion of an adapter reset.
  6375. * It schedules any necessary mid-layer add/removes and
  6376. * wakes any reset sleepers.
  6377. *
  6378. * Return value:
  6379. * IPR_RC_JOB_RETURN
  6380. **/
  6381. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  6382. {
  6383. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6384. struct ipr_resource_entry *res;
  6385. int j;
  6386. ENTER;
  6387. ioa_cfg->in_reset_reload = 0;
  6388. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  6389. spin_lock(&ioa_cfg->hrrq[j]._lock);
  6390. ioa_cfg->hrrq[j].allow_cmds = 1;
  6391. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  6392. }
  6393. wmb();
  6394. ioa_cfg->reset_cmd = NULL;
  6395. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  6396. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  6397. if (res->add_to_ml || res->del_from_ml) {
  6398. ipr_trace;
  6399. break;
  6400. }
  6401. }
  6402. schedule_work(&ioa_cfg->work_q);
  6403. for (j = 0; j < IPR_NUM_HCAMS; j++) {
  6404. list_del_init(&ioa_cfg->hostrcb[j]->queue);
  6405. if (j < IPR_NUM_LOG_HCAMS)
  6406. ipr_send_hcam(ioa_cfg,
  6407. IPR_HCAM_CDB_OP_CODE_LOG_DATA,
  6408. ioa_cfg->hostrcb[j]);
  6409. else
  6410. ipr_send_hcam(ioa_cfg,
  6411. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  6412. ioa_cfg->hostrcb[j]);
  6413. }
  6414. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  6415. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  6416. ioa_cfg->reset_retries = 0;
  6417. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6418. wake_up_all(&ioa_cfg->reset_wait_q);
  6419. ioa_cfg->scsi_unblock = 1;
  6420. schedule_work(&ioa_cfg->work_q);
  6421. LEAVE;
  6422. return IPR_RC_JOB_RETURN;
  6423. }
  6424. /**
  6425. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  6426. * @supported_dev: supported device struct
  6427. * @vpids: vendor product id struct
  6428. *
  6429. * Return value:
  6430. * none
  6431. **/
  6432. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  6433. struct ipr_std_inq_vpids *vpids)
  6434. {
  6435. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  6436. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  6437. supported_dev->num_records = 1;
  6438. supported_dev->data_length =
  6439. cpu_to_be16(sizeof(struct ipr_supported_device));
  6440. supported_dev->reserved = 0;
  6441. }
  6442. /**
  6443. * ipr_set_supported_devs - Send Set Supported Devices for a device
  6444. * @ipr_cmd: ipr command struct
  6445. *
  6446. * This function sends a Set Supported Devices to the adapter
  6447. *
  6448. * Return value:
  6449. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6450. **/
  6451. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  6452. {
  6453. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6454. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  6455. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6456. struct ipr_resource_entry *res = ipr_cmd->u.res;
  6457. ipr_cmd->job_step = ipr_ioa_reset_done;
  6458. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  6459. if (!ipr_is_scsi_disk(res))
  6460. continue;
  6461. ipr_cmd->u.res = res;
  6462. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  6463. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6464. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6465. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6466. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  6467. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  6468. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  6469. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  6470. ipr_init_ioadl(ipr_cmd,
  6471. ioa_cfg->vpd_cbs_dma +
  6472. offsetof(struct ipr_misc_cbs, supp_dev),
  6473. sizeof(struct ipr_supported_device),
  6474. IPR_IOADL_FLAGS_WRITE_LAST);
  6475. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6476. IPR_SET_SUP_DEVICE_TIMEOUT);
  6477. if (!ioa_cfg->sis64)
  6478. ipr_cmd->job_step = ipr_set_supported_devs;
  6479. LEAVE;
  6480. return IPR_RC_JOB_RETURN;
  6481. }
  6482. LEAVE;
  6483. return IPR_RC_JOB_CONTINUE;
  6484. }
  6485. /**
  6486. * ipr_get_mode_page - Locate specified mode page
  6487. * @mode_pages: mode page buffer
  6488. * @page_code: page code to find
  6489. * @len: minimum required length for mode page
  6490. *
  6491. * Return value:
  6492. * pointer to mode page / NULL on failure
  6493. **/
  6494. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  6495. u32 page_code, u32 len)
  6496. {
  6497. struct ipr_mode_page_hdr *mode_hdr;
  6498. u32 page_length;
  6499. u32 length;
  6500. if (!mode_pages || (mode_pages->hdr.length == 0))
  6501. return NULL;
  6502. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  6503. mode_hdr = (struct ipr_mode_page_hdr *)
  6504. (mode_pages->data + mode_pages->hdr.block_desc_len);
  6505. while (length) {
  6506. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  6507. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  6508. return mode_hdr;
  6509. break;
  6510. } else {
  6511. page_length = (sizeof(struct ipr_mode_page_hdr) +
  6512. mode_hdr->page_length);
  6513. length -= page_length;
  6514. mode_hdr = (struct ipr_mode_page_hdr *)
  6515. ((unsigned long)mode_hdr + page_length);
  6516. }
  6517. }
  6518. return NULL;
  6519. }
  6520. /**
  6521. * ipr_check_term_power - Check for term power errors
  6522. * @ioa_cfg: ioa config struct
  6523. * @mode_pages: IOAFP mode pages buffer
  6524. *
  6525. * Check the IOAFP's mode page 28 for term power errors
  6526. *
  6527. * Return value:
  6528. * nothing
  6529. **/
  6530. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6531. struct ipr_mode_pages *mode_pages)
  6532. {
  6533. int i;
  6534. int entry_length;
  6535. struct ipr_dev_bus_entry *bus;
  6536. struct ipr_mode_page28 *mode_page;
  6537. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6538. sizeof(struct ipr_mode_page28));
  6539. entry_length = mode_page->entry_length;
  6540. bus = mode_page->bus;
  6541. for (i = 0; i < mode_page->num_entries; i++) {
  6542. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6543. dev_err(&ioa_cfg->pdev->dev,
  6544. "Term power is absent on scsi bus %d\n",
  6545. bus->res_addr.bus);
  6546. }
  6547. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6548. }
  6549. }
  6550. /**
  6551. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6552. * @ioa_cfg: ioa config struct
  6553. *
  6554. * Looks through the config table checking for SES devices. If
  6555. * the SES device is in the SES table indicating a maximum SCSI
  6556. * bus speed, the speed is limited for the bus.
  6557. *
  6558. * Return value:
  6559. * none
  6560. **/
  6561. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6562. {
  6563. u32 max_xfer_rate;
  6564. int i;
  6565. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6566. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6567. ioa_cfg->bus_attr[i].bus_width);
  6568. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6569. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6570. }
  6571. }
  6572. /**
  6573. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6574. * @ioa_cfg: ioa config struct
  6575. * @mode_pages: mode page 28 buffer
  6576. *
  6577. * Updates mode page 28 based on driver configuration
  6578. *
  6579. * Return value:
  6580. * none
  6581. **/
  6582. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6583. struct ipr_mode_pages *mode_pages)
  6584. {
  6585. int i, entry_length;
  6586. struct ipr_dev_bus_entry *bus;
  6587. struct ipr_bus_attributes *bus_attr;
  6588. struct ipr_mode_page28 *mode_page;
  6589. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6590. sizeof(struct ipr_mode_page28));
  6591. entry_length = mode_page->entry_length;
  6592. /* Loop for each device bus entry */
  6593. for (i = 0, bus = mode_page->bus;
  6594. i < mode_page->num_entries;
  6595. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6596. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6597. dev_err(&ioa_cfg->pdev->dev,
  6598. "Invalid resource address reported: 0x%08X\n",
  6599. IPR_GET_PHYS_LOC(bus->res_addr));
  6600. continue;
  6601. }
  6602. bus_attr = &ioa_cfg->bus_attr[i];
  6603. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6604. bus->bus_width = bus_attr->bus_width;
  6605. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6606. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6607. if (bus_attr->qas_enabled)
  6608. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6609. else
  6610. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6611. }
  6612. }
  6613. /**
  6614. * ipr_build_mode_select - Build a mode select command
  6615. * @ipr_cmd: ipr command struct
  6616. * @res_handle: resource handle to send command to
  6617. * @parm: Byte 2 of Mode Sense command
  6618. * @dma_addr: DMA buffer address
  6619. * @xfer_len: data transfer length
  6620. *
  6621. * Return value:
  6622. * none
  6623. **/
  6624. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6625. __be32 res_handle, u8 parm,
  6626. dma_addr_t dma_addr, u8 xfer_len)
  6627. {
  6628. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6629. ioarcb->res_handle = res_handle;
  6630. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6631. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6632. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6633. ioarcb->cmd_pkt.cdb[1] = parm;
  6634. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6635. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6636. }
  6637. /**
  6638. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6639. * @ipr_cmd: ipr command struct
  6640. *
  6641. * This function sets up the SCSI bus attributes and sends
  6642. * a Mode Select for Page 28 to activate them.
  6643. *
  6644. * Return value:
  6645. * IPR_RC_JOB_RETURN
  6646. **/
  6647. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6648. {
  6649. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6650. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6651. int length;
  6652. ENTER;
  6653. ipr_scsi_bus_speed_limit(ioa_cfg);
  6654. ipr_check_term_power(ioa_cfg, mode_pages);
  6655. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6656. length = mode_pages->hdr.length + 1;
  6657. mode_pages->hdr.length = 0;
  6658. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6659. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6660. length);
  6661. ipr_cmd->job_step = ipr_set_supported_devs;
  6662. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6663. struct ipr_resource_entry, queue);
  6664. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6665. LEAVE;
  6666. return IPR_RC_JOB_RETURN;
  6667. }
  6668. /**
  6669. * ipr_build_mode_sense - Builds a mode sense command
  6670. * @ipr_cmd: ipr command struct
  6671. * @res: resource entry struct
  6672. * @parm: Byte 2 of mode sense command
  6673. * @dma_addr: DMA address of mode sense buffer
  6674. * @xfer_len: Size of DMA buffer
  6675. *
  6676. * Return value:
  6677. * none
  6678. **/
  6679. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6680. __be32 res_handle,
  6681. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6682. {
  6683. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6684. ioarcb->res_handle = res_handle;
  6685. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6686. ioarcb->cmd_pkt.cdb[2] = parm;
  6687. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6688. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6689. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6690. }
  6691. /**
  6692. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6693. * @ipr_cmd: ipr command struct
  6694. *
  6695. * This function handles the failure of an IOA bringup command.
  6696. *
  6697. * Return value:
  6698. * IPR_RC_JOB_RETURN
  6699. **/
  6700. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6701. {
  6702. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6703. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6704. dev_err(&ioa_cfg->pdev->dev,
  6705. "0x%02X failed with IOASC: 0x%08X\n",
  6706. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6707. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6708. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6709. return IPR_RC_JOB_RETURN;
  6710. }
  6711. /**
  6712. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6713. * @ipr_cmd: ipr command struct
  6714. *
  6715. * This function handles the failure of a Mode Sense to the IOAFP.
  6716. * Some adapters do not handle all mode pages.
  6717. *
  6718. * Return value:
  6719. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6720. **/
  6721. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6722. {
  6723. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6724. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6725. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6726. ipr_cmd->job_step = ipr_set_supported_devs;
  6727. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6728. struct ipr_resource_entry, queue);
  6729. return IPR_RC_JOB_CONTINUE;
  6730. }
  6731. return ipr_reset_cmd_failed(ipr_cmd);
  6732. }
  6733. /**
  6734. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6735. * @ipr_cmd: ipr command struct
  6736. *
  6737. * This function send a Page 28 mode sense to the IOA to
  6738. * retrieve SCSI bus attributes.
  6739. *
  6740. * Return value:
  6741. * IPR_RC_JOB_RETURN
  6742. **/
  6743. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6744. {
  6745. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6746. ENTER;
  6747. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6748. 0x28, ioa_cfg->vpd_cbs_dma +
  6749. offsetof(struct ipr_misc_cbs, mode_pages),
  6750. sizeof(struct ipr_mode_pages));
  6751. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6752. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6753. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6754. LEAVE;
  6755. return IPR_RC_JOB_RETURN;
  6756. }
  6757. /**
  6758. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6759. * @ipr_cmd: ipr command struct
  6760. *
  6761. * This function enables dual IOA RAID support if possible.
  6762. *
  6763. * Return value:
  6764. * IPR_RC_JOB_RETURN
  6765. **/
  6766. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6767. {
  6768. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6769. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6770. struct ipr_mode_page24 *mode_page;
  6771. int length;
  6772. ENTER;
  6773. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6774. sizeof(struct ipr_mode_page24));
  6775. if (mode_page)
  6776. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6777. length = mode_pages->hdr.length + 1;
  6778. mode_pages->hdr.length = 0;
  6779. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6780. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6781. length);
  6782. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6783. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6784. LEAVE;
  6785. return IPR_RC_JOB_RETURN;
  6786. }
  6787. /**
  6788. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6789. * @ipr_cmd: ipr command struct
  6790. *
  6791. * This function handles the failure of a Mode Sense to the IOAFP.
  6792. * Some adapters do not handle all mode pages.
  6793. *
  6794. * Return value:
  6795. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6796. **/
  6797. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6798. {
  6799. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6800. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6801. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6802. return IPR_RC_JOB_CONTINUE;
  6803. }
  6804. return ipr_reset_cmd_failed(ipr_cmd);
  6805. }
  6806. /**
  6807. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6808. * @ipr_cmd: ipr command struct
  6809. *
  6810. * This function send a mode sense to the IOA to retrieve
  6811. * the IOA Advanced Function Control mode page.
  6812. *
  6813. * Return value:
  6814. * IPR_RC_JOB_RETURN
  6815. **/
  6816. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6817. {
  6818. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6819. ENTER;
  6820. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6821. 0x24, ioa_cfg->vpd_cbs_dma +
  6822. offsetof(struct ipr_misc_cbs, mode_pages),
  6823. sizeof(struct ipr_mode_pages));
  6824. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6825. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6826. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6827. LEAVE;
  6828. return IPR_RC_JOB_RETURN;
  6829. }
  6830. /**
  6831. * ipr_init_res_table - Initialize the resource table
  6832. * @ipr_cmd: ipr command struct
  6833. *
  6834. * This function looks through the existing resource table, comparing
  6835. * it with the config table. This function will take care of old/new
  6836. * devices and schedule adding/removing them from the mid-layer
  6837. * as appropriate.
  6838. *
  6839. * Return value:
  6840. * IPR_RC_JOB_CONTINUE
  6841. **/
  6842. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6843. {
  6844. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6845. struct ipr_resource_entry *res, *temp;
  6846. struct ipr_config_table_entry_wrapper cfgtew;
  6847. int entries, found, flag, i;
  6848. LIST_HEAD(old_res);
  6849. ENTER;
  6850. if (ioa_cfg->sis64)
  6851. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6852. else
  6853. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6854. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6855. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6856. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6857. list_move_tail(&res->queue, &old_res);
  6858. if (ioa_cfg->sis64)
  6859. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6860. else
  6861. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6862. for (i = 0; i < entries; i++) {
  6863. if (ioa_cfg->sis64)
  6864. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6865. else
  6866. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6867. found = 0;
  6868. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6869. if (ipr_is_same_device(res, &cfgtew)) {
  6870. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6871. found = 1;
  6872. break;
  6873. }
  6874. }
  6875. if (!found) {
  6876. if (list_empty(&ioa_cfg->free_res_q)) {
  6877. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6878. break;
  6879. }
  6880. found = 1;
  6881. res = list_entry(ioa_cfg->free_res_q.next,
  6882. struct ipr_resource_entry, queue);
  6883. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6884. ipr_init_res_entry(res, &cfgtew);
  6885. res->add_to_ml = 1;
  6886. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6887. res->sdev->allow_restart = 1;
  6888. if (found)
  6889. ipr_update_res_entry(res, &cfgtew);
  6890. }
  6891. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6892. if (res->sdev) {
  6893. res->del_from_ml = 1;
  6894. res->res_handle = IPR_INVALID_RES_HANDLE;
  6895. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6896. }
  6897. }
  6898. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6899. ipr_clear_res_target(res);
  6900. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6901. }
  6902. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6903. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6904. else
  6905. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6906. LEAVE;
  6907. return IPR_RC_JOB_CONTINUE;
  6908. }
  6909. /**
  6910. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6911. * @ipr_cmd: ipr command struct
  6912. *
  6913. * This function sends a Query IOA Configuration command
  6914. * to the adapter to retrieve the IOA configuration table.
  6915. *
  6916. * Return value:
  6917. * IPR_RC_JOB_RETURN
  6918. **/
  6919. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6920. {
  6921. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6922. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6923. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6924. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6925. ENTER;
  6926. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6927. ioa_cfg->dual_raid = 1;
  6928. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6929. ucode_vpd->major_release, ucode_vpd->card_type,
  6930. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6931. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6932. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6933. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6934. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6935. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6936. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6937. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6938. IPR_IOADL_FLAGS_READ_LAST);
  6939. ipr_cmd->job_step = ipr_init_res_table;
  6940. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6941. LEAVE;
  6942. return IPR_RC_JOB_RETURN;
  6943. }
  6944. static int ipr_ioa_service_action_failed(struct ipr_cmnd *ipr_cmd)
  6945. {
  6946. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6947. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT)
  6948. return IPR_RC_JOB_CONTINUE;
  6949. return ipr_reset_cmd_failed(ipr_cmd);
  6950. }
  6951. static void ipr_build_ioa_service_action(struct ipr_cmnd *ipr_cmd,
  6952. __be32 res_handle, u8 sa_code)
  6953. {
  6954. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6955. ioarcb->res_handle = res_handle;
  6956. ioarcb->cmd_pkt.cdb[0] = IPR_IOA_SERVICE_ACTION;
  6957. ioarcb->cmd_pkt.cdb[1] = sa_code;
  6958. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6959. }
  6960. /**
  6961. * ipr_ioafp_set_caching_parameters - Issue Set Cache parameters service
  6962. * action
  6963. *
  6964. * Return value:
  6965. * none
  6966. **/
  6967. static int ipr_ioafp_set_caching_parameters(struct ipr_cmnd *ipr_cmd)
  6968. {
  6969. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6970. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6971. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6972. ENTER;
  6973. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6974. if (pageC4->cache_cap[0] & IPR_CAP_SYNC_CACHE) {
  6975. ipr_build_ioa_service_action(ipr_cmd,
  6976. cpu_to_be32(IPR_IOA_RES_HANDLE),
  6977. IPR_IOA_SA_CHANGE_CACHE_PARAMS);
  6978. ioarcb->cmd_pkt.cdb[2] = 0x40;
  6979. ipr_cmd->job_step_failed = ipr_ioa_service_action_failed;
  6980. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6981. IPR_SET_SUP_DEVICE_TIMEOUT);
  6982. LEAVE;
  6983. return IPR_RC_JOB_RETURN;
  6984. }
  6985. LEAVE;
  6986. return IPR_RC_JOB_CONTINUE;
  6987. }
  6988. /**
  6989. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6990. * @ipr_cmd: ipr command struct
  6991. *
  6992. * This utility function sends an inquiry to the adapter.
  6993. *
  6994. * Return value:
  6995. * none
  6996. **/
  6997. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6998. dma_addr_t dma_addr, u8 xfer_len)
  6999. {
  7000. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  7001. ENTER;
  7002. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7003. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7004. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  7005. ioarcb->cmd_pkt.cdb[1] = flags;
  7006. ioarcb->cmd_pkt.cdb[2] = page;
  7007. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  7008. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  7009. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  7010. LEAVE;
  7011. }
  7012. /**
  7013. * ipr_inquiry_page_supported - Is the given inquiry page supported
  7014. * @page0: inquiry page 0 buffer
  7015. * @page: page code.
  7016. *
  7017. * This function determines if the specified inquiry page is supported.
  7018. *
  7019. * Return value:
  7020. * 1 if page is supported / 0 if not
  7021. **/
  7022. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  7023. {
  7024. int i;
  7025. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  7026. if (page0->page[i] == page)
  7027. return 1;
  7028. return 0;
  7029. }
  7030. /**
  7031. * ipr_ioafp_pageC4_inquiry - Send a Page 0xC4 Inquiry to the adapter.
  7032. * @ipr_cmd: ipr command struct
  7033. *
  7034. * This function sends a Page 0xC4 inquiry to the adapter
  7035. * to retrieve software VPD information.
  7036. *
  7037. * Return value:
  7038. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7039. **/
  7040. static int ipr_ioafp_pageC4_inquiry(struct ipr_cmnd *ipr_cmd)
  7041. {
  7042. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7043. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  7044. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  7045. ENTER;
  7046. ipr_cmd->job_step = ipr_ioafp_set_caching_parameters;
  7047. memset(pageC4, 0, sizeof(*pageC4));
  7048. if (ipr_inquiry_page_supported(page0, 0xC4)) {
  7049. ipr_ioafp_inquiry(ipr_cmd, 1, 0xC4,
  7050. (ioa_cfg->vpd_cbs_dma
  7051. + offsetof(struct ipr_misc_cbs,
  7052. pageC4_data)),
  7053. sizeof(struct ipr_inquiry_pageC4));
  7054. return IPR_RC_JOB_RETURN;
  7055. }
  7056. LEAVE;
  7057. return IPR_RC_JOB_CONTINUE;
  7058. }
  7059. /**
  7060. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  7061. * @ipr_cmd: ipr command struct
  7062. *
  7063. * This function sends a Page 0xD0 inquiry to the adapter
  7064. * to retrieve adapter capabilities.
  7065. *
  7066. * Return value:
  7067. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7068. **/
  7069. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  7070. {
  7071. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7072. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  7073. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  7074. ENTER;
  7075. ipr_cmd->job_step = ipr_ioafp_pageC4_inquiry;
  7076. memset(cap, 0, sizeof(*cap));
  7077. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  7078. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  7079. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  7080. sizeof(struct ipr_inquiry_cap));
  7081. return IPR_RC_JOB_RETURN;
  7082. }
  7083. LEAVE;
  7084. return IPR_RC_JOB_CONTINUE;
  7085. }
  7086. /**
  7087. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  7088. * @ipr_cmd: ipr command struct
  7089. *
  7090. * This function sends a Page 3 inquiry to the adapter
  7091. * to retrieve software VPD information.
  7092. *
  7093. * Return value:
  7094. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7095. **/
  7096. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  7097. {
  7098. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7099. ENTER;
  7100. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  7101. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  7102. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  7103. sizeof(struct ipr_inquiry_page3));
  7104. LEAVE;
  7105. return IPR_RC_JOB_RETURN;
  7106. }
  7107. /**
  7108. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  7109. * @ipr_cmd: ipr command struct
  7110. *
  7111. * This function sends a Page 0 inquiry to the adapter
  7112. * to retrieve supported inquiry pages.
  7113. *
  7114. * Return value:
  7115. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7116. **/
  7117. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  7118. {
  7119. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7120. char type[5];
  7121. ENTER;
  7122. /* Grab the type out of the VPD and store it away */
  7123. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  7124. type[4] = '\0';
  7125. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  7126. if (ipr_invalid_adapter(ioa_cfg)) {
  7127. dev_err(&ioa_cfg->pdev->dev,
  7128. "Adapter not supported in this hardware configuration.\n");
  7129. if (!ipr_testmode) {
  7130. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  7131. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7132. list_add_tail(&ipr_cmd->queue,
  7133. &ioa_cfg->hrrq->hrrq_free_q);
  7134. return IPR_RC_JOB_RETURN;
  7135. }
  7136. }
  7137. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  7138. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  7139. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  7140. sizeof(struct ipr_inquiry_page0));
  7141. LEAVE;
  7142. return IPR_RC_JOB_RETURN;
  7143. }
  7144. /**
  7145. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  7146. * @ipr_cmd: ipr command struct
  7147. *
  7148. * This function sends a standard inquiry to the adapter.
  7149. *
  7150. * Return value:
  7151. * IPR_RC_JOB_RETURN
  7152. **/
  7153. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  7154. {
  7155. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7156. ENTER;
  7157. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  7158. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  7159. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  7160. sizeof(struct ipr_ioa_vpd));
  7161. LEAVE;
  7162. return IPR_RC_JOB_RETURN;
  7163. }
  7164. /**
  7165. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  7166. * @ipr_cmd: ipr command struct
  7167. *
  7168. * This function send an Identify Host Request Response Queue
  7169. * command to establish the HRRQ with the adapter.
  7170. *
  7171. * Return value:
  7172. * IPR_RC_JOB_RETURN
  7173. **/
  7174. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  7175. {
  7176. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7177. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  7178. struct ipr_hrr_queue *hrrq;
  7179. ENTER;
  7180. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  7181. if (ioa_cfg->identify_hrrq_index == 0)
  7182. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  7183. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  7184. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  7185. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  7186. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7187. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7188. if (ioa_cfg->sis64)
  7189. ioarcb->cmd_pkt.cdb[1] = 0x1;
  7190. if (ioa_cfg->nvectors == 1)
  7191. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  7192. else
  7193. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  7194. ioarcb->cmd_pkt.cdb[2] =
  7195. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  7196. ioarcb->cmd_pkt.cdb[3] =
  7197. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  7198. ioarcb->cmd_pkt.cdb[4] =
  7199. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  7200. ioarcb->cmd_pkt.cdb[5] =
  7201. ((u64) hrrq->host_rrq_dma) & 0xff;
  7202. ioarcb->cmd_pkt.cdb[7] =
  7203. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  7204. ioarcb->cmd_pkt.cdb[8] =
  7205. (sizeof(u32) * hrrq->size) & 0xff;
  7206. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  7207. ioarcb->cmd_pkt.cdb[9] =
  7208. ioa_cfg->identify_hrrq_index;
  7209. if (ioa_cfg->sis64) {
  7210. ioarcb->cmd_pkt.cdb[10] =
  7211. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  7212. ioarcb->cmd_pkt.cdb[11] =
  7213. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  7214. ioarcb->cmd_pkt.cdb[12] =
  7215. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  7216. ioarcb->cmd_pkt.cdb[13] =
  7217. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  7218. }
  7219. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  7220. ioarcb->cmd_pkt.cdb[14] =
  7221. ioa_cfg->identify_hrrq_index;
  7222. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7223. IPR_INTERNAL_TIMEOUT);
  7224. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  7225. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7226. LEAVE;
  7227. return IPR_RC_JOB_RETURN;
  7228. }
  7229. LEAVE;
  7230. return IPR_RC_JOB_CONTINUE;
  7231. }
  7232. /**
  7233. * ipr_reset_timer_done - Adapter reset timer function
  7234. * @ipr_cmd: ipr command struct
  7235. *
  7236. * Description: This function is used in adapter reset processing
  7237. * for timing events. If the reset_cmd pointer in the IOA
  7238. * config struct is not this adapter's we are doing nested
  7239. * resets and fail_all_ops will take care of freeing the
  7240. * command block.
  7241. *
  7242. * Return value:
  7243. * none
  7244. **/
  7245. static void ipr_reset_timer_done(struct timer_list *t)
  7246. {
  7247. struct ipr_cmnd *ipr_cmd = from_timer(ipr_cmd, t, timer);
  7248. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7249. unsigned long lock_flags = 0;
  7250. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7251. if (ioa_cfg->reset_cmd == ipr_cmd) {
  7252. list_del(&ipr_cmd->queue);
  7253. ipr_cmd->done(ipr_cmd);
  7254. }
  7255. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7256. }
  7257. /**
  7258. * ipr_reset_start_timer - Start a timer for adapter reset job
  7259. * @ipr_cmd: ipr command struct
  7260. * @timeout: timeout value
  7261. *
  7262. * Description: This function is used in adapter reset processing
  7263. * for timing events. If the reset_cmd pointer in the IOA
  7264. * config struct is not this adapter's we are doing nested
  7265. * resets and fail_all_ops will take care of freeing the
  7266. * command block.
  7267. *
  7268. * Return value:
  7269. * none
  7270. **/
  7271. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  7272. unsigned long timeout)
  7273. {
  7274. ENTER;
  7275. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7276. ipr_cmd->done = ipr_reset_ioa_job;
  7277. ipr_cmd->timer.expires = jiffies + timeout;
  7278. ipr_cmd->timer.function = ipr_reset_timer_done;
  7279. add_timer(&ipr_cmd->timer);
  7280. }
  7281. /**
  7282. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  7283. * @ioa_cfg: ioa cfg struct
  7284. *
  7285. * Return value:
  7286. * nothing
  7287. **/
  7288. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  7289. {
  7290. struct ipr_hrr_queue *hrrq;
  7291. for_each_hrrq(hrrq, ioa_cfg) {
  7292. spin_lock(&hrrq->_lock);
  7293. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  7294. /* Initialize Host RRQ pointers */
  7295. hrrq->hrrq_start = hrrq->host_rrq;
  7296. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  7297. hrrq->hrrq_curr = hrrq->hrrq_start;
  7298. hrrq->toggle_bit = 1;
  7299. spin_unlock(&hrrq->_lock);
  7300. }
  7301. wmb();
  7302. ioa_cfg->identify_hrrq_index = 0;
  7303. if (ioa_cfg->hrrq_num == 1)
  7304. atomic_set(&ioa_cfg->hrrq_index, 0);
  7305. else
  7306. atomic_set(&ioa_cfg->hrrq_index, 1);
  7307. /* Zero out config table */
  7308. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  7309. }
  7310. /**
  7311. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  7312. * @ipr_cmd: ipr command struct
  7313. *
  7314. * Return value:
  7315. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7316. **/
  7317. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  7318. {
  7319. unsigned long stage, stage_time;
  7320. u32 feedback;
  7321. volatile u32 int_reg;
  7322. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7323. u64 maskval = 0;
  7324. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  7325. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  7326. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  7327. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  7328. /* sanity check the stage_time value */
  7329. if (stage_time == 0)
  7330. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  7331. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  7332. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  7333. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  7334. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  7335. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  7336. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  7337. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7338. stage_time = ioa_cfg->transop_timeout;
  7339. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7340. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  7341. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7342. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7343. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7344. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7345. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  7346. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  7347. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7348. return IPR_RC_JOB_CONTINUE;
  7349. }
  7350. }
  7351. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  7352. ipr_cmd->timer.function = ipr_oper_timeout;
  7353. ipr_cmd->done = ipr_reset_ioa_job;
  7354. add_timer(&ipr_cmd->timer);
  7355. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7356. return IPR_RC_JOB_RETURN;
  7357. }
  7358. /**
  7359. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  7360. * @ipr_cmd: ipr command struct
  7361. *
  7362. * This function reinitializes some control blocks and
  7363. * enables destructive diagnostics on the adapter.
  7364. *
  7365. * Return value:
  7366. * IPR_RC_JOB_RETURN
  7367. **/
  7368. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  7369. {
  7370. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7371. volatile u32 int_reg;
  7372. volatile u64 maskval;
  7373. int i;
  7374. ENTER;
  7375. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  7376. ipr_init_ioa_mem(ioa_cfg);
  7377. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7378. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7379. ioa_cfg->hrrq[i].allow_interrupts = 1;
  7380. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7381. }
  7382. if (ioa_cfg->sis64) {
  7383. /* Set the adapter to the correct endian mode. */
  7384. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7385. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7386. }
  7387. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  7388. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  7389. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  7390. ioa_cfg->regs.clr_interrupt_mask_reg32);
  7391. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7392. return IPR_RC_JOB_CONTINUE;
  7393. }
  7394. /* Enable destructive diagnostics on IOA */
  7395. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7396. if (ioa_cfg->sis64) {
  7397. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  7398. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  7399. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  7400. } else
  7401. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  7402. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  7403. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  7404. if (ioa_cfg->sis64) {
  7405. ipr_cmd->job_step = ipr_reset_next_stage;
  7406. return IPR_RC_JOB_CONTINUE;
  7407. }
  7408. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  7409. ipr_cmd->timer.function = ipr_oper_timeout;
  7410. ipr_cmd->done = ipr_reset_ioa_job;
  7411. add_timer(&ipr_cmd->timer);
  7412. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7413. LEAVE;
  7414. return IPR_RC_JOB_RETURN;
  7415. }
  7416. /**
  7417. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  7418. * @ipr_cmd: ipr command struct
  7419. *
  7420. * This function is invoked when an adapter dump has run out
  7421. * of processing time.
  7422. *
  7423. * Return value:
  7424. * IPR_RC_JOB_CONTINUE
  7425. **/
  7426. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  7427. {
  7428. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7429. if (ioa_cfg->sdt_state == GET_DUMP)
  7430. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7431. else if (ioa_cfg->sdt_state == READ_DUMP)
  7432. ioa_cfg->sdt_state = ABORT_DUMP;
  7433. ioa_cfg->dump_timeout = 1;
  7434. ipr_cmd->job_step = ipr_reset_alert;
  7435. return IPR_RC_JOB_CONTINUE;
  7436. }
  7437. /**
  7438. * ipr_unit_check_no_data - Log a unit check/no data error log
  7439. * @ioa_cfg: ioa config struct
  7440. *
  7441. * Logs an error indicating the adapter unit checked, but for some
  7442. * reason, we were unable to fetch the unit check buffer.
  7443. *
  7444. * Return value:
  7445. * nothing
  7446. **/
  7447. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  7448. {
  7449. ioa_cfg->errors_logged++;
  7450. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  7451. }
  7452. /**
  7453. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  7454. * @ioa_cfg: ioa config struct
  7455. *
  7456. * Fetches the unit check buffer from the adapter by clocking the data
  7457. * through the mailbox register.
  7458. *
  7459. * Return value:
  7460. * nothing
  7461. **/
  7462. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  7463. {
  7464. unsigned long mailbox;
  7465. struct ipr_hostrcb *hostrcb;
  7466. struct ipr_uc_sdt sdt;
  7467. int rc, length;
  7468. u32 ioasc;
  7469. mailbox = readl(ioa_cfg->ioa_mailbox);
  7470. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  7471. ipr_unit_check_no_data(ioa_cfg);
  7472. return;
  7473. }
  7474. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  7475. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  7476. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  7477. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  7478. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  7479. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  7480. ipr_unit_check_no_data(ioa_cfg);
  7481. return;
  7482. }
  7483. /* Find length of the first sdt entry (UC buffer) */
  7484. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  7485. length = be32_to_cpu(sdt.entry[0].end_token);
  7486. else
  7487. length = (be32_to_cpu(sdt.entry[0].end_token) -
  7488. be32_to_cpu(sdt.entry[0].start_token)) &
  7489. IPR_FMT2_MBX_ADDR_MASK;
  7490. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  7491. struct ipr_hostrcb, queue);
  7492. list_del_init(&hostrcb->queue);
  7493. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  7494. rc = ipr_get_ldump_data_section(ioa_cfg,
  7495. be32_to_cpu(sdt.entry[0].start_token),
  7496. (__be32 *)&hostrcb->hcam,
  7497. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  7498. if (!rc) {
  7499. ipr_handle_log_data(ioa_cfg, hostrcb);
  7500. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  7501. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  7502. ioa_cfg->sdt_state == GET_DUMP)
  7503. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7504. } else
  7505. ipr_unit_check_no_data(ioa_cfg);
  7506. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  7507. }
  7508. /**
  7509. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  7510. * @ipr_cmd: ipr command struct
  7511. *
  7512. * Description: This function will call to get the unit check buffer.
  7513. *
  7514. * Return value:
  7515. * IPR_RC_JOB_RETURN
  7516. **/
  7517. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  7518. {
  7519. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7520. ENTER;
  7521. ioa_cfg->ioa_unit_checked = 0;
  7522. ipr_get_unit_check_buffer(ioa_cfg);
  7523. ipr_cmd->job_step = ipr_reset_alert;
  7524. ipr_reset_start_timer(ipr_cmd, 0);
  7525. LEAVE;
  7526. return IPR_RC_JOB_RETURN;
  7527. }
  7528. static int ipr_dump_mailbox_wait(struct ipr_cmnd *ipr_cmd)
  7529. {
  7530. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7531. ENTER;
  7532. if (ioa_cfg->sdt_state != GET_DUMP)
  7533. return IPR_RC_JOB_RETURN;
  7534. if (!ioa_cfg->sis64 || !ipr_cmd->u.time_left ||
  7535. (readl(ioa_cfg->regs.sense_interrupt_reg) &
  7536. IPR_PCII_MAILBOX_STABLE)) {
  7537. if (!ipr_cmd->u.time_left)
  7538. dev_err(&ioa_cfg->pdev->dev,
  7539. "Timed out waiting for Mailbox register.\n");
  7540. ioa_cfg->sdt_state = READ_DUMP;
  7541. ioa_cfg->dump_timeout = 0;
  7542. if (ioa_cfg->sis64)
  7543. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  7544. else
  7545. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  7546. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  7547. schedule_work(&ioa_cfg->work_q);
  7548. } else {
  7549. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7550. ipr_reset_start_timer(ipr_cmd,
  7551. IPR_CHECK_FOR_RESET_TIMEOUT);
  7552. }
  7553. LEAVE;
  7554. return IPR_RC_JOB_RETURN;
  7555. }
  7556. /**
  7557. * ipr_reset_restore_cfg_space - Restore PCI config space.
  7558. * @ipr_cmd: ipr command struct
  7559. *
  7560. * Description: This function restores the saved PCI config space of
  7561. * the adapter, fails all outstanding ops back to the callers, and
  7562. * fetches the dump/unit check if applicable to this reset.
  7563. *
  7564. * Return value:
  7565. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7566. **/
  7567. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  7568. {
  7569. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7570. u32 int_reg;
  7571. ENTER;
  7572. ioa_cfg->pdev->state_saved = true;
  7573. pci_restore_state(ioa_cfg->pdev);
  7574. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  7575. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7576. return IPR_RC_JOB_CONTINUE;
  7577. }
  7578. ipr_fail_all_ops(ioa_cfg);
  7579. if (ioa_cfg->sis64) {
  7580. /* Set the adapter to the correct endian mode. */
  7581. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7582. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7583. }
  7584. if (ioa_cfg->ioa_unit_checked) {
  7585. if (ioa_cfg->sis64) {
  7586. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  7587. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  7588. return IPR_RC_JOB_RETURN;
  7589. } else {
  7590. ioa_cfg->ioa_unit_checked = 0;
  7591. ipr_get_unit_check_buffer(ioa_cfg);
  7592. ipr_cmd->job_step = ipr_reset_alert;
  7593. ipr_reset_start_timer(ipr_cmd, 0);
  7594. return IPR_RC_JOB_RETURN;
  7595. }
  7596. }
  7597. if (ioa_cfg->in_ioa_bringdown) {
  7598. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7599. } else if (ioa_cfg->sdt_state == GET_DUMP) {
  7600. ipr_cmd->job_step = ipr_dump_mailbox_wait;
  7601. ipr_cmd->u.time_left = IPR_WAIT_FOR_MAILBOX;
  7602. } else {
  7603. ipr_cmd->job_step = ipr_reset_enable_ioa;
  7604. }
  7605. LEAVE;
  7606. return IPR_RC_JOB_CONTINUE;
  7607. }
  7608. /**
  7609. * ipr_reset_bist_done - BIST has completed on the adapter.
  7610. * @ipr_cmd: ipr command struct
  7611. *
  7612. * Description: Unblock config space and resume the reset process.
  7613. *
  7614. * Return value:
  7615. * IPR_RC_JOB_CONTINUE
  7616. **/
  7617. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7618. {
  7619. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7620. ENTER;
  7621. if (ioa_cfg->cfg_locked)
  7622. pci_cfg_access_unlock(ioa_cfg->pdev);
  7623. ioa_cfg->cfg_locked = 0;
  7624. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7625. LEAVE;
  7626. return IPR_RC_JOB_CONTINUE;
  7627. }
  7628. /**
  7629. * ipr_reset_start_bist - Run BIST on the adapter.
  7630. * @ipr_cmd: ipr command struct
  7631. *
  7632. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7633. *
  7634. * Return value:
  7635. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7636. **/
  7637. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7638. {
  7639. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7640. int rc = PCIBIOS_SUCCESSFUL;
  7641. ENTER;
  7642. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7643. writel(IPR_UPROCI_SIS64_START_BIST,
  7644. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7645. else
  7646. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7647. if (rc == PCIBIOS_SUCCESSFUL) {
  7648. ipr_cmd->job_step = ipr_reset_bist_done;
  7649. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7650. rc = IPR_RC_JOB_RETURN;
  7651. } else {
  7652. if (ioa_cfg->cfg_locked)
  7653. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7654. ioa_cfg->cfg_locked = 0;
  7655. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7656. rc = IPR_RC_JOB_CONTINUE;
  7657. }
  7658. LEAVE;
  7659. return rc;
  7660. }
  7661. /**
  7662. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7663. * @ipr_cmd: ipr command struct
  7664. *
  7665. * Description: This clears PCI reset to the adapter and delays two seconds.
  7666. *
  7667. * Return value:
  7668. * IPR_RC_JOB_RETURN
  7669. **/
  7670. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7671. {
  7672. ENTER;
  7673. ipr_cmd->job_step = ipr_reset_bist_done;
  7674. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7675. LEAVE;
  7676. return IPR_RC_JOB_RETURN;
  7677. }
  7678. /**
  7679. * ipr_reset_reset_work - Pulse a PCIe fundamental reset
  7680. * @work: work struct
  7681. *
  7682. * Description: This pulses warm reset to a slot.
  7683. *
  7684. **/
  7685. static void ipr_reset_reset_work(struct work_struct *work)
  7686. {
  7687. struct ipr_cmnd *ipr_cmd = container_of(work, struct ipr_cmnd, work);
  7688. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7689. struct pci_dev *pdev = ioa_cfg->pdev;
  7690. unsigned long lock_flags = 0;
  7691. ENTER;
  7692. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7693. msleep(jiffies_to_msecs(IPR_PCI_RESET_TIMEOUT));
  7694. pci_set_pcie_reset_state(pdev, pcie_deassert_reset);
  7695. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7696. if (ioa_cfg->reset_cmd == ipr_cmd)
  7697. ipr_reset_ioa_job(ipr_cmd);
  7698. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7699. LEAVE;
  7700. }
  7701. /**
  7702. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7703. * @ipr_cmd: ipr command struct
  7704. *
  7705. * Description: This asserts PCI reset to the adapter.
  7706. *
  7707. * Return value:
  7708. * IPR_RC_JOB_RETURN
  7709. **/
  7710. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7711. {
  7712. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7713. ENTER;
  7714. INIT_WORK(&ipr_cmd->work, ipr_reset_reset_work);
  7715. queue_work(ioa_cfg->reset_work_q, &ipr_cmd->work);
  7716. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7717. LEAVE;
  7718. return IPR_RC_JOB_RETURN;
  7719. }
  7720. /**
  7721. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7722. * @ipr_cmd: ipr command struct
  7723. *
  7724. * Description: This attempts to block config access to the IOA.
  7725. *
  7726. * Return value:
  7727. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7728. **/
  7729. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7730. {
  7731. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7732. int rc = IPR_RC_JOB_CONTINUE;
  7733. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7734. ioa_cfg->cfg_locked = 1;
  7735. ipr_cmd->job_step = ioa_cfg->reset;
  7736. } else {
  7737. if (ipr_cmd->u.time_left) {
  7738. rc = IPR_RC_JOB_RETURN;
  7739. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7740. ipr_reset_start_timer(ipr_cmd,
  7741. IPR_CHECK_FOR_RESET_TIMEOUT);
  7742. } else {
  7743. ipr_cmd->job_step = ioa_cfg->reset;
  7744. dev_err(&ioa_cfg->pdev->dev,
  7745. "Timed out waiting to lock config access. Resetting anyway.\n");
  7746. }
  7747. }
  7748. return rc;
  7749. }
  7750. /**
  7751. * ipr_reset_block_config_access - Block config access to the IOA
  7752. * @ipr_cmd: ipr command struct
  7753. *
  7754. * Description: This attempts to block config access to the IOA
  7755. *
  7756. * Return value:
  7757. * IPR_RC_JOB_CONTINUE
  7758. **/
  7759. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7760. {
  7761. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7762. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7763. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7764. return IPR_RC_JOB_CONTINUE;
  7765. }
  7766. /**
  7767. * ipr_reset_allowed - Query whether or not IOA can be reset
  7768. * @ioa_cfg: ioa config struct
  7769. *
  7770. * Return value:
  7771. * 0 if reset not allowed / non-zero if reset is allowed
  7772. **/
  7773. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7774. {
  7775. volatile u32 temp_reg;
  7776. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7777. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7778. }
  7779. /**
  7780. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7781. * @ipr_cmd: ipr command struct
  7782. *
  7783. * Description: This function waits for adapter permission to run BIST,
  7784. * then runs BIST. If the adapter does not give permission after a
  7785. * reasonable time, we will reset the adapter anyway. The impact of
  7786. * resetting the adapter without warning the adapter is the risk of
  7787. * losing the persistent error log on the adapter. If the adapter is
  7788. * reset while it is writing to the flash on the adapter, the flash
  7789. * segment will have bad ECC and be zeroed.
  7790. *
  7791. * Return value:
  7792. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7793. **/
  7794. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7795. {
  7796. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7797. int rc = IPR_RC_JOB_RETURN;
  7798. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7799. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7800. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7801. } else {
  7802. ipr_cmd->job_step = ipr_reset_block_config_access;
  7803. rc = IPR_RC_JOB_CONTINUE;
  7804. }
  7805. return rc;
  7806. }
  7807. /**
  7808. * ipr_reset_alert - Alert the adapter of a pending reset
  7809. * @ipr_cmd: ipr command struct
  7810. *
  7811. * Description: This function alerts the adapter that it will be reset.
  7812. * If memory space is not currently enabled, proceed directly
  7813. * to running BIST on the adapter. The timer must always be started
  7814. * so we guarantee we do not run BIST from ipr_isr.
  7815. *
  7816. * Return value:
  7817. * IPR_RC_JOB_RETURN
  7818. **/
  7819. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7820. {
  7821. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7822. u16 cmd_reg;
  7823. int rc;
  7824. ENTER;
  7825. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7826. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7827. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7828. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7829. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7830. } else {
  7831. ipr_cmd->job_step = ipr_reset_block_config_access;
  7832. }
  7833. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7834. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7835. LEAVE;
  7836. return IPR_RC_JOB_RETURN;
  7837. }
  7838. /**
  7839. * ipr_reset_quiesce_done - Complete IOA disconnect
  7840. * @ipr_cmd: ipr command struct
  7841. *
  7842. * Description: Freeze the adapter to complete quiesce processing
  7843. *
  7844. * Return value:
  7845. * IPR_RC_JOB_CONTINUE
  7846. **/
  7847. static int ipr_reset_quiesce_done(struct ipr_cmnd *ipr_cmd)
  7848. {
  7849. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7850. ENTER;
  7851. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7852. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7853. LEAVE;
  7854. return IPR_RC_JOB_CONTINUE;
  7855. }
  7856. /**
  7857. * ipr_reset_cancel_hcam_done - Check for outstanding commands
  7858. * @ipr_cmd: ipr command struct
  7859. *
  7860. * Description: Ensure nothing is outstanding to the IOA and
  7861. * proceed with IOA disconnect. Otherwise reset the IOA.
  7862. *
  7863. * Return value:
  7864. * IPR_RC_JOB_RETURN / IPR_RC_JOB_CONTINUE
  7865. **/
  7866. static int ipr_reset_cancel_hcam_done(struct ipr_cmnd *ipr_cmd)
  7867. {
  7868. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7869. struct ipr_cmnd *loop_cmd;
  7870. struct ipr_hrr_queue *hrrq;
  7871. int rc = IPR_RC_JOB_CONTINUE;
  7872. int count = 0;
  7873. ENTER;
  7874. ipr_cmd->job_step = ipr_reset_quiesce_done;
  7875. for_each_hrrq(hrrq, ioa_cfg) {
  7876. spin_lock(&hrrq->_lock);
  7877. list_for_each_entry(loop_cmd, &hrrq->hrrq_pending_q, queue) {
  7878. count++;
  7879. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7880. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7881. rc = IPR_RC_JOB_RETURN;
  7882. break;
  7883. }
  7884. spin_unlock(&hrrq->_lock);
  7885. if (count)
  7886. break;
  7887. }
  7888. LEAVE;
  7889. return rc;
  7890. }
  7891. /**
  7892. * ipr_reset_cancel_hcam - Cancel outstanding HCAMs
  7893. * @ipr_cmd: ipr command struct
  7894. *
  7895. * Description: Cancel any oustanding HCAMs to the IOA.
  7896. *
  7897. * Return value:
  7898. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7899. **/
  7900. static int ipr_reset_cancel_hcam(struct ipr_cmnd *ipr_cmd)
  7901. {
  7902. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7903. int rc = IPR_RC_JOB_CONTINUE;
  7904. struct ipr_cmd_pkt *cmd_pkt;
  7905. struct ipr_cmnd *hcam_cmd;
  7906. struct ipr_hrr_queue *hrrq = &ioa_cfg->hrrq[IPR_INIT_HRRQ];
  7907. ENTER;
  7908. ipr_cmd->job_step = ipr_reset_cancel_hcam_done;
  7909. if (!hrrq->ioa_is_dead) {
  7910. if (!list_empty(&ioa_cfg->hostrcb_pending_q)) {
  7911. list_for_each_entry(hcam_cmd, &hrrq->hrrq_pending_q, queue) {
  7912. if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC)
  7913. continue;
  7914. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7915. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7916. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  7917. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  7918. cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST;
  7919. cmd_pkt->cdb[1] = IPR_CANCEL_64BIT_IOARCB;
  7920. cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff;
  7921. cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff;
  7922. cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff;
  7923. cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff;
  7924. cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff;
  7925. cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff;
  7926. cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff;
  7927. cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff;
  7928. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7929. IPR_CANCEL_TIMEOUT);
  7930. rc = IPR_RC_JOB_RETURN;
  7931. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7932. break;
  7933. }
  7934. }
  7935. } else
  7936. ipr_cmd->job_step = ipr_reset_alert;
  7937. LEAVE;
  7938. return rc;
  7939. }
  7940. /**
  7941. * ipr_reset_ucode_download_done - Microcode download completion
  7942. * @ipr_cmd: ipr command struct
  7943. *
  7944. * Description: This function unmaps the microcode download buffer.
  7945. *
  7946. * Return value:
  7947. * IPR_RC_JOB_CONTINUE
  7948. **/
  7949. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7950. {
  7951. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7952. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7953. dma_unmap_sg(&ioa_cfg->pdev->dev, sglist->scatterlist,
  7954. sglist->num_sg, DMA_TO_DEVICE);
  7955. ipr_cmd->job_step = ipr_reset_alert;
  7956. return IPR_RC_JOB_CONTINUE;
  7957. }
  7958. /**
  7959. * ipr_reset_ucode_download - Download microcode to the adapter
  7960. * @ipr_cmd: ipr command struct
  7961. *
  7962. * Description: This function checks to see if it there is microcode
  7963. * to download to the adapter. If there is, a download is performed.
  7964. *
  7965. * Return value:
  7966. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7967. **/
  7968. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7969. {
  7970. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7971. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7972. ENTER;
  7973. ipr_cmd->job_step = ipr_reset_alert;
  7974. if (!sglist)
  7975. return IPR_RC_JOB_CONTINUE;
  7976. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7977. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7978. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7979. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7980. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7981. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7982. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7983. if (ioa_cfg->sis64)
  7984. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7985. else
  7986. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7987. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7988. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7989. IPR_WRITE_BUFFER_TIMEOUT);
  7990. LEAVE;
  7991. return IPR_RC_JOB_RETURN;
  7992. }
  7993. /**
  7994. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7995. * @ipr_cmd: ipr command struct
  7996. *
  7997. * Description: This function issues an adapter shutdown of the
  7998. * specified type to the specified adapter as part of the
  7999. * adapter reset job.
  8000. *
  8001. * Return value:
  8002. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  8003. **/
  8004. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  8005. {
  8006. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  8007. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  8008. unsigned long timeout;
  8009. int rc = IPR_RC_JOB_CONTINUE;
  8010. ENTER;
  8011. if (shutdown_type == IPR_SHUTDOWN_QUIESCE)
  8012. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  8013. else if (shutdown_type != IPR_SHUTDOWN_NONE &&
  8014. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  8015. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  8016. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  8017. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  8018. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  8019. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  8020. timeout = IPR_SHUTDOWN_TIMEOUT;
  8021. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  8022. timeout = IPR_INTERNAL_TIMEOUT;
  8023. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  8024. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  8025. else
  8026. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  8027. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  8028. rc = IPR_RC_JOB_RETURN;
  8029. ipr_cmd->job_step = ipr_reset_ucode_download;
  8030. } else
  8031. ipr_cmd->job_step = ipr_reset_alert;
  8032. LEAVE;
  8033. return rc;
  8034. }
  8035. /**
  8036. * ipr_reset_ioa_job - Adapter reset job
  8037. * @ipr_cmd: ipr command struct
  8038. *
  8039. * Description: This function is the job router for the adapter reset job.
  8040. *
  8041. * Return value:
  8042. * none
  8043. **/
  8044. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  8045. {
  8046. u32 rc, ioasc;
  8047. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  8048. do {
  8049. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  8050. if (ioa_cfg->reset_cmd != ipr_cmd) {
  8051. /*
  8052. * We are doing nested adapter resets and this is
  8053. * not the current reset job.
  8054. */
  8055. list_add_tail(&ipr_cmd->queue,
  8056. &ipr_cmd->hrrq->hrrq_free_q);
  8057. return;
  8058. }
  8059. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  8060. rc = ipr_cmd->job_step_failed(ipr_cmd);
  8061. if (rc == IPR_RC_JOB_RETURN)
  8062. return;
  8063. }
  8064. ipr_reinit_ipr_cmnd(ipr_cmd);
  8065. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  8066. rc = ipr_cmd->job_step(ipr_cmd);
  8067. } while (rc == IPR_RC_JOB_CONTINUE);
  8068. }
  8069. /**
  8070. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  8071. * @ioa_cfg: ioa config struct
  8072. * @job_step: first job step of reset job
  8073. * @shutdown_type: shutdown type
  8074. *
  8075. * Description: This function will initiate the reset of the given adapter
  8076. * starting at the selected job step.
  8077. * If the caller needs to wait on the completion of the reset,
  8078. * the caller must sleep on the reset_wait_q.
  8079. *
  8080. * Return value:
  8081. * none
  8082. **/
  8083. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  8084. int (*job_step) (struct ipr_cmnd *),
  8085. enum ipr_shutdown_type shutdown_type)
  8086. {
  8087. struct ipr_cmnd *ipr_cmd;
  8088. int i;
  8089. ioa_cfg->in_reset_reload = 1;
  8090. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8091. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8092. ioa_cfg->hrrq[i].allow_cmds = 0;
  8093. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8094. }
  8095. wmb();
  8096. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  8097. ioa_cfg->scsi_unblock = 0;
  8098. ioa_cfg->scsi_blocked = 1;
  8099. scsi_block_requests(ioa_cfg->host);
  8100. }
  8101. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  8102. ioa_cfg->reset_cmd = ipr_cmd;
  8103. ipr_cmd->job_step = job_step;
  8104. ipr_cmd->u.shutdown_type = shutdown_type;
  8105. ipr_reset_ioa_job(ipr_cmd);
  8106. }
  8107. /**
  8108. * ipr_initiate_ioa_reset - Initiate an adapter reset
  8109. * @ioa_cfg: ioa config struct
  8110. * @shutdown_type: shutdown type
  8111. *
  8112. * Description: This function will initiate the reset of the given adapter.
  8113. * If the caller needs to wait on the completion of the reset,
  8114. * the caller must sleep on the reset_wait_q.
  8115. *
  8116. * Return value:
  8117. * none
  8118. **/
  8119. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  8120. enum ipr_shutdown_type shutdown_type)
  8121. {
  8122. int i;
  8123. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  8124. return;
  8125. if (ioa_cfg->in_reset_reload) {
  8126. if (ioa_cfg->sdt_state == GET_DUMP)
  8127. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  8128. else if (ioa_cfg->sdt_state == READ_DUMP)
  8129. ioa_cfg->sdt_state = ABORT_DUMP;
  8130. }
  8131. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  8132. dev_err(&ioa_cfg->pdev->dev,
  8133. "IOA taken offline - error recovery failed\n");
  8134. ioa_cfg->reset_retries = 0;
  8135. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8136. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8137. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  8138. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8139. }
  8140. wmb();
  8141. if (ioa_cfg->in_ioa_bringdown) {
  8142. ioa_cfg->reset_cmd = NULL;
  8143. ioa_cfg->in_reset_reload = 0;
  8144. ipr_fail_all_ops(ioa_cfg);
  8145. wake_up_all(&ioa_cfg->reset_wait_q);
  8146. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  8147. ioa_cfg->scsi_unblock = 1;
  8148. schedule_work(&ioa_cfg->work_q);
  8149. }
  8150. return;
  8151. } else {
  8152. ioa_cfg->in_ioa_bringdown = 1;
  8153. shutdown_type = IPR_SHUTDOWN_NONE;
  8154. }
  8155. }
  8156. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  8157. shutdown_type);
  8158. }
  8159. /**
  8160. * ipr_reset_freeze - Hold off all I/O activity
  8161. * @ipr_cmd: ipr command struct
  8162. *
  8163. * Description: If the PCI slot is frozen, hold off all I/O
  8164. * activity; then, as soon as the slot is available again,
  8165. * initiate an adapter reset.
  8166. */
  8167. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  8168. {
  8169. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  8170. int i;
  8171. /* Disallow new interrupts, avoid loop */
  8172. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8173. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8174. ioa_cfg->hrrq[i].allow_interrupts = 0;
  8175. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8176. }
  8177. wmb();
  8178. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  8179. ipr_cmd->done = ipr_reset_ioa_job;
  8180. return IPR_RC_JOB_RETURN;
  8181. }
  8182. /**
  8183. * ipr_pci_mmio_enabled - Called when MMIO has been re-enabled
  8184. * @pdev: PCI device struct
  8185. *
  8186. * Description: This routine is called to tell us that the MMIO
  8187. * access to the IOA has been restored
  8188. */
  8189. static pci_ers_result_t ipr_pci_mmio_enabled(struct pci_dev *pdev)
  8190. {
  8191. unsigned long flags = 0;
  8192. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8193. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8194. if (!ioa_cfg->probe_done)
  8195. pci_save_state(pdev);
  8196. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8197. return PCI_ERS_RESULT_NEED_RESET;
  8198. }
  8199. /**
  8200. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  8201. * @pdev: PCI device struct
  8202. *
  8203. * Description: This routine is called to tell us that the PCI bus
  8204. * is down. Can't do anything here, except put the device driver
  8205. * into a holding pattern, waiting for the PCI bus to come back.
  8206. */
  8207. static void ipr_pci_frozen(struct pci_dev *pdev)
  8208. {
  8209. unsigned long flags = 0;
  8210. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8211. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8212. if (ioa_cfg->probe_done)
  8213. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  8214. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8215. }
  8216. /**
  8217. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  8218. * @pdev: PCI device struct
  8219. *
  8220. * Description: This routine is called by the pci error recovery
  8221. * code after the PCI slot has been reset, just before we
  8222. * should resume normal operations.
  8223. */
  8224. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  8225. {
  8226. unsigned long flags = 0;
  8227. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8228. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8229. if (ioa_cfg->probe_done) {
  8230. if (ioa_cfg->needs_warm_reset)
  8231. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8232. else
  8233. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  8234. IPR_SHUTDOWN_NONE);
  8235. } else
  8236. wake_up_all(&ioa_cfg->eeh_wait_q);
  8237. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8238. return PCI_ERS_RESULT_RECOVERED;
  8239. }
  8240. /**
  8241. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  8242. * @pdev: PCI device struct
  8243. *
  8244. * Description: This routine is called when the PCI bus has
  8245. * permanently failed.
  8246. */
  8247. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  8248. {
  8249. unsigned long flags = 0;
  8250. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8251. int i;
  8252. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8253. if (ioa_cfg->probe_done) {
  8254. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8255. ioa_cfg->sdt_state = ABORT_DUMP;
  8256. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES - 1;
  8257. ioa_cfg->in_ioa_bringdown = 1;
  8258. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8259. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8260. ioa_cfg->hrrq[i].allow_cmds = 0;
  8261. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8262. }
  8263. wmb();
  8264. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8265. } else
  8266. wake_up_all(&ioa_cfg->eeh_wait_q);
  8267. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8268. }
  8269. /**
  8270. * ipr_pci_error_detected - Called when a PCI error is detected.
  8271. * @pdev: PCI device struct
  8272. * @state: PCI channel state
  8273. *
  8274. * Description: Called when a PCI error is detected.
  8275. *
  8276. * Return value:
  8277. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  8278. */
  8279. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  8280. pci_channel_state_t state)
  8281. {
  8282. switch (state) {
  8283. case pci_channel_io_frozen:
  8284. ipr_pci_frozen(pdev);
  8285. return PCI_ERS_RESULT_CAN_RECOVER;
  8286. case pci_channel_io_perm_failure:
  8287. ipr_pci_perm_failure(pdev);
  8288. return PCI_ERS_RESULT_DISCONNECT;
  8289. break;
  8290. default:
  8291. break;
  8292. }
  8293. return PCI_ERS_RESULT_NEED_RESET;
  8294. }
  8295. /**
  8296. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  8297. * @ioa_cfg: ioa cfg struct
  8298. *
  8299. * Description: This is the second phase of adapter initialization
  8300. * This function takes care of initilizing the adapter to the point
  8301. * where it can accept new commands.
  8302. * Return value:
  8303. * 0 on success / -EIO on failure
  8304. **/
  8305. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  8306. {
  8307. int rc = 0;
  8308. unsigned long host_lock_flags = 0;
  8309. ENTER;
  8310. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8311. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  8312. ioa_cfg->probe_done = 1;
  8313. if (ioa_cfg->needs_hard_reset) {
  8314. ioa_cfg->needs_hard_reset = 0;
  8315. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  8316. } else
  8317. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  8318. IPR_SHUTDOWN_NONE);
  8319. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8320. LEAVE;
  8321. return rc;
  8322. }
  8323. /**
  8324. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  8325. * @ioa_cfg: ioa config struct
  8326. *
  8327. * Return value:
  8328. * none
  8329. **/
  8330. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8331. {
  8332. int i;
  8333. if (ioa_cfg->ipr_cmnd_list) {
  8334. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8335. if (ioa_cfg->ipr_cmnd_list[i])
  8336. dma_pool_free(ioa_cfg->ipr_cmd_pool,
  8337. ioa_cfg->ipr_cmnd_list[i],
  8338. ioa_cfg->ipr_cmnd_list_dma[i]);
  8339. ioa_cfg->ipr_cmnd_list[i] = NULL;
  8340. }
  8341. }
  8342. if (ioa_cfg->ipr_cmd_pool)
  8343. dma_pool_destroy(ioa_cfg->ipr_cmd_pool);
  8344. kfree(ioa_cfg->ipr_cmnd_list);
  8345. kfree(ioa_cfg->ipr_cmnd_list_dma);
  8346. ioa_cfg->ipr_cmnd_list = NULL;
  8347. ioa_cfg->ipr_cmnd_list_dma = NULL;
  8348. ioa_cfg->ipr_cmd_pool = NULL;
  8349. }
  8350. /**
  8351. * ipr_free_mem - Frees memory allocated for an adapter
  8352. * @ioa_cfg: ioa cfg struct
  8353. *
  8354. * Return value:
  8355. * nothing
  8356. **/
  8357. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  8358. {
  8359. int i;
  8360. kfree(ioa_cfg->res_entries);
  8361. dma_free_coherent(&ioa_cfg->pdev->dev, sizeof(struct ipr_misc_cbs),
  8362. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8363. ipr_free_cmd_blks(ioa_cfg);
  8364. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  8365. dma_free_coherent(&ioa_cfg->pdev->dev,
  8366. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8367. ioa_cfg->hrrq[i].host_rrq,
  8368. ioa_cfg->hrrq[i].host_rrq_dma);
  8369. dma_free_coherent(&ioa_cfg->pdev->dev, ioa_cfg->cfg_table_size,
  8370. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8371. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  8372. dma_free_coherent(&ioa_cfg->pdev->dev,
  8373. sizeof(struct ipr_hostrcb),
  8374. ioa_cfg->hostrcb[i],
  8375. ioa_cfg->hostrcb_dma[i]);
  8376. }
  8377. ipr_free_dump(ioa_cfg);
  8378. kfree(ioa_cfg->trace);
  8379. }
  8380. /**
  8381. * ipr_free_irqs - Free all allocated IRQs for the adapter.
  8382. * @ioa_cfg: ipr cfg struct
  8383. *
  8384. * This function frees all allocated IRQs for the
  8385. * specified adapter.
  8386. *
  8387. * Return value:
  8388. * none
  8389. **/
  8390. static void ipr_free_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8391. {
  8392. struct pci_dev *pdev = ioa_cfg->pdev;
  8393. int i;
  8394. for (i = 0; i < ioa_cfg->nvectors; i++)
  8395. free_irq(pci_irq_vector(pdev, i), &ioa_cfg->hrrq[i]);
  8396. pci_free_irq_vectors(pdev);
  8397. }
  8398. /**
  8399. * ipr_free_all_resources - Free all allocated resources for an adapter.
  8400. * @ipr_cmd: ipr command struct
  8401. *
  8402. * This function frees all allocated resources for the
  8403. * specified adapter.
  8404. *
  8405. * Return value:
  8406. * none
  8407. **/
  8408. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  8409. {
  8410. struct pci_dev *pdev = ioa_cfg->pdev;
  8411. ENTER;
  8412. ipr_free_irqs(ioa_cfg);
  8413. if (ioa_cfg->reset_work_q)
  8414. destroy_workqueue(ioa_cfg->reset_work_q);
  8415. iounmap(ioa_cfg->hdw_dma_regs);
  8416. pci_release_regions(pdev);
  8417. ipr_free_mem(ioa_cfg);
  8418. scsi_host_put(ioa_cfg->host);
  8419. pci_disable_device(pdev);
  8420. LEAVE;
  8421. }
  8422. /**
  8423. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  8424. * @ioa_cfg: ioa config struct
  8425. *
  8426. * Return value:
  8427. * 0 on success / -ENOMEM on allocation failure
  8428. **/
  8429. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  8430. {
  8431. struct ipr_cmnd *ipr_cmd;
  8432. struct ipr_ioarcb *ioarcb;
  8433. dma_addr_t dma_addr;
  8434. int i, entries_each_hrrq, hrrq_id = 0;
  8435. ioa_cfg->ipr_cmd_pool = dma_pool_create(IPR_NAME, &ioa_cfg->pdev->dev,
  8436. sizeof(struct ipr_cmnd), 512, 0);
  8437. if (!ioa_cfg->ipr_cmd_pool)
  8438. return -ENOMEM;
  8439. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  8440. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  8441. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  8442. ipr_free_cmd_blks(ioa_cfg);
  8443. return -ENOMEM;
  8444. }
  8445. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8446. if (ioa_cfg->hrrq_num > 1) {
  8447. if (i == 0) {
  8448. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  8449. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8450. ioa_cfg->hrrq[i].max_cmd_id =
  8451. (entries_each_hrrq - 1);
  8452. } else {
  8453. entries_each_hrrq =
  8454. IPR_NUM_BASE_CMD_BLKS/
  8455. (ioa_cfg->hrrq_num - 1);
  8456. ioa_cfg->hrrq[i].min_cmd_id =
  8457. IPR_NUM_INTERNAL_CMD_BLKS +
  8458. (i - 1) * entries_each_hrrq;
  8459. ioa_cfg->hrrq[i].max_cmd_id =
  8460. (IPR_NUM_INTERNAL_CMD_BLKS +
  8461. i * entries_each_hrrq - 1);
  8462. }
  8463. } else {
  8464. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  8465. ioa_cfg->hrrq[i].min_cmd_id = 0;
  8466. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  8467. }
  8468. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  8469. }
  8470. BUG_ON(ioa_cfg->hrrq_num == 0);
  8471. i = IPR_NUM_CMD_BLKS -
  8472. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  8473. if (i > 0) {
  8474. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  8475. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  8476. }
  8477. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  8478. ipr_cmd = dma_pool_zalloc(ioa_cfg->ipr_cmd_pool,
  8479. GFP_KERNEL, &dma_addr);
  8480. if (!ipr_cmd) {
  8481. ipr_free_cmd_blks(ioa_cfg);
  8482. return -ENOMEM;
  8483. }
  8484. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  8485. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  8486. ioarcb = &ipr_cmd->ioarcb;
  8487. ipr_cmd->dma_addr = dma_addr;
  8488. if (ioa_cfg->sis64)
  8489. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  8490. else
  8491. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  8492. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  8493. if (ioa_cfg->sis64) {
  8494. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  8495. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  8496. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  8497. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  8498. } else {
  8499. ioarcb->write_ioadl_addr =
  8500. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  8501. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  8502. ioarcb->ioasa_host_pci_addr =
  8503. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  8504. }
  8505. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  8506. ipr_cmd->cmd_index = i;
  8507. ipr_cmd->ioa_cfg = ioa_cfg;
  8508. ipr_cmd->sense_buffer_dma = dma_addr +
  8509. offsetof(struct ipr_cmnd, sense_buffer);
  8510. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  8511. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  8512. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8513. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  8514. hrrq_id++;
  8515. }
  8516. return 0;
  8517. }
  8518. /**
  8519. * ipr_alloc_mem - Allocate memory for an adapter
  8520. * @ioa_cfg: ioa config struct
  8521. *
  8522. * Return value:
  8523. * 0 on success / non-zero for error
  8524. **/
  8525. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  8526. {
  8527. struct pci_dev *pdev = ioa_cfg->pdev;
  8528. int i, rc = -ENOMEM;
  8529. ENTER;
  8530. ioa_cfg->res_entries = kcalloc(ioa_cfg->max_devs_supported,
  8531. sizeof(struct ipr_resource_entry),
  8532. GFP_KERNEL);
  8533. if (!ioa_cfg->res_entries)
  8534. goto out;
  8535. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  8536. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  8537. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  8538. }
  8539. ioa_cfg->vpd_cbs = dma_alloc_coherent(&pdev->dev,
  8540. sizeof(struct ipr_misc_cbs),
  8541. &ioa_cfg->vpd_cbs_dma,
  8542. GFP_KERNEL);
  8543. if (!ioa_cfg->vpd_cbs)
  8544. goto out_free_res_entries;
  8545. if (ipr_alloc_cmd_blks(ioa_cfg))
  8546. goto out_free_vpd_cbs;
  8547. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8548. ioa_cfg->hrrq[i].host_rrq = dma_alloc_coherent(&pdev->dev,
  8549. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8550. &ioa_cfg->hrrq[i].host_rrq_dma,
  8551. GFP_KERNEL);
  8552. if (!ioa_cfg->hrrq[i].host_rrq) {
  8553. while (--i > 0)
  8554. dma_free_coherent(&pdev->dev,
  8555. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8556. ioa_cfg->hrrq[i].host_rrq,
  8557. ioa_cfg->hrrq[i].host_rrq_dma);
  8558. goto out_ipr_free_cmd_blocks;
  8559. }
  8560. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  8561. }
  8562. ioa_cfg->u.cfg_table = dma_alloc_coherent(&pdev->dev,
  8563. ioa_cfg->cfg_table_size,
  8564. &ioa_cfg->cfg_table_dma,
  8565. GFP_KERNEL);
  8566. if (!ioa_cfg->u.cfg_table)
  8567. goto out_free_host_rrq;
  8568. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  8569. ioa_cfg->hostrcb[i] = dma_alloc_coherent(&pdev->dev,
  8570. sizeof(struct ipr_hostrcb),
  8571. &ioa_cfg->hostrcb_dma[i],
  8572. GFP_KERNEL);
  8573. if (!ioa_cfg->hostrcb[i])
  8574. goto out_free_hostrcb_dma;
  8575. ioa_cfg->hostrcb[i]->hostrcb_dma =
  8576. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  8577. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  8578. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  8579. }
  8580. ioa_cfg->trace = kcalloc(IPR_NUM_TRACE_ENTRIES,
  8581. sizeof(struct ipr_trace_entry),
  8582. GFP_KERNEL);
  8583. if (!ioa_cfg->trace)
  8584. goto out_free_hostrcb_dma;
  8585. rc = 0;
  8586. out:
  8587. LEAVE;
  8588. return rc;
  8589. out_free_hostrcb_dma:
  8590. while (i-- > 0) {
  8591. dma_free_coherent(&pdev->dev, sizeof(struct ipr_hostrcb),
  8592. ioa_cfg->hostrcb[i],
  8593. ioa_cfg->hostrcb_dma[i]);
  8594. }
  8595. dma_free_coherent(&pdev->dev, ioa_cfg->cfg_table_size,
  8596. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  8597. out_free_host_rrq:
  8598. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8599. dma_free_coherent(&pdev->dev,
  8600. sizeof(u32) * ioa_cfg->hrrq[i].size,
  8601. ioa_cfg->hrrq[i].host_rrq,
  8602. ioa_cfg->hrrq[i].host_rrq_dma);
  8603. }
  8604. out_ipr_free_cmd_blocks:
  8605. ipr_free_cmd_blks(ioa_cfg);
  8606. out_free_vpd_cbs:
  8607. dma_free_coherent(&pdev->dev, sizeof(struct ipr_misc_cbs),
  8608. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  8609. out_free_res_entries:
  8610. kfree(ioa_cfg->res_entries);
  8611. goto out;
  8612. }
  8613. /**
  8614. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  8615. * @ioa_cfg: ioa config struct
  8616. *
  8617. * Return value:
  8618. * none
  8619. **/
  8620. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  8621. {
  8622. int i;
  8623. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  8624. ioa_cfg->bus_attr[i].bus = i;
  8625. ioa_cfg->bus_attr[i].qas_enabled = 0;
  8626. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  8627. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  8628. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  8629. else
  8630. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  8631. }
  8632. }
  8633. /**
  8634. * ipr_init_regs - Initialize IOA registers
  8635. * @ioa_cfg: ioa config struct
  8636. *
  8637. * Return value:
  8638. * none
  8639. **/
  8640. static void ipr_init_regs(struct ipr_ioa_cfg *ioa_cfg)
  8641. {
  8642. const struct ipr_interrupt_offsets *p;
  8643. struct ipr_interrupts *t;
  8644. void __iomem *base;
  8645. p = &ioa_cfg->chip_cfg->regs;
  8646. t = &ioa_cfg->regs;
  8647. base = ioa_cfg->hdw_dma_regs;
  8648. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  8649. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  8650. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  8651. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  8652. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  8653. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  8654. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  8655. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  8656. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  8657. t->ioarrin_reg = base + p->ioarrin_reg;
  8658. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  8659. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  8660. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  8661. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  8662. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  8663. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  8664. if (ioa_cfg->sis64) {
  8665. t->init_feedback_reg = base + p->init_feedback_reg;
  8666. t->dump_addr_reg = base + p->dump_addr_reg;
  8667. t->dump_data_reg = base + p->dump_data_reg;
  8668. t->endian_swap_reg = base + p->endian_swap_reg;
  8669. }
  8670. }
  8671. /**
  8672. * ipr_init_ioa_cfg - Initialize IOA config struct
  8673. * @ioa_cfg: ioa config struct
  8674. * @host: scsi host struct
  8675. * @pdev: PCI dev struct
  8676. *
  8677. * Return value:
  8678. * none
  8679. **/
  8680. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  8681. struct Scsi_Host *host, struct pci_dev *pdev)
  8682. {
  8683. int i;
  8684. ioa_cfg->host = host;
  8685. ioa_cfg->pdev = pdev;
  8686. ioa_cfg->log_level = ipr_log_level;
  8687. ioa_cfg->doorbell = IPR_DOORBELL;
  8688. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  8689. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  8690. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  8691. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  8692. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  8693. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  8694. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  8695. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  8696. INIT_LIST_HEAD(&ioa_cfg->hostrcb_report_q);
  8697. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  8698. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8699. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  8700. INIT_WORK(&ioa_cfg->scsi_add_work_q, ipr_add_remove_thread);
  8701. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  8702. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8703. init_waitqueue_head(&ioa_cfg->eeh_wait_q);
  8704. ioa_cfg->sdt_state = INACTIVE;
  8705. ipr_initialize_bus_attr(ioa_cfg);
  8706. ioa_cfg->max_devs_supported = ipr_max_devs;
  8707. if (ioa_cfg->sis64) {
  8708. host->max_channel = IPR_MAX_SIS64_BUSES;
  8709. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  8710. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  8711. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  8712. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  8713. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8714. + ((sizeof(struct ipr_config_table_entry64)
  8715. * ioa_cfg->max_devs_supported)));
  8716. } else {
  8717. host->max_channel = IPR_VSET_BUS;
  8718. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  8719. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  8720. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  8721. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  8722. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8723. + ((sizeof(struct ipr_config_table_entry)
  8724. * ioa_cfg->max_devs_supported)));
  8725. }
  8726. host->unique_id = host->host_no;
  8727. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8728. host->can_queue = ioa_cfg->max_cmds;
  8729. pci_set_drvdata(pdev, ioa_cfg);
  8730. for (i = 0; i < ARRAY_SIZE(ioa_cfg->hrrq); i++) {
  8731. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  8732. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  8733. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  8734. if (i == 0)
  8735. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  8736. else
  8737. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  8738. }
  8739. }
  8740. /**
  8741. * ipr_get_chip_info - Find adapter chip information
  8742. * @dev_id: PCI device id struct
  8743. *
  8744. * Return value:
  8745. * ptr to chip information on success / NULL on failure
  8746. **/
  8747. static const struct ipr_chip_t *
  8748. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8749. {
  8750. int i;
  8751. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8752. if (ipr_chip[i].vendor == dev_id->vendor &&
  8753. ipr_chip[i].device == dev_id->device)
  8754. return &ipr_chip[i];
  8755. return NULL;
  8756. }
  8757. /**
  8758. * ipr_wait_for_pci_err_recovery - Wait for any PCI error recovery to complete
  8759. * during probe time
  8760. * @ioa_cfg: ioa config struct
  8761. *
  8762. * Return value:
  8763. * None
  8764. **/
  8765. static void ipr_wait_for_pci_err_recovery(struct ipr_ioa_cfg *ioa_cfg)
  8766. {
  8767. struct pci_dev *pdev = ioa_cfg->pdev;
  8768. if (pci_channel_offline(pdev)) {
  8769. wait_event_timeout(ioa_cfg->eeh_wait_q,
  8770. !pci_channel_offline(pdev),
  8771. IPR_PCI_ERROR_RECOVERY_TIMEOUT);
  8772. pci_restore_state(pdev);
  8773. }
  8774. }
  8775. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8776. {
  8777. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8778. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8779. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8780. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8781. ioa_cfg->vectors_info[vec_idx].
  8782. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8783. }
  8784. }
  8785. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg,
  8786. struct pci_dev *pdev)
  8787. {
  8788. int i, rc;
  8789. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8790. rc = request_irq(pci_irq_vector(pdev, i),
  8791. ipr_isr_mhrrq,
  8792. 0,
  8793. ioa_cfg->vectors_info[i].desc,
  8794. &ioa_cfg->hrrq[i]);
  8795. if (rc) {
  8796. while (--i >= 0)
  8797. free_irq(pci_irq_vector(pdev, i),
  8798. &ioa_cfg->hrrq[i]);
  8799. return rc;
  8800. }
  8801. }
  8802. return 0;
  8803. }
  8804. /**
  8805. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8806. * @pdev: PCI device struct
  8807. *
  8808. * Description: Simply set the msi_received flag to 1 indicating that
  8809. * Message Signaled Interrupts are supported.
  8810. *
  8811. * Return value:
  8812. * 0 on success / non-zero on failure
  8813. **/
  8814. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8815. {
  8816. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8817. unsigned long lock_flags = 0;
  8818. irqreturn_t rc = IRQ_HANDLED;
  8819. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8820. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8821. ioa_cfg->msi_received = 1;
  8822. wake_up(&ioa_cfg->msi_wait_q);
  8823. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8824. return rc;
  8825. }
  8826. /**
  8827. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8828. * @pdev: PCI device struct
  8829. *
  8830. * Description: This routine sets up and initiates a test interrupt to determine
  8831. * if the interrupt is received via the ipr_test_intr() service routine.
  8832. * If the tests fails, the driver will fall back to LSI.
  8833. *
  8834. * Return value:
  8835. * 0 on success / non-zero on failure
  8836. **/
  8837. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8838. {
  8839. int rc;
  8840. volatile u32 int_reg;
  8841. unsigned long lock_flags = 0;
  8842. int irq = pci_irq_vector(pdev, 0);
  8843. ENTER;
  8844. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8845. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8846. ioa_cfg->msi_received = 0;
  8847. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8848. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8849. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8850. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8851. rc = request_irq(irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8852. if (rc) {
  8853. dev_err(&pdev->dev, "Can not assign irq %d\n", irq);
  8854. return rc;
  8855. } else if (ipr_debug)
  8856. dev_info(&pdev->dev, "IRQ assigned: %d\n", irq);
  8857. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8858. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8859. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8860. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8861. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8862. if (!ioa_cfg->msi_received) {
  8863. /* MSI test failed */
  8864. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8865. rc = -EOPNOTSUPP;
  8866. } else if (ipr_debug)
  8867. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8868. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8869. free_irq(irq, ioa_cfg);
  8870. LEAVE;
  8871. return rc;
  8872. }
  8873. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8874. * @pdev: PCI device struct
  8875. * @dev_id: PCI device id struct
  8876. *
  8877. * Return value:
  8878. * 0 on success / non-zero on failure
  8879. **/
  8880. static int ipr_probe_ioa(struct pci_dev *pdev,
  8881. const struct pci_device_id *dev_id)
  8882. {
  8883. struct ipr_ioa_cfg *ioa_cfg;
  8884. struct Scsi_Host *host;
  8885. unsigned long ipr_regs_pci;
  8886. void __iomem *ipr_regs;
  8887. int rc = PCIBIOS_SUCCESSFUL;
  8888. volatile u32 mask, uproc, interrupts;
  8889. unsigned long lock_flags, driver_lock_flags;
  8890. unsigned int irq_flag;
  8891. ENTER;
  8892. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8893. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8894. if (!host) {
  8895. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8896. rc = -ENOMEM;
  8897. goto out;
  8898. }
  8899. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8900. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8901. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8902. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8903. if (!ioa_cfg->ipr_chip) {
  8904. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8905. dev_id->vendor, dev_id->device);
  8906. goto out_scsi_host_put;
  8907. }
  8908. /* set SIS 32 or SIS 64 */
  8909. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8910. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8911. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8912. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8913. if (ipr_transop_timeout)
  8914. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8915. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8916. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8917. else
  8918. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8919. ioa_cfg->revid = pdev->revision;
  8920. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8921. ipr_regs_pci = pci_resource_start(pdev, 0);
  8922. rc = pci_request_regions(pdev, IPR_NAME);
  8923. if (rc < 0) {
  8924. dev_err(&pdev->dev,
  8925. "Couldn't register memory range of registers\n");
  8926. goto out_scsi_host_put;
  8927. }
  8928. rc = pci_enable_device(pdev);
  8929. if (rc || pci_channel_offline(pdev)) {
  8930. if (pci_channel_offline(pdev)) {
  8931. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8932. rc = pci_enable_device(pdev);
  8933. }
  8934. if (rc) {
  8935. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8936. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8937. goto out_release_regions;
  8938. }
  8939. }
  8940. ipr_regs = pci_ioremap_bar(pdev, 0);
  8941. if (!ipr_regs) {
  8942. dev_err(&pdev->dev,
  8943. "Couldn't map memory range of registers\n");
  8944. rc = -ENOMEM;
  8945. goto out_disable;
  8946. }
  8947. ioa_cfg->hdw_dma_regs = ipr_regs;
  8948. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8949. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8950. ipr_init_regs(ioa_cfg);
  8951. if (ioa_cfg->sis64) {
  8952. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  8953. if (rc < 0) {
  8954. dev_dbg(&pdev->dev, "Failed to set 64 bit DMA mask\n");
  8955. rc = dma_set_mask_and_coherent(&pdev->dev,
  8956. DMA_BIT_MASK(32));
  8957. }
  8958. } else
  8959. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  8960. if (rc < 0) {
  8961. dev_err(&pdev->dev, "Failed to set DMA mask\n");
  8962. goto cleanup_nomem;
  8963. }
  8964. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8965. ioa_cfg->chip_cfg->cache_line_size);
  8966. if (rc != PCIBIOS_SUCCESSFUL) {
  8967. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8968. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8969. rc = -EIO;
  8970. goto cleanup_nomem;
  8971. }
  8972. /* Issue MMIO read to ensure card is not in EEH */
  8973. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg);
  8974. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8975. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8976. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8977. IPR_MAX_MSIX_VECTORS);
  8978. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8979. }
  8980. irq_flag = PCI_IRQ_LEGACY;
  8981. if (ioa_cfg->ipr_chip->has_msi)
  8982. irq_flag |= PCI_IRQ_MSI | PCI_IRQ_MSIX;
  8983. rc = pci_alloc_irq_vectors(pdev, 1, ipr_number_of_msix, irq_flag);
  8984. if (rc < 0) {
  8985. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8986. goto cleanup_nomem;
  8987. }
  8988. ioa_cfg->nvectors = rc;
  8989. if (!pdev->msi_enabled && !pdev->msix_enabled)
  8990. ioa_cfg->clear_isr = 1;
  8991. pci_set_master(pdev);
  8992. if (pci_channel_offline(pdev)) {
  8993. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8994. pci_set_master(pdev);
  8995. if (pci_channel_offline(pdev)) {
  8996. rc = -EIO;
  8997. goto out_msi_disable;
  8998. }
  8999. }
  9000. if (pdev->msi_enabled || pdev->msix_enabled) {
  9001. rc = ipr_test_msi(ioa_cfg, pdev);
  9002. switch (rc) {
  9003. case 0:
  9004. dev_info(&pdev->dev,
  9005. "Request for %d MSI%ss succeeded.", ioa_cfg->nvectors,
  9006. pdev->msix_enabled ? "-X" : "");
  9007. break;
  9008. case -EOPNOTSUPP:
  9009. ipr_wait_for_pci_err_recovery(ioa_cfg);
  9010. pci_free_irq_vectors(pdev);
  9011. ioa_cfg->nvectors = 1;
  9012. ioa_cfg->clear_isr = 1;
  9013. break;
  9014. default:
  9015. goto out_msi_disable;
  9016. }
  9017. }
  9018. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  9019. (unsigned int)num_online_cpus(),
  9020. (unsigned int)IPR_MAX_HRRQ_NUM);
  9021. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  9022. goto out_msi_disable;
  9023. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  9024. goto out_msi_disable;
  9025. rc = ipr_alloc_mem(ioa_cfg);
  9026. if (rc < 0) {
  9027. dev_err(&pdev->dev,
  9028. "Couldn't allocate enough memory for device driver!\n");
  9029. goto out_msi_disable;
  9030. }
  9031. /* Save away PCI config space for use following IOA reset */
  9032. rc = pci_save_state(pdev);
  9033. if (rc != PCIBIOS_SUCCESSFUL) {
  9034. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  9035. rc = -EIO;
  9036. goto cleanup_nolog;
  9037. }
  9038. /*
  9039. * If HRRQ updated interrupt is not masked, or reset alert is set,
  9040. * the card is in an unknown state and needs a hard reset
  9041. */
  9042. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  9043. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  9044. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  9045. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  9046. ioa_cfg->needs_hard_reset = 1;
  9047. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  9048. ioa_cfg->needs_hard_reset = 1;
  9049. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  9050. ioa_cfg->ioa_unit_checked = 1;
  9051. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9052. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  9053. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9054. if (pdev->msi_enabled || pdev->msix_enabled) {
  9055. name_msi_vectors(ioa_cfg);
  9056. rc = request_irq(pci_irq_vector(pdev, 0), ipr_isr, 0,
  9057. ioa_cfg->vectors_info[0].desc,
  9058. &ioa_cfg->hrrq[0]);
  9059. if (!rc)
  9060. rc = ipr_request_other_msi_irqs(ioa_cfg, pdev);
  9061. } else {
  9062. rc = request_irq(pdev->irq, ipr_isr,
  9063. IRQF_SHARED,
  9064. IPR_NAME, &ioa_cfg->hrrq[0]);
  9065. }
  9066. if (rc) {
  9067. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  9068. pdev->irq, rc);
  9069. goto cleanup_nolog;
  9070. }
  9071. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  9072. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  9073. ioa_cfg->needs_warm_reset = 1;
  9074. ioa_cfg->reset = ipr_reset_slot_reset;
  9075. ioa_cfg->reset_work_q = alloc_ordered_workqueue("ipr_reset_%d",
  9076. WQ_MEM_RECLAIM, host->host_no);
  9077. if (!ioa_cfg->reset_work_q) {
  9078. dev_err(&pdev->dev, "Couldn't register reset workqueue\n");
  9079. rc = -ENOMEM;
  9080. goto out_free_irq;
  9081. }
  9082. } else
  9083. ioa_cfg->reset = ipr_reset_start_bist;
  9084. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9085. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  9086. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9087. LEAVE;
  9088. out:
  9089. return rc;
  9090. out_free_irq:
  9091. ipr_free_irqs(ioa_cfg);
  9092. cleanup_nolog:
  9093. ipr_free_mem(ioa_cfg);
  9094. out_msi_disable:
  9095. ipr_wait_for_pci_err_recovery(ioa_cfg);
  9096. pci_free_irq_vectors(pdev);
  9097. cleanup_nomem:
  9098. iounmap(ipr_regs);
  9099. out_disable:
  9100. pci_disable_device(pdev);
  9101. out_release_regions:
  9102. pci_release_regions(pdev);
  9103. out_scsi_host_put:
  9104. scsi_host_put(host);
  9105. goto out;
  9106. }
  9107. /**
  9108. * ipr_initiate_ioa_bringdown - Bring down an adapter
  9109. * @ioa_cfg: ioa config struct
  9110. * @shutdown_type: shutdown type
  9111. *
  9112. * Description: This function will initiate bringing down the adapter.
  9113. * This consists of issuing an IOA shutdown to the adapter
  9114. * to flush the cache, and running BIST.
  9115. * If the caller needs to wait on the completion of the reset,
  9116. * the caller must sleep on the reset_wait_q.
  9117. *
  9118. * Return value:
  9119. * none
  9120. **/
  9121. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  9122. enum ipr_shutdown_type shutdown_type)
  9123. {
  9124. ENTER;
  9125. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  9126. ioa_cfg->sdt_state = ABORT_DUMP;
  9127. ioa_cfg->reset_retries = 0;
  9128. ioa_cfg->in_ioa_bringdown = 1;
  9129. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  9130. LEAVE;
  9131. }
  9132. /**
  9133. * __ipr_remove - Remove a single adapter
  9134. * @pdev: pci device struct
  9135. *
  9136. * Adapter hot plug remove entry point.
  9137. *
  9138. * Return value:
  9139. * none
  9140. **/
  9141. static void __ipr_remove(struct pci_dev *pdev)
  9142. {
  9143. unsigned long host_lock_flags = 0;
  9144. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9145. int i;
  9146. unsigned long driver_lock_flags;
  9147. ENTER;
  9148. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9149. while (ioa_cfg->in_reset_reload) {
  9150. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9151. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9152. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9153. }
  9154. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  9155. spin_lock(&ioa_cfg->hrrq[i]._lock);
  9156. ioa_cfg->hrrq[i].removing_ioa = 1;
  9157. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  9158. }
  9159. wmb();
  9160. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  9161. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9162. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9163. flush_work(&ioa_cfg->work_q);
  9164. if (ioa_cfg->reset_work_q)
  9165. flush_workqueue(ioa_cfg->reset_work_q);
  9166. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  9167. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  9168. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9169. list_del(&ioa_cfg->queue);
  9170. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9171. if (ioa_cfg->sdt_state == ABORT_DUMP)
  9172. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  9173. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  9174. ipr_free_all_resources(ioa_cfg);
  9175. LEAVE;
  9176. }
  9177. /**
  9178. * ipr_remove - IOA hot plug remove entry point
  9179. * @pdev: pci device struct
  9180. *
  9181. * Adapter hot plug remove entry point.
  9182. *
  9183. * Return value:
  9184. * none
  9185. **/
  9186. static void ipr_remove(struct pci_dev *pdev)
  9187. {
  9188. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9189. ENTER;
  9190. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9191. &ipr_trace_attr);
  9192. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9193. &ipr_dump_attr);
  9194. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9195. &ipr_ioa_async_err_log);
  9196. scsi_remove_host(ioa_cfg->host);
  9197. __ipr_remove(pdev);
  9198. LEAVE;
  9199. }
  9200. /**
  9201. * ipr_probe - Adapter hot plug add entry point
  9202. *
  9203. * Return value:
  9204. * 0 on success / non-zero on failure
  9205. **/
  9206. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  9207. {
  9208. struct ipr_ioa_cfg *ioa_cfg;
  9209. unsigned long flags;
  9210. int rc, i;
  9211. rc = ipr_probe_ioa(pdev, dev_id);
  9212. if (rc)
  9213. return rc;
  9214. ioa_cfg = pci_get_drvdata(pdev);
  9215. rc = ipr_probe_ioa_part2(ioa_cfg);
  9216. if (rc) {
  9217. __ipr_remove(pdev);
  9218. return rc;
  9219. }
  9220. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  9221. if (rc) {
  9222. __ipr_remove(pdev);
  9223. return rc;
  9224. }
  9225. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9226. &ipr_trace_attr);
  9227. if (rc) {
  9228. scsi_remove_host(ioa_cfg->host);
  9229. __ipr_remove(pdev);
  9230. return rc;
  9231. }
  9232. rc = sysfs_create_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9233. &ipr_ioa_async_err_log);
  9234. if (rc) {
  9235. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9236. &ipr_dump_attr);
  9237. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9238. &ipr_trace_attr);
  9239. scsi_remove_host(ioa_cfg->host);
  9240. __ipr_remove(pdev);
  9241. return rc;
  9242. }
  9243. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  9244. &ipr_dump_attr);
  9245. if (rc) {
  9246. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  9247. &ipr_ioa_async_err_log);
  9248. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  9249. &ipr_trace_attr);
  9250. scsi_remove_host(ioa_cfg->host);
  9251. __ipr_remove(pdev);
  9252. return rc;
  9253. }
  9254. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  9255. ioa_cfg->scan_enabled = 1;
  9256. schedule_work(&ioa_cfg->work_q);
  9257. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9258. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  9259. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9260. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  9261. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  9262. ioa_cfg->iopoll_weight, ipr_iopoll);
  9263. }
  9264. }
  9265. scsi_scan_host(ioa_cfg->host);
  9266. return 0;
  9267. }
  9268. /**
  9269. * ipr_shutdown - Shutdown handler.
  9270. * @pdev: pci device struct
  9271. *
  9272. * This function is invoked upon system shutdown/reboot. It will issue
  9273. * an adapter shutdown to the adapter to flush the write cache.
  9274. *
  9275. * Return value:
  9276. * none
  9277. **/
  9278. static void ipr_shutdown(struct pci_dev *pdev)
  9279. {
  9280. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  9281. unsigned long lock_flags = 0;
  9282. enum ipr_shutdown_type shutdown_type = IPR_SHUTDOWN_NORMAL;
  9283. int i;
  9284. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9285. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  9286. ioa_cfg->iopoll_weight = 0;
  9287. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  9288. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  9289. }
  9290. while (ioa_cfg->in_reset_reload) {
  9291. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9292. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9293. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  9294. }
  9295. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64)
  9296. shutdown_type = IPR_SHUTDOWN_QUIESCE;
  9297. ipr_initiate_ioa_bringdown(ioa_cfg, shutdown_type);
  9298. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  9299. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  9300. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64) {
  9301. ipr_free_irqs(ioa_cfg);
  9302. pci_disable_device(ioa_cfg->pdev);
  9303. }
  9304. }
  9305. static struct pci_device_id ipr_pci_table[] = {
  9306. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9307. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  9308. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9309. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  9310. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9311. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  9312. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  9313. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  9314. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9315. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  9316. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9317. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  9318. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9319. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  9320. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  9321. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  9322. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9323. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9324. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9325. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9326. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9327. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9328. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  9329. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9330. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9331. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9332. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  9333. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9334. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  9335. IPR_USE_LONG_TRANSOP_TIMEOUT},
  9336. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  9337. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  9338. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9339. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9340. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  9341. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9342. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9343. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  9344. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9345. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  9346. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  9347. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  9348. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  9349. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  9350. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  9351. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9352. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  9353. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9354. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  9355. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9356. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  9357. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  9358. IPR_USE_LONG_TRANSOP_TIMEOUT },
  9359. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9360. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  9361. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9362. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  9363. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9364. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  9365. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9366. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  9367. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9368. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  9369. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  9370. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  9371. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9372. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  9373. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9374. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  9375. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9376. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  9377. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9378. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  9379. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9380. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  9381. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9382. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  9383. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9384. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  9385. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9386. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  9387. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9388. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  9389. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9390. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
  9391. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9392. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57DA, 0, 0, 0 },
  9393. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9394. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
  9395. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9396. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
  9397. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9398. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
  9399. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9400. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
  9401. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9402. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
  9403. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9404. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
  9405. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9406. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCA, 0, 0, 0 },
  9407. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9408. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
  9409. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  9410. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
  9411. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  9412. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580A, 0, 0, 0 },
  9413. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  9414. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580B, 0, 0, 0 },
  9415. { }
  9416. };
  9417. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  9418. static const struct pci_error_handlers ipr_err_handler = {
  9419. .error_detected = ipr_pci_error_detected,
  9420. .mmio_enabled = ipr_pci_mmio_enabled,
  9421. .slot_reset = ipr_pci_slot_reset,
  9422. };
  9423. static struct pci_driver ipr_driver = {
  9424. .name = IPR_NAME,
  9425. .id_table = ipr_pci_table,
  9426. .probe = ipr_probe,
  9427. .remove = ipr_remove,
  9428. .shutdown = ipr_shutdown,
  9429. .err_handler = &ipr_err_handler,
  9430. };
  9431. /**
  9432. * ipr_halt_done - Shutdown prepare completion
  9433. *
  9434. * Return value:
  9435. * none
  9436. **/
  9437. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  9438. {
  9439. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  9440. }
  9441. /**
  9442. * ipr_halt - Issue shutdown prepare to all adapters
  9443. *
  9444. * Return value:
  9445. * NOTIFY_OK on success / NOTIFY_DONE on failure
  9446. **/
  9447. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  9448. {
  9449. struct ipr_cmnd *ipr_cmd;
  9450. struct ipr_ioa_cfg *ioa_cfg;
  9451. unsigned long flags = 0, driver_lock_flags;
  9452. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  9453. return NOTIFY_DONE;
  9454. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  9455. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  9456. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  9457. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  9458. (ipr_fast_reboot && event == SYS_RESTART && ioa_cfg->sis64)) {
  9459. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9460. continue;
  9461. }
  9462. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  9463. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  9464. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  9465. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  9466. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  9467. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  9468. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  9469. }
  9470. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  9471. return NOTIFY_OK;
  9472. }
  9473. static struct notifier_block ipr_notifier = {
  9474. ipr_halt, NULL, 0
  9475. };
  9476. /**
  9477. * ipr_init - Module entry point
  9478. *
  9479. * Return value:
  9480. * 0 on success / negative value on failure
  9481. **/
  9482. static int __init ipr_init(void)
  9483. {
  9484. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  9485. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  9486. register_reboot_notifier(&ipr_notifier);
  9487. return pci_register_driver(&ipr_driver);
  9488. }
  9489. /**
  9490. * ipr_exit - Module unload
  9491. *
  9492. * Module unload entry point.
  9493. *
  9494. * Return value:
  9495. * none
  9496. **/
  9497. static void __exit ipr_exit(void)
  9498. {
  9499. unregister_reboot_notifier(&ipr_notifier);
  9500. pci_unregister_driver(&ipr_driver);
  9501. }
  9502. module_init(ipr_init);
  9503. module_exit(ipr_exit);