hisi_sas_main.c 66 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. */
  11. #include "hisi_sas.h"
  12. #include "../libsas/sas_internal.h"
  13. #define DRV_NAME "hisi_sas"
  14. #define DEV_IS_GONE(dev) \
  15. ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
  16. static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
  17. u8 *lun, struct hisi_sas_tmf_task *tmf);
  18. static int
  19. hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
  20. struct domain_device *device,
  21. int abort_flag, int tag);
  22. static int hisi_sas_softreset_ata_disk(struct domain_device *device);
  23. static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
  24. void *funcdata);
  25. static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
  26. struct domain_device *device);
  27. static void hisi_sas_dev_gone(struct domain_device *device);
  28. u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
  29. {
  30. switch (fis->command) {
  31. case ATA_CMD_FPDMA_WRITE:
  32. case ATA_CMD_FPDMA_READ:
  33. case ATA_CMD_FPDMA_RECV:
  34. case ATA_CMD_FPDMA_SEND:
  35. case ATA_CMD_NCQ_NON_DATA:
  36. return HISI_SAS_SATA_PROTOCOL_FPDMA;
  37. case ATA_CMD_DOWNLOAD_MICRO:
  38. case ATA_CMD_ID_ATA:
  39. case ATA_CMD_PMP_READ:
  40. case ATA_CMD_READ_LOG_EXT:
  41. case ATA_CMD_PIO_READ:
  42. case ATA_CMD_PIO_READ_EXT:
  43. case ATA_CMD_PMP_WRITE:
  44. case ATA_CMD_WRITE_LOG_EXT:
  45. case ATA_CMD_PIO_WRITE:
  46. case ATA_CMD_PIO_WRITE_EXT:
  47. return HISI_SAS_SATA_PROTOCOL_PIO;
  48. case ATA_CMD_DSM:
  49. case ATA_CMD_DOWNLOAD_MICRO_DMA:
  50. case ATA_CMD_PMP_READ_DMA:
  51. case ATA_CMD_PMP_WRITE_DMA:
  52. case ATA_CMD_READ:
  53. case ATA_CMD_READ_EXT:
  54. case ATA_CMD_READ_LOG_DMA_EXT:
  55. case ATA_CMD_READ_STREAM_DMA_EXT:
  56. case ATA_CMD_TRUSTED_RCV_DMA:
  57. case ATA_CMD_TRUSTED_SND_DMA:
  58. case ATA_CMD_WRITE:
  59. case ATA_CMD_WRITE_EXT:
  60. case ATA_CMD_WRITE_FUA_EXT:
  61. case ATA_CMD_WRITE_QUEUED:
  62. case ATA_CMD_WRITE_LOG_DMA_EXT:
  63. case ATA_CMD_WRITE_STREAM_DMA_EXT:
  64. case ATA_CMD_ZAC_MGMT_IN:
  65. return HISI_SAS_SATA_PROTOCOL_DMA;
  66. case ATA_CMD_CHK_POWER:
  67. case ATA_CMD_DEV_RESET:
  68. case ATA_CMD_EDD:
  69. case ATA_CMD_FLUSH:
  70. case ATA_CMD_FLUSH_EXT:
  71. case ATA_CMD_VERIFY:
  72. case ATA_CMD_VERIFY_EXT:
  73. case ATA_CMD_SET_FEATURES:
  74. case ATA_CMD_STANDBY:
  75. case ATA_CMD_STANDBYNOW1:
  76. case ATA_CMD_ZAC_MGMT_OUT:
  77. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  78. case ATA_CMD_SET_MAX:
  79. switch (fis->features) {
  80. case ATA_SET_MAX_PASSWD:
  81. case ATA_SET_MAX_LOCK:
  82. return HISI_SAS_SATA_PROTOCOL_PIO;
  83. case ATA_SET_MAX_PASSWD_DMA:
  84. case ATA_SET_MAX_UNLOCK_DMA:
  85. return HISI_SAS_SATA_PROTOCOL_DMA;
  86. default:
  87. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  88. }
  89. default:
  90. {
  91. if (direction == DMA_NONE)
  92. return HISI_SAS_SATA_PROTOCOL_NONDATA;
  93. return HISI_SAS_SATA_PROTOCOL_PIO;
  94. }
  95. }
  96. }
  97. EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
  98. void hisi_sas_sata_done(struct sas_task *task,
  99. struct hisi_sas_slot *slot)
  100. {
  101. struct task_status_struct *ts = &task->task_status;
  102. struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
  103. struct hisi_sas_status_buffer *status_buf =
  104. hisi_sas_status_buf_addr_mem(slot);
  105. u8 *iu = &status_buf->iu[0];
  106. struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
  107. resp->frame_len = sizeof(struct dev_to_host_fis);
  108. memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
  109. ts->buf_valid_size = sizeof(*resp);
  110. }
  111. EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
  112. int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
  113. {
  114. struct ata_queued_cmd *qc = task->uldd_task;
  115. if (qc) {
  116. if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
  117. qc->tf.command == ATA_CMD_FPDMA_READ) {
  118. *tag = qc->tag;
  119. return 1;
  120. }
  121. }
  122. return 0;
  123. }
  124. EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
  125. /*
  126. * This function assumes linkrate mask fits in 8 bits, which it
  127. * does for all HW versions supported.
  128. */
  129. u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
  130. {
  131. u16 rate = 0;
  132. int i;
  133. max -= SAS_LINK_RATE_1_5_GBPS;
  134. for (i = 0; i <= max; i++)
  135. rate |= 1 << (i * 2);
  136. return rate;
  137. }
  138. EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
  139. static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
  140. {
  141. return device->port->ha->lldd_ha;
  142. }
  143. struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
  144. {
  145. return container_of(sas_port, struct hisi_sas_port, sas_port);
  146. }
  147. EXPORT_SYMBOL_GPL(to_hisi_sas_port);
  148. void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
  149. {
  150. int phy_no;
  151. for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
  152. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  153. }
  154. EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
  155. static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
  156. {
  157. void *bitmap = hisi_hba->slot_index_tags;
  158. clear_bit(slot_idx, bitmap);
  159. }
  160. static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
  161. {
  162. unsigned long flags;
  163. if (hisi_hba->hw->slot_index_alloc || (slot_idx >=
  164. hisi_hba->hw->max_command_entries - HISI_SAS_RESERVED_IPTT_CNT)) {
  165. spin_lock_irqsave(&hisi_hba->lock, flags);
  166. hisi_sas_slot_index_clear(hisi_hba, slot_idx);
  167. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  168. }
  169. }
  170. static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
  171. {
  172. void *bitmap = hisi_hba->slot_index_tags;
  173. set_bit(slot_idx, bitmap);
  174. }
  175. static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba,
  176. struct scsi_cmnd *scsi_cmnd)
  177. {
  178. int index;
  179. void *bitmap = hisi_hba->slot_index_tags;
  180. unsigned long flags;
  181. if (scsi_cmnd)
  182. return scsi_cmnd->request->tag;
  183. spin_lock_irqsave(&hisi_hba->lock, flags);
  184. index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
  185. hisi_hba->last_slot_index + 1);
  186. if (index >= hisi_hba->slot_index_count) {
  187. index = find_next_zero_bit(bitmap,
  188. hisi_hba->slot_index_count,
  189. hisi_hba->hw->max_command_entries -
  190. HISI_SAS_RESERVED_IPTT_CNT);
  191. if (index >= hisi_hba->slot_index_count) {
  192. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  193. return -SAS_QUEUE_FULL;
  194. }
  195. }
  196. hisi_sas_slot_index_set(hisi_hba, index);
  197. hisi_hba->last_slot_index = index;
  198. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  199. return index;
  200. }
  201. static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
  202. {
  203. int i;
  204. for (i = 0; i < hisi_hba->slot_index_count; ++i)
  205. hisi_sas_slot_index_clear(hisi_hba, i);
  206. }
  207. void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
  208. struct hisi_sas_slot *slot)
  209. {
  210. struct hisi_sas_dq *dq = &hisi_hba->dq[slot->dlvry_queue];
  211. unsigned long flags;
  212. if (task) {
  213. struct device *dev = hisi_hba->dev;
  214. if (!task->lldd_task)
  215. return;
  216. task->lldd_task = NULL;
  217. if (!sas_protocol_ata(task->task_proto))
  218. if (slot->n_elem)
  219. dma_unmap_sg(dev, task->scatter,
  220. task->num_scatter,
  221. task->data_dir);
  222. }
  223. spin_lock_irqsave(&dq->lock, flags);
  224. list_del_init(&slot->entry);
  225. spin_unlock_irqrestore(&dq->lock, flags);
  226. memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
  227. hisi_sas_slot_index_free(hisi_hba, slot->idx);
  228. }
  229. EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
  230. static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
  231. struct hisi_sas_slot *slot)
  232. {
  233. hisi_hba->hw->prep_smp(hisi_hba, slot);
  234. }
  235. static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
  236. struct hisi_sas_slot *slot)
  237. {
  238. hisi_hba->hw->prep_ssp(hisi_hba, slot);
  239. }
  240. static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
  241. struct hisi_sas_slot *slot)
  242. {
  243. hisi_hba->hw->prep_stp(hisi_hba, slot);
  244. }
  245. static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
  246. struct hisi_sas_slot *slot,
  247. int device_id, int abort_flag, int tag_to_abort)
  248. {
  249. hisi_hba->hw->prep_abort(hisi_hba, slot,
  250. device_id, abort_flag, tag_to_abort);
  251. }
  252. static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba,
  253. struct sas_task *task, int n_elem,
  254. int n_elem_req, int n_elem_resp)
  255. {
  256. struct device *dev = hisi_hba->dev;
  257. if (!sas_protocol_ata(task->task_proto)) {
  258. if (task->num_scatter) {
  259. if (n_elem)
  260. dma_unmap_sg(dev, task->scatter,
  261. task->num_scatter,
  262. task->data_dir);
  263. } else if (task->task_proto & SAS_PROTOCOL_SMP) {
  264. if (n_elem_req)
  265. dma_unmap_sg(dev, &task->smp_task.smp_req,
  266. 1, DMA_TO_DEVICE);
  267. if (n_elem_resp)
  268. dma_unmap_sg(dev, &task->smp_task.smp_resp,
  269. 1, DMA_FROM_DEVICE);
  270. }
  271. }
  272. }
  273. static int hisi_sas_dma_map(struct hisi_hba *hisi_hba,
  274. struct sas_task *task, int *n_elem,
  275. int *n_elem_req, int *n_elem_resp)
  276. {
  277. struct device *dev = hisi_hba->dev;
  278. int rc;
  279. if (sas_protocol_ata(task->task_proto)) {
  280. *n_elem = task->num_scatter;
  281. } else {
  282. unsigned int req_len, resp_len;
  283. if (task->num_scatter) {
  284. *n_elem = dma_map_sg(dev, task->scatter,
  285. task->num_scatter, task->data_dir);
  286. if (!*n_elem) {
  287. rc = -ENOMEM;
  288. goto prep_out;
  289. }
  290. } else if (task->task_proto & SAS_PROTOCOL_SMP) {
  291. *n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
  292. 1, DMA_TO_DEVICE);
  293. if (!*n_elem_req) {
  294. rc = -ENOMEM;
  295. goto prep_out;
  296. }
  297. req_len = sg_dma_len(&task->smp_task.smp_req);
  298. if (req_len & 0x3) {
  299. rc = -EINVAL;
  300. goto err_out_dma_unmap;
  301. }
  302. *n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp,
  303. 1, DMA_FROM_DEVICE);
  304. if (!*n_elem_resp) {
  305. rc = -ENOMEM;
  306. goto err_out_dma_unmap;
  307. }
  308. resp_len = sg_dma_len(&task->smp_task.smp_resp);
  309. if (resp_len & 0x3) {
  310. rc = -EINVAL;
  311. goto err_out_dma_unmap;
  312. }
  313. }
  314. }
  315. if (*n_elem > HISI_SAS_SGE_PAGE_CNT) {
  316. dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT",
  317. *n_elem);
  318. rc = -EINVAL;
  319. goto err_out_dma_unmap;
  320. }
  321. return 0;
  322. err_out_dma_unmap:
  323. /* It would be better to call dma_unmap_sg() here, but it's messy */
  324. hisi_sas_dma_unmap(hisi_hba, task, *n_elem,
  325. *n_elem_req, *n_elem_resp);
  326. prep_out:
  327. return rc;
  328. }
  329. static int hisi_sas_task_prep(struct sas_task *task,
  330. struct hisi_sas_dq **dq_pointer,
  331. bool is_tmf, struct hisi_sas_tmf_task *tmf,
  332. int *pass)
  333. {
  334. struct domain_device *device = task->dev;
  335. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  336. struct hisi_sas_device *sas_dev = device->lldd_dev;
  337. struct hisi_sas_port *port;
  338. struct hisi_sas_slot *slot;
  339. struct hisi_sas_cmd_hdr *cmd_hdr_base;
  340. struct asd_sas_port *sas_port = device->port;
  341. struct device *dev = hisi_hba->dev;
  342. int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
  343. int n_elem = 0, n_elem_req = 0, n_elem_resp = 0;
  344. struct hisi_sas_dq *dq;
  345. unsigned long flags;
  346. int wr_q_index;
  347. if (DEV_IS_GONE(sas_dev)) {
  348. if (sas_dev)
  349. dev_info(dev, "task prep: device %d not ready\n",
  350. sas_dev->device_id);
  351. else
  352. dev_info(dev, "task prep: device %016llx not ready\n",
  353. SAS_ADDR(device->sas_addr));
  354. return -ECOMM;
  355. }
  356. *dq_pointer = dq = sas_dev->dq;
  357. port = to_hisi_sas_port(sas_port);
  358. if (port && !port->port_attached) {
  359. dev_info(dev, "task prep: %s port%d not attach device\n",
  360. (dev_is_sata(device)) ?
  361. "SATA/STP" : "SAS",
  362. device->port->id);
  363. return -ECOMM;
  364. }
  365. rc = hisi_sas_dma_map(hisi_hba, task, &n_elem,
  366. &n_elem_req, &n_elem_resp);
  367. if (rc < 0)
  368. goto prep_out;
  369. if (hisi_hba->hw->slot_index_alloc)
  370. rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
  371. else {
  372. struct scsi_cmnd *scsi_cmnd = NULL;
  373. if (task->uldd_task) {
  374. struct ata_queued_cmd *qc;
  375. if (dev_is_sata(device)) {
  376. qc = task->uldd_task;
  377. scsi_cmnd = qc->scsicmd;
  378. } else {
  379. scsi_cmnd = task->uldd_task;
  380. }
  381. }
  382. rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd);
  383. }
  384. if (rc < 0)
  385. goto err_out_dma_unmap;
  386. slot_idx = rc;
  387. slot = &hisi_hba->slot_info[slot_idx];
  388. spin_lock_irqsave(&dq->lock, flags);
  389. wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
  390. if (wr_q_index < 0) {
  391. spin_unlock_irqrestore(&dq->lock, flags);
  392. rc = -EAGAIN;
  393. goto err_out_tag;
  394. }
  395. list_add_tail(&slot->delivery, &dq->list);
  396. list_add_tail(&slot->entry, &sas_dev->list);
  397. spin_unlock_irqrestore(&dq->lock, flags);
  398. dlvry_queue = dq->id;
  399. dlvry_queue_slot = wr_q_index;
  400. slot->n_elem = n_elem;
  401. slot->dlvry_queue = dlvry_queue;
  402. slot->dlvry_queue_slot = dlvry_queue_slot;
  403. cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
  404. slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
  405. slot->task = task;
  406. slot->port = port;
  407. slot->tmf = tmf;
  408. slot->is_internal = is_tmf;
  409. task->lldd_task = slot;
  410. memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
  411. memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
  412. memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
  413. switch (task->task_proto) {
  414. case SAS_PROTOCOL_SMP:
  415. hisi_sas_task_prep_smp(hisi_hba, slot);
  416. break;
  417. case SAS_PROTOCOL_SSP:
  418. hisi_sas_task_prep_ssp(hisi_hba, slot);
  419. break;
  420. case SAS_PROTOCOL_SATA:
  421. case SAS_PROTOCOL_STP:
  422. case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
  423. hisi_sas_task_prep_ata(hisi_hba, slot);
  424. break;
  425. default:
  426. dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
  427. task->task_proto);
  428. break;
  429. }
  430. spin_lock_irqsave(&task->task_state_lock, flags);
  431. task->task_state_flags |= SAS_TASK_AT_INITIATOR;
  432. spin_unlock_irqrestore(&task->task_state_lock, flags);
  433. ++(*pass);
  434. WRITE_ONCE(slot->ready, 1);
  435. return 0;
  436. err_out_tag:
  437. hisi_sas_slot_index_free(hisi_hba, slot_idx);
  438. err_out_dma_unmap:
  439. hisi_sas_dma_unmap(hisi_hba, task, n_elem,
  440. n_elem_req, n_elem_resp);
  441. prep_out:
  442. dev_err(dev, "task prep: failed[%d]!\n", rc);
  443. return rc;
  444. }
  445. static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
  446. bool is_tmf, struct hisi_sas_tmf_task *tmf)
  447. {
  448. u32 rc;
  449. u32 pass = 0;
  450. unsigned long flags;
  451. struct hisi_hba *hisi_hba;
  452. struct device *dev;
  453. struct domain_device *device = task->dev;
  454. struct asd_sas_port *sas_port = device->port;
  455. struct hisi_sas_dq *dq = NULL;
  456. if (!sas_port) {
  457. struct task_status_struct *ts = &task->task_status;
  458. ts->resp = SAS_TASK_UNDELIVERED;
  459. ts->stat = SAS_PHY_DOWN;
  460. /*
  461. * libsas will use dev->port, should
  462. * not call task_done for sata
  463. */
  464. if (device->dev_type != SAS_SATA_DEV)
  465. task->task_done(task);
  466. return -ECOMM;
  467. }
  468. hisi_hba = dev_to_hisi_hba(device);
  469. dev = hisi_hba->dev;
  470. if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
  471. /*
  472. * For IOs from upper layer, it may already disable preempt
  473. * in the IO path, if disable preempt again in down(),
  474. * function schedule() will report schedule_bug(), so check
  475. * preemptible() before goto down().
  476. */
  477. if (!preemptible())
  478. return -EINVAL;
  479. down(&hisi_hba->sem);
  480. up(&hisi_hba->sem);
  481. }
  482. /* protect task_prep and start_delivery sequence */
  483. rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
  484. if (rc)
  485. dev_err(dev, "task exec: failed[%d]!\n", rc);
  486. if (likely(pass)) {
  487. spin_lock_irqsave(&dq->lock, flags);
  488. hisi_hba->hw->start_delivery(dq);
  489. spin_unlock_irqrestore(&dq->lock, flags);
  490. }
  491. return rc;
  492. }
  493. static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
  494. {
  495. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  496. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  497. struct sas_ha_struct *sas_ha;
  498. if (!phy->phy_attached)
  499. return;
  500. sas_ha = &hisi_hba->sha;
  501. sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
  502. if (sas_phy->phy) {
  503. struct sas_phy *sphy = sas_phy->phy;
  504. sphy->negotiated_linkrate = sas_phy->linkrate;
  505. sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
  506. sphy->maximum_linkrate_hw =
  507. hisi_hba->hw->phy_get_max_linkrate();
  508. if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
  509. sphy->minimum_linkrate = phy->minimum_linkrate;
  510. if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
  511. sphy->maximum_linkrate = phy->maximum_linkrate;
  512. }
  513. if (phy->phy_type & PORT_TYPE_SAS) {
  514. struct sas_identify_frame *id;
  515. id = (struct sas_identify_frame *)phy->frame_rcvd;
  516. id->dev_type = phy->identify.device_type;
  517. id->initiator_bits = SAS_PROTOCOL_ALL;
  518. id->target_bits = phy->identify.target_port_protocols;
  519. } else if (phy->phy_type & PORT_TYPE_SATA) {
  520. /*Nothing*/
  521. }
  522. sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
  523. sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
  524. }
  525. static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
  526. {
  527. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  528. struct hisi_sas_device *sas_dev = NULL;
  529. unsigned long flags;
  530. int last = hisi_hba->last_dev_id;
  531. int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
  532. int i;
  533. spin_lock_irqsave(&hisi_hba->lock, flags);
  534. for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
  535. if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
  536. int queue = i % hisi_hba->queue_count;
  537. struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
  538. hisi_hba->devices[i].device_id = i;
  539. sas_dev = &hisi_hba->devices[i];
  540. sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
  541. sas_dev->dev_type = device->dev_type;
  542. sas_dev->hisi_hba = hisi_hba;
  543. sas_dev->sas_device = device;
  544. sas_dev->dq = dq;
  545. INIT_LIST_HEAD(&hisi_hba->devices[i].list);
  546. break;
  547. }
  548. i++;
  549. }
  550. hisi_hba->last_dev_id = i;
  551. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  552. return sas_dev;
  553. }
  554. #define HISI_SAS_SRST_ATA_DISK_CNT 3
  555. static int hisi_sas_init_device(struct domain_device *device)
  556. {
  557. int rc = TMF_RESP_FUNC_COMPLETE;
  558. struct scsi_lun lun;
  559. struct hisi_sas_tmf_task tmf_task;
  560. int retry = HISI_SAS_SRST_ATA_DISK_CNT;
  561. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  562. switch (device->dev_type) {
  563. case SAS_END_DEVICE:
  564. int_to_scsilun(0, &lun);
  565. tmf_task.tmf = TMF_CLEAR_TASK_SET;
  566. rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun,
  567. &tmf_task);
  568. if (rc == TMF_RESP_FUNC_COMPLETE)
  569. hisi_sas_release_task(hisi_hba, device);
  570. break;
  571. case SAS_SATA_DEV:
  572. case SAS_SATA_PM:
  573. case SAS_SATA_PM_PORT:
  574. case SAS_SATA_PENDING:
  575. while (retry-- > 0) {
  576. rc = hisi_sas_softreset_ata_disk(device);
  577. if (!rc)
  578. break;
  579. }
  580. break;
  581. default:
  582. break;
  583. }
  584. return rc;
  585. }
  586. static int hisi_sas_dev_found(struct domain_device *device)
  587. {
  588. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  589. struct domain_device *parent_dev = device->parent;
  590. struct hisi_sas_device *sas_dev;
  591. struct device *dev = hisi_hba->dev;
  592. int rc;
  593. if (hisi_hba->hw->alloc_dev)
  594. sas_dev = hisi_hba->hw->alloc_dev(device);
  595. else
  596. sas_dev = hisi_sas_alloc_dev(device);
  597. if (!sas_dev) {
  598. dev_err(dev, "fail alloc dev: max support %d devices\n",
  599. HISI_SAS_MAX_DEVICES);
  600. return -EINVAL;
  601. }
  602. device->lldd_dev = sas_dev;
  603. hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
  604. if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
  605. int phy_no;
  606. u8 phy_num = parent_dev->ex_dev.num_phys;
  607. struct ex_phy *phy;
  608. for (phy_no = 0; phy_no < phy_num; phy_no++) {
  609. phy = &parent_dev->ex_dev.ex_phy[phy_no];
  610. if (SAS_ADDR(phy->attached_sas_addr) ==
  611. SAS_ADDR(device->sas_addr))
  612. break;
  613. }
  614. if (phy_no == phy_num) {
  615. dev_info(dev, "dev found: no attached "
  616. "dev:%016llx at ex:%016llx\n",
  617. SAS_ADDR(device->sas_addr),
  618. SAS_ADDR(parent_dev->sas_addr));
  619. rc = -EINVAL;
  620. goto err_out;
  621. }
  622. }
  623. dev_info(dev, "dev[%d:%x] found\n",
  624. sas_dev->device_id, sas_dev->dev_type);
  625. rc = hisi_sas_init_device(device);
  626. if (rc)
  627. goto err_out;
  628. return 0;
  629. err_out:
  630. hisi_sas_dev_gone(device);
  631. return rc;
  632. }
  633. int hisi_sas_slave_configure(struct scsi_device *sdev)
  634. {
  635. struct domain_device *dev = sdev_to_domain_dev(sdev);
  636. int ret = sas_slave_configure(sdev);
  637. if (ret)
  638. return ret;
  639. if (!dev_is_sata(dev))
  640. sas_change_queue_depth(sdev, 64);
  641. return 0;
  642. }
  643. EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
  644. void hisi_sas_scan_start(struct Scsi_Host *shost)
  645. {
  646. struct hisi_hba *hisi_hba = shost_priv(shost);
  647. hisi_hba->hw->phys_init(hisi_hba);
  648. }
  649. EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
  650. int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
  651. {
  652. struct hisi_hba *hisi_hba = shost_priv(shost);
  653. struct sas_ha_struct *sha = &hisi_hba->sha;
  654. /* Wait for PHY up interrupt to occur */
  655. if (time < HZ)
  656. return 0;
  657. sas_drain_work(sha);
  658. return 1;
  659. }
  660. EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
  661. static void hisi_sas_phyup_work(struct work_struct *work)
  662. {
  663. struct hisi_sas_phy *phy =
  664. container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
  665. struct hisi_hba *hisi_hba = phy->hisi_hba;
  666. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  667. int phy_no = sas_phy->id;
  668. if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
  669. hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
  670. hisi_sas_bytes_dmaed(hisi_hba, phy_no);
  671. }
  672. static void hisi_sas_linkreset_work(struct work_struct *work)
  673. {
  674. struct hisi_sas_phy *phy =
  675. container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
  676. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  677. hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
  678. }
  679. static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
  680. [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
  681. [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
  682. };
  683. bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
  684. enum hisi_sas_phy_event event)
  685. {
  686. struct hisi_hba *hisi_hba = phy->hisi_hba;
  687. if (WARN_ON(event >= HISI_PHYES_NUM))
  688. return false;
  689. return queue_work(hisi_hba->wq, &phy->works[event]);
  690. }
  691. EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
  692. static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
  693. {
  694. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  695. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  696. int i;
  697. phy->hisi_hba = hisi_hba;
  698. phy->port = NULL;
  699. phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
  700. phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
  701. sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
  702. sas_phy->class = SAS;
  703. sas_phy->iproto = SAS_PROTOCOL_ALL;
  704. sas_phy->tproto = 0;
  705. sas_phy->type = PHY_TYPE_PHYSICAL;
  706. sas_phy->role = PHY_ROLE_INITIATOR;
  707. sas_phy->oob_mode = OOB_NOT_CONNECTED;
  708. sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
  709. sas_phy->id = phy_no;
  710. sas_phy->sas_addr = &hisi_hba->sas_addr[0];
  711. sas_phy->frame_rcvd = &phy->frame_rcvd[0];
  712. sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
  713. sas_phy->lldd_phy = phy;
  714. for (i = 0; i < HISI_PHYES_NUM; i++)
  715. INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
  716. spin_lock_init(&phy->lock);
  717. }
  718. static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
  719. {
  720. struct sas_ha_struct *sas_ha = sas_phy->ha;
  721. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  722. struct hisi_sas_phy *phy = sas_phy->lldd_phy;
  723. struct asd_sas_port *sas_port = sas_phy->port;
  724. struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
  725. unsigned long flags;
  726. if (!sas_port)
  727. return;
  728. spin_lock_irqsave(&hisi_hba->lock, flags);
  729. port->port_attached = 1;
  730. port->id = phy->port_id;
  731. phy->port = port;
  732. sas_port->lldd_port = port;
  733. spin_unlock_irqrestore(&hisi_hba->lock, flags);
  734. }
  735. static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
  736. struct hisi_sas_slot *slot)
  737. {
  738. if (task) {
  739. unsigned long flags;
  740. struct task_status_struct *ts;
  741. ts = &task->task_status;
  742. ts->resp = SAS_TASK_COMPLETE;
  743. ts->stat = SAS_ABORTED_TASK;
  744. spin_lock_irqsave(&task->task_state_lock, flags);
  745. task->task_state_flags &=
  746. ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
  747. if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP)
  748. task->task_state_flags |= SAS_TASK_STATE_DONE;
  749. spin_unlock_irqrestore(&task->task_state_lock, flags);
  750. }
  751. hisi_sas_slot_task_free(hisi_hba, task, slot);
  752. }
  753. static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
  754. struct domain_device *device)
  755. {
  756. struct hisi_sas_slot *slot, *slot2;
  757. struct hisi_sas_device *sas_dev = device->lldd_dev;
  758. list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
  759. hisi_sas_do_release_task(hisi_hba, slot->task, slot);
  760. }
  761. void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
  762. {
  763. struct hisi_sas_device *sas_dev;
  764. struct domain_device *device;
  765. int i;
  766. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  767. sas_dev = &hisi_hba->devices[i];
  768. device = sas_dev->sas_device;
  769. if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
  770. !device)
  771. continue;
  772. hisi_sas_release_task(hisi_hba, device);
  773. }
  774. }
  775. EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
  776. static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
  777. struct domain_device *device)
  778. {
  779. if (hisi_hba->hw->dereg_device)
  780. hisi_hba->hw->dereg_device(hisi_hba, device);
  781. }
  782. static void hisi_sas_dev_gone(struct domain_device *device)
  783. {
  784. struct hisi_sas_device *sas_dev = device->lldd_dev;
  785. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  786. struct device *dev = hisi_hba->dev;
  787. dev_info(dev, "dev[%d:%x] is gone\n",
  788. sas_dev->device_id, sas_dev->dev_type);
  789. if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
  790. hisi_sas_internal_task_abort(hisi_hba, device,
  791. HISI_SAS_INT_ABT_DEV, 0);
  792. hisi_sas_dereg_device(hisi_hba, device);
  793. down(&hisi_hba->sem);
  794. hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
  795. up(&hisi_hba->sem);
  796. device->lldd_dev = NULL;
  797. }
  798. if (hisi_hba->hw->free_device)
  799. hisi_hba->hw->free_device(sas_dev);
  800. sas_dev->dev_type = SAS_PHY_UNUSED;
  801. }
  802. static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
  803. {
  804. return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
  805. }
  806. static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
  807. struct sas_phy_linkrates *r)
  808. {
  809. struct sas_phy_linkrates _r;
  810. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  811. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  812. enum sas_linkrate min, max;
  813. if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
  814. return -EINVAL;
  815. if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
  816. max = sas_phy->phy->maximum_linkrate;
  817. min = r->minimum_linkrate;
  818. } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
  819. max = r->maximum_linkrate;
  820. min = sas_phy->phy->minimum_linkrate;
  821. } else
  822. return -EINVAL;
  823. _r.maximum_linkrate = max;
  824. _r.minimum_linkrate = min;
  825. sas_phy->phy->maximum_linkrate = max;
  826. sas_phy->phy->minimum_linkrate = min;
  827. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  828. msleep(100);
  829. hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
  830. hisi_hba->hw->phy_start(hisi_hba, phy_no);
  831. return 0;
  832. }
  833. static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
  834. void *funcdata)
  835. {
  836. struct sas_ha_struct *sas_ha = sas_phy->ha;
  837. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  838. int phy_no = sas_phy->id;
  839. switch (func) {
  840. case PHY_FUNC_HARD_RESET:
  841. hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
  842. break;
  843. case PHY_FUNC_LINK_RESET:
  844. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  845. msleep(100);
  846. hisi_hba->hw->phy_start(hisi_hba, phy_no);
  847. break;
  848. case PHY_FUNC_DISABLE:
  849. hisi_hba->hw->phy_disable(hisi_hba, phy_no);
  850. break;
  851. case PHY_FUNC_SET_LINK_RATE:
  852. return hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
  853. case PHY_FUNC_GET_EVENTS:
  854. if (hisi_hba->hw->get_events) {
  855. hisi_hba->hw->get_events(hisi_hba, phy_no);
  856. break;
  857. }
  858. /* fallthru */
  859. case PHY_FUNC_RELEASE_SPINUP_HOLD:
  860. default:
  861. return -EOPNOTSUPP;
  862. }
  863. return 0;
  864. }
  865. static void hisi_sas_task_done(struct sas_task *task)
  866. {
  867. del_timer(&task->slow_task->timer);
  868. complete(&task->slow_task->completion);
  869. }
  870. static void hisi_sas_tmf_timedout(struct timer_list *t)
  871. {
  872. struct sas_task_slow *slow = from_timer(slow, t, timer);
  873. struct sas_task *task = slow->task;
  874. unsigned long flags;
  875. bool is_completed = true;
  876. spin_lock_irqsave(&task->task_state_lock, flags);
  877. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  878. task->task_state_flags |= SAS_TASK_STATE_ABORTED;
  879. is_completed = false;
  880. }
  881. spin_unlock_irqrestore(&task->task_state_lock, flags);
  882. if (!is_completed)
  883. complete(&task->slow_task->completion);
  884. }
  885. #define TASK_TIMEOUT 20
  886. #define TASK_RETRY 3
  887. #define INTERNAL_ABORT_TIMEOUT 6
  888. static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
  889. void *parameter, u32 para_len,
  890. struct hisi_sas_tmf_task *tmf)
  891. {
  892. struct hisi_sas_device *sas_dev = device->lldd_dev;
  893. struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
  894. struct device *dev = hisi_hba->dev;
  895. struct sas_task *task;
  896. int res, retry;
  897. for (retry = 0; retry < TASK_RETRY; retry++) {
  898. task = sas_alloc_slow_task(GFP_KERNEL);
  899. if (!task)
  900. return -ENOMEM;
  901. task->dev = device;
  902. task->task_proto = device->tproto;
  903. if (dev_is_sata(device)) {
  904. task->ata_task.device_control_reg_update = 1;
  905. memcpy(&task->ata_task.fis, parameter, para_len);
  906. } else {
  907. memcpy(&task->ssp_task, parameter, para_len);
  908. }
  909. task->task_done = hisi_sas_task_done;
  910. task->slow_task->timer.function = hisi_sas_tmf_timedout;
  911. task->slow_task->timer.expires = jiffies + TASK_TIMEOUT*HZ;
  912. add_timer(&task->slow_task->timer);
  913. res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
  914. if (res) {
  915. del_timer(&task->slow_task->timer);
  916. dev_err(dev, "abort tmf: executing internal task failed: %d\n",
  917. res);
  918. goto ex_err;
  919. }
  920. wait_for_completion(&task->slow_task->completion);
  921. res = TMF_RESP_FUNC_FAILED;
  922. /* Even TMF timed out, return direct. */
  923. if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
  924. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  925. struct hisi_sas_slot *slot = task->lldd_task;
  926. dev_err(dev, "abort tmf: TMF task timeout and not done\n");
  927. if (slot) {
  928. struct hisi_sas_cq *cq =
  929. &hisi_hba->cq[slot->dlvry_queue];
  930. /*
  931. * flush tasklet to avoid free'ing task
  932. * before using task in IO completion
  933. */
  934. tasklet_kill(&cq->tasklet);
  935. slot->task = NULL;
  936. }
  937. goto ex_err;
  938. } else
  939. dev_err(dev, "abort tmf: TMF task timeout\n");
  940. }
  941. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  942. task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
  943. res = TMF_RESP_FUNC_COMPLETE;
  944. break;
  945. }
  946. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  947. task->task_status.stat == TMF_RESP_FUNC_SUCC) {
  948. res = TMF_RESP_FUNC_SUCC;
  949. break;
  950. }
  951. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  952. task->task_status.stat == SAS_DATA_UNDERRUN) {
  953. /* no error, but return the number of bytes of
  954. * underrun
  955. */
  956. dev_warn(dev, "abort tmf: task to dev %016llx "
  957. "resp: 0x%x sts 0x%x underrun\n",
  958. SAS_ADDR(device->sas_addr),
  959. task->task_status.resp,
  960. task->task_status.stat);
  961. res = task->task_status.residual;
  962. break;
  963. }
  964. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  965. task->task_status.stat == SAS_DATA_OVERRUN) {
  966. dev_warn(dev, "abort tmf: blocked task error\n");
  967. res = -EMSGSIZE;
  968. break;
  969. }
  970. dev_warn(dev, "abort tmf: task to dev "
  971. "%016llx resp: 0x%x status 0x%x\n",
  972. SAS_ADDR(device->sas_addr), task->task_status.resp,
  973. task->task_status.stat);
  974. sas_free_task(task);
  975. task = NULL;
  976. }
  977. ex_err:
  978. if (retry == TASK_RETRY)
  979. dev_warn(dev, "abort tmf: executing internal task failed!\n");
  980. sas_free_task(task);
  981. return res;
  982. }
  983. static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
  984. bool reset, int pmp, u8 *fis)
  985. {
  986. struct ata_taskfile tf;
  987. ata_tf_init(dev, &tf);
  988. if (reset)
  989. tf.ctl |= ATA_SRST;
  990. else
  991. tf.ctl &= ~ATA_SRST;
  992. tf.command = ATA_CMD_DEV_RESET;
  993. ata_tf_to_fis(&tf, pmp, 0, fis);
  994. }
  995. static int hisi_sas_softreset_ata_disk(struct domain_device *device)
  996. {
  997. u8 fis[20] = {0};
  998. struct ata_port *ap = device->sata_dev.ap;
  999. struct ata_link *link;
  1000. int rc = TMF_RESP_FUNC_FAILED;
  1001. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1002. struct device *dev = hisi_hba->dev;
  1003. int s = sizeof(struct host_to_dev_fis);
  1004. ata_for_each_link(link, ap, EDGE) {
  1005. int pmp = sata_srst_pmp(link);
  1006. hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
  1007. rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
  1008. if (rc != TMF_RESP_FUNC_COMPLETE)
  1009. break;
  1010. }
  1011. if (rc == TMF_RESP_FUNC_COMPLETE) {
  1012. ata_for_each_link(link, ap, EDGE) {
  1013. int pmp = sata_srst_pmp(link);
  1014. hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
  1015. rc = hisi_sas_exec_internal_tmf_task(device, fis,
  1016. s, NULL);
  1017. if (rc != TMF_RESP_FUNC_COMPLETE)
  1018. dev_err(dev, "ata disk de-reset failed\n");
  1019. }
  1020. } else {
  1021. dev_err(dev, "ata disk reset failed\n");
  1022. }
  1023. if (rc == TMF_RESP_FUNC_COMPLETE)
  1024. hisi_sas_release_task(hisi_hba, device);
  1025. return rc;
  1026. }
  1027. static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
  1028. u8 *lun, struct hisi_sas_tmf_task *tmf)
  1029. {
  1030. struct sas_ssp_task ssp_task;
  1031. if (!(device->tproto & SAS_PROTOCOL_SSP))
  1032. return TMF_RESP_FUNC_ESUPP;
  1033. memcpy(ssp_task.LUN, lun, 8);
  1034. return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
  1035. sizeof(ssp_task), tmf);
  1036. }
  1037. static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
  1038. {
  1039. u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
  1040. int i;
  1041. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1042. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  1043. struct domain_device *device = sas_dev->sas_device;
  1044. struct asd_sas_port *sas_port;
  1045. struct hisi_sas_port *port;
  1046. struct hisi_sas_phy *phy = NULL;
  1047. struct asd_sas_phy *sas_phy;
  1048. if ((sas_dev->dev_type == SAS_PHY_UNUSED)
  1049. || !device || !device->port)
  1050. continue;
  1051. sas_port = device->port;
  1052. port = to_hisi_sas_port(sas_port);
  1053. list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
  1054. if (state & BIT(sas_phy->id)) {
  1055. phy = sas_phy->lldd_phy;
  1056. break;
  1057. }
  1058. if (phy) {
  1059. port->id = phy->port_id;
  1060. /* Update linkrate of directly attached device. */
  1061. if (!device->parent)
  1062. device->linkrate = phy->sas_phy.linkrate;
  1063. hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
  1064. } else
  1065. port->id = 0xff;
  1066. }
  1067. }
  1068. static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
  1069. u32 state)
  1070. {
  1071. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1072. struct asd_sas_port *_sas_port = NULL;
  1073. int phy_no;
  1074. for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
  1075. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  1076. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1077. struct asd_sas_port *sas_port = sas_phy->port;
  1078. bool do_port_check = !!(_sas_port != sas_port);
  1079. if (!sas_phy->phy->enabled)
  1080. continue;
  1081. /* Report PHY state change to libsas */
  1082. if (state & BIT(phy_no)) {
  1083. if (do_port_check && sas_port && sas_port->port_dev) {
  1084. struct domain_device *dev = sas_port->port_dev;
  1085. _sas_port = sas_port;
  1086. if (DEV_IS_EXPANDER(dev->dev_type))
  1087. sas_ha->notify_port_event(sas_phy,
  1088. PORTE_BROADCAST_RCVD);
  1089. }
  1090. } else if (old_state & (1 << phy_no))
  1091. /* PHY down but was up before */
  1092. hisi_sas_phy_down(hisi_hba, phy_no, 0);
  1093. }
  1094. }
  1095. static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
  1096. {
  1097. struct hisi_sas_device *sas_dev;
  1098. struct domain_device *device;
  1099. int i;
  1100. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1101. sas_dev = &hisi_hba->devices[i];
  1102. device = sas_dev->sas_device;
  1103. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
  1104. continue;
  1105. hisi_sas_init_device(device);
  1106. }
  1107. }
  1108. static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
  1109. struct asd_sas_port *sas_port,
  1110. struct domain_device *device)
  1111. {
  1112. struct hisi_sas_tmf_task tmf_task = { .force_phy = 1 };
  1113. struct ata_port *ap = device->sata_dev.ap;
  1114. struct device *dev = hisi_hba->dev;
  1115. int s = sizeof(struct host_to_dev_fis);
  1116. int rc = TMF_RESP_FUNC_FAILED;
  1117. struct asd_sas_phy *sas_phy;
  1118. struct ata_link *link;
  1119. u8 fis[20] = {0};
  1120. u32 state;
  1121. state = hisi_hba->hw->get_phys_state(hisi_hba);
  1122. list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) {
  1123. if (!(state & BIT(sas_phy->id)))
  1124. continue;
  1125. ata_for_each_link(link, ap, EDGE) {
  1126. int pmp = sata_srst_pmp(link);
  1127. tmf_task.phy_id = sas_phy->id;
  1128. hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
  1129. rc = hisi_sas_exec_internal_tmf_task(device, fis, s,
  1130. &tmf_task);
  1131. if (rc != TMF_RESP_FUNC_COMPLETE) {
  1132. dev_err(dev, "phy%d ata reset failed rc=%d\n",
  1133. sas_phy->id, rc);
  1134. break;
  1135. }
  1136. }
  1137. }
  1138. }
  1139. static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
  1140. {
  1141. struct device *dev = hisi_hba->dev;
  1142. int port_no, rc, i;
  1143. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1144. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  1145. struct domain_device *device = sas_dev->sas_device;
  1146. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
  1147. continue;
  1148. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1149. HISI_SAS_INT_ABT_DEV, 0);
  1150. if (rc < 0)
  1151. dev_err(dev, "STP reject: abort dev failed %d\n", rc);
  1152. }
  1153. for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
  1154. struct hisi_sas_port *port = &hisi_hba->port[port_no];
  1155. struct asd_sas_port *sas_port = &port->sas_port;
  1156. struct domain_device *port_dev = sas_port->port_dev;
  1157. struct domain_device *device;
  1158. if (!port_dev || !DEV_IS_EXPANDER(port_dev->dev_type))
  1159. continue;
  1160. /* Try to find a SATA device */
  1161. list_for_each_entry(device, &sas_port->dev_list,
  1162. dev_list_node) {
  1163. if (dev_is_sata(device)) {
  1164. hisi_sas_send_ata_reset_each_phy(hisi_hba,
  1165. sas_port,
  1166. device);
  1167. break;
  1168. }
  1169. }
  1170. }
  1171. }
  1172. void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
  1173. {
  1174. struct Scsi_Host *shost = hisi_hba->shost;
  1175. down(&hisi_hba->sem);
  1176. hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
  1177. scsi_block_requests(shost);
  1178. hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
  1179. if (timer_pending(&hisi_hba->timer))
  1180. del_timer_sync(&hisi_hba->timer);
  1181. set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1182. }
  1183. EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
  1184. void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
  1185. {
  1186. struct Scsi_Host *shost = hisi_hba->shost;
  1187. u32 state;
  1188. /* Init and wait for PHYs to come up and all libsas event finished. */
  1189. hisi_hba->hw->phys_init(hisi_hba);
  1190. msleep(1000);
  1191. hisi_sas_refresh_port_id(hisi_hba);
  1192. clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1193. up(&hisi_hba->sem);
  1194. if (hisi_hba->reject_stp_links_msk)
  1195. hisi_sas_terminate_stp_reject(hisi_hba);
  1196. hisi_sas_reset_init_all_devices(hisi_hba);
  1197. scsi_unblock_requests(shost);
  1198. clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
  1199. state = hisi_hba->hw->get_phys_state(hisi_hba);
  1200. hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state, state);
  1201. }
  1202. EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
  1203. static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
  1204. {
  1205. struct device *dev = hisi_hba->dev;
  1206. struct Scsi_Host *shost = hisi_hba->shost;
  1207. int rc;
  1208. if (!hisi_hba->hw->soft_reset)
  1209. return -1;
  1210. if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
  1211. return -1;
  1212. dev_info(dev, "controller resetting...\n");
  1213. hisi_sas_controller_reset_prepare(hisi_hba);
  1214. rc = hisi_hba->hw->soft_reset(hisi_hba);
  1215. if (rc) {
  1216. dev_warn(dev, "controller reset failed (%d)\n", rc);
  1217. clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
  1218. up(&hisi_hba->sem);
  1219. scsi_unblock_requests(shost);
  1220. clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
  1221. return rc;
  1222. }
  1223. hisi_sas_controller_reset_done(hisi_hba);
  1224. dev_info(dev, "controller reset complete\n");
  1225. return 0;
  1226. }
  1227. static int hisi_sas_abort_task(struct sas_task *task)
  1228. {
  1229. struct scsi_lun lun;
  1230. struct hisi_sas_tmf_task tmf_task;
  1231. struct domain_device *device = task->dev;
  1232. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1233. struct hisi_hba *hisi_hba;
  1234. struct device *dev;
  1235. int rc = TMF_RESP_FUNC_FAILED;
  1236. unsigned long flags;
  1237. if (!sas_dev)
  1238. return TMF_RESP_FUNC_FAILED;
  1239. hisi_hba = dev_to_hisi_hba(task->dev);
  1240. dev = hisi_hba->dev;
  1241. spin_lock_irqsave(&task->task_state_lock, flags);
  1242. if (task->task_state_flags & SAS_TASK_STATE_DONE) {
  1243. struct hisi_sas_slot *slot = task->lldd_task;
  1244. struct hisi_sas_cq *cq;
  1245. if (slot) {
  1246. /*
  1247. * flush tasklet to avoid free'ing task
  1248. * before using task in IO completion
  1249. */
  1250. cq = &hisi_hba->cq[slot->dlvry_queue];
  1251. tasklet_kill(&cq->tasklet);
  1252. }
  1253. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1254. rc = TMF_RESP_FUNC_COMPLETE;
  1255. goto out;
  1256. }
  1257. task->task_state_flags |= SAS_TASK_STATE_ABORTED;
  1258. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1259. sas_dev->dev_status = HISI_SAS_DEV_EH;
  1260. if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
  1261. struct scsi_cmnd *cmnd = task->uldd_task;
  1262. struct hisi_sas_slot *slot = task->lldd_task;
  1263. u16 tag = slot->idx;
  1264. int rc2;
  1265. int_to_scsilun(cmnd->device->lun, &lun);
  1266. tmf_task.tmf = TMF_ABORT_TASK;
  1267. tmf_task.tag_of_task_to_be_managed = tag;
  1268. rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
  1269. &tmf_task);
  1270. rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
  1271. HISI_SAS_INT_ABT_CMD, tag);
  1272. if (rc2 < 0) {
  1273. dev_err(dev, "abort task: internal abort (%d)\n", rc2);
  1274. return TMF_RESP_FUNC_FAILED;
  1275. }
  1276. /*
  1277. * If the TMF finds that the IO is not in the device and also
  1278. * the internal abort does not succeed, then it is safe to
  1279. * free the slot.
  1280. * Note: if the internal abort succeeds then the slot
  1281. * will have already been completed
  1282. */
  1283. if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
  1284. if (task->lldd_task)
  1285. hisi_sas_do_release_task(hisi_hba, task, slot);
  1286. }
  1287. } else if (task->task_proto & SAS_PROTOCOL_SATA ||
  1288. task->task_proto & SAS_PROTOCOL_STP) {
  1289. if (task->dev->dev_type == SAS_SATA_DEV) {
  1290. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1291. HISI_SAS_INT_ABT_DEV, 0);
  1292. if (rc < 0) {
  1293. dev_err(dev, "abort task: internal abort failed\n");
  1294. goto out;
  1295. }
  1296. hisi_sas_dereg_device(hisi_hba, device);
  1297. rc = hisi_sas_softreset_ata_disk(device);
  1298. }
  1299. } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
  1300. /* SMP */
  1301. struct hisi_sas_slot *slot = task->lldd_task;
  1302. u32 tag = slot->idx;
  1303. struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
  1304. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1305. HISI_SAS_INT_ABT_CMD, tag);
  1306. if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
  1307. task->lldd_task) {
  1308. /*
  1309. * flush tasklet to avoid free'ing task
  1310. * before using task in IO completion
  1311. */
  1312. tasklet_kill(&cq->tasklet);
  1313. slot->task = NULL;
  1314. }
  1315. }
  1316. out:
  1317. if (rc != TMF_RESP_FUNC_COMPLETE)
  1318. dev_notice(dev, "abort task: rc=%d\n", rc);
  1319. return rc;
  1320. }
  1321. static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
  1322. {
  1323. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1324. struct device *dev = hisi_hba->dev;
  1325. struct hisi_sas_tmf_task tmf_task;
  1326. int rc = TMF_RESP_FUNC_FAILED;
  1327. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1328. HISI_SAS_INT_ABT_DEV, 0);
  1329. if (rc < 0) {
  1330. dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
  1331. return TMF_RESP_FUNC_FAILED;
  1332. }
  1333. hisi_sas_dereg_device(hisi_hba, device);
  1334. tmf_task.tmf = TMF_ABORT_TASK_SET;
  1335. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1336. if (rc == TMF_RESP_FUNC_COMPLETE)
  1337. hisi_sas_release_task(hisi_hba, device);
  1338. return rc;
  1339. }
  1340. static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
  1341. {
  1342. int rc = TMF_RESP_FUNC_FAILED;
  1343. struct hisi_sas_tmf_task tmf_task;
  1344. tmf_task.tmf = TMF_CLEAR_ACA;
  1345. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1346. return rc;
  1347. }
  1348. static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
  1349. {
  1350. struct sas_phy *local_phy = sas_get_local_phy(device);
  1351. int rc, reset_type = (device->dev_type == SAS_SATA_DEV ||
  1352. (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
  1353. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1354. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1355. struct asd_sas_phy *sas_phy = sas_ha->sas_phy[local_phy->number];
  1356. struct hisi_sas_phy *phy = container_of(sas_phy,
  1357. struct hisi_sas_phy, sas_phy);
  1358. DECLARE_COMPLETION_ONSTACK(phyreset);
  1359. if (scsi_is_sas_phy_local(local_phy)) {
  1360. phy->in_reset = 1;
  1361. phy->reset_completion = &phyreset;
  1362. }
  1363. rc = sas_phy_reset(local_phy, reset_type);
  1364. sas_put_local_phy(local_phy);
  1365. if (scsi_is_sas_phy_local(local_phy)) {
  1366. int ret = wait_for_completion_timeout(&phyreset, 2 * HZ);
  1367. unsigned long flags;
  1368. spin_lock_irqsave(&phy->lock, flags);
  1369. phy->reset_completion = NULL;
  1370. phy->in_reset = 0;
  1371. spin_unlock_irqrestore(&phy->lock, flags);
  1372. /* report PHY down if timed out */
  1373. if (!ret)
  1374. hisi_sas_phy_down(hisi_hba, sas_phy->id, 0);
  1375. } else
  1376. msleep(2000);
  1377. return rc;
  1378. }
  1379. static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
  1380. {
  1381. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1382. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1383. struct device *dev = hisi_hba->dev;
  1384. int rc = TMF_RESP_FUNC_FAILED;
  1385. if (sas_dev->dev_status != HISI_SAS_DEV_EH)
  1386. return TMF_RESP_FUNC_FAILED;
  1387. sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
  1388. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1389. HISI_SAS_INT_ABT_DEV, 0);
  1390. if (rc < 0) {
  1391. dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
  1392. return TMF_RESP_FUNC_FAILED;
  1393. }
  1394. hisi_sas_dereg_device(hisi_hba, device);
  1395. rc = hisi_sas_debug_I_T_nexus_reset(device);
  1396. if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
  1397. hisi_sas_release_task(hisi_hba, device);
  1398. return rc;
  1399. }
  1400. static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
  1401. {
  1402. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1403. struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
  1404. struct device *dev = hisi_hba->dev;
  1405. int rc = TMF_RESP_FUNC_FAILED;
  1406. sas_dev->dev_status = HISI_SAS_DEV_EH;
  1407. if (dev_is_sata(device)) {
  1408. struct sas_phy *phy;
  1409. /* Clear internal IO and then hardreset */
  1410. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1411. HISI_SAS_INT_ABT_DEV, 0);
  1412. if (rc < 0) {
  1413. dev_err(dev, "lu_reset: internal abort failed\n");
  1414. goto out;
  1415. }
  1416. hisi_sas_dereg_device(hisi_hba, device);
  1417. phy = sas_get_local_phy(device);
  1418. rc = sas_phy_reset(phy, 1);
  1419. if (rc == 0)
  1420. hisi_sas_release_task(hisi_hba, device);
  1421. sas_put_local_phy(phy);
  1422. } else {
  1423. struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
  1424. rc = hisi_sas_internal_task_abort(hisi_hba, device,
  1425. HISI_SAS_INT_ABT_DEV, 0);
  1426. if (rc < 0) {
  1427. dev_err(dev, "lu_reset: internal abort failed\n");
  1428. goto out;
  1429. }
  1430. hisi_sas_dereg_device(hisi_hba, device);
  1431. rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
  1432. if (rc == TMF_RESP_FUNC_COMPLETE)
  1433. hisi_sas_release_task(hisi_hba, device);
  1434. }
  1435. out:
  1436. if (rc != TMF_RESP_FUNC_COMPLETE)
  1437. dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
  1438. sas_dev->device_id, rc);
  1439. return rc;
  1440. }
  1441. static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
  1442. {
  1443. struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
  1444. struct device *dev = hisi_hba->dev;
  1445. HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
  1446. int rc, i;
  1447. queue_work(hisi_hba->wq, &r.work);
  1448. wait_for_completion(r.completion);
  1449. if (!r.done)
  1450. return TMF_RESP_FUNC_FAILED;
  1451. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1452. struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
  1453. struct domain_device *device = sas_dev->sas_device;
  1454. if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
  1455. DEV_IS_EXPANDER(device->dev_type))
  1456. continue;
  1457. rc = hisi_sas_debug_I_T_nexus_reset(device);
  1458. if (rc != TMF_RESP_FUNC_COMPLETE)
  1459. dev_info(dev, "clear nexus ha: for device[%d] rc=%d\n",
  1460. sas_dev->device_id, rc);
  1461. }
  1462. hisi_sas_release_tasks(hisi_hba);
  1463. return TMF_RESP_FUNC_COMPLETE;
  1464. }
  1465. static int hisi_sas_query_task(struct sas_task *task)
  1466. {
  1467. struct scsi_lun lun;
  1468. struct hisi_sas_tmf_task tmf_task;
  1469. int rc = TMF_RESP_FUNC_FAILED;
  1470. if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
  1471. struct scsi_cmnd *cmnd = task->uldd_task;
  1472. struct domain_device *device = task->dev;
  1473. struct hisi_sas_slot *slot = task->lldd_task;
  1474. u32 tag = slot->idx;
  1475. int_to_scsilun(cmnd->device->lun, &lun);
  1476. tmf_task.tmf = TMF_QUERY_TASK;
  1477. tmf_task.tag_of_task_to_be_managed = tag;
  1478. rc = hisi_sas_debug_issue_ssp_tmf(device,
  1479. lun.scsi_lun,
  1480. &tmf_task);
  1481. switch (rc) {
  1482. /* The task is still in Lun, release it then */
  1483. case TMF_RESP_FUNC_SUCC:
  1484. /* The task is not in Lun or failed, reset the phy */
  1485. case TMF_RESP_FUNC_FAILED:
  1486. case TMF_RESP_FUNC_COMPLETE:
  1487. break;
  1488. default:
  1489. rc = TMF_RESP_FUNC_FAILED;
  1490. break;
  1491. }
  1492. }
  1493. return rc;
  1494. }
  1495. static int
  1496. hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
  1497. struct sas_task *task, int abort_flag,
  1498. int task_tag)
  1499. {
  1500. struct domain_device *device = task->dev;
  1501. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1502. struct device *dev = hisi_hba->dev;
  1503. struct hisi_sas_port *port;
  1504. struct hisi_sas_slot *slot;
  1505. struct asd_sas_port *sas_port = device->port;
  1506. struct hisi_sas_cmd_hdr *cmd_hdr_base;
  1507. struct hisi_sas_dq *dq = sas_dev->dq;
  1508. int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
  1509. unsigned long flags, flags_dq = 0;
  1510. int wr_q_index;
  1511. if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
  1512. return -EINVAL;
  1513. if (!device->port)
  1514. return -1;
  1515. port = to_hisi_sas_port(sas_port);
  1516. /* simply get a slot and send abort command */
  1517. rc = hisi_sas_slot_index_alloc(hisi_hba, NULL);
  1518. if (rc < 0)
  1519. goto err_out;
  1520. slot_idx = rc;
  1521. slot = &hisi_hba->slot_info[slot_idx];
  1522. spin_lock_irqsave(&dq->lock, flags_dq);
  1523. wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
  1524. if (wr_q_index < 0) {
  1525. spin_unlock_irqrestore(&dq->lock, flags_dq);
  1526. rc = -EAGAIN;
  1527. goto err_out_tag;
  1528. }
  1529. list_add_tail(&slot->delivery, &dq->list);
  1530. spin_unlock_irqrestore(&dq->lock, flags_dq);
  1531. dlvry_queue = dq->id;
  1532. dlvry_queue_slot = wr_q_index;
  1533. slot->n_elem = n_elem;
  1534. slot->dlvry_queue = dlvry_queue;
  1535. slot->dlvry_queue_slot = dlvry_queue_slot;
  1536. cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
  1537. slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
  1538. slot->task = task;
  1539. slot->port = port;
  1540. slot->is_internal = true;
  1541. task->lldd_task = slot;
  1542. memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
  1543. memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
  1544. memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
  1545. hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
  1546. abort_flag, task_tag);
  1547. spin_lock_irqsave(&task->task_state_lock, flags);
  1548. task->task_state_flags |= SAS_TASK_AT_INITIATOR;
  1549. spin_unlock_irqrestore(&task->task_state_lock, flags);
  1550. WRITE_ONCE(slot->ready, 1);
  1551. /* send abort command to the chip */
  1552. spin_lock_irqsave(&dq->lock, flags);
  1553. list_add_tail(&slot->entry, &sas_dev->list);
  1554. hisi_hba->hw->start_delivery(dq);
  1555. spin_unlock_irqrestore(&dq->lock, flags);
  1556. return 0;
  1557. err_out_tag:
  1558. hisi_sas_slot_index_free(hisi_hba, slot_idx);
  1559. err_out:
  1560. dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
  1561. return rc;
  1562. }
  1563. /**
  1564. * hisi_sas_internal_task_abort -- execute an internal
  1565. * abort command for single IO command or a device
  1566. * @hisi_hba: host controller struct
  1567. * @device: domain device
  1568. * @abort_flag: mode of operation, device or single IO
  1569. * @tag: tag of IO to be aborted (only relevant to single
  1570. * IO mode)
  1571. */
  1572. static int
  1573. hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
  1574. struct domain_device *device,
  1575. int abort_flag, int tag)
  1576. {
  1577. struct sas_task *task;
  1578. struct hisi_sas_device *sas_dev = device->lldd_dev;
  1579. struct device *dev = hisi_hba->dev;
  1580. int res;
  1581. /*
  1582. * The interface is not realized means this HW don't support internal
  1583. * abort, or don't need to do internal abort. Then here, we return
  1584. * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
  1585. * the internal abort has been executed and returned CQ.
  1586. */
  1587. if (!hisi_hba->hw->prep_abort)
  1588. return TMF_RESP_FUNC_FAILED;
  1589. task = sas_alloc_slow_task(GFP_KERNEL);
  1590. if (!task)
  1591. return -ENOMEM;
  1592. task->dev = device;
  1593. task->task_proto = device->tproto;
  1594. task->task_done = hisi_sas_task_done;
  1595. task->slow_task->timer.function = hisi_sas_tmf_timedout;
  1596. task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT*HZ;
  1597. add_timer(&task->slow_task->timer);
  1598. res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
  1599. task, abort_flag, tag);
  1600. if (res) {
  1601. del_timer(&task->slow_task->timer);
  1602. dev_err(dev, "internal task abort: executing internal task failed: %d\n",
  1603. res);
  1604. goto exit;
  1605. }
  1606. wait_for_completion(&task->slow_task->completion);
  1607. res = TMF_RESP_FUNC_FAILED;
  1608. /* Internal abort timed out */
  1609. if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
  1610. if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
  1611. struct hisi_sas_slot *slot = task->lldd_task;
  1612. if (slot) {
  1613. struct hisi_sas_cq *cq =
  1614. &hisi_hba->cq[slot->dlvry_queue];
  1615. /*
  1616. * flush tasklet to avoid free'ing task
  1617. * before using task in IO completion
  1618. */
  1619. tasklet_kill(&cq->tasklet);
  1620. slot->task = NULL;
  1621. }
  1622. dev_err(dev, "internal task abort: timeout and not done.\n");
  1623. res = -EIO;
  1624. goto exit;
  1625. } else
  1626. dev_err(dev, "internal task abort: timeout.\n");
  1627. }
  1628. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  1629. task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
  1630. res = TMF_RESP_FUNC_COMPLETE;
  1631. goto exit;
  1632. }
  1633. if (task->task_status.resp == SAS_TASK_COMPLETE &&
  1634. task->task_status.stat == TMF_RESP_FUNC_SUCC) {
  1635. res = TMF_RESP_FUNC_SUCC;
  1636. goto exit;
  1637. }
  1638. exit:
  1639. dev_dbg(dev, "internal task abort: task to dev %016llx task=%p "
  1640. "resp: 0x%x sts 0x%x\n",
  1641. SAS_ADDR(device->sas_addr),
  1642. task,
  1643. task->task_status.resp, /* 0 is complete, -1 is undelivered */
  1644. task->task_status.stat);
  1645. sas_free_task(task);
  1646. return res;
  1647. }
  1648. static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
  1649. {
  1650. hisi_sas_port_notify_formed(sas_phy);
  1651. }
  1652. static void hisi_sas_port_deformed(struct asd_sas_phy *sas_phy)
  1653. {
  1654. }
  1655. static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
  1656. u8 reg_index, u8 reg_count, u8 *write_data)
  1657. {
  1658. struct hisi_hba *hisi_hba = sha->lldd_ha;
  1659. if (!hisi_hba->hw->write_gpio)
  1660. return -EOPNOTSUPP;
  1661. return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
  1662. reg_index, reg_count, write_data);
  1663. }
  1664. static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
  1665. {
  1666. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1667. struct sas_phy *sphy = sas_phy->phy;
  1668. struct sas_phy_data *d = sphy->hostdata;
  1669. phy->phy_attached = 0;
  1670. phy->phy_type = 0;
  1671. phy->port = NULL;
  1672. if (d->enable)
  1673. sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
  1674. else
  1675. sphy->negotiated_linkrate = SAS_PHY_DISABLED;
  1676. }
  1677. void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
  1678. {
  1679. struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
  1680. struct asd_sas_phy *sas_phy = &phy->sas_phy;
  1681. struct sas_ha_struct *sas_ha = &hisi_hba->sha;
  1682. struct device *dev = hisi_hba->dev;
  1683. if (rdy) {
  1684. /* Phy down but ready */
  1685. hisi_sas_bytes_dmaed(hisi_hba, phy_no);
  1686. hisi_sas_port_notify_formed(sas_phy);
  1687. } else {
  1688. struct hisi_sas_port *port = phy->port;
  1689. if (test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags) ||
  1690. phy->in_reset) {
  1691. dev_info(dev, "ignore flutter phy%d down\n", phy_no);
  1692. return;
  1693. }
  1694. /* Phy down and not ready */
  1695. sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
  1696. sas_phy_disconnected(sas_phy);
  1697. if (port) {
  1698. if (phy->phy_type & PORT_TYPE_SAS) {
  1699. int port_id = port->id;
  1700. if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
  1701. port_id))
  1702. port->port_attached = 0;
  1703. } else if (phy->phy_type & PORT_TYPE_SATA)
  1704. port->port_attached = 0;
  1705. }
  1706. hisi_sas_phy_disconnected(phy);
  1707. }
  1708. }
  1709. EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
  1710. void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba)
  1711. {
  1712. int i;
  1713. for (i = 0; i < hisi_hba->queue_count; i++) {
  1714. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1715. tasklet_kill(&cq->tasklet);
  1716. }
  1717. }
  1718. EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets);
  1719. struct scsi_transport_template *hisi_sas_stt;
  1720. EXPORT_SYMBOL_GPL(hisi_sas_stt);
  1721. static struct sas_domain_function_template hisi_sas_transport_ops = {
  1722. .lldd_dev_found = hisi_sas_dev_found,
  1723. .lldd_dev_gone = hisi_sas_dev_gone,
  1724. .lldd_execute_task = hisi_sas_queue_command,
  1725. .lldd_control_phy = hisi_sas_control_phy,
  1726. .lldd_abort_task = hisi_sas_abort_task,
  1727. .lldd_abort_task_set = hisi_sas_abort_task_set,
  1728. .lldd_clear_aca = hisi_sas_clear_aca,
  1729. .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
  1730. .lldd_lu_reset = hisi_sas_lu_reset,
  1731. .lldd_query_task = hisi_sas_query_task,
  1732. .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
  1733. .lldd_port_formed = hisi_sas_port_formed,
  1734. .lldd_port_deformed = hisi_sas_port_deformed,
  1735. .lldd_write_gpio = hisi_sas_write_gpio,
  1736. };
  1737. void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
  1738. {
  1739. int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
  1740. for (i = 0; i < hisi_hba->queue_count; i++) {
  1741. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1742. struct hisi_sas_dq *dq = &hisi_hba->dq[i];
  1743. s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
  1744. memset(hisi_hba->cmd_hdr[i], 0, s);
  1745. dq->wr_point = 0;
  1746. s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
  1747. memset(hisi_hba->complete_hdr[i], 0, s);
  1748. cq->rd_point = 0;
  1749. }
  1750. s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
  1751. memset(hisi_hba->initial_fis, 0, s);
  1752. s = max_command_entries * sizeof(struct hisi_sas_iost);
  1753. memset(hisi_hba->iost, 0, s);
  1754. s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
  1755. memset(hisi_hba->breakpoint, 0, s);
  1756. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
  1757. memset(hisi_hba->sata_breakpoint, 0, s);
  1758. }
  1759. EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
  1760. int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
  1761. {
  1762. struct device *dev = hisi_hba->dev;
  1763. int i, j, s, max_command_entries = hisi_hba->hw->max_command_entries;
  1764. int max_command_entries_ru, sz_slot_buf_ru;
  1765. int blk_cnt, slots_per_blk;
  1766. sema_init(&hisi_hba->sem, 1);
  1767. spin_lock_init(&hisi_hba->lock);
  1768. for (i = 0; i < hisi_hba->n_phy; i++) {
  1769. hisi_sas_phy_init(hisi_hba, i);
  1770. hisi_hba->port[i].port_attached = 0;
  1771. hisi_hba->port[i].id = -1;
  1772. }
  1773. for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
  1774. hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
  1775. hisi_hba->devices[i].device_id = i;
  1776. hisi_hba->devices[i].dev_status = HISI_SAS_DEV_NORMAL;
  1777. }
  1778. for (i = 0; i < hisi_hba->queue_count; i++) {
  1779. struct hisi_sas_cq *cq = &hisi_hba->cq[i];
  1780. struct hisi_sas_dq *dq = &hisi_hba->dq[i];
  1781. /* Completion queue structure */
  1782. cq->id = i;
  1783. cq->hisi_hba = hisi_hba;
  1784. /* Delivery queue structure */
  1785. spin_lock_init(&dq->lock);
  1786. INIT_LIST_HEAD(&dq->list);
  1787. dq->id = i;
  1788. dq->hisi_hba = hisi_hba;
  1789. /* Delivery queue */
  1790. s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
  1791. hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
  1792. &hisi_hba->cmd_hdr_dma[i],
  1793. GFP_KERNEL);
  1794. if (!hisi_hba->cmd_hdr[i])
  1795. goto err_out;
  1796. /* Completion queue */
  1797. s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
  1798. hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
  1799. &hisi_hba->complete_hdr_dma[i],
  1800. GFP_KERNEL);
  1801. if (!hisi_hba->complete_hdr[i])
  1802. goto err_out;
  1803. }
  1804. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
  1805. hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
  1806. GFP_KERNEL);
  1807. if (!hisi_hba->itct)
  1808. goto err_out;
  1809. memset(hisi_hba->itct, 0, s);
  1810. hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
  1811. sizeof(struct hisi_sas_slot),
  1812. GFP_KERNEL);
  1813. if (!hisi_hba->slot_info)
  1814. goto err_out;
  1815. /* roundup to avoid overly large block size */
  1816. max_command_entries_ru = roundup(max_command_entries, 64);
  1817. sz_slot_buf_ru = roundup(sizeof(struct hisi_sas_slot_buf_table), 64);
  1818. s = lcm(max_command_entries_ru, sz_slot_buf_ru);
  1819. blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
  1820. slots_per_blk = s / sz_slot_buf_ru;
  1821. for (i = 0; i < blk_cnt; i++) {
  1822. struct hisi_sas_slot_buf_table *buf;
  1823. dma_addr_t buf_dma;
  1824. int slot_index = i * slots_per_blk;
  1825. buf = dmam_alloc_coherent(dev, s, &buf_dma, GFP_KERNEL);
  1826. if (!buf)
  1827. goto err_out;
  1828. memset(buf, 0, s);
  1829. for (j = 0; j < slots_per_blk; j++, slot_index++) {
  1830. struct hisi_sas_slot *slot;
  1831. slot = &hisi_hba->slot_info[slot_index];
  1832. slot->buf = buf;
  1833. slot->buf_dma = buf_dma;
  1834. slot->idx = slot_index;
  1835. buf++;
  1836. buf_dma += sizeof(*buf);
  1837. }
  1838. }
  1839. s = max_command_entries * sizeof(struct hisi_sas_iost);
  1840. hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
  1841. GFP_KERNEL);
  1842. if (!hisi_hba->iost)
  1843. goto err_out;
  1844. s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
  1845. hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
  1846. &hisi_hba->breakpoint_dma,
  1847. GFP_KERNEL);
  1848. if (!hisi_hba->breakpoint)
  1849. goto err_out;
  1850. hisi_hba->slot_index_count = max_command_entries;
  1851. s = hisi_hba->slot_index_count / BITS_PER_BYTE;
  1852. hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
  1853. if (!hisi_hba->slot_index_tags)
  1854. goto err_out;
  1855. s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
  1856. hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
  1857. &hisi_hba->initial_fis_dma,
  1858. GFP_KERNEL);
  1859. if (!hisi_hba->initial_fis)
  1860. goto err_out;
  1861. s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
  1862. hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
  1863. &hisi_hba->sata_breakpoint_dma,
  1864. GFP_KERNEL);
  1865. if (!hisi_hba->sata_breakpoint)
  1866. goto err_out;
  1867. hisi_sas_init_mem(hisi_hba);
  1868. hisi_sas_slot_index_init(hisi_hba);
  1869. hisi_hba->last_slot_index = hisi_hba->hw->max_command_entries -
  1870. HISI_SAS_RESERVED_IPTT_CNT;
  1871. hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
  1872. if (!hisi_hba->wq) {
  1873. dev_err(dev, "sas_alloc: failed to create workqueue\n");
  1874. goto err_out;
  1875. }
  1876. return 0;
  1877. err_out:
  1878. return -ENOMEM;
  1879. }
  1880. EXPORT_SYMBOL_GPL(hisi_sas_alloc);
  1881. void hisi_sas_free(struct hisi_hba *hisi_hba)
  1882. {
  1883. if (hisi_hba->wq)
  1884. destroy_workqueue(hisi_hba->wq);
  1885. }
  1886. EXPORT_SYMBOL_GPL(hisi_sas_free);
  1887. void hisi_sas_rst_work_handler(struct work_struct *work)
  1888. {
  1889. struct hisi_hba *hisi_hba =
  1890. container_of(work, struct hisi_hba, rst_work);
  1891. hisi_sas_controller_reset(hisi_hba);
  1892. }
  1893. EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
  1894. void hisi_sas_sync_rst_work_handler(struct work_struct *work)
  1895. {
  1896. struct hisi_sas_rst *rst =
  1897. container_of(work, struct hisi_sas_rst, work);
  1898. if (!hisi_sas_controller_reset(rst->hisi_hba))
  1899. rst->done = true;
  1900. complete(rst->completion);
  1901. }
  1902. EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
  1903. int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
  1904. {
  1905. struct device *dev = hisi_hba->dev;
  1906. struct platform_device *pdev = hisi_hba->platform_dev;
  1907. struct device_node *np = pdev ? pdev->dev.of_node : NULL;
  1908. struct clk *refclk;
  1909. if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
  1910. SAS_ADDR_SIZE)) {
  1911. dev_err(dev, "could not get property sas-addr\n");
  1912. return -ENOENT;
  1913. }
  1914. if (np) {
  1915. /*
  1916. * These properties are only required for platform device-based
  1917. * controller with DT firmware.
  1918. */
  1919. hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
  1920. "hisilicon,sas-syscon");
  1921. if (IS_ERR(hisi_hba->ctrl)) {
  1922. dev_err(dev, "could not get syscon\n");
  1923. return -ENOENT;
  1924. }
  1925. if (device_property_read_u32(dev, "ctrl-reset-reg",
  1926. &hisi_hba->ctrl_reset_reg)) {
  1927. dev_err(dev,
  1928. "could not get property ctrl-reset-reg\n");
  1929. return -ENOENT;
  1930. }
  1931. if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
  1932. &hisi_hba->ctrl_reset_sts_reg)) {
  1933. dev_err(dev,
  1934. "could not get property ctrl-reset-sts-reg\n");
  1935. return -ENOENT;
  1936. }
  1937. if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
  1938. &hisi_hba->ctrl_clock_ena_reg)) {
  1939. dev_err(dev,
  1940. "could not get property ctrl-clock-ena-reg\n");
  1941. return -ENOENT;
  1942. }
  1943. }
  1944. refclk = devm_clk_get(dev, NULL);
  1945. if (IS_ERR(refclk))
  1946. dev_dbg(dev, "no ref clk property\n");
  1947. else
  1948. hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
  1949. if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
  1950. dev_err(dev, "could not get property phy-count\n");
  1951. return -ENOENT;
  1952. }
  1953. if (device_property_read_u32(dev, "queue-count",
  1954. &hisi_hba->queue_count)) {
  1955. dev_err(dev, "could not get property queue-count\n");
  1956. return -ENOENT;
  1957. }
  1958. return 0;
  1959. }
  1960. EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
  1961. static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
  1962. const struct hisi_sas_hw *hw)
  1963. {
  1964. struct resource *res;
  1965. struct Scsi_Host *shost;
  1966. struct hisi_hba *hisi_hba;
  1967. struct device *dev = &pdev->dev;
  1968. int error;
  1969. shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
  1970. if (!shost) {
  1971. dev_err(dev, "scsi host alloc failed\n");
  1972. return NULL;
  1973. }
  1974. hisi_hba = shost_priv(shost);
  1975. INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
  1976. hisi_hba->hw = hw;
  1977. hisi_hba->dev = dev;
  1978. hisi_hba->platform_dev = pdev;
  1979. hisi_hba->shost = shost;
  1980. SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
  1981. timer_setup(&hisi_hba->timer, NULL, 0);
  1982. if (hisi_sas_get_fw_info(hisi_hba) < 0)
  1983. goto err_out;
  1984. error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
  1985. if (error)
  1986. error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
  1987. if (error) {
  1988. dev_err(dev, "No usable DMA addressing method\n");
  1989. goto err_out;
  1990. }
  1991. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1992. hisi_hba->regs = devm_ioremap_resource(dev, res);
  1993. if (IS_ERR(hisi_hba->regs))
  1994. goto err_out;
  1995. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1996. if (res) {
  1997. hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
  1998. if (IS_ERR(hisi_hba->sgpio_regs))
  1999. goto err_out;
  2000. }
  2001. if (hisi_sas_alloc(hisi_hba, shost)) {
  2002. hisi_sas_free(hisi_hba);
  2003. goto err_out;
  2004. }
  2005. return shost;
  2006. err_out:
  2007. scsi_host_put(shost);
  2008. dev_err(dev, "shost alloc failed\n");
  2009. return NULL;
  2010. }
  2011. int hisi_sas_probe(struct platform_device *pdev,
  2012. const struct hisi_sas_hw *hw)
  2013. {
  2014. struct Scsi_Host *shost;
  2015. struct hisi_hba *hisi_hba;
  2016. struct device *dev = &pdev->dev;
  2017. struct asd_sas_phy **arr_phy;
  2018. struct asd_sas_port **arr_port;
  2019. struct sas_ha_struct *sha;
  2020. int rc, phy_nr, port_nr, i;
  2021. shost = hisi_sas_shost_alloc(pdev, hw);
  2022. if (!shost)
  2023. return -ENOMEM;
  2024. sha = SHOST_TO_SAS_HA(shost);
  2025. hisi_hba = shost_priv(shost);
  2026. platform_set_drvdata(pdev, sha);
  2027. phy_nr = port_nr = hisi_hba->n_phy;
  2028. arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
  2029. arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
  2030. if (!arr_phy || !arr_port) {
  2031. rc = -ENOMEM;
  2032. goto err_out_ha;
  2033. }
  2034. sha->sas_phy = arr_phy;
  2035. sha->sas_port = arr_port;
  2036. sha->lldd_ha = hisi_hba;
  2037. shost->transportt = hisi_sas_stt;
  2038. shost->max_id = HISI_SAS_MAX_DEVICES;
  2039. shost->max_lun = ~0;
  2040. shost->max_channel = 1;
  2041. shost->max_cmd_len = 16;
  2042. if (hisi_hba->hw->slot_index_alloc) {
  2043. shost->can_queue = hisi_hba->hw->max_command_entries;
  2044. shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
  2045. } else {
  2046. shost->can_queue = hisi_hba->hw->max_command_entries -
  2047. HISI_SAS_RESERVED_IPTT_CNT;
  2048. shost->cmd_per_lun = hisi_hba->hw->max_command_entries -
  2049. HISI_SAS_RESERVED_IPTT_CNT;
  2050. }
  2051. sha->sas_ha_name = DRV_NAME;
  2052. sha->dev = hisi_hba->dev;
  2053. sha->lldd_module = THIS_MODULE;
  2054. sha->sas_addr = &hisi_hba->sas_addr[0];
  2055. sha->num_phys = hisi_hba->n_phy;
  2056. sha->core.shost = hisi_hba->shost;
  2057. for (i = 0; i < hisi_hba->n_phy; i++) {
  2058. sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
  2059. sha->sas_port[i] = &hisi_hba->port[i].sas_port;
  2060. }
  2061. rc = scsi_add_host(shost, &pdev->dev);
  2062. if (rc)
  2063. goto err_out_ha;
  2064. rc = sas_register_ha(sha);
  2065. if (rc)
  2066. goto err_out_register_ha;
  2067. rc = hisi_hba->hw->hw_init(hisi_hba);
  2068. if (rc)
  2069. goto err_out_register_ha;
  2070. scsi_scan_host(shost);
  2071. return 0;
  2072. err_out_register_ha:
  2073. scsi_remove_host(shost);
  2074. err_out_ha:
  2075. hisi_sas_free(hisi_hba);
  2076. scsi_host_put(shost);
  2077. return rc;
  2078. }
  2079. EXPORT_SYMBOL_GPL(hisi_sas_probe);
  2080. int hisi_sas_remove(struct platform_device *pdev)
  2081. {
  2082. struct sas_ha_struct *sha = platform_get_drvdata(pdev);
  2083. struct hisi_hba *hisi_hba = sha->lldd_ha;
  2084. struct Scsi_Host *shost = sha->core.shost;
  2085. if (timer_pending(&hisi_hba->timer))
  2086. del_timer(&hisi_hba->timer);
  2087. sas_unregister_ha(sha);
  2088. sas_remove_host(sha->core.shost);
  2089. hisi_sas_free(hisi_hba);
  2090. scsi_host_put(shost);
  2091. return 0;
  2092. }
  2093. EXPORT_SYMBOL_GPL(hisi_sas_remove);
  2094. static __init int hisi_sas_init(void)
  2095. {
  2096. hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
  2097. if (!hisi_sas_stt)
  2098. return -ENOMEM;
  2099. return 0;
  2100. }
  2101. static __exit void hisi_sas_exit(void)
  2102. {
  2103. sas_release_transport(hisi_sas_stt);
  2104. }
  2105. module_init(hisi_sas_init);
  2106. module_exit(hisi_sas_exit);
  2107. MODULE_LICENSE("GPL");
  2108. MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
  2109. MODULE_DESCRIPTION("HISILICON SAS controller driver");
  2110. MODULE_ALIAS("platform:" DRV_NAME);