st_remoteproc.c 9.9 KB

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  1. /*
  2. * ST's Remote Processor Control Driver
  3. *
  4. * Copyright (C) 2015 STMicroelectronics - All Rights Reserved
  5. *
  6. * Author: Ludovic Barre <ludovic.barre@st.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/err.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mailbox_client.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/of_device.h>
  22. #include <linux/of_reserved_mem.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/regmap.h>
  25. #include <linux/remoteproc.h>
  26. #include <linux/reset.h>
  27. #include "remoteproc_internal.h"
  28. #define ST_RPROC_VQ0 0
  29. #define ST_RPROC_VQ1 1
  30. #define ST_RPROC_MAX_VRING 2
  31. #define MBOX_RX 0
  32. #define MBOX_TX 1
  33. #define MBOX_MAX 2
  34. struct st_rproc_config {
  35. bool sw_reset;
  36. bool pwr_reset;
  37. unsigned long bootaddr_mask;
  38. };
  39. struct st_rproc {
  40. struct st_rproc_config *config;
  41. struct reset_control *sw_reset;
  42. struct reset_control *pwr_reset;
  43. struct clk *clk;
  44. u32 clk_rate;
  45. struct regmap *boot_base;
  46. u32 boot_offset;
  47. struct mbox_chan *mbox_chan[ST_RPROC_MAX_VRING * MBOX_MAX];
  48. struct mbox_client mbox_client_vq0;
  49. struct mbox_client mbox_client_vq1;
  50. };
  51. static void st_rproc_mbox_callback(struct device *dev, u32 msg)
  52. {
  53. struct rproc *rproc = dev_get_drvdata(dev);
  54. if (rproc_vq_interrupt(rproc, msg) == IRQ_NONE)
  55. dev_dbg(dev, "no message was found in vqid %d\n", msg);
  56. }
  57. static
  58. void st_rproc_mbox_callback_vq0(struct mbox_client *mbox_client, void *data)
  59. {
  60. st_rproc_mbox_callback(mbox_client->dev, 0);
  61. }
  62. static
  63. void st_rproc_mbox_callback_vq1(struct mbox_client *mbox_client, void *data)
  64. {
  65. st_rproc_mbox_callback(mbox_client->dev, 1);
  66. }
  67. static void st_rproc_kick(struct rproc *rproc, int vqid)
  68. {
  69. struct st_rproc *ddata = rproc->priv;
  70. struct device *dev = rproc->dev.parent;
  71. int ret;
  72. /* send the index of the triggered virtqueue in the mailbox payload */
  73. if (WARN_ON(vqid >= ST_RPROC_MAX_VRING))
  74. return;
  75. ret = mbox_send_message(ddata->mbox_chan[vqid * MBOX_MAX + MBOX_TX],
  76. (void *)&vqid);
  77. if (ret < 0)
  78. dev_err(dev, "failed to send message via mbox: %d\n", ret);
  79. }
  80. static int st_rproc_start(struct rproc *rproc)
  81. {
  82. struct st_rproc *ddata = rproc->priv;
  83. int err;
  84. regmap_update_bits(ddata->boot_base, ddata->boot_offset,
  85. ddata->config->bootaddr_mask, rproc->bootaddr);
  86. err = clk_enable(ddata->clk);
  87. if (err) {
  88. dev_err(&rproc->dev, "Failed to enable clock\n");
  89. return err;
  90. }
  91. if (ddata->config->sw_reset) {
  92. err = reset_control_deassert(ddata->sw_reset);
  93. if (err) {
  94. dev_err(&rproc->dev, "Failed to deassert S/W Reset\n");
  95. goto sw_reset_fail;
  96. }
  97. }
  98. if (ddata->config->pwr_reset) {
  99. err = reset_control_deassert(ddata->pwr_reset);
  100. if (err) {
  101. dev_err(&rproc->dev, "Failed to deassert Power Reset\n");
  102. goto pwr_reset_fail;
  103. }
  104. }
  105. dev_info(&rproc->dev, "Started from 0x%x\n", rproc->bootaddr);
  106. return 0;
  107. pwr_reset_fail:
  108. if (ddata->config->pwr_reset)
  109. reset_control_assert(ddata->sw_reset);
  110. sw_reset_fail:
  111. clk_disable(ddata->clk);
  112. return err;
  113. }
  114. static int st_rproc_stop(struct rproc *rproc)
  115. {
  116. struct st_rproc *ddata = rproc->priv;
  117. int sw_err = 0, pwr_err = 0;
  118. if (ddata->config->sw_reset) {
  119. sw_err = reset_control_assert(ddata->sw_reset);
  120. if (sw_err)
  121. dev_err(&rproc->dev, "Failed to assert S/W Reset\n");
  122. }
  123. if (ddata->config->pwr_reset) {
  124. pwr_err = reset_control_assert(ddata->pwr_reset);
  125. if (pwr_err)
  126. dev_err(&rproc->dev, "Failed to assert Power Reset\n");
  127. }
  128. clk_disable(ddata->clk);
  129. return sw_err ?: pwr_err;
  130. }
  131. static const struct rproc_ops st_rproc_ops = {
  132. .kick = st_rproc_kick,
  133. .start = st_rproc_start,
  134. .stop = st_rproc_stop,
  135. };
  136. /*
  137. * Fetch state of the processor: 0 is off, 1 is on.
  138. */
  139. static int st_rproc_state(struct platform_device *pdev)
  140. {
  141. struct rproc *rproc = platform_get_drvdata(pdev);
  142. struct st_rproc *ddata = rproc->priv;
  143. int reset_sw = 0, reset_pwr = 0;
  144. if (ddata->config->sw_reset)
  145. reset_sw = reset_control_status(ddata->sw_reset);
  146. if (ddata->config->pwr_reset)
  147. reset_pwr = reset_control_status(ddata->pwr_reset);
  148. if (reset_sw < 0 || reset_pwr < 0)
  149. return -EINVAL;
  150. return !reset_sw && !reset_pwr;
  151. }
  152. static const struct st_rproc_config st40_rproc_cfg = {
  153. .sw_reset = true,
  154. .pwr_reset = true,
  155. .bootaddr_mask = GENMASK(28, 1),
  156. };
  157. static const struct st_rproc_config st231_rproc_cfg = {
  158. .sw_reset = true,
  159. .pwr_reset = false,
  160. .bootaddr_mask = GENMASK(31, 6),
  161. };
  162. static const struct of_device_id st_rproc_match[] = {
  163. { .compatible = "st,st40-rproc", .data = &st40_rproc_cfg },
  164. { .compatible = "st,st231-rproc", .data = &st231_rproc_cfg },
  165. {},
  166. };
  167. MODULE_DEVICE_TABLE(of, st_rproc_match);
  168. static int st_rproc_parse_dt(struct platform_device *pdev)
  169. {
  170. struct device *dev = &pdev->dev;
  171. struct rproc *rproc = platform_get_drvdata(pdev);
  172. struct st_rproc *ddata = rproc->priv;
  173. struct device_node *np = dev->of_node;
  174. int err;
  175. if (ddata->config->sw_reset) {
  176. ddata->sw_reset = devm_reset_control_get_exclusive(dev,
  177. "sw_reset");
  178. if (IS_ERR(ddata->sw_reset)) {
  179. dev_err(dev, "Failed to get S/W Reset\n");
  180. return PTR_ERR(ddata->sw_reset);
  181. }
  182. }
  183. if (ddata->config->pwr_reset) {
  184. ddata->pwr_reset = devm_reset_control_get_exclusive(dev,
  185. "pwr_reset");
  186. if (IS_ERR(ddata->pwr_reset)) {
  187. dev_err(dev, "Failed to get Power Reset\n");
  188. return PTR_ERR(ddata->pwr_reset);
  189. }
  190. }
  191. ddata->clk = devm_clk_get(dev, NULL);
  192. if (IS_ERR(ddata->clk)) {
  193. dev_err(dev, "Failed to get clock\n");
  194. return PTR_ERR(ddata->clk);
  195. }
  196. err = of_property_read_u32(np, "clock-frequency", &ddata->clk_rate);
  197. if (err) {
  198. dev_err(dev, "failed to get clock frequency\n");
  199. return err;
  200. }
  201. ddata->boot_base = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
  202. if (IS_ERR(ddata->boot_base)) {
  203. dev_err(dev, "Boot base not found\n");
  204. return PTR_ERR(ddata->boot_base);
  205. }
  206. err = of_property_read_u32_index(np, "st,syscfg", 1,
  207. &ddata->boot_offset);
  208. if (err) {
  209. dev_err(dev, "Boot offset not found\n");
  210. return -EINVAL;
  211. }
  212. err = of_reserved_mem_device_init(dev);
  213. if (err) {
  214. dev_err(dev, "Failed to obtain shared memory\n");
  215. return err;
  216. }
  217. err = clk_prepare(ddata->clk);
  218. if (err)
  219. dev_err(dev, "failed to get clock\n");
  220. return err;
  221. }
  222. static int st_rproc_probe(struct platform_device *pdev)
  223. {
  224. struct device *dev = &pdev->dev;
  225. const struct of_device_id *match;
  226. struct st_rproc *ddata;
  227. struct device_node *np = dev->of_node;
  228. struct rproc *rproc;
  229. struct mbox_chan *chan;
  230. int enabled;
  231. int ret, i;
  232. match = of_match_device(st_rproc_match, dev);
  233. if (!match || !match->data) {
  234. dev_err(dev, "No device match found\n");
  235. return -ENODEV;
  236. }
  237. rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
  238. if (!rproc)
  239. return -ENOMEM;
  240. rproc->has_iommu = false;
  241. ddata = rproc->priv;
  242. ddata->config = (struct st_rproc_config *)match->data;
  243. platform_set_drvdata(pdev, rproc);
  244. ret = st_rproc_parse_dt(pdev);
  245. if (ret)
  246. goto free_rproc;
  247. enabled = st_rproc_state(pdev);
  248. if (enabled < 0) {
  249. ret = enabled;
  250. goto free_clk;
  251. }
  252. if (enabled) {
  253. atomic_inc(&rproc->power);
  254. rproc->state = RPROC_RUNNING;
  255. } else {
  256. clk_set_rate(ddata->clk, ddata->clk_rate);
  257. }
  258. if (of_get_property(np, "mbox-names", NULL)) {
  259. ddata->mbox_client_vq0.dev = dev;
  260. ddata->mbox_client_vq0.tx_done = NULL;
  261. ddata->mbox_client_vq0.tx_block = false;
  262. ddata->mbox_client_vq0.knows_txdone = false;
  263. ddata->mbox_client_vq0.rx_callback = st_rproc_mbox_callback_vq0;
  264. ddata->mbox_client_vq1.dev = dev;
  265. ddata->mbox_client_vq1.tx_done = NULL;
  266. ddata->mbox_client_vq1.tx_block = false;
  267. ddata->mbox_client_vq1.knows_txdone = false;
  268. ddata->mbox_client_vq1.rx_callback = st_rproc_mbox_callback_vq1;
  269. /*
  270. * To control a co-processor without IPC mechanism.
  271. * This driver can be used without mbox and rpmsg.
  272. */
  273. chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_rx");
  274. if (IS_ERR(chan)) {
  275. dev_err(&rproc->dev, "failed to request mbox chan 0\n");
  276. ret = PTR_ERR(chan);
  277. goto free_clk;
  278. }
  279. ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_RX] = chan;
  280. chan = mbox_request_channel_byname(&ddata->mbox_client_vq0, "vq0_tx");
  281. if (IS_ERR(chan)) {
  282. dev_err(&rproc->dev, "failed to request mbox chan 0\n");
  283. ret = PTR_ERR(chan);
  284. goto free_mbox;
  285. }
  286. ddata->mbox_chan[ST_RPROC_VQ0 * MBOX_MAX + MBOX_TX] = chan;
  287. chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_rx");
  288. if (IS_ERR(chan)) {
  289. dev_err(&rproc->dev, "failed to request mbox chan 1\n");
  290. ret = PTR_ERR(chan);
  291. goto free_mbox;
  292. }
  293. ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_RX] = chan;
  294. chan = mbox_request_channel_byname(&ddata->mbox_client_vq1, "vq1_tx");
  295. if (IS_ERR(chan)) {
  296. dev_err(&rproc->dev, "failed to request mbox chan 1\n");
  297. ret = PTR_ERR(chan);
  298. goto free_mbox;
  299. }
  300. ddata->mbox_chan[ST_RPROC_VQ1 * MBOX_MAX + MBOX_TX] = chan;
  301. }
  302. ret = rproc_add(rproc);
  303. if (ret)
  304. goto free_mbox;
  305. return 0;
  306. free_mbox:
  307. for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
  308. mbox_free_channel(ddata->mbox_chan[i]);
  309. free_clk:
  310. clk_unprepare(ddata->clk);
  311. free_rproc:
  312. rproc_free(rproc);
  313. return ret;
  314. }
  315. static int st_rproc_remove(struct platform_device *pdev)
  316. {
  317. struct rproc *rproc = platform_get_drvdata(pdev);
  318. struct st_rproc *ddata = rproc->priv;
  319. int i;
  320. rproc_del(rproc);
  321. clk_disable_unprepare(ddata->clk);
  322. of_reserved_mem_device_release(&pdev->dev);
  323. for (i = 0; i < ST_RPROC_MAX_VRING * MBOX_MAX; i++)
  324. mbox_free_channel(ddata->mbox_chan[i]);
  325. rproc_free(rproc);
  326. return 0;
  327. }
  328. static struct platform_driver st_rproc_driver = {
  329. .probe = st_rproc_probe,
  330. .remove = st_rproc_remove,
  331. .driver = {
  332. .name = "st-rproc",
  333. .of_match_table = of_match_ptr(st_rproc_match),
  334. },
  335. };
  336. module_platform_driver(st_rproc_driver);
  337. MODULE_DESCRIPTION("ST Remote Processor Control Driver");
  338. MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
  339. MODULE_LICENSE("GPL v2");