phy-qcom-usb-hsic.c 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160
  1. /**
  2. * Copyright (C) 2016 Linaro Ltd
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/ulpi/driver.h>
  10. #include <linux/ulpi/regs.h>
  11. #include <linux/phy/phy.h>
  12. #include <linux/pinctrl/consumer.h>
  13. #include <linux/pinctrl/pinctrl-state.h>
  14. #include <linux/delay.h>
  15. #include <linux/clk.h>
  16. #define ULPI_HSIC_CFG 0x30
  17. #define ULPI_HSIC_IO_CAL 0x33
  18. struct qcom_usb_hsic_phy {
  19. struct ulpi *ulpi;
  20. struct phy *phy;
  21. struct pinctrl *pctl;
  22. struct clk *phy_clk;
  23. struct clk *cal_clk;
  24. struct clk *cal_sleep_clk;
  25. };
  26. static int qcom_usb_hsic_phy_power_on(struct phy *phy)
  27. {
  28. struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
  29. struct ulpi *ulpi = uphy->ulpi;
  30. struct pinctrl_state *pins_default;
  31. int ret;
  32. ret = clk_prepare_enable(uphy->phy_clk);
  33. if (ret)
  34. return ret;
  35. ret = clk_prepare_enable(uphy->cal_clk);
  36. if (ret)
  37. goto err_cal;
  38. ret = clk_prepare_enable(uphy->cal_sleep_clk);
  39. if (ret)
  40. goto err_sleep;
  41. /* Set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */
  42. ret = ulpi_write(ulpi, ULPI_HSIC_IO_CAL, 0xff);
  43. if (ret)
  44. goto err_ulpi;
  45. /* Enable periodic IO calibration in HSIC_CFG register */
  46. ret = ulpi_write(ulpi, ULPI_HSIC_CFG, 0xa8);
  47. if (ret)
  48. goto err_ulpi;
  49. /* Configure pins for HSIC functionality */
  50. pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT);
  51. if (IS_ERR(pins_default))
  52. return PTR_ERR(pins_default);
  53. ret = pinctrl_select_state(uphy->pctl, pins_default);
  54. if (ret)
  55. goto err_ulpi;
  56. /* Enable HSIC mode in HSIC_CFG register */
  57. ret = ulpi_write(ulpi, ULPI_SET(ULPI_HSIC_CFG), 0x01);
  58. if (ret)
  59. goto err_ulpi;
  60. /* Disable auto-resume */
  61. ret = ulpi_write(ulpi, ULPI_CLR(ULPI_IFC_CTRL),
  62. ULPI_IFC_CTRL_AUTORESUME);
  63. if (ret)
  64. goto err_ulpi;
  65. return ret;
  66. err_ulpi:
  67. clk_disable_unprepare(uphy->cal_sleep_clk);
  68. err_sleep:
  69. clk_disable_unprepare(uphy->cal_clk);
  70. err_cal:
  71. clk_disable_unprepare(uphy->phy_clk);
  72. return ret;
  73. }
  74. static int qcom_usb_hsic_phy_power_off(struct phy *phy)
  75. {
  76. struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy);
  77. clk_disable_unprepare(uphy->cal_sleep_clk);
  78. clk_disable_unprepare(uphy->cal_clk);
  79. clk_disable_unprepare(uphy->phy_clk);
  80. return 0;
  81. }
  82. static const struct phy_ops qcom_usb_hsic_phy_ops = {
  83. .power_on = qcom_usb_hsic_phy_power_on,
  84. .power_off = qcom_usb_hsic_phy_power_off,
  85. .owner = THIS_MODULE,
  86. };
  87. static int qcom_usb_hsic_phy_probe(struct ulpi *ulpi)
  88. {
  89. struct qcom_usb_hsic_phy *uphy;
  90. struct phy_provider *p;
  91. struct clk *clk;
  92. uphy = devm_kzalloc(&ulpi->dev, sizeof(*uphy), GFP_KERNEL);
  93. if (!uphy)
  94. return -ENOMEM;
  95. ulpi_set_drvdata(ulpi, uphy);
  96. uphy->ulpi = ulpi;
  97. uphy->pctl = devm_pinctrl_get(&ulpi->dev);
  98. if (IS_ERR(uphy->pctl))
  99. return PTR_ERR(uphy->pctl);
  100. uphy->phy_clk = clk = devm_clk_get(&ulpi->dev, "phy");
  101. if (IS_ERR(clk))
  102. return PTR_ERR(clk);
  103. uphy->cal_clk = clk = devm_clk_get(&ulpi->dev, "cal");
  104. if (IS_ERR(clk))
  105. return PTR_ERR(clk);
  106. uphy->cal_sleep_clk = clk = devm_clk_get(&ulpi->dev, "cal_sleep");
  107. if (IS_ERR(clk))
  108. return PTR_ERR(clk);
  109. uphy->phy = devm_phy_create(&ulpi->dev, ulpi->dev.of_node,
  110. &qcom_usb_hsic_phy_ops);
  111. if (IS_ERR(uphy->phy))
  112. return PTR_ERR(uphy->phy);
  113. phy_set_drvdata(uphy->phy, uphy);
  114. p = devm_of_phy_provider_register(&ulpi->dev, of_phy_simple_xlate);
  115. return PTR_ERR_OR_ZERO(p);
  116. }
  117. static const struct of_device_id qcom_usb_hsic_phy_match[] = {
  118. { .compatible = "qcom,usb-hsic-phy", },
  119. { }
  120. };
  121. MODULE_DEVICE_TABLE(of, qcom_usb_hsic_phy_match);
  122. static struct ulpi_driver qcom_usb_hsic_phy_driver = {
  123. .probe = qcom_usb_hsic_phy_probe,
  124. .driver = {
  125. .name = "qcom_usb_hsic_phy",
  126. .of_match_table = qcom_usb_hsic_phy_match,
  127. },
  128. };
  129. module_ulpi_driver(qcom_usb_hsic_phy_driver);
  130. MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
  131. MODULE_LICENSE("GPL v2");