halbtcoutsrc.h 21 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __HALBTC_OUT_SRC_H__
  26. #define __HALBTC_OUT_SRC_H__
  27. #include "../wifi.h"
  28. #define NORMAL_EXEC false
  29. #define FORCE_EXEC true
  30. #define BTC_RF_OFF 0x0
  31. #define BTC_RF_ON 0x1
  32. #define BTC_RF_A RF90_PATH_A
  33. #define BTC_RF_B RF90_PATH_B
  34. #define BTC_RF_C RF90_PATH_C
  35. #define BTC_RF_D RF90_PATH_D
  36. #define BTC_SMSP SINGLEMAC_SINGLEPHY
  37. #define BTC_DMDP DUALMAC_DUALPHY
  38. #define BTC_DMSP DUALMAC_SINGLEPHY
  39. #define BTC_MP_UNKNOWN 0xff
  40. #define IN
  41. #define OUT
  42. #define BT_TMP_BUF_SIZE 100
  43. #define BT_COEX_ANT_TYPE_PG 0
  44. #define BT_COEX_ANT_TYPE_ANTDIV 1
  45. #define BT_COEX_ANT_TYPE_DETECTED 2
  46. #define BTC_MIMO_PS_STATIC 0
  47. #define BTC_MIMO_PS_DYNAMIC 1
  48. #define BTC_RATE_DISABLE 0
  49. #define BTC_RATE_ENABLE 1
  50. /* single Antenna definition */
  51. #define BTC_ANT_PATH_WIFI 0
  52. #define BTC_ANT_PATH_BT 1
  53. #define BTC_ANT_PATH_PTA 2
  54. #define BTC_ANT_PATH_WIFI5G 3
  55. #define BTC_ANT_PATH_AUTO 4
  56. /* dual Antenna definition */
  57. #define BTC_ANT_WIFI_AT_MAIN 0
  58. #define BTC_ANT_WIFI_AT_AUX 1
  59. /* coupler Antenna definition */
  60. #define BTC_ANT_WIFI_AT_CPL_MAIN 0
  61. #define BTC_ANT_WIFI_AT_CPL_AUX 1
  62. enum btc_bt_reg_type {
  63. BTC_BT_REG_RF = 0,
  64. BTC_BT_REG_MODEM = 1,
  65. BTC_BT_REG_BLUEWIZE = 2,
  66. BTC_BT_REG_VENDOR = 3,
  67. BTC_BT_REG_LE = 4,
  68. BTC_BT_REG_MAX
  69. };
  70. enum btc_chip_interface {
  71. BTC_INTF_UNKNOWN = 0,
  72. BTC_INTF_PCI = 1,
  73. BTC_INTF_USB = 2,
  74. BTC_INTF_SDIO = 3,
  75. BTC_INTF_GSPI = 4,
  76. BTC_INTF_MAX
  77. };
  78. enum btc_chip_type {
  79. BTC_CHIP_UNDEF = 0,
  80. BTC_CHIP_CSR_BC4 = 1,
  81. BTC_CHIP_CSR_BC8 = 2,
  82. BTC_CHIP_RTL8723A = 3,
  83. BTC_CHIP_RTL8821 = 4,
  84. BTC_CHIP_RTL8723B = 5,
  85. BTC_CHIP_MAX
  86. };
  87. enum btc_msg_type {
  88. BTC_MSG_INTERFACE = 0x0,
  89. BTC_MSG_ALGORITHM = 0x1,
  90. BTC_MSG_MAX
  91. };
  92. /* following is for BTC_MSG_INTERFACE */
  93. #define INTF_INIT BIT0
  94. #define INTF_NOTIFY BIT2
  95. /* following is for BTC_ALGORITHM */
  96. #define ALGO_BT_RSSI_STATE BIT0
  97. #define ALGO_WIFI_RSSI_STATE BIT1
  98. #define ALGO_BT_MONITOR BIT2
  99. #define ALGO_TRACE BIT3
  100. #define ALGO_TRACE_FW BIT4
  101. #define ALGO_TRACE_FW_DETAIL BIT5
  102. #define ALGO_TRACE_FW_EXEC BIT6
  103. #define ALGO_TRACE_SW BIT7
  104. #define ALGO_TRACE_SW_DETAIL BIT8
  105. #define ALGO_TRACE_SW_EXEC BIT9
  106. /* following is for wifi link status */
  107. #define WIFI_STA_CONNECTED BIT0
  108. #define WIFI_AP_CONNECTED BIT1
  109. #define WIFI_HS_CONNECTED BIT2
  110. #define WIFI_P2P_GO_CONNECTED BIT3
  111. #define WIFI_P2P_GC_CONNECTED BIT4
  112. #define BTC_RSSI_HIGH(_rssi_) \
  113. ((_rssi_ == BTC_RSSI_STATE_HIGH || \
  114. _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
  115. #define BTC_RSSI_MEDIUM(_rssi_) \
  116. ((_rssi_ == BTC_RSSI_STATE_MEDIUM || \
  117. _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
  118. #define BTC_RSSI_LOW(_rssi_) \
  119. ((_rssi_ == BTC_RSSI_STATE_LOW || \
  120. _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)
  121. enum btc_power_save_type {
  122. BTC_PS_WIFI_NATIVE = 0,
  123. BTC_PS_LPS_ON = 1,
  124. BTC_PS_LPS_OFF = 2,
  125. BTC_PS_LPS_MAX
  126. };
  127. struct btc_board_info {
  128. /* The following is some board information */
  129. u8 bt_chip_type;
  130. u8 pg_ant_num; /* pg ant number */
  131. u8 btdm_ant_num; /* ant number for btdm */
  132. u8 btdm_ant_pos;
  133. u8 single_ant_path; /* current used for 8723b only, 1=>s0, 0=>s1 */
  134. bool tfbga_package;
  135. u8 rfe_type;
  136. u8 ant_div_cfg;
  137. u8 customer_id;
  138. };
  139. enum btc_dbg_opcode {
  140. BTC_DBG_SET_COEX_NORMAL = 0x0,
  141. BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
  142. BTC_DBG_SET_COEX_BT_ONLY = 0x2,
  143. BTC_DBG_MAX
  144. };
  145. enum btc_rssi_state {
  146. BTC_RSSI_STATE_HIGH = 0x0,
  147. BTC_RSSI_STATE_MEDIUM = 0x1,
  148. BTC_RSSI_STATE_LOW = 0x2,
  149. BTC_RSSI_STATE_STAY_HIGH = 0x3,
  150. BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
  151. BTC_RSSI_STATE_STAY_LOW = 0x5,
  152. BTC_RSSI_MAX
  153. };
  154. enum btc_wifi_role {
  155. BTC_ROLE_STATION = 0x0,
  156. BTC_ROLE_AP = 0x1,
  157. BTC_ROLE_IBSS = 0x2,
  158. BTC_ROLE_HS_MODE = 0x3,
  159. BTC_ROLE_MAX
  160. };
  161. enum btc_wireless_freq {
  162. BTC_FREQ_2_4G = 0x0,
  163. BTC_FREQ_5G = 0x1,
  164. BTC_FREQ_MAX
  165. };
  166. enum btc_wifi_bw_mode {
  167. BTC_WIFI_BW_LEGACY = 0x0,
  168. BTC_WIFI_BW_HT20 = 0x1,
  169. BTC_WIFI_BW_HT40 = 0x2,
  170. BTC_WIFI_BW_HT80 = 0x3,
  171. BTC_WIFI_BW_MAX
  172. };
  173. enum btc_wifi_traffic_dir {
  174. BTC_WIFI_TRAFFIC_TX = 0x0,
  175. BTC_WIFI_TRAFFIC_RX = 0x1,
  176. BTC_WIFI_TRAFFIC_MAX
  177. };
  178. enum btc_wifi_pnp {
  179. BTC_WIFI_PNP_WAKE_UP = 0x0,
  180. BTC_WIFI_PNP_SLEEP = 0x1,
  181. BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2,
  182. BTC_WIFI_PNP_MAX
  183. };
  184. enum btc_iot_peer {
  185. BTC_IOT_PEER_UNKNOWN = 0,
  186. BTC_IOT_PEER_REALTEK = 1,
  187. BTC_IOT_PEER_REALTEK_92SE = 2,
  188. BTC_IOT_PEER_BROADCOM = 3,
  189. BTC_IOT_PEER_RALINK = 4,
  190. BTC_IOT_PEER_ATHEROS = 5,
  191. BTC_IOT_PEER_CISCO = 6,
  192. BTC_IOT_PEER_MERU = 7,
  193. BTC_IOT_PEER_MARVELL = 8,
  194. BTC_IOT_PEER_REALTEK_SOFTAP = 9,
  195. BTC_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
  196. BTC_IOT_PEER_AIRGO = 11,
  197. BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 12,
  198. BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 13,
  199. BTC_IOT_PEER_MAX,
  200. };
  201. /* for 8723b-d cut large current issue */
  202. enum bt_wifi_coex_state {
  203. BTC_WIFI_STAT_INIT,
  204. BTC_WIFI_STAT_IQK,
  205. BTC_WIFI_STAT_NORMAL_OFF,
  206. BTC_WIFI_STAT_MP_OFF,
  207. BTC_WIFI_STAT_NORMAL,
  208. BTC_WIFI_STAT_ANT_DIV,
  209. BTC_WIFI_STAT_MAX
  210. };
  211. enum bt_ant_type {
  212. BTC_ANT_TYPE_0,
  213. BTC_ANT_TYPE_1,
  214. BTC_ANT_TYPE_2,
  215. BTC_ANT_TYPE_3,
  216. BTC_ANT_TYPE_4,
  217. BTC_ANT_TYPE_MAX
  218. };
  219. enum btc_get_type {
  220. /* type bool */
  221. BTC_GET_BL_HS_OPERATION,
  222. BTC_GET_BL_HS_CONNECTING,
  223. BTC_GET_BL_WIFI_CONNECTED,
  224. BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
  225. BTC_GET_BL_WIFI_BUSY,
  226. BTC_GET_BL_WIFI_SCAN,
  227. BTC_GET_BL_WIFI_LINK,
  228. BTC_GET_BL_WIFI_DHCP,
  229. BTC_GET_BL_WIFI_SOFTAP_IDLE,
  230. BTC_GET_BL_WIFI_SOFTAP_LINKING,
  231. BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
  232. BTC_GET_BL_WIFI_ROAM,
  233. BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  234. BTC_GET_BL_WIFI_UNDER_5G,
  235. BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  236. BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
  237. BTC_GET_BL_WIFI_UNDER_B_MODE,
  238. BTC_GET_BL_EXT_SWITCH,
  239. BTC_GET_BL_WIFI_IS_IN_MP_MODE,
  240. BTC_GET_BL_IS_ASUS_8723B,
  241. BTC_GET_BL_FW_READY,
  242. BTC_GET_BL_RF4CE_CONNECTED,
  243. /* type s4Byte */
  244. BTC_GET_S4_WIFI_RSSI,
  245. BTC_GET_S4_HS_RSSI,
  246. /* type u32 */
  247. BTC_GET_U4_WIFI_BW,
  248. BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
  249. BTC_GET_U4_WIFI_FW_VER,
  250. BTC_GET_U4_WIFI_LINK_STATUS,
  251. BTC_GET_U4_BT_PATCH_VER,
  252. BTC_GET_U4_VENDOR,
  253. BTC_GET_U4_SUPPORTED_VERSION,
  254. BTC_GET_U4_SUPPORTED_FEATURE,
  255. BTC_GET_U4_BT_DEVICE_INFO,
  256. BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
  257. BTC_GET_U4_WIFI_IQK_TOTAL,
  258. BTC_GET_U4_WIFI_IQK_OK,
  259. BTC_GET_U4_WIFI_IQK_FAIL,
  260. /* type u1Byte */
  261. BTC_GET_U1_WIFI_DOT11_CHNL,
  262. BTC_GET_U1_WIFI_CENTRAL_CHNL,
  263. BTC_GET_U1_WIFI_HS_CHNL,
  264. BTC_GET_U1_MAC_PHY_MODE,
  265. BTC_GET_U1_AP_NUM,
  266. BTC_GET_U1_ANT_TYPE,
  267. BTC_GET_U1_IOT_PEER,
  268. /* for 1Ant */
  269. BTC_GET_U1_LPS_MODE,
  270. BTC_GET_BL_BT_SCO_BUSY,
  271. /* for test mode */
  272. BTC_GET_DRIVER_TEST_CFG,
  273. BTC_GET_MAX
  274. };
  275. enum btc_vendor {
  276. BTC_VENDOR_LENOVO,
  277. BTC_VENDOR_ASUS,
  278. BTC_VENDOR_OTHER
  279. };
  280. enum btc_set_type {
  281. /* type bool */
  282. BTC_SET_BL_BT_DISABLE,
  283. BTC_SET_BL_BT_TRAFFIC_BUSY,
  284. BTC_SET_BL_BT_LIMITED_DIG,
  285. BTC_SET_BL_FORCE_TO_ROAM,
  286. BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  287. BTC_SET_BL_BT_CTRL_AGG_SIZE,
  288. BTC_SET_BL_INC_SCAN_DEV_NUM,
  289. BTC_SET_BL_BT_TX_RX_MASK,
  290. BTC_SET_BL_MIRACAST_PLUS_BT,
  291. /* type u1Byte */
  292. BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
  293. BTC_SET_UI_SCAN_SIG_COMPENSATION,
  294. BTC_SET_U1_AGG_BUF_SIZE,
  295. /* type trigger some action */
  296. BTC_SET_ACT_GET_BT_RSSI,
  297. BTC_SET_ACT_AGGREGATE_CTRL,
  298. BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
  299. BTC_SET_MIMO_PS_MODE,
  300. /********* for 1Ant **********/
  301. /* type bool */
  302. BTC_SET_BL_BT_SCO_BUSY,
  303. /* type u1Byte */
  304. BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
  305. BTC_SET_U1_LPS_VAL,
  306. BTC_SET_U1_RPWM_VAL,
  307. BTC_SET_U1_1ANT_LPS,
  308. BTC_SET_U1_1ANT_RPWM,
  309. /* type trigger some action */
  310. BTC_SET_ACT_LEAVE_LPS,
  311. BTC_SET_ACT_ENTER_LPS,
  312. BTC_SET_ACT_NORMAL_LPS,
  313. BTC_SET_ACT_PRE_NORMAL_LPS,
  314. BTC_SET_ACT_POST_NORMAL_LPS,
  315. BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
  316. BTC_SET_ACT_DISABLE_LOW_POWER,
  317. BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL,
  318. BTC_SET_ACT_UPDATE_RAMASK,
  319. BTC_SET_ACT_SEND_MIMO_PS,
  320. /* BT Coex related */
  321. BTC_SET_ACT_CTRL_BT_INFO,
  322. BTC_SET_ACT_CTRL_BT_COEX,
  323. BTC_SET_ACT_CTRL_8723B_ANT,
  324. /***************************/
  325. BTC_SET_MAX
  326. };
  327. enum btc_dbg_disp_type {
  328. BTC_DBG_DISP_COEX_STATISTICS = 0x0,
  329. BTC_DBG_DISP_BT_LINK_INFO = 0x1,
  330. BTC_DBG_DISP_BT_FW_VER = 0x2,
  331. BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
  332. BTC_DBG_DISP_WIFI_STATUS = 0x04,
  333. BTC_DBG_DISP_MAX
  334. };
  335. enum btc_notify_type_ips {
  336. BTC_IPS_LEAVE = 0x0,
  337. BTC_IPS_ENTER = 0x1,
  338. BTC_IPS_MAX
  339. };
  340. enum btc_notify_type_lps {
  341. BTC_LPS_DISABLE = 0x0,
  342. BTC_LPS_ENABLE = 0x1,
  343. BTC_LPS_MAX
  344. };
  345. enum btc_notify_type_scan {
  346. BTC_SCAN_FINISH = 0x0,
  347. BTC_SCAN_START = 0x1,
  348. BTC_SCAN_START_2G = 0x2,
  349. BTC_SCAN_MAX
  350. };
  351. enum btc_notify_type_switchband {
  352. BTC_NOT_SWITCH = 0x0,
  353. BTC_SWITCH_TO_24G = 0x1,
  354. BTC_SWITCH_TO_5G = 0x2,
  355. BTC_SWITCH_TO_24G_NOFORSCAN = 0x3,
  356. BTC_SWITCH_MAX
  357. };
  358. enum btc_notify_type_associate {
  359. BTC_ASSOCIATE_FINISH = 0x0,
  360. BTC_ASSOCIATE_START = 0x1,
  361. BTC_ASSOCIATE_5G_FINISH = 0x2,
  362. BTC_ASSOCIATE_5G_START = 0x3,
  363. BTC_ASSOCIATE_MAX
  364. };
  365. enum btc_notify_type_media_status {
  366. BTC_MEDIA_DISCONNECT = 0x0,
  367. BTC_MEDIA_CONNECT = 0x1,
  368. BTC_MEDIA_MAX
  369. };
  370. enum btc_notify_type_special_packet {
  371. BTC_PACKET_UNKNOWN = 0x0,
  372. BTC_PACKET_DHCP = 0x1,
  373. BTC_PACKET_ARP = 0x2,
  374. BTC_PACKET_EAPOL = 0x3,
  375. BTC_PACKET_MAX
  376. };
  377. enum hci_ext_bt_operation {
  378. HCI_BT_OP_NONE = 0x0,
  379. HCI_BT_OP_INQUIRY_START = 0x1,
  380. HCI_BT_OP_INQUIRY_FINISH = 0x2,
  381. HCI_BT_OP_PAGING_START = 0x3,
  382. HCI_BT_OP_PAGING_SUCCESS = 0x4,
  383. HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
  384. HCI_BT_OP_PAIRING_START = 0x6,
  385. HCI_BT_OP_PAIRING_FINISH = 0x7,
  386. HCI_BT_OP_BT_DEV_ENABLE = 0x8,
  387. HCI_BT_OP_BT_DEV_DISABLE = 0x9,
  388. HCI_BT_OP_MAX
  389. };
  390. enum btc_notify_type_stack_operation {
  391. BTC_STACK_OP_NONE = 0x0,
  392. BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
  393. BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
  394. BTC_STACK_OP_MAX
  395. };
  396. enum {
  397. BTC_CCK_1,
  398. BTC_CCK_2,
  399. BTC_CCK_5_5,
  400. BTC_CCK_11,
  401. BTC_OFDM_6,
  402. BTC_OFDM_9,
  403. BTC_OFDM_12,
  404. BTC_OFDM_18,
  405. BTC_OFDM_24,
  406. BTC_OFDM_36,
  407. BTC_OFDM_48,
  408. BTC_OFDM_54,
  409. BTC_MCS_0,
  410. BTC_MCS_1,
  411. BTC_MCS_2,
  412. BTC_MCS_3,
  413. BTC_MCS_4,
  414. BTC_MCS_5,
  415. BTC_MCS_6,
  416. BTC_MCS_7,
  417. BTC_MCS_8,
  418. BTC_MCS_9,
  419. BTC_MCS_10,
  420. BTC_MCS_11,
  421. BTC_MCS_12,
  422. BTC_MCS_13,
  423. BTC_MCS_14,
  424. BTC_MCS_15,
  425. BTC_MCS_16,
  426. BTC_MCS_17,
  427. BTC_MCS_18,
  428. BTC_MCS_19,
  429. BTC_MCS_20,
  430. BTC_MCS_21,
  431. BTC_MCS_22,
  432. BTC_MCS_23,
  433. BTC_MCS_24,
  434. BTC_MCS_25,
  435. BTC_MCS_26,
  436. BTC_MCS_27,
  437. BTC_MCS_28,
  438. BTC_MCS_29,
  439. BTC_MCS_30,
  440. BTC_MCS_31,
  441. BTC_VHT_1SS_MCS_0,
  442. BTC_VHT_1SS_MCS_1,
  443. BTC_VHT_1SS_MCS_2,
  444. BTC_VHT_1SS_MCS_3,
  445. BTC_VHT_1SS_MCS_4,
  446. BTC_VHT_1SS_MCS_5,
  447. BTC_VHT_1SS_MCS_6,
  448. BTC_VHT_1SS_MCS_7,
  449. BTC_VHT_1SS_MCS_8,
  450. BTC_VHT_1SS_MCS_9,
  451. BTC_VHT_2SS_MCS_0,
  452. BTC_VHT_2SS_MCS_1,
  453. BTC_VHT_2SS_MCS_2,
  454. BTC_VHT_2SS_MCS_3,
  455. BTC_VHT_2SS_MCS_4,
  456. BTC_VHT_2SS_MCS_5,
  457. BTC_VHT_2SS_MCS_6,
  458. BTC_VHT_2SS_MCS_7,
  459. BTC_VHT_2SS_MCS_8,
  460. BTC_VHT_2SS_MCS_9,
  461. BTC_VHT_3SS_MCS_0,
  462. BTC_VHT_3SS_MCS_1,
  463. BTC_VHT_3SS_MCS_2,
  464. BTC_VHT_3SS_MCS_3,
  465. BTC_VHT_3SS_MCS_4,
  466. BTC_VHT_3SS_MCS_5,
  467. BTC_VHT_3SS_MCS_6,
  468. BTC_VHT_3SS_MCS_7,
  469. BTC_VHT_3SS_MCS_8,
  470. BTC_VHT_3SS_MCS_9,
  471. BTC_VHT_4SS_MCS_0,
  472. BTC_VHT_4SS_MCS_1,
  473. BTC_VHT_4SS_MCS_2,
  474. BTC_VHT_4SS_MCS_3,
  475. BTC_VHT_4SS_MCS_4,
  476. BTC_VHT_4SS_MCS_5,
  477. BTC_VHT_4SS_MCS_6,
  478. BTC_VHT_4SS_MCS_7,
  479. BTC_VHT_4SS_MCS_8,
  480. BTC_VHT_4SS_MCS_9,
  481. BTC_MCS_32,
  482. BTC_UNKNOWN,
  483. BTC_PKT_MGNT,
  484. BTC_PKT_CTRL,
  485. BTC_PKT_UNKNOWN,
  486. BTC_PKT_NOT_FOR_ME,
  487. BTC_RATE_MAX
  488. };
  489. enum {
  490. BTC_MULTIPORT_SCC,
  491. BTC_MULTIPORT_MCC_2CHANNEL,
  492. BTC_MULTIPORT_MCC_2BAND,
  493. BTC_MULTIPORT_MAX
  494. };
  495. struct btc_bt_info {
  496. bool bt_disabled;
  497. u8 rssi_adjust_for_agc_table_on;
  498. u8 rssi_adjust_for_1ant_coex_type;
  499. bool pre_bt_ctrl_agg_buf_size;
  500. bool bt_busy;
  501. u8 pre_agg_buf_size;
  502. u8 agg_buf_size;
  503. bool limited_dig;
  504. bool pre_reject_agg_pkt;
  505. bool reject_agg_pkt;
  506. bool bt_ctrl_buf_size;
  507. bool increase_scan_dev_num;
  508. bool miracast_plus_bt;
  509. bool bt_ctrl_agg_buf_size;
  510. bool bt_tx_rx_mask;
  511. u16 bt_hci_ver;
  512. u16 bt_real_fw_ver;
  513. u8 bt_fw_ver;
  514. u32 bt_get_fw_ver;
  515. bool bt_disable_low_pwr;
  516. /* the following is for 1Ant solution */
  517. bool bt_ctrl_lps;
  518. bool bt_pwr_save_mode;
  519. bool bt_lps_on;
  520. bool force_to_roam;
  521. u8 force_exec_pwr_cmd_cnt;
  522. u8 lps_val;
  523. u8 rpwm_val;
  524. u32 ra_mask;
  525. u32 afh_map_l;
  526. u32 afh_map_m;
  527. u16 afh_map_h;
  528. u32 bt_supported_feature;
  529. u32 bt_supported_version;
  530. u32 bt_device_info;
  531. u32 bt_forb_slot_val;
  532. u8 bt_ant_det_val;
  533. u8 bt_ble_scan_type;
  534. u32 bt_ble_scan_para;
  535. };
  536. struct btc_stack_info {
  537. bool profile_notified;
  538. u16 hci_version; /* stack hci version */
  539. u8 num_of_link;
  540. bool bt_link_exist;
  541. bool sco_exist;
  542. bool acl_exist;
  543. bool a2dp_exist;
  544. bool hid_exist;
  545. u8 num_of_hid;
  546. bool pan_exist;
  547. bool unknown_acl_exist;
  548. s8 min_bt_rssi;
  549. };
  550. struct btc_statistics {
  551. u32 cnt_bind;
  552. u32 cnt_init_hw_config;
  553. u32 cnt_init_coex_dm;
  554. u32 cnt_ips_notify;
  555. u32 cnt_lps_notify;
  556. u32 cnt_scan_notify;
  557. u32 cnt_connect_notify;
  558. u32 cnt_media_status_notify;
  559. u32 cnt_special_packet_notify;
  560. u32 cnt_bt_info_notify;
  561. u32 cnt_periodical;
  562. u32 cnt_coex_dm_switch;
  563. u32 cnt_stack_operation_notify;
  564. u32 cnt_dbg_ctrl;
  565. u32 cnt_pre_load_firmware;
  566. u32 cnt_power_on;
  567. };
  568. struct btc_bt_link_info {
  569. bool bt_link_exist;
  570. bool bt_hi_pri_link_exist;
  571. bool sco_exist;
  572. bool sco_only;
  573. bool a2dp_exist;
  574. bool a2dp_only;
  575. bool hid_exist;
  576. bool hid_only;
  577. bool pan_exist;
  578. bool pan_only;
  579. bool slave_role;
  580. bool acl_busy;
  581. };
  582. enum btc_antenna_pos {
  583. BTC_ANTENNA_AT_MAIN_PORT = 0x1,
  584. BTC_ANTENNA_AT_AUX_PORT = 0x2,
  585. };
  586. enum btc_mp_h2c_op_code {
  587. BT_OP_GET_BT_VERSION = 0,
  588. BT_OP_WRITE_REG_ADDR = 12,
  589. BT_OP_WRITE_REG_VALUE = 13,
  590. BT_OP_READ_REG = 17,
  591. BT_OP_GET_AFH_MAP_L = 30,
  592. BT_OP_GET_AFH_MAP_M = 31,
  593. BT_OP_GET_AFH_MAP_H = 32,
  594. BT_OP_GET_BT_COEX_SUPPORTED_FEATURE = 42,
  595. BT_OP_GET_BT_COEX_SUPPORTED_VERSION = 43,
  596. BT_OP_GET_BT_ANT_DET_VAL = 44,
  597. BT_OP_GET_BT_BLE_SCAN_PARA = 45,
  598. BT_OP_GET_BT_BLE_SCAN_TYPE = 46,
  599. BT_OP_GET_BT_DEVICE_INFO = 48,
  600. BT_OP_GET_BT_FORBIDDEN_SLOT_VAL = 49,
  601. BT_OP_MAX
  602. };
  603. enum btc_mp_h2c_req_num {
  604. /* 4 bits only */
  605. BT_SEQ_DONT_CARE = 0,
  606. BT_SEQ_GET_BT_VERSION = 0xE,
  607. BT_SEQ_GET_AFH_MAP_L = 0x5,
  608. BT_SEQ_GET_AFH_MAP_M = 0x6,
  609. BT_SEQ_GET_AFH_MAP_H = 0x9,
  610. BT_SEQ_GET_BT_COEX_SUPPORTED_FEATURE = 0x7,
  611. BT_SEQ_GET_BT_COEX_SUPPORTED_VERSION = 0x8,
  612. BT_SEQ_GET_BT_ANT_DET_VAL = 0x2,
  613. BT_SEQ_GET_BT_BLE_SCAN_PARA = 0x3,
  614. BT_SEQ_GET_BT_BLE_SCAN_TYPE = 0x4,
  615. BT_SEQ_GET_BT_DEVICE_INFO = 0xA,
  616. BT_SEQ_GET_BT_FORB_SLOT_VAL = 0xB,
  617. };
  618. struct btc_coexist {
  619. /* make sure only one adapter can bind the data context */
  620. bool binded;
  621. /* default adapter */
  622. void *adapter;
  623. struct btc_board_info board_info;
  624. /* some bt info referenced by non-bt module */
  625. struct btc_bt_info bt_info;
  626. struct btc_stack_info stack_info;
  627. enum btc_chip_interface chip_interface;
  628. struct btc_bt_link_info bt_link_info;
  629. /* boolean variables to replace BT_AUTO_REPORT_ONLY_XXXXY_ZANT
  630. * configuration parameters
  631. */
  632. bool auto_report_1ant;
  633. bool auto_report_2ant;
  634. bool dbg_mode_1ant;
  635. bool dbg_mode_2ant;
  636. bool initilized;
  637. bool stop_coex_dm;
  638. bool manual_control;
  639. struct btc_statistics statistics;
  640. u8 pwr_mode_val[10];
  641. struct completion bt_mp_comp;
  642. /* function pointers - io related */
  643. u8 (*btc_read_1byte)(void *btc_context, u32 reg_addr);
  644. void (*btc_write_1byte)(void *btc_context, u32 reg_addr, u32 data);
  645. void (*btc_write_1byte_bitmask)(void *btc_context, u32 reg_addr,
  646. u32 bit_mask, u8 data1b);
  647. u16 (*btc_read_2byte)(void *btc_context, u32 reg_addr);
  648. void (*btc_write_2byte)(void *btc_context, u32 reg_addr, u16 data);
  649. u32 (*btc_read_4byte)(void *btc_context, u32 reg_addr);
  650. void (*btc_write_4byte)(void *btc_context, u32 reg_addr, u32 data);
  651. void (*btc_write_local_reg_1byte)(void *btc_context, u32 reg_addr,
  652. u8 data);
  653. void (*btc_set_bb_reg)(void *btc_context, u32 reg_addr,
  654. u32 bit_mask, u32 data);
  655. u32 (*btc_get_bb_reg)(void *btc_context, u32 reg_addr,
  656. u32 bit_mask);
  657. void (*btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
  658. u32 bit_mask, u32 data);
  659. u32 (*btc_get_rf_reg)(void *btc_context, u8 rf_path,
  660. u32 reg_addr, u32 bit_mask);
  661. void (*btc_fill_h2c)(void *btc_context, u8 element_id,
  662. u32 cmd_len, u8 *cmd_buffer);
  663. void (*btc_disp_dbg_msg)(void *btcoexist, u8 disp_type,
  664. struct seq_file *m);
  665. bool (*btc_get)(void *btcoexist, u8 get_type, void *out_buf);
  666. bool (*btc_set)(void *btcoexist, u8 set_type, void *in_buf);
  667. void (*btc_set_bt_reg)(void *btc_context, u8 reg_type, u32 offset,
  668. u32 value);
  669. u32 (*btc_get_bt_reg)(void *btc_context, u8 reg_type, u32 offset);
  670. u32 (*btc_get_bt_coex_supported_feature)(void *btcoexist);
  671. u32 (*btc_get_bt_coex_supported_version)(void *btcoexist);
  672. u32 (*btc_get_bt_phydm_version)(void *btcoexist);
  673. void (*btc_phydm_modify_ra_pcr_threshold)(void *btcoexist,
  674. u8 ra_offset_direction,
  675. u8 ra_threshold_offset);
  676. u32 (*btc_phydm_query_phy_counter)(void *btcoexist,
  677. enum dm_info_query dm_id);
  678. u8 (*btc_get_ant_det_val_from_bt)(void *btcoexist);
  679. u8 (*btc_get_ble_scan_type_from_bt)(void *btcoexist);
  680. u32 (*btc_get_ble_scan_para_from_bt)(void *btcoexist, u8 scan_type);
  681. bool (*btc_get_bt_afh_map_from_bt)(void *btcoexist, u8 map_type,
  682. u8 *afh_map);
  683. };
  684. bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
  685. #define rtl_btc_coexist(rtlpriv) \
  686. ((struct btc_coexist *)((rtlpriv)->btcoexist.btc_context))
  687. #define rtl_btc_wifi_only(rtlpriv) \
  688. ((struct wifi_only_cfg *)((rtlpriv)->btcoexist.wifi_only_context))
  689. struct wifi_only_cfg;
  690. bool exhalbtc_initlize_variables(struct rtl_priv *rtlpriv);
  691. bool exhalbtc_initlize_variables_wifi_only(struct rtl_priv *rtlpriv);
  692. bool exhalbtc_bind_bt_coex_withadapter(void *adapter);
  693. void exhalbtc_power_on_setting(struct btc_coexist *btcoexist);
  694. void exhalbtc_pre_load_firmware(struct btc_coexist *btcoexist);
  695. void exhalbtc_init_hw_config(struct btc_coexist *btcoexist, bool wifi_only);
  696. void exhalbtc_init_hw_config_wifi_only(struct wifi_only_cfg *wifionly_cfg);
  697. void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
  698. void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
  699. void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
  700. void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
  701. void exhalbtc_scan_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
  702. u8 is_5g);
  703. void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
  704. void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
  705. enum rt_media_status media_status);
  706. void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
  707. void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
  708. u8 length);
  709. void exhalbtc_rf_status_notify(struct btc_coexist *btcoexist, u8 type);
  710. void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
  711. void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
  712. void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
  713. void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
  714. void exhalbtc_periodical(struct btc_coexist *btcoexist);
  715. void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
  716. u8 *data);
  717. void exhalbtc_antenna_detection(struct btc_coexist *btcoexist, u32 cent_freq,
  718. u32 offset, u32 span, u32 seconds);
  719. void exhalbtc_stack_update_profile_info(void);
  720. void exhalbtc_set_hci_version(struct btc_coexist *btcoexist, u16 hci_version);
  721. void exhalbtc_set_bt_patch_version(struct btc_coexist *btcoexist,
  722. u16 bt_hci_version, u16 bt_patch_version);
  723. void exhalbtc_update_min_bt_rssi(struct btc_coexist *btcoexist, s8 bt_rssi);
  724. void exhalbtc_set_bt_exist(struct btc_coexist *btcoexist, bool bt_exist);
  725. void exhalbtc_set_chip_type(struct btc_coexist *btcoexist, u8 chip_type);
  726. void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num);
  727. void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist,
  728. struct seq_file *m);
  729. void exhalbtc_switch_band_notify(struct btc_coexist *btcoexist, u8 type);
  730. void exhalbtc_switch_band_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
  731. u8 is_5g);
  732. void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
  733. u8 *rssi_wifi, u8 *rssi_bt);
  734. void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
  735. void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
  736. void exhalbtc_set_single_ant_path(struct btc_coexist *btcoexist,
  737. u8 single_ant_path);
  738. void halbtc_send_wifi_port_id_cmd(void *bt_context);
  739. void halbtc_set_default_port_id_cmd(void *bt_context);
  740. /* The following are used by wifi_only case */
  741. enum wifionly_chip_interface {
  742. WIFIONLY_INTF_UNKNOWN = 0,
  743. WIFIONLY_INTF_PCI = 1,
  744. WIFIONLY_INTF_USB = 2,
  745. WIFIONLY_INTF_SDIO = 3,
  746. WIFIONLY_INTF_MAX
  747. };
  748. enum wifionly_customer_id {
  749. CUSTOMER_NORMAL = 0,
  750. CUSTOMER_HP_1 = 1,
  751. };
  752. struct wifi_only_haldata {
  753. u16 customer_id;
  754. u8 efuse_pg_antnum;
  755. u8 efuse_pg_antpath;
  756. u8 rfe_type;
  757. u8 ant_div_cfg;
  758. };
  759. struct wifi_only_cfg {
  760. void *adapter;
  761. struct wifi_only_haldata haldata_info;
  762. enum wifionly_chip_interface chip_interface;
  763. };
  764. static inline
  765. void halwifionly_phy_set_bb_reg(struct wifi_only_cfg *wifi_conly_cfg,
  766. u32 regaddr, u32 bitmask, u32 data)
  767. {
  768. struct rtl_priv *rtlpriv = (struct rtl_priv *)wifi_conly_cfg->adapter;
  769. rtl_set_bbreg(rtlpriv->hw, regaddr, bitmask, data);
  770. }
  771. #endif