lan743x_main.c 83 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /* Copyright (C) 2018 Microchip Technology Inc. */
  3. #include <linux/module.h>
  4. #include <linux/pci.h>
  5. #include <linux/netdevice.h>
  6. #include <linux/etherdevice.h>
  7. #include <linux/crc32.h>
  8. #include <linux/microchipphy.h>
  9. #include <linux/net_tstamp.h>
  10. #include <linux/phy.h>
  11. #include <linux/rtnetlink.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/crc16.h>
  14. #include "lan743x_main.h"
  15. #include "lan743x_ethtool.h"
  16. static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
  17. {
  18. pci_release_selected_regions(adapter->pdev,
  19. pci_select_bars(adapter->pdev,
  20. IORESOURCE_MEM));
  21. pci_disable_device(adapter->pdev);
  22. }
  23. static int lan743x_pci_init(struct lan743x_adapter *adapter,
  24. struct pci_dev *pdev)
  25. {
  26. unsigned long bars = 0;
  27. int ret;
  28. adapter->pdev = pdev;
  29. ret = pci_enable_device_mem(pdev);
  30. if (ret)
  31. goto return_error;
  32. netif_info(adapter, probe, adapter->netdev,
  33. "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
  34. pdev->vendor, pdev->device);
  35. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  36. if (!test_bit(0, &bars))
  37. goto disable_device;
  38. ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
  39. if (ret)
  40. goto disable_device;
  41. pci_set_master(pdev);
  42. return 0;
  43. disable_device:
  44. pci_disable_device(adapter->pdev);
  45. return_error:
  46. return ret;
  47. }
  48. u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
  49. {
  50. return ioread32(&adapter->csr.csr_address[offset]);
  51. }
  52. void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
  53. u32 data)
  54. {
  55. iowrite32(data, &adapter->csr.csr_address[offset]);
  56. }
  57. #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
  58. static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
  59. {
  60. u32 data;
  61. data = lan743x_csr_read(adapter, HW_CFG);
  62. data |= HW_CFG_LRST_;
  63. lan743x_csr_write(adapter, HW_CFG, data);
  64. return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
  65. !(data & HW_CFG_LRST_), 100000, 10000000);
  66. }
  67. static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
  68. int offset, u32 bit_mask,
  69. int target_value, int usleep_min,
  70. int usleep_max, int count)
  71. {
  72. u32 data;
  73. return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
  74. target_value == ((data & bit_mask) ? 1 : 0),
  75. usleep_max, usleep_min * count);
  76. }
  77. static int lan743x_csr_init(struct lan743x_adapter *adapter)
  78. {
  79. struct lan743x_csr *csr = &adapter->csr;
  80. resource_size_t bar_start, bar_length;
  81. int result;
  82. bar_start = pci_resource_start(adapter->pdev, 0);
  83. bar_length = pci_resource_len(adapter->pdev, 0);
  84. csr->csr_address = devm_ioremap(&adapter->pdev->dev,
  85. bar_start, bar_length);
  86. if (!csr->csr_address) {
  87. result = -ENOMEM;
  88. goto clean_up;
  89. }
  90. csr->id_rev = lan743x_csr_read(adapter, ID_REV);
  91. csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
  92. netif_info(adapter, probe, adapter->netdev,
  93. "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
  94. csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
  95. FPGA_REV_GET_MINOR_(csr->fpga_rev));
  96. if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
  97. result = -ENODEV;
  98. goto clean_up;
  99. }
  100. csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  101. switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
  102. case ID_REV_CHIP_REV_A0_:
  103. csr->flags |= LAN743X_CSR_FLAG_IS_A0;
  104. csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  105. break;
  106. case ID_REV_CHIP_REV_B0_:
  107. csr->flags |= LAN743X_CSR_FLAG_IS_B0;
  108. break;
  109. }
  110. result = lan743x_csr_light_reset(adapter);
  111. if (result)
  112. goto clean_up;
  113. return 0;
  114. clean_up:
  115. return result;
  116. }
  117. static void lan743x_intr_software_isr(void *context)
  118. {
  119. struct lan743x_adapter *adapter = context;
  120. struct lan743x_intr *intr = &adapter->intr;
  121. u32 int_sts;
  122. int_sts = lan743x_csr_read(adapter, INT_STS);
  123. if (int_sts & INT_BIT_SW_GP_) {
  124. lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_);
  125. intr->software_isr_flag = 1;
  126. }
  127. }
  128. static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
  129. {
  130. struct lan743x_tx *tx = context;
  131. struct lan743x_adapter *adapter = tx->adapter;
  132. bool enable_flag = true;
  133. u32 int_en = 0;
  134. int_en = lan743x_csr_read(adapter, INT_EN_SET);
  135. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  136. lan743x_csr_write(adapter, INT_EN_CLR,
  137. INT_BIT_DMA_TX_(tx->channel_number));
  138. }
  139. if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
  140. u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  141. u32 dmac_int_sts;
  142. u32 dmac_int_en;
  143. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  144. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  145. else
  146. dmac_int_sts = ioc_bit;
  147. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  148. dmac_int_en = lan743x_csr_read(adapter,
  149. DMAC_INT_EN_SET);
  150. else
  151. dmac_int_en = ioc_bit;
  152. dmac_int_en &= ioc_bit;
  153. dmac_int_sts &= dmac_int_en;
  154. if (dmac_int_sts & ioc_bit) {
  155. napi_schedule(&tx->napi);
  156. enable_flag = false;/* poll func will enable later */
  157. }
  158. }
  159. if (enable_flag)
  160. /* enable isr */
  161. lan743x_csr_write(adapter, INT_EN_SET,
  162. INT_BIT_DMA_TX_(tx->channel_number));
  163. }
  164. static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
  165. {
  166. struct lan743x_rx *rx = context;
  167. struct lan743x_adapter *adapter = rx->adapter;
  168. bool enable_flag = true;
  169. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  170. lan743x_csr_write(adapter, INT_EN_CLR,
  171. INT_BIT_DMA_RX_(rx->channel_number));
  172. }
  173. if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
  174. u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
  175. u32 dmac_int_sts;
  176. u32 dmac_int_en;
  177. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  178. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  179. else
  180. dmac_int_sts = rx_frame_bit;
  181. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  182. dmac_int_en = lan743x_csr_read(adapter,
  183. DMAC_INT_EN_SET);
  184. else
  185. dmac_int_en = rx_frame_bit;
  186. dmac_int_en &= rx_frame_bit;
  187. dmac_int_sts &= dmac_int_en;
  188. if (dmac_int_sts & rx_frame_bit) {
  189. napi_schedule(&rx->napi);
  190. enable_flag = false;/* poll funct will enable later */
  191. }
  192. }
  193. if (enable_flag) {
  194. /* enable isr */
  195. lan743x_csr_write(adapter, INT_EN_SET,
  196. INT_BIT_DMA_RX_(rx->channel_number));
  197. }
  198. }
  199. static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
  200. {
  201. struct lan743x_adapter *adapter = context;
  202. unsigned int channel;
  203. if (int_sts & INT_BIT_ALL_RX_) {
  204. for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
  205. channel++) {
  206. u32 int_bit = INT_BIT_DMA_RX_(channel);
  207. if (int_sts & int_bit) {
  208. lan743x_rx_isr(&adapter->rx[channel],
  209. int_bit, flags);
  210. int_sts &= ~int_bit;
  211. }
  212. }
  213. }
  214. if (int_sts & INT_BIT_ALL_TX_) {
  215. for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
  216. channel++) {
  217. u32 int_bit = INT_BIT_DMA_TX_(channel);
  218. if (int_sts & int_bit) {
  219. lan743x_tx_isr(&adapter->tx[channel],
  220. int_bit, flags);
  221. int_sts &= ~int_bit;
  222. }
  223. }
  224. }
  225. if (int_sts & INT_BIT_ALL_OTHER_) {
  226. if (int_sts & INT_BIT_SW_GP_) {
  227. lan743x_intr_software_isr(adapter);
  228. int_sts &= ~INT_BIT_SW_GP_;
  229. }
  230. if (int_sts & INT_BIT_1588_) {
  231. lan743x_ptp_isr(adapter);
  232. int_sts &= ~INT_BIT_1588_;
  233. }
  234. }
  235. if (int_sts)
  236. lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
  237. }
  238. static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
  239. {
  240. struct lan743x_vector *vector = ptr;
  241. struct lan743x_adapter *adapter = vector->adapter;
  242. irqreturn_t result = IRQ_NONE;
  243. u32 int_enables;
  244. u32 int_sts;
  245. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
  246. int_sts = lan743x_csr_read(adapter, INT_STS);
  247. } else if (vector->flags &
  248. (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
  249. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
  250. int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
  251. } else {
  252. /* use mask as implied status */
  253. int_sts = vector->int_mask | INT_BIT_MAS_;
  254. }
  255. if (!(int_sts & INT_BIT_MAS_))
  256. goto irq_done;
  257. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
  258. /* disable vector interrupt */
  259. lan743x_csr_write(adapter,
  260. INT_VEC_EN_CLR,
  261. INT_VEC_EN_(vector->vector_index));
  262. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
  263. /* disable master interrupt */
  264. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  265. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
  266. int_enables = lan743x_csr_read(adapter, INT_EN_SET);
  267. } else {
  268. /* use vector mask as implied enable mask */
  269. int_enables = vector->int_mask;
  270. }
  271. int_sts &= int_enables;
  272. int_sts &= vector->int_mask;
  273. if (int_sts) {
  274. if (vector->handler) {
  275. vector->handler(vector->context,
  276. int_sts, vector->flags);
  277. } else {
  278. /* disable interrupts on this vector */
  279. lan743x_csr_write(adapter, INT_EN_CLR,
  280. vector->int_mask);
  281. }
  282. result = IRQ_HANDLED;
  283. }
  284. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
  285. /* enable master interrupt */
  286. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  287. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
  288. /* enable vector interrupt */
  289. lan743x_csr_write(adapter,
  290. INT_VEC_EN_SET,
  291. INT_VEC_EN_(vector->vector_index));
  292. irq_done:
  293. return result;
  294. }
  295. static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
  296. {
  297. struct lan743x_intr *intr = &adapter->intr;
  298. int result = -ENODEV;
  299. int timeout = 10;
  300. intr->software_isr_flag = 0;
  301. /* enable interrupt */
  302. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
  303. /* activate interrupt here */
  304. lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
  305. while ((timeout > 0) && (!(intr->software_isr_flag))) {
  306. usleep_range(1000, 20000);
  307. timeout--;
  308. }
  309. if (intr->software_isr_flag)
  310. result = 0;
  311. /* disable interrupts */
  312. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
  313. return result;
  314. }
  315. static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
  316. int vector_index, u32 flags,
  317. u32 int_mask,
  318. lan743x_vector_handler handler,
  319. void *context)
  320. {
  321. struct lan743x_vector *vector = &adapter->intr.vector_list
  322. [vector_index];
  323. int ret;
  324. vector->adapter = adapter;
  325. vector->flags = flags;
  326. vector->vector_index = vector_index;
  327. vector->int_mask = int_mask;
  328. vector->handler = handler;
  329. vector->context = context;
  330. ret = request_irq(vector->irq,
  331. lan743x_intr_entry_isr,
  332. (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
  333. IRQF_SHARED : 0, DRIVER_NAME, vector);
  334. if (ret) {
  335. vector->handler = NULL;
  336. vector->context = NULL;
  337. vector->int_mask = 0;
  338. vector->flags = 0;
  339. }
  340. return ret;
  341. }
  342. static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
  343. int vector_index)
  344. {
  345. struct lan743x_vector *vector = &adapter->intr.vector_list
  346. [vector_index];
  347. free_irq(vector->irq, vector);
  348. vector->handler = NULL;
  349. vector->context = NULL;
  350. vector->int_mask = 0;
  351. vector->flags = 0;
  352. }
  353. static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
  354. u32 int_mask)
  355. {
  356. int index;
  357. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  358. if (adapter->intr.vector_list[index].int_mask & int_mask)
  359. return adapter->intr.vector_list[index].flags;
  360. }
  361. return 0;
  362. }
  363. static void lan743x_intr_close(struct lan743x_adapter *adapter)
  364. {
  365. struct lan743x_intr *intr = &adapter->intr;
  366. int index = 0;
  367. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  368. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
  369. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  370. if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
  371. lan743x_intr_unregister_isr(adapter, index);
  372. intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
  373. }
  374. }
  375. if (intr->flags & INTR_FLAG_MSI_ENABLED) {
  376. pci_disable_msi(adapter->pdev);
  377. intr->flags &= ~INTR_FLAG_MSI_ENABLED;
  378. }
  379. if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
  380. pci_disable_msix(adapter->pdev);
  381. intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
  382. }
  383. }
  384. static int lan743x_intr_open(struct lan743x_adapter *adapter)
  385. {
  386. struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
  387. struct lan743x_intr *intr = &adapter->intr;
  388. u32 int_vec_en_auto_clr = 0;
  389. u32 int_vec_map0 = 0;
  390. u32 int_vec_map1 = 0;
  391. int ret = -ENODEV;
  392. int index = 0;
  393. u32 flags = 0;
  394. intr->number_of_vectors = 0;
  395. /* Try to set up MSIX interrupts */
  396. memset(&msix_entries[0], 0,
  397. sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
  398. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
  399. msix_entries[index].entry = index;
  400. ret = pci_enable_msix_range(adapter->pdev,
  401. msix_entries, 1,
  402. 1 + LAN743X_USED_TX_CHANNELS +
  403. LAN743X_USED_RX_CHANNELS);
  404. if (ret > 0) {
  405. intr->flags |= INTR_FLAG_MSIX_ENABLED;
  406. intr->number_of_vectors = ret;
  407. intr->using_vectors = true;
  408. for (index = 0; index < intr->number_of_vectors; index++)
  409. intr->vector_list[index].irq = msix_entries
  410. [index].vector;
  411. netif_info(adapter, ifup, adapter->netdev,
  412. "using MSIX interrupts, number of vectors = %d\n",
  413. intr->number_of_vectors);
  414. }
  415. /* If MSIX failed try to setup using MSI interrupts */
  416. if (!intr->number_of_vectors) {
  417. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  418. if (!pci_enable_msi(adapter->pdev)) {
  419. intr->flags |= INTR_FLAG_MSI_ENABLED;
  420. intr->number_of_vectors = 1;
  421. intr->using_vectors = true;
  422. intr->vector_list[0].irq =
  423. adapter->pdev->irq;
  424. netif_info(adapter, ifup, adapter->netdev,
  425. "using MSI interrupts, number of vectors = %d\n",
  426. intr->number_of_vectors);
  427. }
  428. }
  429. }
  430. /* If MSIX, and MSI failed, setup using legacy interrupt */
  431. if (!intr->number_of_vectors) {
  432. intr->number_of_vectors = 1;
  433. intr->using_vectors = false;
  434. intr->vector_list[0].irq = intr->irq;
  435. netif_info(adapter, ifup, adapter->netdev,
  436. "using legacy interrupts\n");
  437. }
  438. /* At this point we must have at least one irq */
  439. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
  440. /* map all interrupts to vector 0 */
  441. lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
  442. lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
  443. lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
  444. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  445. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  446. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  447. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  448. if (intr->using_vectors) {
  449. flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  450. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  451. } else {
  452. flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
  453. LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
  454. LAN743X_VECTOR_FLAG_IRQ_SHARED;
  455. }
  456. if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  457. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
  458. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
  459. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  460. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
  461. flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
  462. flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
  463. }
  464. ret = lan743x_intr_register_isr(adapter, 0, flags,
  465. INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
  466. INT_BIT_ALL_OTHER_,
  467. lan743x_intr_shared_isr, adapter);
  468. if (ret)
  469. goto clean_up;
  470. intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
  471. if (intr->using_vectors)
  472. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  473. INT_VEC_EN_(0));
  474. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  475. lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
  476. lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
  477. lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
  478. lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
  479. lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
  480. lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
  481. lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
  482. lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
  483. lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
  484. lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
  485. lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
  486. }
  487. /* enable interrupts */
  488. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  489. ret = lan743x_intr_test_isr(adapter);
  490. if (ret)
  491. goto clean_up;
  492. if (intr->number_of_vectors > 1) {
  493. int number_of_tx_vectors = intr->number_of_vectors - 1;
  494. if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
  495. number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
  496. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  497. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  498. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  499. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  500. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  501. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  502. if (adapter->csr.flags &
  503. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  504. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  505. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  506. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  507. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  508. }
  509. for (index = 0; index < number_of_tx_vectors; index++) {
  510. u32 int_bit = INT_BIT_DMA_TX_(index);
  511. int vector = index + 1;
  512. /* map TX interrupt to vector */
  513. int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
  514. lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
  515. /* Remove TX interrupt from shared mask */
  516. intr->vector_list[0].int_mask &= ~int_bit;
  517. ret = lan743x_intr_register_isr(adapter, vector, flags,
  518. int_bit, lan743x_tx_isr,
  519. &adapter->tx[index]);
  520. if (ret)
  521. goto clean_up;
  522. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  523. if (!(flags &
  524. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
  525. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  526. INT_VEC_EN_(vector));
  527. }
  528. }
  529. if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
  530. int number_of_rx_vectors = intr->number_of_vectors -
  531. LAN743X_USED_TX_CHANNELS - 1;
  532. if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
  533. number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
  534. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  535. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  536. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  537. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  538. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  539. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  540. if (adapter->csr.flags &
  541. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  542. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
  543. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  544. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  545. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  546. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  547. }
  548. for (index = 0; index < number_of_rx_vectors; index++) {
  549. int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
  550. u32 int_bit = INT_BIT_DMA_RX_(index);
  551. /* map RX interrupt to vector */
  552. int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
  553. lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
  554. if (flags &
  555. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
  556. int_vec_en_auto_clr |= INT_VEC_EN_(vector);
  557. lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
  558. int_vec_en_auto_clr);
  559. }
  560. /* Remove RX interrupt from shared mask */
  561. intr->vector_list[0].int_mask &= ~int_bit;
  562. ret = lan743x_intr_register_isr(adapter, vector, flags,
  563. int_bit, lan743x_rx_isr,
  564. &adapter->rx[index]);
  565. if (ret)
  566. goto clean_up;
  567. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  568. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  569. INT_VEC_EN_(vector));
  570. }
  571. }
  572. return 0;
  573. clean_up:
  574. lan743x_intr_close(adapter);
  575. return ret;
  576. }
  577. static int lan743x_dp_write(struct lan743x_adapter *adapter,
  578. u32 select, u32 addr, u32 length, u32 *buf)
  579. {
  580. int ret = -EIO;
  581. u32 dp_sel;
  582. int i;
  583. mutex_lock(&adapter->dp_lock);
  584. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  585. 1, 40, 100, 100))
  586. goto unlock;
  587. dp_sel = lan743x_csr_read(adapter, DP_SEL);
  588. dp_sel &= ~DP_SEL_MASK_;
  589. dp_sel |= select;
  590. lan743x_csr_write(adapter, DP_SEL, dp_sel);
  591. for (i = 0; i < length; i++) {
  592. lan743x_csr_write(adapter, DP_ADDR, addr + i);
  593. lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
  594. lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
  595. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  596. 1, 40, 100, 100))
  597. goto unlock;
  598. }
  599. ret = 0;
  600. unlock:
  601. mutex_unlock(&adapter->dp_lock);
  602. return ret;
  603. }
  604. static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
  605. {
  606. u32 ret;
  607. ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
  608. MAC_MII_ACC_PHY_ADDR_MASK_;
  609. ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
  610. MAC_MII_ACC_MIIRINDA_MASK_;
  611. if (read)
  612. ret |= MAC_MII_ACC_MII_READ_;
  613. else
  614. ret |= MAC_MII_ACC_MII_WRITE_;
  615. ret |= MAC_MII_ACC_MII_BUSY_;
  616. return ret;
  617. }
  618. static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
  619. {
  620. u32 data;
  621. return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
  622. !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
  623. }
  624. static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
  625. {
  626. struct lan743x_adapter *adapter = bus->priv;
  627. u32 val, mii_access;
  628. int ret;
  629. /* comfirm MII not busy */
  630. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  631. if (ret < 0)
  632. return ret;
  633. /* set the address, index & direction (read from PHY) */
  634. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
  635. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  636. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  637. if (ret < 0)
  638. return ret;
  639. val = lan743x_csr_read(adapter, MAC_MII_DATA);
  640. return (int)(val & 0xFFFF);
  641. }
  642. static int lan743x_mdiobus_write(struct mii_bus *bus,
  643. int phy_id, int index, u16 regval)
  644. {
  645. struct lan743x_adapter *adapter = bus->priv;
  646. u32 val, mii_access;
  647. int ret;
  648. /* confirm MII not busy */
  649. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  650. if (ret < 0)
  651. return ret;
  652. val = (u32)regval;
  653. lan743x_csr_write(adapter, MAC_MII_DATA, val);
  654. /* set the address, index & direction (write to PHY) */
  655. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
  656. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  657. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  658. return ret;
  659. }
  660. static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
  661. u8 *addr)
  662. {
  663. u32 addr_lo, addr_hi;
  664. addr_lo = addr[0] |
  665. addr[1] << 8 |
  666. addr[2] << 16 |
  667. addr[3] << 24;
  668. addr_hi = addr[4] |
  669. addr[5] << 8;
  670. lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
  671. lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
  672. ether_addr_copy(adapter->mac_address, addr);
  673. netif_info(adapter, drv, adapter->netdev,
  674. "MAC address set to %pM\n", addr);
  675. }
  676. static int lan743x_mac_init(struct lan743x_adapter *adapter)
  677. {
  678. bool mac_address_valid = true;
  679. struct net_device *netdev;
  680. u32 mac_addr_hi = 0;
  681. u32 mac_addr_lo = 0;
  682. u32 data;
  683. netdev = adapter->netdev;
  684. /* setup auto duplex, and speed detection */
  685. data = lan743x_csr_read(adapter, MAC_CR);
  686. data |= MAC_CR_ADD_ | MAC_CR_ASD_;
  687. data |= MAC_CR_CNTR_RST_;
  688. lan743x_csr_write(adapter, MAC_CR, data);
  689. mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
  690. mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
  691. adapter->mac_address[0] = mac_addr_lo & 0xFF;
  692. adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
  693. adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
  694. adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
  695. adapter->mac_address[4] = mac_addr_hi & 0xFF;
  696. adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
  697. if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
  698. mac_addr_lo == 0xFFFFFFFF) {
  699. mac_address_valid = false;
  700. } else if (!is_valid_ether_addr(adapter->mac_address)) {
  701. mac_address_valid = false;
  702. }
  703. if (!mac_address_valid)
  704. eth_random_addr(adapter->mac_address);
  705. lan743x_mac_set_address(adapter, adapter->mac_address);
  706. ether_addr_copy(netdev->dev_addr, adapter->mac_address);
  707. return 0;
  708. }
  709. static int lan743x_mac_open(struct lan743x_adapter *adapter)
  710. {
  711. int ret = 0;
  712. u32 temp;
  713. temp = lan743x_csr_read(adapter, MAC_RX);
  714. lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
  715. temp = lan743x_csr_read(adapter, MAC_TX);
  716. lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
  717. return ret;
  718. }
  719. static void lan743x_mac_close(struct lan743x_adapter *adapter)
  720. {
  721. u32 temp;
  722. temp = lan743x_csr_read(adapter, MAC_TX);
  723. temp &= ~MAC_TX_TXEN_;
  724. lan743x_csr_write(adapter, MAC_TX, temp);
  725. lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
  726. 1, 1000, 20000, 100);
  727. temp = lan743x_csr_read(adapter, MAC_RX);
  728. temp &= ~MAC_RX_RXEN_;
  729. lan743x_csr_write(adapter, MAC_RX, temp);
  730. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  731. 1, 1000, 20000, 100);
  732. }
  733. static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
  734. bool tx_enable, bool rx_enable)
  735. {
  736. u32 flow_setting = 0;
  737. /* set maximum pause time because when fifo space frees
  738. * up a zero value pause frame will be sent to release the pause
  739. */
  740. flow_setting = MAC_FLOW_CR_FCPT_MASK_;
  741. if (tx_enable)
  742. flow_setting |= MAC_FLOW_CR_TX_FCEN_;
  743. if (rx_enable)
  744. flow_setting |= MAC_FLOW_CR_RX_FCEN_;
  745. lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
  746. }
  747. static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
  748. {
  749. int enabled = 0;
  750. u32 mac_rx = 0;
  751. mac_rx = lan743x_csr_read(adapter, MAC_RX);
  752. if (mac_rx & MAC_RX_RXEN_) {
  753. enabled = 1;
  754. if (mac_rx & MAC_RX_RXD_) {
  755. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  756. mac_rx &= ~MAC_RX_RXD_;
  757. }
  758. mac_rx &= ~MAC_RX_RXEN_;
  759. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  760. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  761. 1, 1000, 20000, 100);
  762. lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
  763. }
  764. mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
  765. mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
  766. MAC_RX_MAX_SIZE_MASK_);
  767. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  768. if (enabled) {
  769. mac_rx |= MAC_RX_RXEN_;
  770. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  771. }
  772. return 0;
  773. }
  774. /* PHY */
  775. static int lan743x_phy_reset(struct lan743x_adapter *adapter)
  776. {
  777. u32 data;
  778. /* Only called with in probe, and before mdiobus_register */
  779. data = lan743x_csr_read(adapter, PMT_CTL);
  780. data |= PMT_CTL_ETH_PHY_RST_;
  781. lan743x_csr_write(adapter, PMT_CTL, data);
  782. return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
  783. (!(data & PMT_CTL_ETH_PHY_RST_) &&
  784. (data & PMT_CTL_READY_)),
  785. 50000, 1000000);
  786. }
  787. static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
  788. u8 duplex, u16 local_adv,
  789. u16 remote_adv)
  790. {
  791. struct lan743x_phy *phy = &adapter->phy;
  792. u8 cap;
  793. if (phy->fc_autoneg)
  794. cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
  795. else
  796. cap = phy->fc_request_control;
  797. lan743x_mac_flow_ctrl_set_enables(adapter,
  798. cap & FLOW_CTRL_TX,
  799. cap & FLOW_CTRL_RX);
  800. }
  801. static int lan743x_phy_init(struct lan743x_adapter *adapter)
  802. {
  803. return lan743x_phy_reset(adapter);
  804. }
  805. static void lan743x_phy_link_status_change(struct net_device *netdev)
  806. {
  807. struct lan743x_adapter *adapter = netdev_priv(netdev);
  808. struct phy_device *phydev = netdev->phydev;
  809. phy_print_status(phydev);
  810. if (phydev->state == PHY_RUNNING) {
  811. struct ethtool_link_ksettings ksettings;
  812. int remote_advertisement = 0;
  813. int local_advertisement = 0;
  814. memset(&ksettings, 0, sizeof(ksettings));
  815. phy_ethtool_get_link_ksettings(netdev, &ksettings);
  816. local_advertisement =
  817. ethtool_adv_to_mii_adv_t(phydev->advertising);
  818. remote_advertisement =
  819. ethtool_adv_to_mii_adv_t(phydev->lp_advertising);
  820. lan743x_phy_update_flowcontrol(adapter,
  821. ksettings.base.duplex,
  822. local_advertisement,
  823. remote_advertisement);
  824. lan743x_ptp_update_latency(adapter, ksettings.base.speed);
  825. }
  826. }
  827. static void lan743x_phy_close(struct lan743x_adapter *adapter)
  828. {
  829. struct net_device *netdev = adapter->netdev;
  830. phy_stop(netdev->phydev);
  831. phy_disconnect(netdev->phydev);
  832. netdev->phydev = NULL;
  833. }
  834. static int lan743x_phy_open(struct lan743x_adapter *adapter)
  835. {
  836. struct lan743x_phy *phy = &adapter->phy;
  837. struct phy_device *phydev;
  838. struct net_device *netdev;
  839. int ret = -EIO;
  840. u32 mii_adv;
  841. netdev = adapter->netdev;
  842. phydev = phy_find_first(adapter->mdiobus);
  843. if (!phydev)
  844. goto return_error;
  845. ret = phy_connect_direct(netdev, phydev,
  846. lan743x_phy_link_status_change,
  847. PHY_INTERFACE_MODE_GMII);
  848. if (ret)
  849. goto return_error;
  850. /* MAC doesn't support 1000T Half */
  851. phydev->supported &= ~SUPPORTED_1000baseT_Half;
  852. /* support both flow controls */
  853. phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
  854. phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
  855. mii_adv = (u32)mii_advertise_flowctrl(phy->fc_request_control);
  856. phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
  857. phy->fc_autoneg = phydev->autoneg;
  858. phy_start(phydev);
  859. phy_start_aneg(phydev);
  860. return 0;
  861. return_error:
  862. return ret;
  863. }
  864. static void lan743x_rfe_open(struct lan743x_adapter *adapter)
  865. {
  866. lan743x_csr_write(adapter, RFE_RSS_CFG,
  867. RFE_RSS_CFG_UDP_IPV6_EX_ |
  868. RFE_RSS_CFG_TCP_IPV6_EX_ |
  869. RFE_RSS_CFG_IPV6_EX_ |
  870. RFE_RSS_CFG_UDP_IPV6_ |
  871. RFE_RSS_CFG_TCP_IPV6_ |
  872. RFE_RSS_CFG_IPV6_ |
  873. RFE_RSS_CFG_UDP_IPV4_ |
  874. RFE_RSS_CFG_TCP_IPV4_ |
  875. RFE_RSS_CFG_IPV4_ |
  876. RFE_RSS_CFG_VALID_HASH_BITS_ |
  877. RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
  878. RFE_RSS_CFG_RSS_HASH_STORE_ |
  879. RFE_RSS_CFG_RSS_ENABLE_);
  880. }
  881. static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
  882. {
  883. u8 *mac_addr;
  884. u32 mac_addr_hi = 0;
  885. u32 mac_addr_lo = 0;
  886. /* Add mac address to perfect Filter */
  887. mac_addr = adapter->mac_address;
  888. mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
  889. (((u32)(mac_addr[1])) << 8) |
  890. (((u32)(mac_addr[2])) << 16) |
  891. (((u32)(mac_addr[3])) << 24));
  892. mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
  893. (((u32)(mac_addr[5])) << 8));
  894. lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
  895. lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
  896. mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
  897. }
  898. static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
  899. {
  900. struct net_device *netdev = adapter->netdev;
  901. u32 hash_table[DP_SEL_VHF_HASH_LEN];
  902. u32 rfctl;
  903. u32 data;
  904. rfctl = lan743x_csr_read(adapter, RFE_CTL);
  905. rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
  906. RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
  907. rfctl |= RFE_CTL_AB_;
  908. if (netdev->flags & IFF_PROMISC) {
  909. rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
  910. } else {
  911. if (netdev->flags & IFF_ALLMULTI)
  912. rfctl |= RFE_CTL_AM_;
  913. }
  914. memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
  915. if (netdev_mc_count(netdev)) {
  916. struct netdev_hw_addr *ha;
  917. int i;
  918. rfctl |= RFE_CTL_DA_PERFECT_;
  919. i = 1;
  920. netdev_for_each_mc_addr(ha, netdev) {
  921. /* set first 32 into Perfect Filter */
  922. if (i < 33) {
  923. lan743x_csr_write(adapter,
  924. RFE_ADDR_FILT_HI(i), 0);
  925. data = ha->addr[3];
  926. data = ha->addr[2] | (data << 8);
  927. data = ha->addr[1] | (data << 8);
  928. data = ha->addr[0] | (data << 8);
  929. lan743x_csr_write(adapter,
  930. RFE_ADDR_FILT_LO(i), data);
  931. data = ha->addr[5];
  932. data = ha->addr[4] | (data << 8);
  933. data |= RFE_ADDR_FILT_HI_VALID_;
  934. lan743x_csr_write(adapter,
  935. RFE_ADDR_FILT_HI(i), data);
  936. } else {
  937. u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
  938. 23) & 0x1FF;
  939. hash_table[bitnum / 32] |= (1 << (bitnum % 32));
  940. rfctl |= RFE_CTL_MCAST_HASH_;
  941. }
  942. i++;
  943. }
  944. }
  945. lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
  946. DP_SEL_VHF_VLAN_LEN,
  947. DP_SEL_VHF_HASH_LEN, hash_table);
  948. lan743x_csr_write(adapter, RFE_CTL, rfctl);
  949. }
  950. static int lan743x_dmac_init(struct lan743x_adapter *adapter)
  951. {
  952. u32 data = 0;
  953. lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
  954. lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
  955. 0, 1000, 20000, 100);
  956. switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
  957. case DMA_DESCRIPTOR_SPACING_16:
  958. data = DMAC_CFG_MAX_DSPACE_16_;
  959. break;
  960. case DMA_DESCRIPTOR_SPACING_32:
  961. data = DMAC_CFG_MAX_DSPACE_32_;
  962. break;
  963. case DMA_DESCRIPTOR_SPACING_64:
  964. data = DMAC_CFG_MAX_DSPACE_64_;
  965. break;
  966. case DMA_DESCRIPTOR_SPACING_128:
  967. data = DMAC_CFG_MAX_DSPACE_128_;
  968. break;
  969. default:
  970. return -EPERM;
  971. }
  972. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  973. data |= DMAC_CFG_COAL_EN_;
  974. data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
  975. data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
  976. lan743x_csr_write(adapter, DMAC_CFG, data);
  977. data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
  978. data |= DMAC_COAL_CFG_TIMER_TX_START_;
  979. data |= DMAC_COAL_CFG_FLUSH_INTS_;
  980. data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
  981. data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
  982. data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
  983. data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
  984. lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
  985. data = DMAC_OBFF_TX_THRES_SET_(0x08);
  986. data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
  987. lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
  988. return 0;
  989. }
  990. static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
  991. int tx_channel)
  992. {
  993. u32 dmac_cmd = 0;
  994. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  995. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  996. DMAC_CMD_START_T_(tx_channel)),
  997. (dmac_cmd &
  998. DMAC_CMD_STOP_T_(tx_channel)));
  999. }
  1000. static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
  1001. int tx_channel)
  1002. {
  1003. int timeout = 100;
  1004. int result = 0;
  1005. while (timeout &&
  1006. ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
  1007. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  1008. usleep_range(1000, 20000);
  1009. timeout--;
  1010. }
  1011. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1012. result = -ENODEV;
  1013. return result;
  1014. }
  1015. static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
  1016. int rx_channel)
  1017. {
  1018. u32 dmac_cmd = 0;
  1019. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  1020. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  1021. DMAC_CMD_START_R_(rx_channel)),
  1022. (dmac_cmd &
  1023. DMAC_CMD_STOP_R_(rx_channel)));
  1024. }
  1025. static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
  1026. int rx_channel)
  1027. {
  1028. int timeout = 100;
  1029. int result = 0;
  1030. while (timeout &&
  1031. ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
  1032. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  1033. usleep_range(1000, 20000);
  1034. timeout--;
  1035. }
  1036. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1037. result = -ENODEV;
  1038. return result;
  1039. }
  1040. static void lan743x_tx_release_desc(struct lan743x_tx *tx,
  1041. int descriptor_index, bool cleanup)
  1042. {
  1043. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1044. struct lan743x_tx_descriptor *descriptor = NULL;
  1045. u32 descriptor_type = 0;
  1046. bool ignore_sync;
  1047. descriptor = &tx->ring_cpu_ptr[descriptor_index];
  1048. buffer_info = &tx->buffer_info[descriptor_index];
  1049. if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
  1050. goto done;
  1051. descriptor_type = (descriptor->data0) &
  1052. TX_DESC_DATA0_DTYPE_MASK_;
  1053. if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
  1054. goto clean_up_data_descriptor;
  1055. else
  1056. goto clear_active;
  1057. clean_up_data_descriptor:
  1058. if (buffer_info->dma_ptr) {
  1059. if (buffer_info->flags &
  1060. TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
  1061. dma_unmap_page(&tx->adapter->pdev->dev,
  1062. buffer_info->dma_ptr,
  1063. buffer_info->buffer_length,
  1064. DMA_TO_DEVICE);
  1065. } else {
  1066. dma_unmap_single(&tx->adapter->pdev->dev,
  1067. buffer_info->dma_ptr,
  1068. buffer_info->buffer_length,
  1069. DMA_TO_DEVICE);
  1070. }
  1071. buffer_info->dma_ptr = 0;
  1072. buffer_info->buffer_length = 0;
  1073. }
  1074. if (!buffer_info->skb)
  1075. goto clear_active;
  1076. if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
  1077. dev_kfree_skb(buffer_info->skb);
  1078. goto clear_skb;
  1079. }
  1080. if (cleanup) {
  1081. lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
  1082. dev_kfree_skb(buffer_info->skb);
  1083. } else {
  1084. ignore_sync = (buffer_info->flags &
  1085. TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
  1086. lan743x_ptp_tx_timestamp_skb(tx->adapter,
  1087. buffer_info->skb, ignore_sync);
  1088. }
  1089. clear_skb:
  1090. buffer_info->skb = NULL;
  1091. clear_active:
  1092. buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
  1093. done:
  1094. memset(buffer_info, 0, sizeof(*buffer_info));
  1095. memset(descriptor, 0, sizeof(*descriptor));
  1096. }
  1097. static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
  1098. {
  1099. return ((++index) % tx->ring_size);
  1100. }
  1101. static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
  1102. {
  1103. while ((*tx->head_cpu_ptr) != (tx->last_head)) {
  1104. lan743x_tx_release_desc(tx, tx->last_head, false);
  1105. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1106. }
  1107. }
  1108. static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
  1109. {
  1110. u32 original_head = 0;
  1111. original_head = tx->last_head;
  1112. do {
  1113. lan743x_tx_release_desc(tx, tx->last_head, true);
  1114. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1115. } while (tx->last_head != original_head);
  1116. memset(tx->ring_cpu_ptr, 0,
  1117. sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
  1118. memset(tx->buffer_info, 0,
  1119. sizeof(*tx->buffer_info) * (tx->ring_size));
  1120. }
  1121. static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
  1122. struct sk_buff *skb)
  1123. {
  1124. int result = 1; /* 1 for the main skb buffer */
  1125. int nr_frags = 0;
  1126. if (skb_is_gso(skb))
  1127. result++; /* requires an extension descriptor */
  1128. nr_frags = skb_shinfo(skb)->nr_frags;
  1129. result += nr_frags; /* 1 for each fragment buffer */
  1130. return result;
  1131. }
  1132. static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
  1133. {
  1134. int last_head = tx->last_head;
  1135. int last_tail = tx->last_tail;
  1136. if (last_tail >= last_head)
  1137. return tx->ring_size - last_tail + last_head - 1;
  1138. else
  1139. return last_head - last_tail - 1;
  1140. }
  1141. void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
  1142. bool enable_timestamping,
  1143. bool enable_onestep_sync)
  1144. {
  1145. if (enable_timestamping)
  1146. tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
  1147. else
  1148. tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
  1149. if (enable_onestep_sync)
  1150. tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
  1151. else
  1152. tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
  1153. }
  1154. static int lan743x_tx_frame_start(struct lan743x_tx *tx,
  1155. unsigned char *first_buffer,
  1156. unsigned int first_buffer_length,
  1157. unsigned int frame_length,
  1158. bool time_stamp,
  1159. bool check_sum)
  1160. {
  1161. /* called only from within lan743x_tx_xmit_frame.
  1162. * assuming tx->ring_lock has already been acquired.
  1163. */
  1164. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1165. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1166. struct lan743x_adapter *adapter = tx->adapter;
  1167. struct device *dev = &adapter->pdev->dev;
  1168. dma_addr_t dma_ptr;
  1169. tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
  1170. tx->frame_first = tx->last_tail;
  1171. tx->frame_tail = tx->frame_first;
  1172. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1173. buffer_info = &tx->buffer_info[tx->frame_tail];
  1174. dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
  1175. DMA_TO_DEVICE);
  1176. if (dma_mapping_error(dev, dma_ptr))
  1177. return -ENOMEM;
  1178. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1179. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1180. tx_descriptor->data3 = (frame_length << 16) &
  1181. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1182. buffer_info->skb = NULL;
  1183. buffer_info->dma_ptr = dma_ptr;
  1184. buffer_info->buffer_length = first_buffer_length;
  1185. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1186. tx->frame_data0 = (first_buffer_length &
  1187. TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1188. TX_DESC_DATA0_DTYPE_DATA_ |
  1189. TX_DESC_DATA0_FS_ |
  1190. TX_DESC_DATA0_FCS_;
  1191. if (time_stamp)
  1192. tx->frame_data0 |= TX_DESC_DATA0_TSE_;
  1193. if (check_sum)
  1194. tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
  1195. TX_DESC_DATA0_IPE_ |
  1196. TX_DESC_DATA0_TPE_;
  1197. /* data0 will be programmed in one of other frame assembler functions */
  1198. return 0;
  1199. }
  1200. static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
  1201. unsigned int frame_length,
  1202. int nr_frags)
  1203. {
  1204. /* called only from within lan743x_tx_xmit_frame.
  1205. * assuming tx->ring_lock has already been acquired.
  1206. */
  1207. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1208. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1209. /* wrap up previous descriptor */
  1210. tx->frame_data0 |= TX_DESC_DATA0_EXT_;
  1211. if (nr_frags <= 0) {
  1212. tx->frame_data0 |= TX_DESC_DATA0_LS_;
  1213. tx->frame_data0 |= TX_DESC_DATA0_IOC_;
  1214. }
  1215. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1216. tx_descriptor->data0 = tx->frame_data0;
  1217. /* move to next descriptor */
  1218. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1219. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1220. buffer_info = &tx->buffer_info[tx->frame_tail];
  1221. /* add extension descriptor */
  1222. tx_descriptor->data1 = 0;
  1223. tx_descriptor->data2 = 0;
  1224. tx_descriptor->data3 = 0;
  1225. buffer_info->skb = NULL;
  1226. buffer_info->dma_ptr = 0;
  1227. buffer_info->buffer_length = 0;
  1228. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1229. tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
  1230. TX_DESC_DATA0_DTYPE_EXT_ |
  1231. TX_DESC_DATA0_EXT_LSO_;
  1232. /* data0 will be programmed in one of other frame assembler functions */
  1233. }
  1234. static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
  1235. const struct skb_frag_struct *fragment,
  1236. unsigned int frame_length)
  1237. {
  1238. /* called only from within lan743x_tx_xmit_frame
  1239. * assuming tx->ring_lock has already been acquired
  1240. */
  1241. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1242. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1243. struct lan743x_adapter *adapter = tx->adapter;
  1244. struct device *dev = &adapter->pdev->dev;
  1245. unsigned int fragment_length = 0;
  1246. dma_addr_t dma_ptr;
  1247. fragment_length = skb_frag_size(fragment);
  1248. if (!fragment_length)
  1249. return 0;
  1250. /* wrap up previous descriptor */
  1251. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1252. tx_descriptor->data0 = tx->frame_data0;
  1253. /* move to next descriptor */
  1254. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1255. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1256. buffer_info = &tx->buffer_info[tx->frame_tail];
  1257. dma_ptr = skb_frag_dma_map(dev, fragment,
  1258. 0, fragment_length,
  1259. DMA_TO_DEVICE);
  1260. if (dma_mapping_error(dev, dma_ptr)) {
  1261. int desc_index;
  1262. /* cleanup all previously setup descriptors */
  1263. desc_index = tx->frame_first;
  1264. while (desc_index != tx->frame_tail) {
  1265. lan743x_tx_release_desc(tx, desc_index, true);
  1266. desc_index = lan743x_tx_next_index(tx, desc_index);
  1267. }
  1268. dma_wmb();
  1269. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1270. tx->frame_first = 0;
  1271. tx->frame_data0 = 0;
  1272. tx->frame_tail = 0;
  1273. return -ENOMEM;
  1274. }
  1275. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1276. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1277. tx_descriptor->data3 = (frame_length << 16) &
  1278. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1279. buffer_info->skb = NULL;
  1280. buffer_info->dma_ptr = dma_ptr;
  1281. buffer_info->buffer_length = fragment_length;
  1282. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1283. buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
  1284. tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1285. TX_DESC_DATA0_DTYPE_DATA_ |
  1286. TX_DESC_DATA0_FCS_;
  1287. /* data0 will be programmed in one of other frame assembler functions */
  1288. return 0;
  1289. }
  1290. static void lan743x_tx_frame_end(struct lan743x_tx *tx,
  1291. struct sk_buff *skb,
  1292. bool time_stamp,
  1293. bool ignore_sync)
  1294. {
  1295. /* called only from within lan743x_tx_xmit_frame
  1296. * assuming tx->ring_lock has already been acquired
  1297. */
  1298. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1299. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1300. struct lan743x_adapter *adapter = tx->adapter;
  1301. u32 tx_tail_flags = 0;
  1302. /* wrap up previous descriptor */
  1303. if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
  1304. TX_DESC_DATA0_DTYPE_DATA_) {
  1305. tx->frame_data0 |= TX_DESC_DATA0_LS_;
  1306. tx->frame_data0 |= TX_DESC_DATA0_IOC_;
  1307. }
  1308. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1309. buffer_info = &tx->buffer_info[tx->frame_tail];
  1310. buffer_info->skb = skb;
  1311. if (time_stamp)
  1312. buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
  1313. if (ignore_sync)
  1314. buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
  1315. tx_descriptor->data0 = tx->frame_data0;
  1316. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1317. tx->last_tail = tx->frame_tail;
  1318. dma_wmb();
  1319. if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1320. tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
  1321. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
  1322. tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
  1323. TX_TAIL_SET_TOP_INT_EN_;
  1324. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1325. tx_tail_flags | tx->frame_tail);
  1326. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1327. }
  1328. static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
  1329. struct sk_buff *skb)
  1330. {
  1331. int required_number_of_descriptors = 0;
  1332. unsigned int start_frame_length = 0;
  1333. unsigned int frame_length = 0;
  1334. unsigned int head_length = 0;
  1335. unsigned long irq_flags = 0;
  1336. bool do_timestamp = false;
  1337. bool ignore_sync = false;
  1338. int nr_frags = 0;
  1339. bool gso = false;
  1340. int j;
  1341. required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
  1342. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1343. if (required_number_of_descriptors >
  1344. lan743x_tx_get_avail_desc(tx)) {
  1345. if (required_number_of_descriptors > (tx->ring_size - 1)) {
  1346. dev_kfree_skb(skb);
  1347. } else {
  1348. /* save to overflow buffer */
  1349. tx->overflow_skb = skb;
  1350. netif_stop_queue(tx->adapter->netdev);
  1351. }
  1352. goto unlock;
  1353. }
  1354. /* space available, transmit skb */
  1355. if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
  1356. (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
  1357. (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
  1358. skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
  1359. do_timestamp = true;
  1360. if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
  1361. ignore_sync = true;
  1362. }
  1363. head_length = skb_headlen(skb);
  1364. frame_length = skb_pagelen(skb);
  1365. nr_frags = skb_shinfo(skb)->nr_frags;
  1366. start_frame_length = frame_length;
  1367. gso = skb_is_gso(skb);
  1368. if (gso) {
  1369. start_frame_length = max(skb_shinfo(skb)->gso_size,
  1370. (unsigned short)8);
  1371. }
  1372. if (lan743x_tx_frame_start(tx,
  1373. skb->data, head_length,
  1374. start_frame_length,
  1375. do_timestamp,
  1376. skb->ip_summed == CHECKSUM_PARTIAL)) {
  1377. dev_kfree_skb(skb);
  1378. goto unlock;
  1379. }
  1380. if (gso)
  1381. lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
  1382. if (nr_frags <= 0)
  1383. goto finish;
  1384. for (j = 0; j < nr_frags; j++) {
  1385. const struct skb_frag_struct *frag;
  1386. frag = &(skb_shinfo(skb)->frags[j]);
  1387. if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
  1388. /* upon error no need to call
  1389. * lan743x_tx_frame_end
  1390. * frame assembler clean up was performed inside
  1391. * lan743x_tx_frame_add_fragment
  1392. */
  1393. dev_kfree_skb(skb);
  1394. goto unlock;
  1395. }
  1396. }
  1397. finish:
  1398. lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
  1399. unlock:
  1400. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1401. return NETDEV_TX_OK;
  1402. }
  1403. static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
  1404. {
  1405. struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
  1406. struct lan743x_adapter *adapter = tx->adapter;
  1407. bool start_transmitter = false;
  1408. unsigned long irq_flags = 0;
  1409. u32 ioc_bit = 0;
  1410. u32 int_sts = 0;
  1411. ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  1412. int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  1413. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
  1414. lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
  1415. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1416. /* clean up tx ring */
  1417. lan743x_tx_release_completed_descriptors(tx);
  1418. if (netif_queue_stopped(adapter->netdev)) {
  1419. if (tx->overflow_skb) {
  1420. if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
  1421. lan743x_tx_get_avail_desc(tx))
  1422. start_transmitter = true;
  1423. } else {
  1424. netif_wake_queue(adapter->netdev);
  1425. }
  1426. }
  1427. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1428. if (start_transmitter) {
  1429. /* space is now available, transmit overflow skb */
  1430. lan743x_tx_xmit_frame(tx, tx->overflow_skb);
  1431. tx->overflow_skb = NULL;
  1432. netif_wake_queue(adapter->netdev);
  1433. }
  1434. if (!napi_complete(napi))
  1435. goto done;
  1436. /* enable isr */
  1437. lan743x_csr_write(adapter, INT_EN_SET,
  1438. INT_BIT_DMA_TX_(tx->channel_number));
  1439. lan743x_csr_read(adapter, INT_STS);
  1440. done:
  1441. return 0;
  1442. }
  1443. static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
  1444. {
  1445. if (tx->head_cpu_ptr) {
  1446. pci_free_consistent(tx->adapter->pdev,
  1447. sizeof(*tx->head_cpu_ptr),
  1448. (void *)(tx->head_cpu_ptr),
  1449. tx->head_dma_ptr);
  1450. tx->head_cpu_ptr = NULL;
  1451. tx->head_dma_ptr = 0;
  1452. }
  1453. kfree(tx->buffer_info);
  1454. tx->buffer_info = NULL;
  1455. if (tx->ring_cpu_ptr) {
  1456. pci_free_consistent(tx->adapter->pdev,
  1457. tx->ring_allocation_size,
  1458. tx->ring_cpu_ptr,
  1459. tx->ring_dma_ptr);
  1460. tx->ring_allocation_size = 0;
  1461. tx->ring_cpu_ptr = NULL;
  1462. tx->ring_dma_ptr = 0;
  1463. }
  1464. tx->ring_size = 0;
  1465. }
  1466. static int lan743x_tx_ring_init(struct lan743x_tx *tx)
  1467. {
  1468. size_t ring_allocation_size = 0;
  1469. void *cpu_ptr = NULL;
  1470. dma_addr_t dma_ptr;
  1471. int ret = -ENOMEM;
  1472. tx->ring_size = LAN743X_TX_RING_SIZE;
  1473. if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
  1474. ret = -EINVAL;
  1475. goto cleanup;
  1476. }
  1477. ring_allocation_size = ALIGN(tx->ring_size *
  1478. sizeof(struct lan743x_tx_descriptor),
  1479. PAGE_SIZE);
  1480. dma_ptr = 0;
  1481. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1482. ring_allocation_size, &dma_ptr);
  1483. if (!cpu_ptr) {
  1484. ret = -ENOMEM;
  1485. goto cleanup;
  1486. }
  1487. tx->ring_allocation_size = ring_allocation_size;
  1488. tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
  1489. tx->ring_dma_ptr = dma_ptr;
  1490. cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
  1491. if (!cpu_ptr) {
  1492. ret = -ENOMEM;
  1493. goto cleanup;
  1494. }
  1495. tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
  1496. dma_ptr = 0;
  1497. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1498. sizeof(*tx->head_cpu_ptr), &dma_ptr);
  1499. if (!cpu_ptr) {
  1500. ret = -ENOMEM;
  1501. goto cleanup;
  1502. }
  1503. tx->head_cpu_ptr = cpu_ptr;
  1504. tx->head_dma_ptr = dma_ptr;
  1505. if (tx->head_dma_ptr & 0x3) {
  1506. ret = -ENOMEM;
  1507. goto cleanup;
  1508. }
  1509. return 0;
  1510. cleanup:
  1511. lan743x_tx_ring_cleanup(tx);
  1512. return ret;
  1513. }
  1514. static void lan743x_tx_close(struct lan743x_tx *tx)
  1515. {
  1516. struct lan743x_adapter *adapter = tx->adapter;
  1517. lan743x_csr_write(adapter,
  1518. DMAC_CMD,
  1519. DMAC_CMD_STOP_T_(tx->channel_number));
  1520. lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
  1521. lan743x_csr_write(adapter,
  1522. DMAC_INT_EN_CLR,
  1523. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1524. lan743x_csr_write(adapter, INT_EN_CLR,
  1525. INT_BIT_DMA_TX_(tx->channel_number));
  1526. napi_disable(&tx->napi);
  1527. netif_napi_del(&tx->napi);
  1528. lan743x_csr_write(adapter, FCT_TX_CTL,
  1529. FCT_TX_CTL_DIS_(tx->channel_number));
  1530. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1531. FCT_TX_CTL_EN_(tx->channel_number),
  1532. 0, 1000, 20000, 100);
  1533. lan743x_tx_release_all_descriptors(tx);
  1534. if (tx->overflow_skb) {
  1535. dev_kfree_skb(tx->overflow_skb);
  1536. tx->overflow_skb = NULL;
  1537. }
  1538. lan743x_tx_ring_cleanup(tx);
  1539. }
  1540. static int lan743x_tx_open(struct lan743x_tx *tx)
  1541. {
  1542. struct lan743x_adapter *adapter = NULL;
  1543. u32 data = 0;
  1544. int ret;
  1545. adapter = tx->adapter;
  1546. ret = lan743x_tx_ring_init(tx);
  1547. if (ret)
  1548. return ret;
  1549. /* initialize fifo */
  1550. lan743x_csr_write(adapter, FCT_TX_CTL,
  1551. FCT_TX_CTL_RESET_(tx->channel_number));
  1552. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1553. FCT_TX_CTL_RESET_(tx->channel_number),
  1554. 0, 1000, 20000, 100);
  1555. /* enable fifo */
  1556. lan743x_csr_write(adapter, FCT_TX_CTL,
  1557. FCT_TX_CTL_EN_(tx->channel_number));
  1558. /* reset tx channel */
  1559. lan743x_csr_write(adapter, DMAC_CMD,
  1560. DMAC_CMD_TX_SWR_(tx->channel_number));
  1561. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  1562. DMAC_CMD_TX_SWR_(tx->channel_number),
  1563. 0, 1000, 20000, 100);
  1564. /* Write TX_BASE_ADDR */
  1565. lan743x_csr_write(adapter,
  1566. TX_BASE_ADDRH(tx->channel_number),
  1567. DMA_ADDR_HIGH32(tx->ring_dma_ptr));
  1568. lan743x_csr_write(adapter,
  1569. TX_BASE_ADDRL(tx->channel_number),
  1570. DMA_ADDR_LOW32(tx->ring_dma_ptr));
  1571. /* Write TX_CFG_B */
  1572. data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
  1573. data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
  1574. data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
  1575. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  1576. data |= TX_CFG_B_TDMABL_512_;
  1577. lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
  1578. /* Write TX_CFG_A */
  1579. data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
  1580. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  1581. data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
  1582. data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
  1583. data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
  1584. data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
  1585. }
  1586. lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
  1587. /* Write TX_HEAD_WRITEBACK_ADDR */
  1588. lan743x_csr_write(adapter,
  1589. TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
  1590. DMA_ADDR_HIGH32(tx->head_dma_ptr));
  1591. lan743x_csr_write(adapter,
  1592. TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
  1593. DMA_ADDR_LOW32(tx->head_dma_ptr));
  1594. /* set last head */
  1595. tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
  1596. /* write TX_TAIL */
  1597. tx->last_tail = 0;
  1598. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1599. (u32)(tx->last_tail));
  1600. tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  1601. INT_BIT_DMA_TX_
  1602. (tx->channel_number));
  1603. netif_tx_napi_add(adapter->netdev,
  1604. &tx->napi, lan743x_tx_napi_poll,
  1605. tx->ring_size - 1);
  1606. napi_enable(&tx->napi);
  1607. data = 0;
  1608. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  1609. data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
  1610. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  1611. data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
  1612. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  1613. data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
  1614. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  1615. data |= TX_CFG_C_TX_INT_EN_R2C_;
  1616. lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
  1617. if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
  1618. lan743x_csr_write(adapter, INT_EN_SET,
  1619. INT_BIT_DMA_TX_(tx->channel_number));
  1620. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  1621. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1622. /* start dmac channel */
  1623. lan743x_csr_write(adapter, DMAC_CMD,
  1624. DMAC_CMD_START_T_(tx->channel_number));
  1625. return 0;
  1626. }
  1627. static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
  1628. {
  1629. return ((++index) % rx->ring_size);
  1630. }
  1631. static struct sk_buff *lan743x_rx_allocate_skb(struct lan743x_rx *rx)
  1632. {
  1633. int length = 0;
  1634. length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
  1635. return __netdev_alloc_skb(rx->adapter->netdev,
  1636. length, GFP_ATOMIC | GFP_DMA);
  1637. }
  1638. static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
  1639. struct sk_buff *skb)
  1640. {
  1641. struct lan743x_rx_buffer_info *buffer_info;
  1642. struct lan743x_rx_descriptor *descriptor;
  1643. int length = 0;
  1644. length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
  1645. descriptor = &rx->ring_cpu_ptr[index];
  1646. buffer_info = &rx->buffer_info[index];
  1647. buffer_info->skb = skb;
  1648. if (!(buffer_info->skb))
  1649. return -ENOMEM;
  1650. buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev,
  1651. buffer_info->skb->data,
  1652. length,
  1653. DMA_FROM_DEVICE);
  1654. if (dma_mapping_error(&rx->adapter->pdev->dev,
  1655. buffer_info->dma_ptr)) {
  1656. buffer_info->dma_ptr = 0;
  1657. return -ENOMEM;
  1658. }
  1659. buffer_info->buffer_length = length;
  1660. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1661. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1662. descriptor->data3 = 0;
  1663. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1664. (length & RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1665. skb_reserve(buffer_info->skb, RX_HEAD_PADDING);
  1666. return 0;
  1667. }
  1668. static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
  1669. {
  1670. struct lan743x_rx_buffer_info *buffer_info;
  1671. struct lan743x_rx_descriptor *descriptor;
  1672. descriptor = &rx->ring_cpu_ptr[index];
  1673. buffer_info = &rx->buffer_info[index];
  1674. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1675. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1676. descriptor->data3 = 0;
  1677. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1678. ((buffer_info->buffer_length) &
  1679. RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1680. }
  1681. static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
  1682. {
  1683. struct lan743x_rx_buffer_info *buffer_info;
  1684. struct lan743x_rx_descriptor *descriptor;
  1685. descriptor = &rx->ring_cpu_ptr[index];
  1686. buffer_info = &rx->buffer_info[index];
  1687. memset(descriptor, 0, sizeof(*descriptor));
  1688. if (buffer_info->dma_ptr) {
  1689. dma_unmap_single(&rx->adapter->pdev->dev,
  1690. buffer_info->dma_ptr,
  1691. buffer_info->buffer_length,
  1692. DMA_FROM_DEVICE);
  1693. buffer_info->dma_ptr = 0;
  1694. }
  1695. if (buffer_info->skb) {
  1696. dev_kfree_skb(buffer_info->skb);
  1697. buffer_info->skb = NULL;
  1698. }
  1699. memset(buffer_info, 0, sizeof(*buffer_info));
  1700. }
  1701. static int lan743x_rx_process_packet(struct lan743x_rx *rx)
  1702. {
  1703. struct skb_shared_hwtstamps *hwtstamps = NULL;
  1704. int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
  1705. struct lan743x_rx_buffer_info *buffer_info;
  1706. struct lan743x_rx_descriptor *descriptor;
  1707. int current_head_index = -1;
  1708. int extension_index = -1;
  1709. int first_index = -1;
  1710. int last_index = -1;
  1711. current_head_index = *rx->head_cpu_ptr;
  1712. if (current_head_index < 0 || current_head_index >= rx->ring_size)
  1713. goto done;
  1714. if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
  1715. goto done;
  1716. if (rx->last_head != current_head_index) {
  1717. descriptor = &rx->ring_cpu_ptr[rx->last_head];
  1718. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1719. goto done;
  1720. if (!(descriptor->data0 & RX_DESC_DATA0_FS_))
  1721. goto done;
  1722. first_index = rx->last_head;
  1723. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1724. last_index = rx->last_head;
  1725. } else {
  1726. int index;
  1727. index = lan743x_rx_next_index(rx, first_index);
  1728. while (index != current_head_index) {
  1729. descriptor = &rx->ring_cpu_ptr[index];
  1730. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1731. goto done;
  1732. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1733. last_index = index;
  1734. break;
  1735. }
  1736. index = lan743x_rx_next_index(rx, index);
  1737. }
  1738. }
  1739. if (last_index >= 0) {
  1740. descriptor = &rx->ring_cpu_ptr[last_index];
  1741. if (descriptor->data0 & RX_DESC_DATA0_EXT_) {
  1742. /* extension is expected to follow */
  1743. int index = lan743x_rx_next_index(rx,
  1744. last_index);
  1745. if (index != current_head_index) {
  1746. descriptor = &rx->ring_cpu_ptr[index];
  1747. if (descriptor->data0 &
  1748. RX_DESC_DATA0_OWN_) {
  1749. goto done;
  1750. }
  1751. if (descriptor->data0 &
  1752. RX_DESC_DATA0_EXT_) {
  1753. extension_index = index;
  1754. } else {
  1755. goto done;
  1756. }
  1757. } else {
  1758. /* extension is not yet available */
  1759. /* prevent processing of this packet */
  1760. first_index = -1;
  1761. last_index = -1;
  1762. }
  1763. }
  1764. }
  1765. }
  1766. if (first_index >= 0 && last_index >= 0) {
  1767. int real_last_index = last_index;
  1768. struct sk_buff *skb = NULL;
  1769. u32 ts_sec = 0;
  1770. u32 ts_nsec = 0;
  1771. /* packet is available */
  1772. if (first_index == last_index) {
  1773. /* single buffer packet */
  1774. struct sk_buff *new_skb = NULL;
  1775. int packet_length;
  1776. new_skb = lan743x_rx_allocate_skb(rx);
  1777. if (!new_skb) {
  1778. /* failed to allocate next skb.
  1779. * Memory is very low.
  1780. * Drop this packet and reuse buffer.
  1781. */
  1782. lan743x_rx_reuse_ring_element(rx, first_index);
  1783. goto process_extension;
  1784. }
  1785. buffer_info = &rx->buffer_info[first_index];
  1786. skb = buffer_info->skb;
  1787. descriptor = &rx->ring_cpu_ptr[first_index];
  1788. /* unmap from dma */
  1789. if (buffer_info->dma_ptr) {
  1790. dma_unmap_single(&rx->adapter->pdev->dev,
  1791. buffer_info->dma_ptr,
  1792. buffer_info->buffer_length,
  1793. DMA_FROM_DEVICE);
  1794. buffer_info->dma_ptr = 0;
  1795. buffer_info->buffer_length = 0;
  1796. }
  1797. buffer_info->skb = NULL;
  1798. packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_
  1799. (descriptor->data0);
  1800. skb_put(skb, packet_length - 4);
  1801. skb->protocol = eth_type_trans(skb,
  1802. rx->adapter->netdev);
  1803. lan743x_rx_init_ring_element(rx, first_index, new_skb);
  1804. } else {
  1805. int index = first_index;
  1806. /* multi buffer packet not supported */
  1807. /* this should not happen since
  1808. * buffers are allocated to be at least jumbo size
  1809. */
  1810. /* clean up buffers */
  1811. if (first_index <= last_index) {
  1812. while ((index >= first_index) &&
  1813. (index <= last_index)) {
  1814. lan743x_rx_reuse_ring_element(rx,
  1815. index);
  1816. index = lan743x_rx_next_index(rx,
  1817. index);
  1818. }
  1819. } else {
  1820. while ((index >= first_index) ||
  1821. (index <= last_index)) {
  1822. lan743x_rx_reuse_ring_element(rx,
  1823. index);
  1824. index = lan743x_rx_next_index(rx,
  1825. index);
  1826. }
  1827. }
  1828. }
  1829. process_extension:
  1830. if (extension_index >= 0) {
  1831. descriptor = &rx->ring_cpu_ptr[extension_index];
  1832. buffer_info = &rx->buffer_info[extension_index];
  1833. ts_sec = descriptor->data1;
  1834. ts_nsec = (descriptor->data2 &
  1835. RX_DESC_DATA2_TS_NS_MASK_);
  1836. lan743x_rx_reuse_ring_element(rx, extension_index);
  1837. real_last_index = extension_index;
  1838. }
  1839. if (!skb) {
  1840. result = RX_PROCESS_RESULT_PACKET_DROPPED;
  1841. goto move_forward;
  1842. }
  1843. if (extension_index < 0)
  1844. goto pass_packet_to_os;
  1845. hwtstamps = skb_hwtstamps(skb);
  1846. if (hwtstamps)
  1847. hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec);
  1848. pass_packet_to_os:
  1849. /* pass packet to OS */
  1850. napi_gro_receive(&rx->napi, skb);
  1851. result = RX_PROCESS_RESULT_PACKET_RECEIVED;
  1852. move_forward:
  1853. /* push tail and head forward */
  1854. rx->last_tail = real_last_index;
  1855. rx->last_head = lan743x_rx_next_index(rx, real_last_index);
  1856. }
  1857. done:
  1858. return result;
  1859. }
  1860. static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
  1861. {
  1862. struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
  1863. struct lan743x_adapter *adapter = rx->adapter;
  1864. u32 rx_tail_flags = 0;
  1865. int count;
  1866. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
  1867. /* clear int status bit before reading packet */
  1868. lan743x_csr_write(adapter, DMAC_INT_STS,
  1869. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  1870. }
  1871. count = 0;
  1872. while (count < weight) {
  1873. int rx_process_result = -1;
  1874. rx_process_result = lan743x_rx_process_packet(rx);
  1875. if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) {
  1876. count++;
  1877. } else if (rx_process_result ==
  1878. RX_PROCESS_RESULT_NOTHING_TO_DO) {
  1879. break;
  1880. } else if (rx_process_result ==
  1881. RX_PROCESS_RESULT_PACKET_DROPPED) {
  1882. continue;
  1883. }
  1884. }
  1885. rx->frame_count += count;
  1886. if (count == weight)
  1887. goto done;
  1888. if (!napi_complete_done(napi, count))
  1889. goto done;
  1890. if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1891. rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
  1892. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
  1893. rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
  1894. } else {
  1895. lan743x_csr_write(adapter, INT_EN_SET,
  1896. INT_BIT_DMA_RX_(rx->channel_number));
  1897. }
  1898. /* update RX_TAIL */
  1899. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  1900. rx_tail_flags | rx->last_tail);
  1901. done:
  1902. return count;
  1903. }
  1904. static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
  1905. {
  1906. if (rx->buffer_info && rx->ring_cpu_ptr) {
  1907. int index;
  1908. for (index = 0; index < rx->ring_size; index++)
  1909. lan743x_rx_release_ring_element(rx, index);
  1910. }
  1911. if (rx->head_cpu_ptr) {
  1912. pci_free_consistent(rx->adapter->pdev,
  1913. sizeof(*rx->head_cpu_ptr),
  1914. rx->head_cpu_ptr,
  1915. rx->head_dma_ptr);
  1916. rx->head_cpu_ptr = NULL;
  1917. rx->head_dma_ptr = 0;
  1918. }
  1919. kfree(rx->buffer_info);
  1920. rx->buffer_info = NULL;
  1921. if (rx->ring_cpu_ptr) {
  1922. pci_free_consistent(rx->adapter->pdev,
  1923. rx->ring_allocation_size,
  1924. rx->ring_cpu_ptr,
  1925. rx->ring_dma_ptr);
  1926. rx->ring_allocation_size = 0;
  1927. rx->ring_cpu_ptr = NULL;
  1928. rx->ring_dma_ptr = 0;
  1929. }
  1930. rx->ring_size = 0;
  1931. rx->last_head = 0;
  1932. }
  1933. static int lan743x_rx_ring_init(struct lan743x_rx *rx)
  1934. {
  1935. size_t ring_allocation_size = 0;
  1936. dma_addr_t dma_ptr = 0;
  1937. void *cpu_ptr = NULL;
  1938. int ret = -ENOMEM;
  1939. int index = 0;
  1940. rx->ring_size = LAN743X_RX_RING_SIZE;
  1941. if (rx->ring_size <= 1) {
  1942. ret = -EINVAL;
  1943. goto cleanup;
  1944. }
  1945. if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
  1946. ret = -EINVAL;
  1947. goto cleanup;
  1948. }
  1949. ring_allocation_size = ALIGN(rx->ring_size *
  1950. sizeof(struct lan743x_rx_descriptor),
  1951. PAGE_SIZE);
  1952. dma_ptr = 0;
  1953. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1954. ring_allocation_size, &dma_ptr);
  1955. if (!cpu_ptr) {
  1956. ret = -ENOMEM;
  1957. goto cleanup;
  1958. }
  1959. rx->ring_allocation_size = ring_allocation_size;
  1960. rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
  1961. rx->ring_dma_ptr = dma_ptr;
  1962. cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
  1963. GFP_KERNEL);
  1964. if (!cpu_ptr) {
  1965. ret = -ENOMEM;
  1966. goto cleanup;
  1967. }
  1968. rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
  1969. dma_ptr = 0;
  1970. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1971. sizeof(*rx->head_cpu_ptr), &dma_ptr);
  1972. if (!cpu_ptr) {
  1973. ret = -ENOMEM;
  1974. goto cleanup;
  1975. }
  1976. rx->head_cpu_ptr = cpu_ptr;
  1977. rx->head_dma_ptr = dma_ptr;
  1978. if (rx->head_dma_ptr & 0x3) {
  1979. ret = -ENOMEM;
  1980. goto cleanup;
  1981. }
  1982. rx->last_head = 0;
  1983. for (index = 0; index < rx->ring_size; index++) {
  1984. struct sk_buff *new_skb = lan743x_rx_allocate_skb(rx);
  1985. ret = lan743x_rx_init_ring_element(rx, index, new_skb);
  1986. if (ret)
  1987. goto cleanup;
  1988. }
  1989. return 0;
  1990. cleanup:
  1991. lan743x_rx_ring_cleanup(rx);
  1992. return ret;
  1993. }
  1994. static void lan743x_rx_close(struct lan743x_rx *rx)
  1995. {
  1996. struct lan743x_adapter *adapter = rx->adapter;
  1997. lan743x_csr_write(adapter, FCT_RX_CTL,
  1998. FCT_RX_CTL_DIS_(rx->channel_number));
  1999. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  2000. FCT_RX_CTL_EN_(rx->channel_number),
  2001. 0, 1000, 20000, 100);
  2002. lan743x_csr_write(adapter, DMAC_CMD,
  2003. DMAC_CMD_STOP_R_(rx->channel_number));
  2004. lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
  2005. lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
  2006. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2007. lan743x_csr_write(adapter, INT_EN_CLR,
  2008. INT_BIT_DMA_RX_(rx->channel_number));
  2009. napi_disable(&rx->napi);
  2010. netif_napi_del(&rx->napi);
  2011. lan743x_rx_ring_cleanup(rx);
  2012. }
  2013. static int lan743x_rx_open(struct lan743x_rx *rx)
  2014. {
  2015. struct lan743x_adapter *adapter = rx->adapter;
  2016. u32 data = 0;
  2017. int ret;
  2018. rx->frame_count = 0;
  2019. ret = lan743x_rx_ring_init(rx);
  2020. if (ret)
  2021. goto return_error;
  2022. netif_napi_add(adapter->netdev,
  2023. &rx->napi, lan743x_rx_napi_poll,
  2024. rx->ring_size - 1);
  2025. lan743x_csr_write(adapter, DMAC_CMD,
  2026. DMAC_CMD_RX_SWR_(rx->channel_number));
  2027. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  2028. DMAC_CMD_RX_SWR_(rx->channel_number),
  2029. 0, 1000, 20000, 100);
  2030. /* set ring base address */
  2031. lan743x_csr_write(adapter,
  2032. RX_BASE_ADDRH(rx->channel_number),
  2033. DMA_ADDR_HIGH32(rx->ring_dma_ptr));
  2034. lan743x_csr_write(adapter,
  2035. RX_BASE_ADDRL(rx->channel_number),
  2036. DMA_ADDR_LOW32(rx->ring_dma_ptr));
  2037. /* set rx write back address */
  2038. lan743x_csr_write(adapter,
  2039. RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
  2040. DMA_ADDR_HIGH32(rx->head_dma_ptr));
  2041. lan743x_csr_write(adapter,
  2042. RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
  2043. DMA_ADDR_LOW32(rx->head_dma_ptr));
  2044. data = RX_CFG_A_RX_HP_WB_EN_;
  2045. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  2046. data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
  2047. RX_CFG_A_RX_WB_THRES_SET_(0x7) |
  2048. RX_CFG_A_RX_PF_THRES_SET_(16) |
  2049. RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
  2050. }
  2051. /* set RX_CFG_A */
  2052. lan743x_csr_write(adapter,
  2053. RX_CFG_A(rx->channel_number), data);
  2054. /* set RX_CFG_B */
  2055. data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
  2056. data &= ~RX_CFG_B_RX_PAD_MASK_;
  2057. if (!RX_HEAD_PADDING)
  2058. data |= RX_CFG_B_RX_PAD_0_;
  2059. else
  2060. data |= RX_CFG_B_RX_PAD_2_;
  2061. data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
  2062. data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
  2063. data |= RX_CFG_B_TS_ALL_RX_;
  2064. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  2065. data |= RX_CFG_B_RDMABL_512_;
  2066. lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
  2067. rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  2068. INT_BIT_DMA_RX_
  2069. (rx->channel_number));
  2070. /* set RX_CFG_C */
  2071. data = 0;
  2072. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  2073. data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
  2074. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  2075. data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
  2076. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  2077. data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
  2078. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  2079. data |= RX_CFG_C_RX_INT_EN_R2C_;
  2080. lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
  2081. rx->last_tail = ((u32)(rx->ring_size - 1));
  2082. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  2083. rx->last_tail);
  2084. rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
  2085. if (rx->last_head) {
  2086. ret = -EIO;
  2087. goto napi_delete;
  2088. }
  2089. napi_enable(&rx->napi);
  2090. lan743x_csr_write(adapter, INT_EN_SET,
  2091. INT_BIT_DMA_RX_(rx->channel_number));
  2092. lan743x_csr_write(adapter, DMAC_INT_STS,
  2093. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2094. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  2095. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2096. lan743x_csr_write(adapter, DMAC_CMD,
  2097. DMAC_CMD_START_R_(rx->channel_number));
  2098. /* initialize fifo */
  2099. lan743x_csr_write(adapter, FCT_RX_CTL,
  2100. FCT_RX_CTL_RESET_(rx->channel_number));
  2101. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  2102. FCT_RX_CTL_RESET_(rx->channel_number),
  2103. 0, 1000, 20000, 100);
  2104. lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
  2105. FCT_FLOW_CTL_REQ_EN_ |
  2106. FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
  2107. FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
  2108. /* enable fifo */
  2109. lan743x_csr_write(adapter, FCT_RX_CTL,
  2110. FCT_RX_CTL_EN_(rx->channel_number));
  2111. return 0;
  2112. napi_delete:
  2113. netif_napi_del(&rx->napi);
  2114. lan743x_rx_ring_cleanup(rx);
  2115. return_error:
  2116. return ret;
  2117. }
  2118. static int lan743x_netdev_close(struct net_device *netdev)
  2119. {
  2120. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2121. int index;
  2122. lan743x_tx_close(&adapter->tx[0]);
  2123. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
  2124. lan743x_rx_close(&adapter->rx[index]);
  2125. lan743x_ptp_close(adapter);
  2126. lan743x_phy_close(adapter);
  2127. lan743x_mac_close(adapter);
  2128. lan743x_intr_close(adapter);
  2129. return 0;
  2130. }
  2131. static int lan743x_netdev_open(struct net_device *netdev)
  2132. {
  2133. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2134. int index;
  2135. int ret;
  2136. ret = lan743x_intr_open(adapter);
  2137. if (ret)
  2138. goto return_error;
  2139. ret = lan743x_mac_open(adapter);
  2140. if (ret)
  2141. goto close_intr;
  2142. ret = lan743x_phy_open(adapter);
  2143. if (ret)
  2144. goto close_mac;
  2145. ret = lan743x_ptp_open(adapter);
  2146. if (ret)
  2147. goto close_phy;
  2148. lan743x_rfe_open(adapter);
  2149. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2150. ret = lan743x_rx_open(&adapter->rx[index]);
  2151. if (ret)
  2152. goto close_rx;
  2153. }
  2154. ret = lan743x_tx_open(&adapter->tx[0]);
  2155. if (ret)
  2156. goto close_rx;
  2157. return 0;
  2158. close_rx:
  2159. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2160. if (adapter->rx[index].ring_cpu_ptr)
  2161. lan743x_rx_close(&adapter->rx[index]);
  2162. }
  2163. lan743x_ptp_close(adapter);
  2164. close_phy:
  2165. lan743x_phy_close(adapter);
  2166. close_mac:
  2167. lan743x_mac_close(adapter);
  2168. close_intr:
  2169. lan743x_intr_close(adapter);
  2170. return_error:
  2171. netif_warn(adapter, ifup, adapter->netdev,
  2172. "Error opening LAN743x\n");
  2173. return ret;
  2174. }
  2175. static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
  2176. struct net_device *netdev)
  2177. {
  2178. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2179. return lan743x_tx_xmit_frame(&adapter->tx[0], skb);
  2180. }
  2181. static int lan743x_netdev_ioctl(struct net_device *netdev,
  2182. struct ifreq *ifr, int cmd)
  2183. {
  2184. if (!netif_running(netdev))
  2185. return -EINVAL;
  2186. if (cmd == SIOCSHWTSTAMP)
  2187. return lan743x_ptp_ioctl(netdev, ifr, cmd);
  2188. return phy_mii_ioctl(netdev->phydev, ifr, cmd);
  2189. }
  2190. static void lan743x_netdev_set_multicast(struct net_device *netdev)
  2191. {
  2192. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2193. lan743x_rfe_set_multicast(adapter);
  2194. }
  2195. static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
  2196. {
  2197. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2198. int ret = 0;
  2199. ret = lan743x_mac_set_mtu(adapter, new_mtu);
  2200. if (!ret)
  2201. netdev->mtu = new_mtu;
  2202. return ret;
  2203. }
  2204. static void lan743x_netdev_get_stats64(struct net_device *netdev,
  2205. struct rtnl_link_stats64 *stats)
  2206. {
  2207. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2208. stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
  2209. stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
  2210. stats->rx_bytes = lan743x_csr_read(adapter,
  2211. STAT_RX_UNICAST_BYTE_COUNT) +
  2212. lan743x_csr_read(adapter,
  2213. STAT_RX_BROADCAST_BYTE_COUNT) +
  2214. lan743x_csr_read(adapter,
  2215. STAT_RX_MULTICAST_BYTE_COUNT);
  2216. stats->tx_bytes = lan743x_csr_read(adapter,
  2217. STAT_TX_UNICAST_BYTE_COUNT) +
  2218. lan743x_csr_read(adapter,
  2219. STAT_TX_BROADCAST_BYTE_COUNT) +
  2220. lan743x_csr_read(adapter,
  2221. STAT_TX_MULTICAST_BYTE_COUNT);
  2222. stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
  2223. lan743x_csr_read(adapter,
  2224. STAT_RX_ALIGNMENT_ERRORS) +
  2225. lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
  2226. lan743x_csr_read(adapter,
  2227. STAT_RX_UNDERSIZE_FRAME_ERRORS) +
  2228. lan743x_csr_read(adapter,
  2229. STAT_RX_OVERSIZE_FRAME_ERRORS);
  2230. stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
  2231. lan743x_csr_read(adapter,
  2232. STAT_TX_EXCESS_DEFERRAL_ERRORS) +
  2233. lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
  2234. stats->rx_dropped = lan743x_csr_read(adapter,
  2235. STAT_RX_DROPPED_FRAMES);
  2236. stats->tx_dropped = lan743x_csr_read(adapter,
  2237. STAT_TX_EXCESSIVE_COLLISION);
  2238. stats->multicast = lan743x_csr_read(adapter,
  2239. STAT_RX_MULTICAST_FRAMES) +
  2240. lan743x_csr_read(adapter,
  2241. STAT_TX_MULTICAST_FRAMES);
  2242. stats->collisions = lan743x_csr_read(adapter,
  2243. STAT_TX_SINGLE_COLLISIONS) +
  2244. lan743x_csr_read(adapter,
  2245. STAT_TX_MULTIPLE_COLLISIONS) +
  2246. lan743x_csr_read(adapter,
  2247. STAT_TX_LATE_COLLISIONS);
  2248. }
  2249. static int lan743x_netdev_set_mac_address(struct net_device *netdev,
  2250. void *addr)
  2251. {
  2252. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2253. struct sockaddr *sock_addr = addr;
  2254. int ret;
  2255. ret = eth_prepare_mac_addr_change(netdev, sock_addr);
  2256. if (ret)
  2257. return ret;
  2258. ether_addr_copy(netdev->dev_addr, sock_addr->sa_data);
  2259. lan743x_mac_set_address(adapter, sock_addr->sa_data);
  2260. lan743x_rfe_update_mac_address(adapter);
  2261. return 0;
  2262. }
  2263. static const struct net_device_ops lan743x_netdev_ops = {
  2264. .ndo_open = lan743x_netdev_open,
  2265. .ndo_stop = lan743x_netdev_close,
  2266. .ndo_start_xmit = lan743x_netdev_xmit_frame,
  2267. .ndo_do_ioctl = lan743x_netdev_ioctl,
  2268. .ndo_set_rx_mode = lan743x_netdev_set_multicast,
  2269. .ndo_change_mtu = lan743x_netdev_change_mtu,
  2270. .ndo_get_stats64 = lan743x_netdev_get_stats64,
  2271. .ndo_set_mac_address = lan743x_netdev_set_mac_address,
  2272. };
  2273. static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
  2274. {
  2275. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2276. }
  2277. static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
  2278. {
  2279. mdiobus_unregister(adapter->mdiobus);
  2280. }
  2281. static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
  2282. {
  2283. unregister_netdev(adapter->netdev);
  2284. lan743x_mdiobus_cleanup(adapter);
  2285. lan743x_hardware_cleanup(adapter);
  2286. lan743x_pci_cleanup(adapter);
  2287. }
  2288. static int lan743x_hardware_init(struct lan743x_adapter *adapter,
  2289. struct pci_dev *pdev)
  2290. {
  2291. struct lan743x_tx *tx;
  2292. int index;
  2293. int ret;
  2294. adapter->intr.irq = adapter->pdev->irq;
  2295. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2296. mutex_init(&adapter->dp_lock);
  2297. ret = lan743x_gpio_init(adapter);
  2298. if (ret)
  2299. return ret;
  2300. ret = lan743x_mac_init(adapter);
  2301. if (ret)
  2302. return ret;
  2303. ret = lan743x_phy_init(adapter);
  2304. if (ret)
  2305. return ret;
  2306. ret = lan743x_ptp_init(adapter);
  2307. if (ret)
  2308. return ret;
  2309. lan743x_rfe_update_mac_address(adapter);
  2310. ret = lan743x_dmac_init(adapter);
  2311. if (ret)
  2312. return ret;
  2313. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2314. adapter->rx[index].adapter = adapter;
  2315. adapter->rx[index].channel_number = index;
  2316. }
  2317. tx = &adapter->tx[0];
  2318. tx->adapter = adapter;
  2319. tx->channel_number = 0;
  2320. spin_lock_init(&tx->ring_lock);
  2321. return 0;
  2322. }
  2323. static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
  2324. {
  2325. int ret;
  2326. adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
  2327. if (!(adapter->mdiobus)) {
  2328. ret = -ENOMEM;
  2329. goto return_error;
  2330. }
  2331. adapter->mdiobus->priv = (void *)adapter;
  2332. adapter->mdiobus->read = lan743x_mdiobus_read;
  2333. adapter->mdiobus->write = lan743x_mdiobus_write;
  2334. adapter->mdiobus->name = "lan743x-mdiobus";
  2335. snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
  2336. "pci-%s", pci_name(adapter->pdev));
  2337. if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
  2338. /* LAN7430 uses internal phy at address 1 */
  2339. adapter->mdiobus->phy_mask = ~(u32)BIT(1);
  2340. /* register mdiobus */
  2341. ret = mdiobus_register(adapter->mdiobus);
  2342. if (ret < 0)
  2343. goto return_error;
  2344. return 0;
  2345. return_error:
  2346. return ret;
  2347. }
  2348. /* lan743x_pcidev_probe - Device Initialization Routine
  2349. * @pdev: PCI device information struct
  2350. * @id: entry in lan743x_pci_tbl
  2351. *
  2352. * Returns 0 on success, negative on failure
  2353. *
  2354. * initializes an adapter identified by a pci_dev structure.
  2355. * The OS initialization, configuring of the adapter private structure,
  2356. * and a hardware reset occur.
  2357. **/
  2358. static int lan743x_pcidev_probe(struct pci_dev *pdev,
  2359. const struct pci_device_id *id)
  2360. {
  2361. struct lan743x_adapter *adapter = NULL;
  2362. struct net_device *netdev = NULL;
  2363. int ret = -ENODEV;
  2364. netdev = devm_alloc_etherdev(&pdev->dev,
  2365. sizeof(struct lan743x_adapter));
  2366. if (!netdev)
  2367. goto return_error;
  2368. SET_NETDEV_DEV(netdev, &pdev->dev);
  2369. pci_set_drvdata(pdev, netdev);
  2370. adapter = netdev_priv(netdev);
  2371. adapter->netdev = netdev;
  2372. adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  2373. NETIF_MSG_LINK | NETIF_MSG_IFUP |
  2374. NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
  2375. netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
  2376. ret = lan743x_pci_init(adapter, pdev);
  2377. if (ret)
  2378. goto return_error;
  2379. ret = lan743x_csr_init(adapter);
  2380. if (ret)
  2381. goto cleanup_pci;
  2382. ret = lan743x_hardware_init(adapter, pdev);
  2383. if (ret)
  2384. goto cleanup_pci;
  2385. ret = lan743x_mdiobus_init(adapter);
  2386. if (ret)
  2387. goto cleanup_hardware;
  2388. adapter->netdev->netdev_ops = &lan743x_netdev_ops;
  2389. adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
  2390. adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  2391. adapter->netdev->hw_features = adapter->netdev->features;
  2392. /* carrier off reporting is important to ethtool even BEFORE open */
  2393. netif_carrier_off(netdev);
  2394. ret = register_netdev(adapter->netdev);
  2395. if (ret < 0)
  2396. goto cleanup_mdiobus;
  2397. return 0;
  2398. cleanup_mdiobus:
  2399. lan743x_mdiobus_cleanup(adapter);
  2400. cleanup_hardware:
  2401. lan743x_hardware_cleanup(adapter);
  2402. cleanup_pci:
  2403. lan743x_pci_cleanup(adapter);
  2404. return_error:
  2405. pr_warn("Initialization failed\n");
  2406. return ret;
  2407. }
  2408. /**
  2409. * lan743x_pcidev_remove - Device Removal Routine
  2410. * @pdev: PCI device information struct
  2411. *
  2412. * this is called by the PCI subsystem to alert the driver
  2413. * that it should release a PCI device. This could be caused by a
  2414. * Hot-Plug event, or because the driver is going to be removed from
  2415. * memory.
  2416. **/
  2417. static void lan743x_pcidev_remove(struct pci_dev *pdev)
  2418. {
  2419. struct net_device *netdev = pci_get_drvdata(pdev);
  2420. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2421. lan743x_full_cleanup(adapter);
  2422. }
  2423. static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
  2424. {
  2425. struct net_device *netdev = pci_get_drvdata(pdev);
  2426. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2427. rtnl_lock();
  2428. netif_device_detach(netdev);
  2429. /* close netdev when netdev is at running state.
  2430. * For instance, it is true when system goes to sleep by pm-suspend
  2431. * However, it is false when system goes to sleep by suspend GUI menu
  2432. */
  2433. if (netif_running(netdev))
  2434. lan743x_netdev_close(netdev);
  2435. rtnl_unlock();
  2436. #ifdef CONFIG_PM
  2437. pci_save_state(pdev);
  2438. #endif
  2439. /* clean up lan743x portion */
  2440. lan743x_hardware_cleanup(adapter);
  2441. }
  2442. #ifdef CONFIG_PM_SLEEP
  2443. static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
  2444. {
  2445. return bitrev16(crc16(0xFFFF, buf, len));
  2446. }
  2447. static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
  2448. {
  2449. const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
  2450. const u8 ipv6_multicast[3] = { 0x33, 0x33 };
  2451. const u8 arp_type[2] = { 0x08, 0x06 };
  2452. int mask_index;
  2453. u32 pmtctl;
  2454. u32 wucsr;
  2455. u32 macrx;
  2456. u16 crc;
  2457. for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
  2458. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
  2459. /* clear wake settings */
  2460. pmtctl = lan743x_csr_read(adapter, PMT_CTL);
  2461. pmtctl |= PMT_CTL_WUPS_MASK_;
  2462. pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
  2463. PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
  2464. PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
  2465. macrx = lan743x_csr_read(adapter, MAC_RX);
  2466. wucsr = 0;
  2467. mask_index = 0;
  2468. pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
  2469. if (adapter->wolopts & WAKE_PHY) {
  2470. pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
  2471. pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
  2472. }
  2473. if (adapter->wolopts & WAKE_MAGIC) {
  2474. wucsr |= MAC_WUCSR_MPEN_;
  2475. macrx |= MAC_RX_RXEN_;
  2476. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2477. }
  2478. if (adapter->wolopts & WAKE_UCAST) {
  2479. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
  2480. macrx |= MAC_RX_RXEN_;
  2481. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2482. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2483. }
  2484. if (adapter->wolopts & WAKE_BCAST) {
  2485. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
  2486. macrx |= MAC_RX_RXEN_;
  2487. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2488. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2489. }
  2490. if (adapter->wolopts & WAKE_MCAST) {
  2491. /* IPv4 multicast */
  2492. crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
  2493. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2494. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
  2495. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2496. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2497. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
  2498. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2499. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2500. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2501. mask_index++;
  2502. /* IPv6 multicast */
  2503. crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
  2504. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2505. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
  2506. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2507. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2508. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
  2509. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2510. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2511. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2512. mask_index++;
  2513. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
  2514. macrx |= MAC_RX_RXEN_;
  2515. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2516. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2517. }
  2518. if (adapter->wolopts & WAKE_ARP) {
  2519. /* set MAC_WUF_CFG & WUF_MASK
  2520. * for packettype (offset 12,13) = ARP (0x0806)
  2521. */
  2522. crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
  2523. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2524. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
  2525. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2526. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2527. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
  2528. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2529. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2530. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2531. mask_index++;
  2532. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
  2533. macrx |= MAC_RX_RXEN_;
  2534. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2535. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2536. }
  2537. lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
  2538. lan743x_csr_write(adapter, PMT_CTL, pmtctl);
  2539. lan743x_csr_write(adapter, MAC_RX, macrx);
  2540. }
  2541. static int lan743x_pm_suspend(struct device *dev)
  2542. {
  2543. struct pci_dev *pdev = to_pci_dev(dev);
  2544. struct net_device *netdev = pci_get_drvdata(pdev);
  2545. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2546. int ret;
  2547. lan743x_pcidev_shutdown(pdev);
  2548. /* clear all wakes */
  2549. lan743x_csr_write(adapter, MAC_WUCSR, 0);
  2550. lan743x_csr_write(adapter, MAC_WUCSR2, 0);
  2551. lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
  2552. if (adapter->wolopts)
  2553. lan743x_pm_set_wol(adapter);
  2554. /* Host sets PME_En, put D3hot */
  2555. ret = pci_prepare_to_sleep(pdev);
  2556. return 0;
  2557. }
  2558. static int lan743x_pm_resume(struct device *dev)
  2559. {
  2560. struct pci_dev *pdev = to_pci_dev(dev);
  2561. struct net_device *netdev = pci_get_drvdata(pdev);
  2562. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2563. int ret;
  2564. pci_set_power_state(pdev, PCI_D0);
  2565. pci_restore_state(pdev);
  2566. pci_save_state(pdev);
  2567. ret = lan743x_hardware_init(adapter, pdev);
  2568. if (ret) {
  2569. netif_err(adapter, probe, adapter->netdev,
  2570. "lan743x_hardware_init returned %d\n", ret);
  2571. }
  2572. /* open netdev when netdev is at running state while resume.
  2573. * For instance, it is true when system wakesup after pm-suspend
  2574. * However, it is false when system wakes up after suspend GUI menu
  2575. */
  2576. if (netif_running(netdev))
  2577. lan743x_netdev_open(netdev);
  2578. netif_device_attach(netdev);
  2579. return 0;
  2580. }
  2581. static const struct dev_pm_ops lan743x_pm_ops = {
  2582. SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
  2583. };
  2584. #endif /* CONFIG_PM_SLEEP */
  2585. static const struct pci_device_id lan743x_pcidev_tbl[] = {
  2586. { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
  2587. { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
  2588. { 0, }
  2589. };
  2590. static struct pci_driver lan743x_pcidev_driver = {
  2591. .name = DRIVER_NAME,
  2592. .id_table = lan743x_pcidev_tbl,
  2593. .probe = lan743x_pcidev_probe,
  2594. .remove = lan743x_pcidev_remove,
  2595. #ifdef CONFIG_PM_SLEEP
  2596. .driver.pm = &lan743x_pm_ops,
  2597. #endif
  2598. .shutdown = lan743x_pcidev_shutdown,
  2599. };
  2600. module_pci_driver(lan743x_pcidev_driver);
  2601. MODULE_AUTHOR(DRIVER_AUTHOR);
  2602. MODULE_DESCRIPTION(DRIVER_DESC);
  2603. MODULE_LICENSE("GPL");