icm.c 12 KB

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  1. /*
  2. * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
  3. * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/errno.h>
  34. #include <linux/mm.h>
  35. #include <linux/scatterlist.h>
  36. #include <linux/slab.h>
  37. #include <linux/mlx4/cmd.h>
  38. #include "mlx4.h"
  39. #include "icm.h"
  40. #include "fw.h"
  41. /*
  42. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  43. * per chunk. Note that the chunks are not necessarily in contiguous
  44. * physical memory.
  45. */
  46. enum {
  47. MLX4_ICM_ALLOC_SIZE = 1 << 18,
  48. MLX4_TABLE_CHUNK_SIZE = 1 << 18,
  49. };
  50. static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
  51. {
  52. int i;
  53. if (chunk->nsg > 0)
  54. pci_unmap_sg(dev->persist->pdev, chunk->sg, chunk->npages,
  55. PCI_DMA_BIDIRECTIONAL);
  56. for (i = 0; i < chunk->npages; ++i)
  57. __free_pages(sg_page(&chunk->sg[i]),
  58. get_order(chunk->sg[i].length));
  59. }
  60. static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
  61. {
  62. int i;
  63. for (i = 0; i < chunk->npages; ++i)
  64. dma_free_coherent(&dev->persist->pdev->dev,
  65. chunk->buf[i].size,
  66. chunk->buf[i].addr,
  67. chunk->buf[i].dma_addr);
  68. }
  69. void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
  70. {
  71. struct mlx4_icm_chunk *chunk, *tmp;
  72. if (!icm)
  73. return;
  74. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  75. if (coherent)
  76. mlx4_free_icm_coherent(dev, chunk);
  77. else
  78. mlx4_free_icm_pages(dev, chunk);
  79. kfree(chunk);
  80. }
  81. kfree(icm);
  82. }
  83. static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order,
  84. gfp_t gfp_mask, int node)
  85. {
  86. struct page *page;
  87. page = alloc_pages_node(node, gfp_mask, order);
  88. if (!page) {
  89. page = alloc_pages(gfp_mask, order);
  90. if (!page)
  91. return -ENOMEM;
  92. }
  93. sg_set_page(mem, page, PAGE_SIZE << order, 0);
  94. return 0;
  95. }
  96. static int mlx4_alloc_icm_coherent(struct device *dev, struct mlx4_icm_buf *buf,
  97. int order, gfp_t gfp_mask)
  98. {
  99. buf->addr = dma_alloc_coherent(dev, PAGE_SIZE << order,
  100. &buf->dma_addr, gfp_mask);
  101. if (!buf->addr)
  102. return -ENOMEM;
  103. if (offset_in_page(buf->addr)) {
  104. dma_free_coherent(dev, PAGE_SIZE << order, buf->addr,
  105. buf->dma_addr);
  106. return -ENOMEM;
  107. }
  108. buf->size = PAGE_SIZE << order;
  109. return 0;
  110. }
  111. struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
  112. gfp_t gfp_mask, int coherent)
  113. {
  114. struct mlx4_icm *icm;
  115. struct mlx4_icm_chunk *chunk = NULL;
  116. int cur_order;
  117. gfp_t mask;
  118. int ret;
  119. /* We use sg_set_buf for coherent allocs, which assumes low memory */
  120. BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
  121. icm = kmalloc_node(sizeof(*icm),
  122. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN),
  123. dev->numa_node);
  124. if (!icm) {
  125. icm = kmalloc(sizeof(*icm),
  126. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  127. if (!icm)
  128. return NULL;
  129. }
  130. icm->refcount = 0;
  131. INIT_LIST_HEAD(&icm->chunk_list);
  132. cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
  133. while (npages > 0) {
  134. if (!chunk) {
  135. chunk = kzalloc_node(sizeof(*chunk),
  136. gfp_mask & ~(__GFP_HIGHMEM |
  137. __GFP_NOWARN),
  138. dev->numa_node);
  139. if (!chunk) {
  140. chunk = kzalloc(sizeof(*chunk),
  141. gfp_mask & ~(__GFP_HIGHMEM |
  142. __GFP_NOWARN));
  143. if (!chunk)
  144. goto fail;
  145. }
  146. chunk->coherent = coherent;
  147. if (!coherent)
  148. sg_init_table(chunk->sg, MLX4_ICM_CHUNK_LEN);
  149. list_add_tail(&chunk->list, &icm->chunk_list);
  150. }
  151. while (1 << cur_order > npages)
  152. --cur_order;
  153. mask = gfp_mask;
  154. if (cur_order)
  155. mask &= ~__GFP_DIRECT_RECLAIM;
  156. if (coherent)
  157. ret = mlx4_alloc_icm_coherent(&dev->persist->pdev->dev,
  158. &chunk->buf[chunk->npages],
  159. cur_order, mask);
  160. else
  161. ret = mlx4_alloc_icm_pages(&chunk->sg[chunk->npages],
  162. cur_order, mask,
  163. dev->numa_node);
  164. if (ret) {
  165. if (--cur_order < 0)
  166. goto fail;
  167. else
  168. continue;
  169. }
  170. ++chunk->npages;
  171. if (coherent)
  172. ++chunk->nsg;
  173. else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
  174. chunk->nsg = pci_map_sg(dev->persist->pdev, chunk->sg,
  175. chunk->npages,
  176. PCI_DMA_BIDIRECTIONAL);
  177. if (chunk->nsg <= 0)
  178. goto fail;
  179. }
  180. if (chunk->npages == MLX4_ICM_CHUNK_LEN)
  181. chunk = NULL;
  182. npages -= 1 << cur_order;
  183. }
  184. if (!coherent && chunk) {
  185. chunk->nsg = pci_map_sg(dev->persist->pdev, chunk->sg,
  186. chunk->npages,
  187. PCI_DMA_BIDIRECTIONAL);
  188. if (chunk->nsg <= 0)
  189. goto fail;
  190. }
  191. return icm;
  192. fail:
  193. mlx4_free_icm(dev, icm, coherent);
  194. return NULL;
  195. }
  196. static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
  197. {
  198. return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
  199. }
  200. static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
  201. {
  202. return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
  203. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  204. }
  205. int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
  206. {
  207. return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
  208. }
  209. int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
  210. {
  211. return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
  212. MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
  213. }
  214. int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
  215. {
  216. u32 i = (obj & (table->num_obj - 1)) /
  217. (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
  218. int ret = 0;
  219. mutex_lock(&table->mutex);
  220. if (table->icm[i]) {
  221. ++table->icm[i]->refcount;
  222. goto out;
  223. }
  224. table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  225. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  226. __GFP_NOWARN, table->coherent);
  227. if (!table->icm[i]) {
  228. ret = -ENOMEM;
  229. goto out;
  230. }
  231. if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
  232. (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
  233. mlx4_free_icm(dev, table->icm[i], table->coherent);
  234. table->icm[i] = NULL;
  235. ret = -ENOMEM;
  236. goto out;
  237. }
  238. ++table->icm[i]->refcount;
  239. out:
  240. mutex_unlock(&table->mutex);
  241. return ret;
  242. }
  243. void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
  244. {
  245. u32 i;
  246. u64 offset;
  247. i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
  248. mutex_lock(&table->mutex);
  249. if (--table->icm[i]->refcount == 0) {
  250. offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
  251. mlx4_UNMAP_ICM(dev, table->virt + offset,
  252. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  253. mlx4_free_icm(dev, table->icm[i], table->coherent);
  254. table->icm[i] = NULL;
  255. }
  256. mutex_unlock(&table->mutex);
  257. }
  258. void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
  259. dma_addr_t *dma_handle)
  260. {
  261. int offset, dma_offset, i;
  262. u64 idx;
  263. struct mlx4_icm_chunk *chunk;
  264. struct mlx4_icm *icm;
  265. void *addr = NULL;
  266. if (!table->lowmem)
  267. return NULL;
  268. mutex_lock(&table->mutex);
  269. idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
  270. icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
  271. dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
  272. if (!icm)
  273. goto out;
  274. list_for_each_entry(chunk, &icm->chunk_list, list) {
  275. for (i = 0; i < chunk->npages; ++i) {
  276. dma_addr_t dma_addr;
  277. size_t len;
  278. if (table->coherent) {
  279. len = chunk->buf[i].size;
  280. dma_addr = chunk->buf[i].dma_addr;
  281. addr = chunk->buf[i].addr;
  282. } else {
  283. struct page *page;
  284. len = sg_dma_len(&chunk->sg[i]);
  285. dma_addr = sg_dma_address(&chunk->sg[i]);
  286. /* XXX: we should never do this for highmem
  287. * allocation. This function either needs
  288. * to be split, or the kernel virtual address
  289. * return needs to be made optional.
  290. */
  291. page = sg_page(&chunk->sg[i]);
  292. addr = lowmem_page_address(page);
  293. }
  294. if (dma_handle && dma_offset >= 0) {
  295. if (len > dma_offset)
  296. *dma_handle = dma_addr + dma_offset;
  297. dma_offset -= len;
  298. }
  299. /*
  300. * DMA mapping can merge pages but not split them,
  301. * so if we found the page, dma_handle has already
  302. * been assigned to.
  303. */
  304. if (len > offset)
  305. goto out;
  306. offset -= len;
  307. }
  308. }
  309. addr = NULL;
  310. out:
  311. mutex_unlock(&table->mutex);
  312. return addr ? addr + offset : NULL;
  313. }
  314. int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  315. u32 start, u32 end)
  316. {
  317. int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
  318. int err;
  319. u32 i;
  320. for (i = start; i <= end; i += inc) {
  321. err = mlx4_table_get(dev, table, i);
  322. if (err)
  323. goto fail;
  324. }
  325. return 0;
  326. fail:
  327. while (i > start) {
  328. i -= inc;
  329. mlx4_table_put(dev, table, i);
  330. }
  331. return err;
  332. }
  333. void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  334. u32 start, u32 end)
  335. {
  336. u32 i;
  337. for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
  338. mlx4_table_put(dev, table, i);
  339. }
  340. int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
  341. u64 virt, int obj_size, u32 nobj, int reserved,
  342. int use_lowmem, int use_coherent)
  343. {
  344. int obj_per_chunk;
  345. int num_icm;
  346. unsigned chunk_size;
  347. int i;
  348. u64 size;
  349. obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
  350. if (WARN_ON(!obj_per_chunk))
  351. return -EINVAL;
  352. num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
  353. table->icm = kvcalloc(num_icm, sizeof(*table->icm), GFP_KERNEL);
  354. if (!table->icm)
  355. return -ENOMEM;
  356. table->virt = virt;
  357. table->num_icm = num_icm;
  358. table->num_obj = nobj;
  359. table->obj_size = obj_size;
  360. table->lowmem = use_lowmem;
  361. table->coherent = use_coherent;
  362. mutex_init(&table->mutex);
  363. size = (u64) nobj * obj_size;
  364. for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  365. chunk_size = MLX4_TABLE_CHUNK_SIZE;
  366. if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
  367. chunk_size = PAGE_ALIGN(size -
  368. i * MLX4_TABLE_CHUNK_SIZE);
  369. table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
  370. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  371. __GFP_NOWARN, use_coherent);
  372. if (!table->icm[i])
  373. goto err;
  374. if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
  375. mlx4_free_icm(dev, table->icm[i], use_coherent);
  376. table->icm[i] = NULL;
  377. goto err;
  378. }
  379. /*
  380. * Add a reference to this ICM chunk so that it never
  381. * gets freed (since it contains reserved firmware objects).
  382. */
  383. ++table->icm[i]->refcount;
  384. }
  385. return 0;
  386. err:
  387. for (i = 0; i < num_icm; ++i)
  388. if (table->icm[i]) {
  389. mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
  390. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  391. mlx4_free_icm(dev, table->icm[i], use_coherent);
  392. }
  393. kvfree(table->icm);
  394. return -ENOMEM;
  395. }
  396. void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
  397. {
  398. int i;
  399. for (i = 0; i < table->num_icm; ++i)
  400. if (table->icm[i]) {
  401. mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
  402. MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
  403. mlx4_free_icm(dev, table->icm[i], table->coherent);
  404. }
  405. kvfree(table->icm);
  406. }