mvpp2_cls.h 6.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * RSS and Classifier definitions for Marvell PPv2 Network Controller
  4. *
  5. * Copyright (C) 2014 Marvell
  6. *
  7. * Marcin Wojtas <mw@semihalf.com>
  8. */
  9. #ifndef _MVPP2_CLS_H_
  10. #define _MVPP2_CLS_H_
  11. #include "mvpp2.h"
  12. #include "mvpp2_prs.h"
  13. /* Classifier constants */
  14. #define MVPP2_CLS_FLOWS_TBL_SIZE 512
  15. #define MVPP2_CLS_FLOWS_TBL_DATA_WORDS 3
  16. #define MVPP2_CLS_LKP_TBL_SIZE 64
  17. #define MVPP2_CLS_RX_QUEUES 256
  18. /* Classifier flow constants */
  19. #define MVPP2_FLOW_N_FIELDS 4
  20. enum mvpp2_cls_engine {
  21. MVPP22_CLS_ENGINE_C2 = 1,
  22. MVPP22_CLS_ENGINE_C3A,
  23. MVPP22_CLS_ENGINE_C3B,
  24. MVPP22_CLS_ENGINE_C4,
  25. MVPP22_CLS_ENGINE_C3HA = 6,
  26. MVPP22_CLS_ENGINE_C3HB = 7,
  27. };
  28. #define MVPP22_CLS_HEK_OPT_MAC_DA BIT(0)
  29. #define MVPP22_CLS_HEK_OPT_VLAN BIT(1)
  30. #define MVPP22_CLS_HEK_OPT_L3_PROTO BIT(2)
  31. #define MVPP22_CLS_HEK_OPT_IP4SA BIT(3)
  32. #define MVPP22_CLS_HEK_OPT_IP4DA BIT(4)
  33. #define MVPP22_CLS_HEK_OPT_IP6SA BIT(5)
  34. #define MVPP22_CLS_HEK_OPT_IP6DA BIT(6)
  35. #define MVPP22_CLS_HEK_OPT_L4SIP BIT(7)
  36. #define MVPP22_CLS_HEK_OPT_L4DIP BIT(8)
  37. #define MVPP22_CLS_HEK_N_FIELDS 9
  38. #define MVPP22_CLS_HEK_L4_OPTS (MVPP22_CLS_HEK_OPT_L4SIP | \
  39. MVPP22_CLS_HEK_OPT_L4DIP)
  40. #define MVPP22_CLS_HEK_IP4_2T (MVPP22_CLS_HEK_OPT_IP4SA | \
  41. MVPP22_CLS_HEK_OPT_IP4DA)
  42. #define MVPP22_CLS_HEK_IP6_2T (MVPP22_CLS_HEK_OPT_IP6SA | \
  43. MVPP22_CLS_HEK_OPT_IP6DA)
  44. /* The fifth tuple in "5T" is the L4_Info field */
  45. #define MVPP22_CLS_HEK_IP4_5T (MVPP22_CLS_HEK_IP4_2T | \
  46. MVPP22_CLS_HEK_L4_OPTS)
  47. #define MVPP22_CLS_HEK_IP6_5T (MVPP22_CLS_HEK_IP6_2T | \
  48. MVPP22_CLS_HEK_L4_OPTS)
  49. enum mvpp2_cls_field_id {
  50. MVPP22_CLS_FIELD_MAC_DA = 0x03,
  51. MVPP22_CLS_FIELD_VLAN = 0x06,
  52. MVPP22_CLS_FIELD_L3_PROTO = 0x0f,
  53. MVPP22_CLS_FIELD_IP4SA = 0x10,
  54. MVPP22_CLS_FIELD_IP4DA = 0x11,
  55. MVPP22_CLS_FIELD_IP6SA = 0x17,
  56. MVPP22_CLS_FIELD_IP6DA = 0x1a,
  57. MVPP22_CLS_FIELD_L4SIP = 0x1d,
  58. MVPP22_CLS_FIELD_L4DIP = 0x1e,
  59. };
  60. enum mvpp2_cls_flow_seq {
  61. MVPP2_CLS_FLOW_SEQ_NORMAL = 0,
  62. MVPP2_CLS_FLOW_SEQ_FIRST1,
  63. MVPP2_CLS_FLOW_SEQ_FIRST2,
  64. MVPP2_CLS_FLOW_SEQ_LAST,
  65. MVPP2_CLS_FLOW_SEQ_MIDDLE
  66. };
  67. /* Classifier C2 engine constants */
  68. #define MVPP22_CLS_C2_TCAM_EN(data) ((data) << 16)
  69. enum mvpp22_cls_c2_action {
  70. MVPP22_C2_NO_UPD = 0,
  71. MVPP22_C2_NO_UPD_LOCK,
  72. MVPP22_C2_UPD,
  73. MVPP22_C2_UPD_LOCK,
  74. };
  75. enum mvpp22_cls_c2_fwd_action {
  76. MVPP22_C2_FWD_NO_UPD = 0,
  77. MVPP22_C2_FWD_NO_UPD_LOCK,
  78. MVPP22_C2_FWD_SW,
  79. MVPP22_C2_FWD_SW_LOCK,
  80. MVPP22_C2_FWD_HW,
  81. MVPP22_C2_FWD_HW_LOCK,
  82. MVPP22_C2_FWD_HW_LOW_LAT,
  83. MVPP22_C2_FWD_HW_LOW_LAT_LOCK,
  84. };
  85. #define MVPP2_CLS_C2_TCAM_WORDS 5
  86. #define MVPP2_CLS_C2_ATTR_WORDS 5
  87. struct mvpp2_cls_c2_entry {
  88. u32 index;
  89. u32 tcam[MVPP2_CLS_C2_TCAM_WORDS];
  90. u32 act;
  91. u32 attr[MVPP2_CLS_C2_ATTR_WORDS];
  92. };
  93. /* Classifier C2 engine entries */
  94. #define MVPP22_CLS_C2_RSS_ENTRY(port) (port)
  95. #define MVPP22_CLS_C2_N_ENTRIES MVPP2_MAX_PORTS
  96. /* RSS flow entries in the flow table. We have 2 entries per port for RSS.
  97. *
  98. * The first performs a lookup using the C2 TCAM engine, to tag the
  99. * packet for software forwarding (needed for RSS), enable or disable RSS, and
  100. * assign the default rx queue.
  101. *
  102. * The second configures the hash generation, by specifying which fields of the
  103. * packet header are used to generate the hash, and specifies the relevant hash
  104. * engine to use.
  105. */
  106. #define MVPP22_RSS_FLOW_C2_OFFS 0
  107. #define MVPP22_RSS_FLOW_HASH_OFFS 1
  108. #define MVPP22_RSS_FLOW_SIZE (MVPP22_RSS_FLOW_HASH_OFFS + 1)
  109. #define MVPP22_RSS_FLOW_C2(port) ((port) * MVPP22_RSS_FLOW_SIZE + \
  110. MVPP22_RSS_FLOW_C2_OFFS)
  111. #define MVPP22_RSS_FLOW_HASH(port) ((port) * MVPP22_RSS_FLOW_SIZE + \
  112. MVPP22_RSS_FLOW_HASH_OFFS)
  113. #define MVPP22_RSS_FLOW_FIRST(port) MVPP22_RSS_FLOW_C2(port)
  114. /* Packet flow ID */
  115. enum mvpp2_prs_flow {
  116. MVPP2_FL_START = 8,
  117. MVPP2_FL_IP4_TCP_NF_UNTAG = MVPP2_FL_START,
  118. MVPP2_FL_IP4_UDP_NF_UNTAG,
  119. MVPP2_FL_IP4_TCP_NF_TAG,
  120. MVPP2_FL_IP4_UDP_NF_TAG,
  121. MVPP2_FL_IP6_TCP_NF_UNTAG,
  122. MVPP2_FL_IP6_UDP_NF_UNTAG,
  123. MVPP2_FL_IP6_TCP_NF_TAG,
  124. MVPP2_FL_IP6_UDP_NF_TAG,
  125. MVPP2_FL_IP4_TCP_FRAG_UNTAG,
  126. MVPP2_FL_IP4_UDP_FRAG_UNTAG,
  127. MVPP2_FL_IP4_TCP_FRAG_TAG,
  128. MVPP2_FL_IP4_UDP_FRAG_TAG,
  129. MVPP2_FL_IP6_TCP_FRAG_UNTAG,
  130. MVPP2_FL_IP6_UDP_FRAG_UNTAG,
  131. MVPP2_FL_IP6_TCP_FRAG_TAG,
  132. MVPP2_FL_IP6_UDP_FRAG_TAG,
  133. MVPP2_FL_IP4_UNTAG, /* non-TCP, non-UDP, same for below */
  134. MVPP2_FL_IP4_TAG,
  135. MVPP2_FL_IP6_UNTAG,
  136. MVPP2_FL_IP6_TAG,
  137. MVPP2_FL_NON_IP_UNTAG,
  138. MVPP2_FL_NON_IP_TAG,
  139. MVPP2_FL_LAST,
  140. };
  141. struct mvpp2_cls_flow {
  142. /* The L2-L4 traffic flow type */
  143. int flow_type;
  144. /* The first id in the flow table for this flow */
  145. u16 flow_id;
  146. /* The supported HEK fields for this flow */
  147. u16 supported_hash_opts;
  148. /* The Header Parser result_info that matches this flow */
  149. struct mvpp2_prs_result_info prs_ri;
  150. };
  151. #define MVPP2_N_FLOWS 52
  152. #define MVPP2_ENTRIES_PER_FLOW (MVPP2_MAX_PORTS + 1)
  153. #define MVPP2_FLOW_C2_ENTRY(id) ((id) * MVPP2_ENTRIES_PER_FLOW)
  154. #define MVPP2_PORT_FLOW_HASH_ENTRY(port, id) ((id) * MVPP2_ENTRIES_PER_FLOW + \
  155. (port) + 1)
  156. struct mvpp2_cls_flow_entry {
  157. u32 index;
  158. u32 data[MVPP2_CLS_FLOWS_TBL_DATA_WORDS];
  159. };
  160. struct mvpp2_cls_lookup_entry {
  161. u32 lkpid;
  162. u32 way;
  163. u32 data;
  164. };
  165. void mvpp22_rss_fill_table(struct mvpp2_port *port, u32 table);
  166. void mvpp22_rss_port_init(struct mvpp2_port *port);
  167. void mvpp22_rss_enable(struct mvpp2_port *port);
  168. void mvpp22_rss_disable(struct mvpp2_port *port);
  169. int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port, struct ethtool_rxnfc *info);
  170. int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info);
  171. void mvpp2_cls_init(struct mvpp2 *priv);
  172. void mvpp2_cls_port_config(struct mvpp2_port *port);
  173. void mvpp2_cls_oversize_rxq_set(struct mvpp2_port *port);
  174. int mvpp2_cls_flow_eng_get(struct mvpp2_cls_flow_entry *fe);
  175. u16 mvpp2_flow_get_hek_fields(struct mvpp2_cls_flow_entry *fe);
  176. struct mvpp2_cls_flow *mvpp2_cls_flow_get(int flow);
  177. u32 mvpp2_cls_flow_hits(struct mvpp2 *priv, int index);
  178. void mvpp2_cls_flow_read(struct mvpp2 *priv, int index,
  179. struct mvpp2_cls_flow_entry *fe);
  180. u32 mvpp2_cls_lookup_hits(struct mvpp2 *priv, int index);
  181. void mvpp2_cls_lookup_read(struct mvpp2 *priv, int lkpid, int way,
  182. struct mvpp2_cls_lookup_entry *le);
  183. u32 mvpp2_cls_c2_hit_count(struct mvpp2 *priv, int c2_index);
  184. void mvpp2_cls_c2_read(struct mvpp2 *priv, int index,
  185. struct mvpp2_cls_c2_entry *c2);
  186. #endif