hnae.h 20 KB

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  1. /*
  2. * Copyright (c) 2014-2015 Hisilicon Limited.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #ifndef __HNAE_H
  10. #define __HNAE_H
  11. /* Names used in this framework:
  12. * ae handle (handle):
  13. * a set of queues provided by AE
  14. * ring buffer queue (rbq):
  15. * the channel between upper layer and the AE, can do tx and rx
  16. * ring:
  17. * a tx or rx channel within a rbq
  18. * ring description (desc):
  19. * an element in the ring with packet information
  20. * buffer:
  21. * a memory region referred by desc with the full packet payload
  22. *
  23. * "num" means a static number set as a parameter, "count" mean a dynamic
  24. * number set while running
  25. * "cb" means control block
  26. */
  27. #include <linux/acpi.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/module.h>
  31. #include <linux/netdevice.h>
  32. #include <linux/notifier.h>
  33. #include <linux/phy.h>
  34. #include <linux/types.h>
  35. #define HNAE_DRIVER_VERSION "2.0"
  36. #define HNAE_DRIVER_NAME "hns"
  37. #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation."
  38. #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver"
  39. #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem"
  40. #ifdef DEBUG
  41. #ifndef assert
  42. #define assert(expr) \
  43. do { \
  44. if (!(expr)) { \
  45. pr_err("Assertion failed! %s, %s, %s, line %d\n", \
  46. #expr, __FILE__, __func__, __LINE__); \
  47. } \
  48. } while (0)
  49. #endif
  50. #else
  51. #ifndef assert
  52. #define assert(expr)
  53. #endif
  54. #endif
  55. #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0')
  56. #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0')
  57. #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1)
  58. #define AE_NAME_SIZE 16
  59. #define BD_SIZE_2048_MAX_MTU 6000
  60. /* some said the RX and TX RCB format should not be the same in the future. But
  61. * it is the same now...
  62. */
  63. #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */
  64. #define RCB_REG_BASEADDR_H 0x04
  65. #define RCB_REG_BD_NUM 0x08
  66. #define RCB_REG_BD_LEN 0x0C
  67. #define RCB_REG_PKTLINE 0x10
  68. #define RCB_REG_TAIL 0x18
  69. #define RCB_REG_HEAD 0x1C
  70. #define RCB_REG_FBDNUM 0x20
  71. #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */
  72. #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */
  73. #define HNS_RX_HEAD_SIZE 256
  74. #define HNAE_AE_REGISTER 0x1
  75. #define RCB_RING_NAME_LEN (IFNAMSIZ + 4)
  76. #define HNAE_LOWEST_LATENCY_COAL_PARAM 30
  77. #define HNAE_LOW_LATENCY_COAL_PARAM 80
  78. #define HNAE_BULK_LATENCY_COAL_PARAM 150
  79. enum hnae_led_state {
  80. HNAE_LED_INACTIVE,
  81. HNAE_LED_ACTIVE,
  82. HNAE_LED_ON,
  83. HNAE_LED_OFF
  84. };
  85. #define HNS_RX_FLAG_VLAN_PRESENT 0x1
  86. #define HNS_RX_FLAG_L3ID_IPV4 0x0
  87. #define HNS_RX_FLAG_L3ID_IPV6 0x1
  88. #define HNS_RX_FLAG_L4ID_UDP 0x0
  89. #define HNS_RX_FLAG_L4ID_TCP 0x1
  90. #define HNS_RX_FLAG_L4ID_SCTP 0x3
  91. #define HNS_TXD_ASID_S 0
  92. #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S)
  93. #define HNS_TXD_BUFNUM_S 8
  94. #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S)
  95. #define HNS_TXD_PORTID_S 10
  96. #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S)
  97. #define HNS_TXD_RA_B 8
  98. #define HNS_TXD_RI_B 9
  99. #define HNS_TXD_L4CS_B 10
  100. #define HNS_TXD_L3CS_B 11
  101. #define HNS_TXD_FE_B 12
  102. #define HNS_TXD_VLD_B 13
  103. #define HNS_TXD_IPOFFSET_S 14
  104. #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
  105. #define HNS_RXD_IPOFFSET_S 0
  106. #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
  107. #define HNS_RXD_BUFNUM_S 8
  108. #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S)
  109. #define HNS_RXD_PORTID_S 10
  110. #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S)
  111. #define HNS_RXD_DMAC_S 13
  112. #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S)
  113. #define HNS_RXD_VLAN_S 15
  114. #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S)
  115. #define HNS_RXD_L3ID_S 17
  116. #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S)
  117. #define HNS_RXD_L4ID_S 21
  118. #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S)
  119. #define HNS_RXD_FE_B 25
  120. #define HNS_RXD_FRAG_B 26
  121. #define HNS_RXD_VLD_B 27
  122. #define HNS_RXD_L2E_B 28
  123. #define HNS_RXD_L3E_B 29
  124. #define HNS_RXD_L4E_B 30
  125. #define HNS_RXD_DROP_B 31
  126. #define HNS_RXD_VLANID_S 8
  127. #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S)
  128. #define HNS_RXD_CFI_B 20
  129. #define HNS_RXD_PRI_S 21
  130. #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S)
  131. #define HNS_RXD_ASID_S 24
  132. #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S)
  133. #define HNSV2_TXD_BUFNUM_S 0
  134. #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S)
  135. #define HNSV2_TXD_PORTID_S 4
  136. #define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S)
  137. #define HNSV2_TXD_RI_B 1
  138. #define HNSV2_TXD_L4CS_B 2
  139. #define HNSV2_TXD_L3CS_B 3
  140. #define HNSV2_TXD_FE_B 4
  141. #define HNSV2_TXD_VLD_B 5
  142. #define HNSV2_TXD_TSE_B 0
  143. #define HNSV2_TXD_VLAN_EN_B 1
  144. #define HNSV2_TXD_SNAP_B 2
  145. #define HNSV2_TXD_IPV6_B 3
  146. #define HNSV2_TXD_SCTP_B 4
  147. /* hardware spec ring buffer format */
  148. struct __packed hnae_desc {
  149. __le64 addr;
  150. union {
  151. struct {
  152. union {
  153. __le16 asid_bufnum_pid;
  154. __le16 asid;
  155. };
  156. __le16 send_size;
  157. union {
  158. __le32 flag_ipoffset;
  159. struct {
  160. __u8 bn_pid;
  161. __u8 ra_ri_cs_fe_vld;
  162. __u8 ip_offset;
  163. __u8 tse_vlan_snap_v6_sctp_nth;
  164. };
  165. };
  166. __le16 mss;
  167. __u8 l4_len;
  168. __u8 reserved1;
  169. __le16 paylen;
  170. __u8 vmid;
  171. __u8 qid;
  172. __le32 reserved2[2];
  173. } tx;
  174. struct {
  175. __le32 ipoff_bnum_pid_flag;
  176. __le16 pkt_len;
  177. __le16 size;
  178. union {
  179. __le32 vlan_pri_asid;
  180. struct {
  181. __le16 asid;
  182. __le16 vlan_cfi_pri;
  183. };
  184. };
  185. __le32 rss_hash;
  186. __le32 reserved_1[2];
  187. } rx;
  188. };
  189. };
  190. struct hnae_desc_cb {
  191. dma_addr_t dma; /* dma address of this desc */
  192. void *buf; /* cpu addr for a desc */
  193. /* priv data for the desc, e.g. skb when use with ip stack*/
  194. void *priv;
  195. u32 page_offset;
  196. u32 length; /* length of the buffer */
  197. u16 reuse_flag;
  198. /* desc type, used by the ring user to mark the type of the priv data */
  199. u16 type;
  200. };
  201. #define setflags(flags, bits) ((flags) |= (bits))
  202. #define unsetflags(flags, bits) ((flags) &= ~(bits))
  203. /* hnae_ring->flags fields */
  204. #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */
  205. #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR)
  206. #define is_rx_ring(ring) (!is_tx_ring(ring))
  207. #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \
  208. DMA_TO_DEVICE : DMA_FROM_DEVICE)
  209. struct ring_stats {
  210. u64 io_err_cnt;
  211. u64 sw_err_cnt;
  212. u64 seg_pkt_cnt;
  213. union {
  214. struct {
  215. u64 tx_pkts;
  216. u64 tx_bytes;
  217. u64 tx_err_cnt;
  218. u64 restart_queue;
  219. u64 tx_busy;
  220. };
  221. struct {
  222. u64 rx_pkts;
  223. u64 rx_bytes;
  224. u64 rx_err_cnt;
  225. u64 reuse_pg_cnt;
  226. u64 err_pkt_len;
  227. u64 non_vld_descs;
  228. u64 err_bd_num;
  229. u64 l2_err;
  230. u64 l3l4_csum_err;
  231. };
  232. };
  233. };
  234. struct hnae_queue;
  235. struct hnae_ring {
  236. u8 __iomem *io_base; /* base io address for the ring */
  237. struct hnae_desc *desc; /* dma map address space */
  238. struct hnae_desc_cb *desc_cb;
  239. struct hnae_queue *q;
  240. int irq;
  241. char ring_name[RCB_RING_NAME_LEN];
  242. /* statistic */
  243. struct ring_stats stats;
  244. dma_addr_t desc_dma_addr;
  245. u32 buf_size; /* size for hnae_desc->addr, preset by AE */
  246. u16 desc_num; /* total number of desc */
  247. u16 max_desc_num_per_pkt;
  248. u16 max_raw_data_sz_per_desc;
  249. u16 max_pkt_size;
  250. int next_to_use; /* idx of next spare desc */
  251. /* idx of lastest sent desc, the ring is empty when equal to
  252. * next_to_use
  253. */
  254. int next_to_clean;
  255. int flags; /* ring attribute */
  256. int irq_init_flag;
  257. /* total rx bytes after last rx rate calucated */
  258. u64 coal_last_rx_bytes;
  259. unsigned long coal_last_jiffies;
  260. u32 coal_param;
  261. u32 coal_rx_rate; /* rx rate in MB */
  262. };
  263. #define ring_ptr_move_fw(ring, p) \
  264. ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
  265. #define ring_ptr_move_bw(ring, p) \
  266. ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
  267. enum hns_desc_type {
  268. DESC_TYPE_SKB,
  269. DESC_TYPE_PAGE,
  270. };
  271. #define assert_is_ring_idx(ring, idx) \
  272. assert((idx) >= 0 && (idx) < (ring)->desc_num)
  273. /* the distance between [begin, end) in a ring buffer
  274. * note: there is a unuse slot between the begin and the end
  275. */
  276. static inline int ring_dist(struct hnae_ring *ring, int begin, int end)
  277. {
  278. assert_is_ring_idx(ring, begin);
  279. assert_is_ring_idx(ring, end);
  280. return (end - begin + ring->desc_num) % ring->desc_num;
  281. }
  282. static inline int ring_space(struct hnae_ring *ring)
  283. {
  284. return ring->desc_num -
  285. ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1;
  286. }
  287. static inline int is_ring_empty(struct hnae_ring *ring)
  288. {
  289. assert_is_ring_idx(ring, ring->next_to_use);
  290. assert_is_ring_idx(ring, ring->next_to_clean);
  291. return ring->next_to_use == ring->next_to_clean;
  292. }
  293. #define hnae_buf_size(_ring) ((_ring)->buf_size)
  294. #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring)))
  295. #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring))
  296. struct hnae_handle;
  297. /* allocate and dma map space for hnae desc */
  298. struct hnae_buf_ops {
  299. int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
  300. void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
  301. int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
  302. void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
  303. };
  304. struct hnae_queue {
  305. void __iomem *io_base;
  306. phys_addr_t phy_base;
  307. struct hnae_ae_dev *dev; /* the device who use this queue */
  308. struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp;
  309. struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp;
  310. struct hnae_handle *handle;
  311. };
  312. /*hnae loop mode*/
  313. enum hnae_loop {
  314. MAC_INTERNALLOOP_MAC = 0,
  315. MAC_INTERNALLOOP_SERDES,
  316. MAC_INTERNALLOOP_PHY,
  317. MAC_LOOP_PHY_NONE,
  318. MAC_LOOP_NONE,
  319. };
  320. /*hnae port type*/
  321. enum hnae_port_type {
  322. HNAE_PORT_SERVICE = 0,
  323. HNAE_PORT_DEBUG
  324. };
  325. /* mac media type */
  326. enum hnae_media_type {
  327. HNAE_MEDIA_TYPE_UNKNOWN = 0,
  328. HNAE_MEDIA_TYPE_FIBER,
  329. HNAE_MEDIA_TYPE_COPPER,
  330. HNAE_MEDIA_TYPE_BACKPLANE,
  331. };
  332. /* This struct defines the operation on the handle.
  333. *
  334. * get_handle(): (mandatory)
  335. * Get a handle from AE according to its name and options.
  336. * the AE driver should manage the space used by handle and its queues while
  337. * the HNAE framework will allocate desc and desc_cb for all rings in the
  338. * queues.
  339. * put_handle():
  340. * Release the handle.
  341. * start():
  342. * Enable the hardware, include all queues
  343. * stop():
  344. * Disable the hardware
  345. * set_opts(): (mandatory)
  346. * Set options to the AE
  347. * get_opts(): (mandatory)
  348. * Get options from the AE
  349. * get_status():
  350. * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
  351. * non-ok
  352. * toggle_ring_irq(): (mandatory)
  353. * Set the ring irq to be enabled(0) or disable(1)
  354. * toggle_queue_status(): (mandatory)
  355. * Set the queue to be enabled(1) or disable(0), this will not change the
  356. * ring irq state
  357. * adjust_link()
  358. * adjust link status
  359. * set_loopback()
  360. * set loopback
  361. * get_ring_bdnum_limit()
  362. * get ring bd number limit
  363. * get_pauseparam()
  364. * get tx and rx of pause frame use
  365. * set_autoneg()
  366. * set auto autonegotiation of pause frame use
  367. * get_autoneg()
  368. * get auto autonegotiation of pause frame use
  369. * set_pauseparam()
  370. * set tx and rx of pause frame use
  371. * get_coalesce_usecs()
  372. * get usecs to delay a TX interrupt after a packet is sent
  373. * get_rx_max_coalesced_frames()
  374. * get Maximum number of packets to be sent before a TX interrupt.
  375. * set_coalesce_usecs()
  376. * set usecs to delay a TX interrupt after a packet is sent
  377. * set_coalesce_frames()
  378. * set Maximum number of packets to be sent before a TX interrupt.
  379. * get_ringnum()
  380. * get RX/TX ring number
  381. * get_max_ringnum()
  382. * get RX/TX ring maximum number
  383. * get_mac_addr()
  384. * get mac address
  385. * set_mac_addr()
  386. * set mac address
  387. * clr_mc_addr()
  388. * clear mcast tcam table
  389. * set_mc_addr()
  390. * set multicast mode
  391. * add_uc_addr()
  392. * add ucast address
  393. * rm_uc_addr()
  394. * remove ucast address
  395. * set_mtu()
  396. * set mtu
  397. * update_stats()
  398. * update Old network device statistics
  399. * get_ethtool_stats()
  400. * get ethtool network device statistics
  401. * get_strings()
  402. * get a set of strings that describe the requested objects
  403. * get_sset_count()
  404. * get number of strings that @get_strings will write
  405. * update_led_status()
  406. * update the led status
  407. * set_led_id()
  408. * set led id
  409. * get_regs()
  410. * get regs dump
  411. * get_regs_len()
  412. * get the len of the regs dump
  413. */
  414. struct hnae_ae_ops {
  415. struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev,
  416. u32 port_id);
  417. void (*put_handle)(struct hnae_handle *handle);
  418. void (*init_queue)(struct hnae_queue *q);
  419. void (*fini_queue)(struct hnae_queue *q);
  420. int (*start)(struct hnae_handle *handle);
  421. void (*stop)(struct hnae_handle *handle);
  422. void (*reset)(struct hnae_handle *handle);
  423. int (*set_opts)(struct hnae_handle *handle, int type, void *opts);
  424. int (*get_opts)(struct hnae_handle *handle, int type, void **opts);
  425. int (*get_status)(struct hnae_handle *handle);
  426. int (*get_info)(struct hnae_handle *handle,
  427. u8 *auto_neg, u16 *speed, u8 *duplex);
  428. void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val);
  429. void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex);
  430. bool (*need_adjust_link)(struct hnae_handle *handle,
  431. int speed, int duplex);
  432. int (*set_loopback)(struct hnae_handle *handle,
  433. enum hnae_loop loop_mode, int en);
  434. void (*get_ring_bdnum_limit)(struct hnae_queue *queue,
  435. u32 *uplimit);
  436. void (*get_pauseparam)(struct hnae_handle *handle,
  437. u32 *auto_neg, u32 *rx_en, u32 *tx_en);
  438. int (*set_autoneg)(struct hnae_handle *handle, u8 enable);
  439. int (*get_autoneg)(struct hnae_handle *handle);
  440. int (*set_pauseparam)(struct hnae_handle *handle,
  441. u32 auto_neg, u32 rx_en, u32 tx_en);
  442. void (*get_coalesce_usecs)(struct hnae_handle *handle,
  443. u32 *tx_usecs, u32 *rx_usecs);
  444. void (*get_max_coalesced_frames)(struct hnae_handle *handle,
  445. u32 *tx_frames, u32 *rx_frames);
  446. int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout);
  447. int (*set_coalesce_frames)(struct hnae_handle *handle,
  448. u32 tx_frames, u32 rx_frames);
  449. void (*get_coalesce_range)(struct hnae_handle *handle,
  450. u32 *tx_frames_low, u32 *rx_frames_low,
  451. u32 *tx_frames_high, u32 *rx_frames_high,
  452. u32 *tx_usecs_low, u32 *rx_usecs_low,
  453. u32 *tx_usecs_high, u32 *rx_usecs_high);
  454. void (*set_promisc_mode)(struct hnae_handle *handle, u32 en);
  455. int (*get_mac_addr)(struct hnae_handle *handle, void **p);
  456. int (*set_mac_addr)(struct hnae_handle *handle, void *p);
  457. int (*add_uc_addr)(struct hnae_handle *handle,
  458. const unsigned char *addr);
  459. int (*rm_uc_addr)(struct hnae_handle *handle,
  460. const unsigned char *addr);
  461. int (*clr_mc_addr)(struct hnae_handle *handle);
  462. int (*set_mc_addr)(struct hnae_handle *handle, void *addr);
  463. int (*set_mtu)(struct hnae_handle *handle, int new_mtu);
  464. void (*set_tso_stats)(struct hnae_handle *handle, int enable);
  465. void (*update_stats)(struct hnae_handle *handle,
  466. struct net_device_stats *net_stats);
  467. void (*get_stats)(struct hnae_handle *handle, u64 *data);
  468. void (*get_strings)(struct hnae_handle *handle,
  469. u32 stringset, u8 *data);
  470. int (*get_sset_count)(struct hnae_handle *handle, int stringset);
  471. void (*update_led_status)(struct hnae_handle *handle);
  472. int (*set_led_id)(struct hnae_handle *handle,
  473. enum hnae_led_state status);
  474. void (*get_regs)(struct hnae_handle *handle, void *data);
  475. int (*get_regs_len)(struct hnae_handle *handle);
  476. u32 (*get_rss_key_size)(struct hnae_handle *handle);
  477. u32 (*get_rss_indir_size)(struct hnae_handle *handle);
  478. int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key,
  479. u8 *hfunc);
  480. int (*set_rss)(struct hnae_handle *handle, const u32 *indir,
  481. const u8 *key, const u8 hfunc);
  482. };
  483. struct hnae_ae_dev {
  484. struct device cls_dev; /* the class dev */
  485. struct device *dev; /* the presented dev */
  486. struct hnae_ae_ops *ops;
  487. struct list_head node;
  488. struct module *owner; /* the module who provides this dev */
  489. int id;
  490. char name[AE_NAME_SIZE];
  491. struct list_head handle_list;
  492. spinlock_t lock; /* lock to protect the handle_list */
  493. };
  494. struct hnae_handle {
  495. struct device *owner_dev; /* the device which make use of this handle */
  496. struct hnae_ae_dev *dev; /* the device who provides this handle */
  497. struct phy_device *phy_dev;
  498. phy_interface_t phy_if;
  499. u32 if_support;
  500. int q_num;
  501. int vf_id;
  502. unsigned long coal_last_jiffies;
  503. u32 coal_param; /* self adapt coalesce param */
  504. /* the ring index of last ring that set coal param */
  505. u32 coal_ring_idx;
  506. u32 eport_id;
  507. u32 dport_id; /* v2 tx bd should fill the dport_id */
  508. bool coal_adapt_en;
  509. enum hnae_port_type port_type;
  510. enum hnae_media_type media_type;
  511. struct list_head node; /* list to hnae_ae_dev->handle_list */
  512. struct hnae_buf_ops *bops; /* operation for the buffer */
  513. struct hnae_queue **qs; /* array base of all queues */
  514. };
  515. #define ring_to_dev(ring) ((ring)->q->dev->dev)
  516. struct hnae_handle *hnae_get_handle(struct device *owner_dev,
  517. const struct fwnode_handle *fwnode,
  518. u32 port_id,
  519. struct hnae_buf_ops *bops);
  520. void hnae_put_handle(struct hnae_handle *handle);
  521. int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner);
  522. void hnae_ae_unregister(struct hnae_ae_dev *dev);
  523. int hnae_register_notifier(struct notifier_block *nb);
  524. void hnae_unregister_notifier(struct notifier_block *nb);
  525. int hnae_reinit_handle(struct hnae_handle *handle);
  526. #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \
  527. (q)->tx_ring.io_base + RCB_REG_TAIL)
  528. #ifndef assert
  529. #define assert(cond)
  530. #endif
  531. static inline int hnae_reserve_buffer_map(struct hnae_ring *ring,
  532. struct hnae_desc_cb *cb)
  533. {
  534. struct hnae_buf_ops *bops = ring->q->handle->bops;
  535. int ret;
  536. ret = bops->alloc_buffer(ring, cb);
  537. if (ret)
  538. goto out;
  539. ret = bops->map_buffer(ring, cb);
  540. if (ret)
  541. goto out_with_buf;
  542. return 0;
  543. out_with_buf:
  544. bops->free_buffer(ring, cb);
  545. out:
  546. return ret;
  547. }
  548. static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i)
  549. {
  550. int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]);
  551. if (ret)
  552. return ret;
  553. ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
  554. return 0;
  555. }
  556. static inline void hnae_buffer_detach(struct hnae_ring *ring, int i)
  557. {
  558. ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]);
  559. ring->desc[i].addr = 0;
  560. }
  561. static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i)
  562. {
  563. struct hnae_buf_ops *bops = ring->q->handle->bops;
  564. struct hnae_desc_cb *cb = &ring->desc_cb[i];
  565. if (!ring->desc_cb[i].dma)
  566. return;
  567. hnae_buffer_detach(ring, i);
  568. bops->free_buffer(ring, cb);
  569. }
  570. /* detach a in-used buffer and replace with a reserved one */
  571. static inline void hnae_replace_buffer(struct hnae_ring *ring, int i,
  572. struct hnae_desc_cb *res_cb)
  573. {
  574. struct hnae_buf_ops *bops = ring->q->handle->bops;
  575. bops->unmap_buffer(ring, &ring->desc_cb[i]);
  576. ring->desc_cb[i] = *res_cb;
  577. ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
  578. ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
  579. }
  580. static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i)
  581. {
  582. ring->desc_cb[i].reuse_flag = 0;
  583. ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
  584. + ring->desc_cb[i].page_offset);
  585. ring->desc[i].rx.ipoff_bnum_pid_flag = 0;
  586. }
  587. /* when reinit buffer size, we should reinit buffer description */
  588. static inline void hnae_reinit_all_ring_desc(struct hnae_handle *h)
  589. {
  590. int i, j;
  591. struct hnae_ring *ring;
  592. for (i = 0; i < h->q_num; i++) {
  593. ring = &h->qs[i]->rx_ring;
  594. for (j = 0; j < ring->desc_num; j++)
  595. ring->desc[j].addr = cpu_to_le64(ring->desc_cb[j].dma);
  596. }
  597. wmb(); /* commit all data before submit */
  598. }
  599. /* when reinit buffer size, we should reinit page offset */
  600. static inline void hnae_reinit_all_ring_page_off(struct hnae_handle *h)
  601. {
  602. int i, j;
  603. struct hnae_ring *ring;
  604. for (i = 0; i < h->q_num; i++) {
  605. ring = &h->qs[i]->rx_ring;
  606. for (j = 0; j < ring->desc_num; j++) {
  607. ring->desc_cb[j].page_offset = 0;
  608. if (ring->desc[j].addr !=
  609. cpu_to_le64(ring->desc_cb[j].dma))
  610. ring->desc[j].addr =
  611. cpu_to_le64(ring->desc_cb[j].dma);
  612. }
  613. }
  614. wmb(); /* commit all data before submit */
  615. }
  616. #define hnae_set_field(origin, mask, shift, val) \
  617. do { \
  618. (origin) &= (~(mask)); \
  619. (origin) |= ((val) << (shift)) & (mask); \
  620. } while (0)
  621. #define hnae_set_bit(origin, shift, val) \
  622. hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
  623. #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
  624. #define hnae_get_bit(origin, shift) \
  625. hnae_get_field((origin), (0x1 << (shift)), (shift))
  626. #endif