dpaa_eth.h 6.2 KB

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  1. /* Copyright 2008 - 2016 Freescale Semiconductor Inc.
  2. *
  3. * Redistribution and use in source and binary forms, with or without
  4. * modification, are permitted provided that the following conditions are met:
  5. * * Redistributions of source code must retain the above copyright
  6. * notice, this list of conditions and the following disclaimer.
  7. * * Redistributions in binary form must reproduce the above copyright
  8. * notice, this list of conditions and the following disclaimer in the
  9. * documentation and/or other materials provided with the distribution.
  10. * * Neither the name of Freescale Semiconductor nor the
  11. * names of its contributors may be used to endorse or promote products
  12. * derived from this software without specific prior written permission.
  13. *
  14. * ALTERNATIVELY, this software may be distributed under the terms of the
  15. * GNU General Public License ("GPL") as published by the Free Software
  16. * Foundation, either version 2 of that License or (at your option) any
  17. * later version.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  20. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  23. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #ifndef __DPAA_H
  31. #define __DPAA_H
  32. #include <linux/netdevice.h>
  33. #include <soc/fsl/qman.h>
  34. #include <soc/fsl/bman.h>
  35. #include "fman.h"
  36. #include "mac.h"
  37. #include "dpaa_eth_trace.h"
  38. /* Number of prioritised traffic classes */
  39. #define DPAA_TC_NUM 4
  40. /* Number of Tx queues per traffic class */
  41. #define DPAA_TC_TXQ_NUM NR_CPUS
  42. /* Total number of Tx queues */
  43. #define DPAA_ETH_TXQ_NUM (DPAA_TC_NUM * DPAA_TC_TXQ_NUM)
  44. #define DPAA_BPS_NUM 3 /* number of bpools per interface */
  45. /* More detailed FQ types - used for fine-grained WQ assignments */
  46. enum dpaa_fq_type {
  47. FQ_TYPE_RX_DEFAULT = 1, /* Rx Default FQs */
  48. FQ_TYPE_RX_ERROR, /* Rx Error FQs */
  49. FQ_TYPE_RX_PCD, /* Rx Parse Classify Distribute FQs */
  50. FQ_TYPE_TX, /* "Real" Tx FQs */
  51. FQ_TYPE_TX_CONFIRM, /* Tx default Conf FQ (actually an Rx FQ) */
  52. FQ_TYPE_TX_CONF_MQ, /* Tx conf FQs (one for each Tx FQ) */
  53. FQ_TYPE_TX_ERROR, /* Tx Error FQs (these are actually Rx FQs) */
  54. };
  55. struct dpaa_fq {
  56. struct qman_fq fq_base;
  57. struct list_head list;
  58. struct net_device *net_dev;
  59. bool init;
  60. u32 fqid;
  61. u32 flags;
  62. u16 channel;
  63. u8 wq;
  64. enum dpaa_fq_type fq_type;
  65. };
  66. struct dpaa_fq_cbs {
  67. struct qman_fq rx_defq;
  68. struct qman_fq tx_defq;
  69. struct qman_fq rx_errq;
  70. struct qman_fq tx_errq;
  71. struct qman_fq egress_ern;
  72. };
  73. struct dpaa_bp {
  74. /* device used in the DMA mapping operations */
  75. struct device *dev;
  76. /* current number of buffers in the buffer pool alloted to each CPU */
  77. int __percpu *percpu_count;
  78. /* all buffers allocated for this pool have this raw size */
  79. size_t raw_size;
  80. /* all buffers in this pool have this same usable size */
  81. size_t size;
  82. /* the buffer pools are initialized with config_count buffers for each
  83. * CPU; at runtime the number of buffers per CPU is constantly brought
  84. * back to this level
  85. */
  86. u16 config_count;
  87. u8 bpid;
  88. struct bman_pool *pool;
  89. /* bpool can be seeded before use by this cb */
  90. int (*seed_cb)(struct dpaa_bp *);
  91. /* bpool can be emptied before freeing by this cb */
  92. void (*free_buf_cb)(const struct dpaa_bp *, struct bm_buffer *);
  93. atomic_t refs;
  94. };
  95. struct dpaa_rx_errors {
  96. u64 dme; /* DMA Error */
  97. u64 fpe; /* Frame Physical Error */
  98. u64 fse; /* Frame Size Error */
  99. u64 phe; /* Header Error */
  100. };
  101. /* Counters for QMan ERN frames - one counter per rejection code */
  102. struct dpaa_ern_cnt {
  103. u64 cg_tdrop; /* Congestion group taildrop */
  104. u64 wred; /* WRED congestion */
  105. u64 err_cond; /* Error condition */
  106. u64 early_window; /* Order restoration, frame too early */
  107. u64 late_window; /* Order restoration, frame too late */
  108. u64 fq_tdrop; /* FQ taildrop */
  109. u64 fq_retired; /* FQ is retired */
  110. u64 orp_zero; /* ORP disabled */
  111. };
  112. struct dpaa_napi_portal {
  113. struct napi_struct napi;
  114. struct qman_portal *p;
  115. bool down;
  116. };
  117. struct dpaa_percpu_priv {
  118. struct net_device *net_dev;
  119. struct dpaa_napi_portal np;
  120. u64 in_interrupt;
  121. u64 tx_confirm;
  122. /* fragmented (non-linear) skbuffs received from the stack */
  123. u64 tx_frag_skbuffs;
  124. struct rtnl_link_stats64 stats;
  125. struct dpaa_rx_errors rx_errors;
  126. struct dpaa_ern_cnt ern_cnt;
  127. };
  128. struct dpaa_buffer_layout {
  129. u16 priv_data_size;
  130. };
  131. struct dpaa_priv {
  132. struct dpaa_percpu_priv __percpu *percpu_priv;
  133. struct dpaa_bp *dpaa_bps[DPAA_BPS_NUM];
  134. /* Store here the needed Tx headroom for convenience and speed
  135. * (even though it can be computed based on the fields of buf_layout)
  136. */
  137. u16 tx_headroom;
  138. struct net_device *net_dev;
  139. struct mac_device *mac_dev;
  140. struct qman_fq *egress_fqs[DPAA_ETH_TXQ_NUM];
  141. struct qman_fq *conf_fqs[DPAA_ETH_TXQ_NUM];
  142. u16 channel;
  143. struct list_head dpaa_fq_list;
  144. u8 num_tc;
  145. bool keygen_in_use;
  146. u32 msg_enable; /* net_device message level */
  147. struct {
  148. /* All egress queues to a given net device belong to one
  149. * (and the same) congestion group.
  150. */
  151. struct qman_cgr cgr;
  152. /* If congested, when it began. Used for performance stats. */
  153. u32 congestion_start_jiffies;
  154. /* Number of jiffies the Tx port was congested. */
  155. u32 congested_jiffies;
  156. /* Counter for the number of times the CGR
  157. * entered congestion state
  158. */
  159. u32 cgr_congested_count;
  160. } cgr_data;
  161. /* Use a per-port CGR for ingress traffic. */
  162. bool use_ingress_cgr;
  163. struct qman_cgr ingress_cgr;
  164. struct dpaa_buffer_layout buf_layout[2];
  165. u16 rx_headroom;
  166. bool tx_tstamp; /* Tx timestamping enabled */
  167. bool rx_tstamp; /* Rx timestamping enabled */
  168. };
  169. /* from dpaa_ethtool.c */
  170. extern const struct ethtool_ops dpaa_ethtool_ops;
  171. /* from dpaa_eth_sysfs.c */
  172. void dpaa_eth_sysfs_remove(struct device *dev);
  173. void dpaa_eth_sysfs_init(struct device *dev);
  174. #endif /* __DPAA_H */