greth.c 39 KB

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  1. /*
  2. * Aeroflex Gaisler GRETH 10/100/1G Ethernet MAC.
  3. *
  4. * 2005-2010 (c) Aeroflex Gaisler AB
  5. *
  6. * This driver supports GRETH 10/100 and GRETH 10/100/1G Ethernet MACs
  7. * available in the GRLIB VHDL IP core library.
  8. *
  9. * Full documentation of both cores can be found here:
  10. * http://www.gaisler.com/products/grlib/grip.pdf
  11. *
  12. * The Gigabit version supports scatter/gather DMA, any alignment of
  13. * buffers and checksum offloading.
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. *
  20. * Contributors: Kristoffer Glembo
  21. * Daniel Hellstrom
  22. * Marko Isomaki
  23. */
  24. #include <linux/dma-mapping.h>
  25. #include <linux/module.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/io.h>
  33. #include <linux/crc32.h>
  34. #include <linux/mii.h>
  35. #include <linux/of_device.h>
  36. #include <linux/of_net.h>
  37. #include <linux/of_platform.h>
  38. #include <linux/slab.h>
  39. #include <asm/cacheflush.h>
  40. #include <asm/byteorder.h>
  41. #ifdef CONFIG_SPARC
  42. #include <asm/idprom.h>
  43. #endif
  44. #include "greth.h"
  45. #define GRETH_DEF_MSG_ENABLE \
  46. (NETIF_MSG_DRV | \
  47. NETIF_MSG_PROBE | \
  48. NETIF_MSG_LINK | \
  49. NETIF_MSG_IFDOWN | \
  50. NETIF_MSG_IFUP | \
  51. NETIF_MSG_RX_ERR | \
  52. NETIF_MSG_TX_ERR)
  53. static int greth_debug = -1; /* -1 == use GRETH_DEF_MSG_ENABLE as value */
  54. module_param(greth_debug, int, 0);
  55. MODULE_PARM_DESC(greth_debug, "GRETH bitmapped debugging message enable value");
  56. /* Accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  57. static int macaddr[6];
  58. module_param_array(macaddr, int, NULL, 0);
  59. MODULE_PARM_DESC(macaddr, "GRETH Ethernet MAC address");
  60. static int greth_edcl = 1;
  61. module_param(greth_edcl, int, 0);
  62. MODULE_PARM_DESC(greth_edcl, "GRETH EDCL usage indicator. Set to 1 if EDCL is used.");
  63. static int greth_open(struct net_device *dev);
  64. static netdev_tx_t greth_start_xmit(struct sk_buff *skb,
  65. struct net_device *dev);
  66. static netdev_tx_t greth_start_xmit_gbit(struct sk_buff *skb,
  67. struct net_device *dev);
  68. static int greth_rx(struct net_device *dev, int limit);
  69. static int greth_rx_gbit(struct net_device *dev, int limit);
  70. static void greth_clean_tx(struct net_device *dev);
  71. static void greth_clean_tx_gbit(struct net_device *dev);
  72. static irqreturn_t greth_interrupt(int irq, void *dev_id);
  73. static int greth_close(struct net_device *dev);
  74. static int greth_set_mac_add(struct net_device *dev, void *p);
  75. static void greth_set_multicast_list(struct net_device *dev);
  76. #define GRETH_REGLOAD(a) (be32_to_cpu(__raw_readl(&(a))))
  77. #define GRETH_REGSAVE(a, v) (__raw_writel(cpu_to_be32(v), &(a)))
  78. #define GRETH_REGORIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) | (v))))
  79. #define GRETH_REGANDIN(a, v) (GRETH_REGSAVE(a, (GRETH_REGLOAD(a) & (v))))
  80. #define NEXT_TX(N) (((N) + 1) & GRETH_TXBD_NUM_MASK)
  81. #define SKIP_TX(N, C) (((N) + C) & GRETH_TXBD_NUM_MASK)
  82. #define NEXT_RX(N) (((N) + 1) & GRETH_RXBD_NUM_MASK)
  83. static void greth_print_rx_packet(void *addr, int len)
  84. {
  85. print_hex_dump(KERN_DEBUG, "RX: ", DUMP_PREFIX_OFFSET, 16, 1,
  86. addr, len, true);
  87. }
  88. static void greth_print_tx_packet(struct sk_buff *skb)
  89. {
  90. int i;
  91. int length;
  92. if (skb_shinfo(skb)->nr_frags == 0)
  93. length = skb->len;
  94. else
  95. length = skb_headlen(skb);
  96. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  97. skb->data, length, true);
  98. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  99. print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,
  100. skb_frag_address(&skb_shinfo(skb)->frags[i]),
  101. skb_shinfo(skb)->frags[i].size, true);
  102. }
  103. }
  104. static inline void greth_enable_tx(struct greth_private *greth)
  105. {
  106. wmb();
  107. GRETH_REGORIN(greth->regs->control, GRETH_TXEN);
  108. }
  109. static inline void greth_enable_tx_and_irq(struct greth_private *greth)
  110. {
  111. wmb(); /* BDs must been written to memory before enabling TX */
  112. GRETH_REGORIN(greth->regs->control, GRETH_TXEN | GRETH_TXI);
  113. }
  114. static inline void greth_disable_tx(struct greth_private *greth)
  115. {
  116. GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN);
  117. }
  118. static inline void greth_enable_rx(struct greth_private *greth)
  119. {
  120. wmb();
  121. GRETH_REGORIN(greth->regs->control, GRETH_RXEN);
  122. }
  123. static inline void greth_disable_rx(struct greth_private *greth)
  124. {
  125. GRETH_REGANDIN(greth->regs->control, ~GRETH_RXEN);
  126. }
  127. static inline void greth_enable_irqs(struct greth_private *greth)
  128. {
  129. GRETH_REGORIN(greth->regs->control, GRETH_RXI | GRETH_TXI);
  130. }
  131. static inline void greth_disable_irqs(struct greth_private *greth)
  132. {
  133. GRETH_REGANDIN(greth->regs->control, ~(GRETH_RXI|GRETH_TXI));
  134. }
  135. static inline void greth_write_bd(u32 *bd, u32 val)
  136. {
  137. __raw_writel(cpu_to_be32(val), bd);
  138. }
  139. static inline u32 greth_read_bd(u32 *bd)
  140. {
  141. return be32_to_cpu(__raw_readl(bd));
  142. }
  143. static void greth_clean_rings(struct greth_private *greth)
  144. {
  145. int i;
  146. struct greth_bd *rx_bdp = greth->rx_bd_base;
  147. struct greth_bd *tx_bdp = greth->tx_bd_base;
  148. if (greth->gbit_mac) {
  149. /* Free and unmap RX buffers */
  150. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  151. if (greth->rx_skbuff[i] != NULL) {
  152. dev_kfree_skb(greth->rx_skbuff[i]);
  153. dma_unmap_single(greth->dev,
  154. greth_read_bd(&rx_bdp->addr),
  155. MAX_FRAME_SIZE+NET_IP_ALIGN,
  156. DMA_FROM_DEVICE);
  157. }
  158. }
  159. /* TX buffers */
  160. while (greth->tx_free < GRETH_TXBD_NUM) {
  161. struct sk_buff *skb = greth->tx_skbuff[greth->tx_last];
  162. int nr_frags = skb_shinfo(skb)->nr_frags;
  163. tx_bdp = greth->tx_bd_base + greth->tx_last;
  164. greth->tx_last = NEXT_TX(greth->tx_last);
  165. dma_unmap_single(greth->dev,
  166. greth_read_bd(&tx_bdp->addr),
  167. skb_headlen(skb),
  168. DMA_TO_DEVICE);
  169. for (i = 0; i < nr_frags; i++) {
  170. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  171. tx_bdp = greth->tx_bd_base + greth->tx_last;
  172. dma_unmap_page(greth->dev,
  173. greth_read_bd(&tx_bdp->addr),
  174. skb_frag_size(frag),
  175. DMA_TO_DEVICE);
  176. greth->tx_last = NEXT_TX(greth->tx_last);
  177. }
  178. greth->tx_free += nr_frags+1;
  179. dev_kfree_skb(skb);
  180. }
  181. } else { /* 10/100 Mbps MAC */
  182. for (i = 0; i < GRETH_RXBD_NUM; i++, rx_bdp++) {
  183. kfree(greth->rx_bufs[i]);
  184. dma_unmap_single(greth->dev,
  185. greth_read_bd(&rx_bdp->addr),
  186. MAX_FRAME_SIZE,
  187. DMA_FROM_DEVICE);
  188. }
  189. for (i = 0; i < GRETH_TXBD_NUM; i++, tx_bdp++) {
  190. kfree(greth->tx_bufs[i]);
  191. dma_unmap_single(greth->dev,
  192. greth_read_bd(&tx_bdp->addr),
  193. MAX_FRAME_SIZE,
  194. DMA_TO_DEVICE);
  195. }
  196. }
  197. }
  198. static int greth_init_rings(struct greth_private *greth)
  199. {
  200. struct sk_buff *skb;
  201. struct greth_bd *rx_bd, *tx_bd;
  202. u32 dma_addr;
  203. int i;
  204. rx_bd = greth->rx_bd_base;
  205. tx_bd = greth->tx_bd_base;
  206. /* Initialize descriptor rings and buffers */
  207. if (greth->gbit_mac) {
  208. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  209. skb = netdev_alloc_skb(greth->netdev, MAX_FRAME_SIZE+NET_IP_ALIGN);
  210. if (skb == NULL) {
  211. if (netif_msg_ifup(greth))
  212. dev_err(greth->dev, "Error allocating DMA ring.\n");
  213. goto cleanup;
  214. }
  215. skb_reserve(skb, NET_IP_ALIGN);
  216. dma_addr = dma_map_single(greth->dev,
  217. skb->data,
  218. MAX_FRAME_SIZE+NET_IP_ALIGN,
  219. DMA_FROM_DEVICE);
  220. if (dma_mapping_error(greth->dev, dma_addr)) {
  221. if (netif_msg_ifup(greth))
  222. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  223. goto cleanup;
  224. }
  225. greth->rx_skbuff[i] = skb;
  226. greth_write_bd(&rx_bd[i].addr, dma_addr);
  227. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  228. }
  229. } else {
  230. /* 10/100 MAC uses a fixed set of buffers and copy to/from SKBs */
  231. for (i = 0; i < GRETH_RXBD_NUM; i++) {
  232. greth->rx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  233. if (greth->rx_bufs[i] == NULL) {
  234. if (netif_msg_ifup(greth))
  235. dev_err(greth->dev, "Error allocating DMA ring.\n");
  236. goto cleanup;
  237. }
  238. dma_addr = dma_map_single(greth->dev,
  239. greth->rx_bufs[i],
  240. MAX_FRAME_SIZE,
  241. DMA_FROM_DEVICE);
  242. if (dma_mapping_error(greth->dev, dma_addr)) {
  243. if (netif_msg_ifup(greth))
  244. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  245. goto cleanup;
  246. }
  247. greth_write_bd(&rx_bd[i].addr, dma_addr);
  248. greth_write_bd(&rx_bd[i].stat, GRETH_BD_EN | GRETH_BD_IE);
  249. }
  250. for (i = 0; i < GRETH_TXBD_NUM; i++) {
  251. greth->tx_bufs[i] = kmalloc(MAX_FRAME_SIZE, GFP_KERNEL);
  252. if (greth->tx_bufs[i] == NULL) {
  253. if (netif_msg_ifup(greth))
  254. dev_err(greth->dev, "Error allocating DMA ring.\n");
  255. goto cleanup;
  256. }
  257. dma_addr = dma_map_single(greth->dev,
  258. greth->tx_bufs[i],
  259. MAX_FRAME_SIZE,
  260. DMA_TO_DEVICE);
  261. if (dma_mapping_error(greth->dev, dma_addr)) {
  262. if (netif_msg_ifup(greth))
  263. dev_err(greth->dev, "Could not create initial DMA mapping\n");
  264. goto cleanup;
  265. }
  266. greth_write_bd(&tx_bd[i].addr, dma_addr);
  267. greth_write_bd(&tx_bd[i].stat, 0);
  268. }
  269. }
  270. greth_write_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat,
  271. greth_read_bd(&rx_bd[GRETH_RXBD_NUM - 1].stat) | GRETH_BD_WR);
  272. /* Initialize pointers. */
  273. greth->rx_cur = 0;
  274. greth->tx_next = 0;
  275. greth->tx_last = 0;
  276. greth->tx_free = GRETH_TXBD_NUM;
  277. /* Initialize descriptor base address */
  278. GRETH_REGSAVE(greth->regs->tx_desc_p, greth->tx_bd_base_phys);
  279. GRETH_REGSAVE(greth->regs->rx_desc_p, greth->rx_bd_base_phys);
  280. return 0;
  281. cleanup:
  282. greth_clean_rings(greth);
  283. return -ENOMEM;
  284. }
  285. static int greth_open(struct net_device *dev)
  286. {
  287. struct greth_private *greth = netdev_priv(dev);
  288. int err;
  289. err = greth_init_rings(greth);
  290. if (err) {
  291. if (netif_msg_ifup(greth))
  292. dev_err(&dev->dev, "Could not allocate memory for DMA rings\n");
  293. return err;
  294. }
  295. err = request_irq(greth->irq, greth_interrupt, 0, "eth", (void *) dev);
  296. if (err) {
  297. if (netif_msg_ifup(greth))
  298. dev_err(&dev->dev, "Could not allocate interrupt %d\n", dev->irq);
  299. greth_clean_rings(greth);
  300. return err;
  301. }
  302. if (netif_msg_ifup(greth))
  303. dev_dbg(&dev->dev, " starting queue\n");
  304. netif_start_queue(dev);
  305. GRETH_REGSAVE(greth->regs->status, 0xFF);
  306. napi_enable(&greth->napi);
  307. greth_enable_irqs(greth);
  308. greth_enable_tx(greth);
  309. greth_enable_rx(greth);
  310. return 0;
  311. }
  312. static int greth_close(struct net_device *dev)
  313. {
  314. struct greth_private *greth = netdev_priv(dev);
  315. napi_disable(&greth->napi);
  316. greth_disable_irqs(greth);
  317. greth_disable_tx(greth);
  318. greth_disable_rx(greth);
  319. netif_stop_queue(dev);
  320. free_irq(greth->irq, (void *) dev);
  321. greth_clean_rings(greth);
  322. return 0;
  323. }
  324. static netdev_tx_t
  325. greth_start_xmit(struct sk_buff *skb, struct net_device *dev)
  326. {
  327. struct greth_private *greth = netdev_priv(dev);
  328. struct greth_bd *bdp;
  329. int err = NETDEV_TX_OK;
  330. u32 status, dma_addr, ctrl;
  331. unsigned long flags;
  332. /* Clean TX Ring */
  333. greth_clean_tx(greth->netdev);
  334. if (unlikely(greth->tx_free <= 0)) {
  335. spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/
  336. ctrl = GRETH_REGLOAD(greth->regs->control);
  337. /* Enable TX IRQ only if not already in poll() routine */
  338. if (ctrl & GRETH_RXI)
  339. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI);
  340. netif_stop_queue(dev);
  341. spin_unlock_irqrestore(&greth->devlock, flags);
  342. return NETDEV_TX_BUSY;
  343. }
  344. if (netif_msg_pktdata(greth))
  345. greth_print_tx_packet(skb);
  346. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  347. dev->stats.tx_errors++;
  348. goto out;
  349. }
  350. bdp = greth->tx_bd_base + greth->tx_next;
  351. dma_addr = greth_read_bd(&bdp->addr);
  352. memcpy((unsigned char *) phys_to_virt(dma_addr), skb->data, skb->len);
  353. dma_sync_single_for_device(greth->dev, dma_addr, skb->len, DMA_TO_DEVICE);
  354. status = GRETH_BD_EN | GRETH_BD_IE | (skb->len & GRETH_BD_LEN);
  355. greth->tx_bufs_length[greth->tx_next] = skb->len & GRETH_BD_LEN;
  356. /* Wrap around descriptor ring */
  357. if (greth->tx_next == GRETH_TXBD_NUM_MASK) {
  358. status |= GRETH_BD_WR;
  359. }
  360. greth->tx_next = NEXT_TX(greth->tx_next);
  361. greth->tx_free--;
  362. /* Write descriptor control word and enable transmission */
  363. greth_write_bd(&bdp->stat, status);
  364. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  365. greth_enable_tx(greth);
  366. spin_unlock_irqrestore(&greth->devlock, flags);
  367. out:
  368. dev_kfree_skb(skb);
  369. return err;
  370. }
  371. static inline u16 greth_num_free_bds(u16 tx_last, u16 tx_next)
  372. {
  373. if (tx_next < tx_last)
  374. return (tx_last - tx_next) - 1;
  375. else
  376. return GRETH_TXBD_NUM - (tx_next - tx_last) - 1;
  377. }
  378. static netdev_tx_t
  379. greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev)
  380. {
  381. struct greth_private *greth = netdev_priv(dev);
  382. struct greth_bd *bdp;
  383. u32 status, dma_addr;
  384. int curr_tx, nr_frags, i, err = NETDEV_TX_OK;
  385. unsigned long flags;
  386. u16 tx_last;
  387. nr_frags = skb_shinfo(skb)->nr_frags;
  388. tx_last = greth->tx_last;
  389. rmb(); /* tx_last is updated by the poll task */
  390. if (greth_num_free_bds(tx_last, greth->tx_next) < nr_frags + 1) {
  391. netif_stop_queue(dev);
  392. err = NETDEV_TX_BUSY;
  393. goto out;
  394. }
  395. if (netif_msg_pktdata(greth))
  396. greth_print_tx_packet(skb);
  397. if (unlikely(skb->len > MAX_FRAME_SIZE)) {
  398. dev->stats.tx_errors++;
  399. goto out;
  400. }
  401. /* Save skb pointer. */
  402. greth->tx_skbuff[greth->tx_next] = skb;
  403. /* Linear buf */
  404. if (nr_frags != 0)
  405. status = GRETH_TXBD_MORE;
  406. else
  407. status = GRETH_BD_IE;
  408. if (skb->ip_summed == CHECKSUM_PARTIAL)
  409. status |= GRETH_TXBD_CSALL;
  410. status |= skb_headlen(skb) & GRETH_BD_LEN;
  411. if (greth->tx_next == GRETH_TXBD_NUM_MASK)
  412. status |= GRETH_BD_WR;
  413. bdp = greth->tx_bd_base + greth->tx_next;
  414. greth_write_bd(&bdp->stat, status);
  415. dma_addr = dma_map_single(greth->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  416. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  417. goto map_error;
  418. greth_write_bd(&bdp->addr, dma_addr);
  419. curr_tx = NEXT_TX(greth->tx_next);
  420. /* Frags */
  421. for (i = 0; i < nr_frags; i++) {
  422. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  423. greth->tx_skbuff[curr_tx] = NULL;
  424. bdp = greth->tx_bd_base + curr_tx;
  425. status = GRETH_BD_EN;
  426. if (skb->ip_summed == CHECKSUM_PARTIAL)
  427. status |= GRETH_TXBD_CSALL;
  428. status |= skb_frag_size(frag) & GRETH_BD_LEN;
  429. /* Wrap around descriptor ring */
  430. if (curr_tx == GRETH_TXBD_NUM_MASK)
  431. status |= GRETH_BD_WR;
  432. /* More fragments left */
  433. if (i < nr_frags - 1)
  434. status |= GRETH_TXBD_MORE;
  435. else
  436. status |= GRETH_BD_IE; /* enable IRQ on last fragment */
  437. greth_write_bd(&bdp->stat, status);
  438. dma_addr = skb_frag_dma_map(greth->dev, frag, 0, skb_frag_size(frag),
  439. DMA_TO_DEVICE);
  440. if (unlikely(dma_mapping_error(greth->dev, dma_addr)))
  441. goto frag_map_error;
  442. greth_write_bd(&bdp->addr, dma_addr);
  443. curr_tx = NEXT_TX(curr_tx);
  444. }
  445. wmb();
  446. /* Enable the descriptor chain by enabling the first descriptor */
  447. bdp = greth->tx_bd_base + greth->tx_next;
  448. greth_write_bd(&bdp->stat,
  449. greth_read_bd(&bdp->stat) | GRETH_BD_EN);
  450. spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/
  451. greth->tx_next = curr_tx;
  452. greth_enable_tx_and_irq(greth);
  453. spin_unlock_irqrestore(&greth->devlock, flags);
  454. return NETDEV_TX_OK;
  455. frag_map_error:
  456. /* Unmap SKB mappings that succeeded and disable descriptor */
  457. for (i = 0; greth->tx_next + i != curr_tx; i++) {
  458. bdp = greth->tx_bd_base + greth->tx_next + i;
  459. dma_unmap_single(greth->dev,
  460. greth_read_bd(&bdp->addr),
  461. greth_read_bd(&bdp->stat) & GRETH_BD_LEN,
  462. DMA_TO_DEVICE);
  463. greth_write_bd(&bdp->stat, 0);
  464. }
  465. map_error:
  466. if (net_ratelimit())
  467. dev_warn(greth->dev, "Could not create TX DMA mapping\n");
  468. dev_kfree_skb(skb);
  469. out:
  470. return err;
  471. }
  472. static irqreturn_t greth_interrupt(int irq, void *dev_id)
  473. {
  474. struct net_device *dev = dev_id;
  475. struct greth_private *greth;
  476. u32 status, ctrl;
  477. irqreturn_t retval = IRQ_NONE;
  478. greth = netdev_priv(dev);
  479. spin_lock(&greth->devlock);
  480. /* Get the interrupt events that caused us to be here. */
  481. status = GRETH_REGLOAD(greth->regs->status);
  482. /* Must see if interrupts are enabled also, INT_TX|INT_RX flags may be
  483. * set regardless of whether IRQ is enabled or not. Especially
  484. * important when shared IRQ.
  485. */
  486. ctrl = GRETH_REGLOAD(greth->regs->control);
  487. /* Handle rx and tx interrupts through poll */
  488. if (((status & (GRETH_INT_RE | GRETH_INT_RX)) && (ctrl & GRETH_RXI)) ||
  489. ((status & (GRETH_INT_TE | GRETH_INT_TX)) && (ctrl & GRETH_TXI))) {
  490. retval = IRQ_HANDLED;
  491. /* Disable interrupts and schedule poll() */
  492. greth_disable_irqs(greth);
  493. napi_schedule(&greth->napi);
  494. }
  495. mmiowb();
  496. spin_unlock(&greth->devlock);
  497. return retval;
  498. }
  499. static void greth_clean_tx(struct net_device *dev)
  500. {
  501. struct greth_private *greth;
  502. struct greth_bd *bdp;
  503. u32 stat;
  504. greth = netdev_priv(dev);
  505. while (1) {
  506. bdp = greth->tx_bd_base + greth->tx_last;
  507. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  508. mb();
  509. stat = greth_read_bd(&bdp->stat);
  510. if (unlikely(stat & GRETH_BD_EN))
  511. break;
  512. if (greth->tx_free == GRETH_TXBD_NUM)
  513. break;
  514. /* Check status for errors */
  515. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  516. dev->stats.tx_errors++;
  517. if (stat & GRETH_TXBD_ERR_AL)
  518. dev->stats.tx_aborted_errors++;
  519. if (stat & GRETH_TXBD_ERR_UE)
  520. dev->stats.tx_fifo_errors++;
  521. }
  522. dev->stats.tx_packets++;
  523. dev->stats.tx_bytes += greth->tx_bufs_length[greth->tx_last];
  524. greth->tx_last = NEXT_TX(greth->tx_last);
  525. greth->tx_free++;
  526. }
  527. if (greth->tx_free > 0) {
  528. netif_wake_queue(dev);
  529. }
  530. }
  531. static inline void greth_update_tx_stats(struct net_device *dev, u32 stat)
  532. {
  533. /* Check status for errors */
  534. if (unlikely(stat & GRETH_TXBD_STATUS)) {
  535. dev->stats.tx_errors++;
  536. if (stat & GRETH_TXBD_ERR_AL)
  537. dev->stats.tx_aborted_errors++;
  538. if (stat & GRETH_TXBD_ERR_UE)
  539. dev->stats.tx_fifo_errors++;
  540. if (stat & GRETH_TXBD_ERR_LC)
  541. dev->stats.tx_aborted_errors++;
  542. }
  543. dev->stats.tx_packets++;
  544. }
  545. static void greth_clean_tx_gbit(struct net_device *dev)
  546. {
  547. struct greth_private *greth;
  548. struct greth_bd *bdp, *bdp_last_frag;
  549. struct sk_buff *skb = NULL;
  550. u32 stat;
  551. int nr_frags, i;
  552. u16 tx_last;
  553. greth = netdev_priv(dev);
  554. tx_last = greth->tx_last;
  555. while (tx_last != greth->tx_next) {
  556. skb = greth->tx_skbuff[tx_last];
  557. nr_frags = skb_shinfo(skb)->nr_frags;
  558. /* We only clean fully completed SKBs */
  559. bdp_last_frag = greth->tx_bd_base + SKIP_TX(tx_last, nr_frags);
  560. GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX);
  561. mb();
  562. stat = greth_read_bd(&bdp_last_frag->stat);
  563. if (stat & GRETH_BD_EN)
  564. break;
  565. greth->tx_skbuff[tx_last] = NULL;
  566. greth_update_tx_stats(dev, stat);
  567. dev->stats.tx_bytes += skb->len;
  568. bdp = greth->tx_bd_base + tx_last;
  569. tx_last = NEXT_TX(tx_last);
  570. dma_unmap_single(greth->dev,
  571. greth_read_bd(&bdp->addr),
  572. skb_headlen(skb),
  573. DMA_TO_DEVICE);
  574. for (i = 0; i < nr_frags; i++) {
  575. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  576. bdp = greth->tx_bd_base + tx_last;
  577. dma_unmap_page(greth->dev,
  578. greth_read_bd(&bdp->addr),
  579. skb_frag_size(frag),
  580. DMA_TO_DEVICE);
  581. tx_last = NEXT_TX(tx_last);
  582. }
  583. dev_kfree_skb(skb);
  584. }
  585. if (skb) { /* skb is set only if the above while loop was entered */
  586. wmb();
  587. greth->tx_last = tx_last;
  588. if (netif_queue_stopped(dev) &&
  589. (greth_num_free_bds(tx_last, greth->tx_next) >
  590. (MAX_SKB_FRAGS+1)))
  591. netif_wake_queue(dev);
  592. }
  593. }
  594. static int greth_rx(struct net_device *dev, int limit)
  595. {
  596. struct greth_private *greth;
  597. struct greth_bd *bdp;
  598. struct sk_buff *skb;
  599. int pkt_len;
  600. int bad, count;
  601. u32 status, dma_addr;
  602. unsigned long flags;
  603. greth = netdev_priv(dev);
  604. for (count = 0; count < limit; ++count) {
  605. bdp = greth->rx_bd_base + greth->rx_cur;
  606. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  607. mb();
  608. status = greth_read_bd(&bdp->stat);
  609. if (unlikely(status & GRETH_BD_EN)) {
  610. break;
  611. }
  612. dma_addr = greth_read_bd(&bdp->addr);
  613. bad = 0;
  614. /* Check status for errors. */
  615. if (unlikely(status & GRETH_RXBD_STATUS)) {
  616. if (status & GRETH_RXBD_ERR_FT) {
  617. dev->stats.rx_length_errors++;
  618. bad = 1;
  619. }
  620. if (status & (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE)) {
  621. dev->stats.rx_frame_errors++;
  622. bad = 1;
  623. }
  624. if (status & GRETH_RXBD_ERR_CRC) {
  625. dev->stats.rx_crc_errors++;
  626. bad = 1;
  627. }
  628. }
  629. if (unlikely(bad)) {
  630. dev->stats.rx_errors++;
  631. } else {
  632. pkt_len = status & GRETH_BD_LEN;
  633. skb = netdev_alloc_skb(dev, pkt_len + NET_IP_ALIGN);
  634. if (unlikely(skb == NULL)) {
  635. if (net_ratelimit())
  636. dev_warn(&dev->dev, "low on memory - " "packet dropped\n");
  637. dev->stats.rx_dropped++;
  638. } else {
  639. skb_reserve(skb, NET_IP_ALIGN);
  640. dma_sync_single_for_cpu(greth->dev,
  641. dma_addr,
  642. pkt_len,
  643. DMA_FROM_DEVICE);
  644. if (netif_msg_pktdata(greth))
  645. greth_print_rx_packet(phys_to_virt(dma_addr), pkt_len);
  646. skb_put_data(skb, phys_to_virt(dma_addr),
  647. pkt_len);
  648. skb->protocol = eth_type_trans(skb, dev);
  649. dev->stats.rx_bytes += pkt_len;
  650. dev->stats.rx_packets++;
  651. netif_receive_skb(skb);
  652. }
  653. }
  654. status = GRETH_BD_EN | GRETH_BD_IE;
  655. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  656. status |= GRETH_BD_WR;
  657. }
  658. wmb();
  659. greth_write_bd(&bdp->stat, status);
  660. dma_sync_single_for_device(greth->dev, dma_addr, MAX_FRAME_SIZE, DMA_FROM_DEVICE);
  661. spin_lock_irqsave(&greth->devlock, flags); /* save from XMIT */
  662. greth_enable_rx(greth);
  663. spin_unlock_irqrestore(&greth->devlock, flags);
  664. greth->rx_cur = NEXT_RX(greth->rx_cur);
  665. }
  666. return count;
  667. }
  668. static inline int hw_checksummed(u32 status)
  669. {
  670. if (status & GRETH_RXBD_IP_FRAG)
  671. return 0;
  672. if (status & GRETH_RXBD_IP && status & GRETH_RXBD_IP_CSERR)
  673. return 0;
  674. if (status & GRETH_RXBD_UDP && status & GRETH_RXBD_UDP_CSERR)
  675. return 0;
  676. if (status & GRETH_RXBD_TCP && status & GRETH_RXBD_TCP_CSERR)
  677. return 0;
  678. return 1;
  679. }
  680. static int greth_rx_gbit(struct net_device *dev, int limit)
  681. {
  682. struct greth_private *greth;
  683. struct greth_bd *bdp;
  684. struct sk_buff *skb, *newskb;
  685. int pkt_len;
  686. int bad, count = 0;
  687. u32 status, dma_addr;
  688. unsigned long flags;
  689. greth = netdev_priv(dev);
  690. for (count = 0; count < limit; ++count) {
  691. bdp = greth->rx_bd_base + greth->rx_cur;
  692. skb = greth->rx_skbuff[greth->rx_cur];
  693. GRETH_REGSAVE(greth->regs->status, GRETH_INT_RE | GRETH_INT_RX);
  694. mb();
  695. status = greth_read_bd(&bdp->stat);
  696. bad = 0;
  697. if (status & GRETH_BD_EN)
  698. break;
  699. /* Check status for errors. */
  700. if (unlikely(status & GRETH_RXBD_STATUS)) {
  701. if (status & GRETH_RXBD_ERR_FT) {
  702. dev->stats.rx_length_errors++;
  703. bad = 1;
  704. } else if (status &
  705. (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_OE | GRETH_RXBD_ERR_LE)) {
  706. dev->stats.rx_frame_errors++;
  707. bad = 1;
  708. } else if (status & GRETH_RXBD_ERR_CRC) {
  709. dev->stats.rx_crc_errors++;
  710. bad = 1;
  711. }
  712. }
  713. /* Allocate new skb to replace current, not needed if the
  714. * current skb can be reused */
  715. if (!bad && (newskb=netdev_alloc_skb(dev, MAX_FRAME_SIZE + NET_IP_ALIGN))) {
  716. skb_reserve(newskb, NET_IP_ALIGN);
  717. dma_addr = dma_map_single(greth->dev,
  718. newskb->data,
  719. MAX_FRAME_SIZE + NET_IP_ALIGN,
  720. DMA_FROM_DEVICE);
  721. if (!dma_mapping_error(greth->dev, dma_addr)) {
  722. /* Process the incoming frame. */
  723. pkt_len = status & GRETH_BD_LEN;
  724. dma_unmap_single(greth->dev,
  725. greth_read_bd(&bdp->addr),
  726. MAX_FRAME_SIZE + NET_IP_ALIGN,
  727. DMA_FROM_DEVICE);
  728. if (netif_msg_pktdata(greth))
  729. greth_print_rx_packet(phys_to_virt(greth_read_bd(&bdp->addr)), pkt_len);
  730. skb_put(skb, pkt_len);
  731. if (dev->features & NETIF_F_RXCSUM && hw_checksummed(status))
  732. skb->ip_summed = CHECKSUM_UNNECESSARY;
  733. else
  734. skb_checksum_none_assert(skb);
  735. skb->protocol = eth_type_trans(skb, dev);
  736. dev->stats.rx_packets++;
  737. dev->stats.rx_bytes += pkt_len;
  738. netif_receive_skb(skb);
  739. greth->rx_skbuff[greth->rx_cur] = newskb;
  740. greth_write_bd(&bdp->addr, dma_addr);
  741. } else {
  742. if (net_ratelimit())
  743. dev_warn(greth->dev, "Could not create DMA mapping, dropping packet\n");
  744. dev_kfree_skb(newskb);
  745. /* reusing current skb, so it is a drop */
  746. dev->stats.rx_dropped++;
  747. }
  748. } else if (bad) {
  749. /* Bad Frame transfer, the skb is reused */
  750. dev->stats.rx_dropped++;
  751. } else {
  752. /* Failed Allocating a new skb. This is rather stupid
  753. * but the current "filled" skb is reused, as if
  754. * transfer failure. One could argue that RX descriptor
  755. * table handling should be divided into cleaning and
  756. * filling as the TX part of the driver
  757. */
  758. if (net_ratelimit())
  759. dev_warn(greth->dev, "Could not allocate SKB, dropping packet\n");
  760. /* reusing current skb, so it is a drop */
  761. dev->stats.rx_dropped++;
  762. }
  763. status = GRETH_BD_EN | GRETH_BD_IE;
  764. if (greth->rx_cur == GRETH_RXBD_NUM_MASK) {
  765. status |= GRETH_BD_WR;
  766. }
  767. wmb();
  768. greth_write_bd(&bdp->stat, status);
  769. spin_lock_irqsave(&greth->devlock, flags);
  770. greth_enable_rx(greth);
  771. spin_unlock_irqrestore(&greth->devlock, flags);
  772. greth->rx_cur = NEXT_RX(greth->rx_cur);
  773. }
  774. return count;
  775. }
  776. static int greth_poll(struct napi_struct *napi, int budget)
  777. {
  778. struct greth_private *greth;
  779. int work_done = 0;
  780. unsigned long flags;
  781. u32 mask, ctrl;
  782. greth = container_of(napi, struct greth_private, napi);
  783. restart_txrx_poll:
  784. if (greth->gbit_mac) {
  785. greth_clean_tx_gbit(greth->netdev);
  786. work_done += greth_rx_gbit(greth->netdev, budget - work_done);
  787. } else {
  788. if (netif_queue_stopped(greth->netdev))
  789. greth_clean_tx(greth->netdev);
  790. work_done += greth_rx(greth->netdev, budget - work_done);
  791. }
  792. if (work_done < budget) {
  793. spin_lock_irqsave(&greth->devlock, flags);
  794. ctrl = GRETH_REGLOAD(greth->regs->control);
  795. if ((greth->gbit_mac && (greth->tx_last != greth->tx_next)) ||
  796. (!greth->gbit_mac && netif_queue_stopped(greth->netdev))) {
  797. GRETH_REGSAVE(greth->regs->control,
  798. ctrl | GRETH_TXI | GRETH_RXI);
  799. mask = GRETH_INT_RX | GRETH_INT_RE |
  800. GRETH_INT_TX | GRETH_INT_TE;
  801. } else {
  802. GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_RXI);
  803. mask = GRETH_INT_RX | GRETH_INT_RE;
  804. }
  805. if (GRETH_REGLOAD(greth->regs->status) & mask) {
  806. GRETH_REGSAVE(greth->regs->control, ctrl);
  807. spin_unlock_irqrestore(&greth->devlock, flags);
  808. goto restart_txrx_poll;
  809. } else {
  810. napi_complete_done(napi, work_done);
  811. spin_unlock_irqrestore(&greth->devlock, flags);
  812. }
  813. }
  814. return work_done;
  815. }
  816. static int greth_set_mac_add(struct net_device *dev, void *p)
  817. {
  818. struct sockaddr *addr = p;
  819. struct greth_private *greth;
  820. struct greth_regs *regs;
  821. greth = netdev_priv(dev);
  822. regs = greth->regs;
  823. if (!is_valid_ether_addr(addr->sa_data))
  824. return -EADDRNOTAVAIL;
  825. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  826. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  827. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  828. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  829. return 0;
  830. }
  831. static u32 greth_hash_get_index(__u8 *addr)
  832. {
  833. return (ether_crc(6, addr)) & 0x3F;
  834. }
  835. static void greth_set_hash_filter(struct net_device *dev)
  836. {
  837. struct netdev_hw_addr *ha;
  838. struct greth_private *greth = netdev_priv(dev);
  839. struct greth_regs *regs = greth->regs;
  840. u32 mc_filter[2];
  841. unsigned int bitnr;
  842. mc_filter[0] = mc_filter[1] = 0;
  843. netdev_for_each_mc_addr(ha, dev) {
  844. bitnr = greth_hash_get_index(ha->addr);
  845. mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
  846. }
  847. GRETH_REGSAVE(regs->hash_msb, mc_filter[1]);
  848. GRETH_REGSAVE(regs->hash_lsb, mc_filter[0]);
  849. }
  850. static void greth_set_multicast_list(struct net_device *dev)
  851. {
  852. int cfg;
  853. struct greth_private *greth = netdev_priv(dev);
  854. struct greth_regs *regs = greth->regs;
  855. cfg = GRETH_REGLOAD(regs->control);
  856. if (dev->flags & IFF_PROMISC)
  857. cfg |= GRETH_CTRL_PR;
  858. else
  859. cfg &= ~GRETH_CTRL_PR;
  860. if (greth->multicast) {
  861. if (dev->flags & IFF_ALLMULTI) {
  862. GRETH_REGSAVE(regs->hash_msb, -1);
  863. GRETH_REGSAVE(regs->hash_lsb, -1);
  864. cfg |= GRETH_CTRL_MCEN;
  865. GRETH_REGSAVE(regs->control, cfg);
  866. return;
  867. }
  868. if (netdev_mc_empty(dev)) {
  869. cfg &= ~GRETH_CTRL_MCEN;
  870. GRETH_REGSAVE(regs->control, cfg);
  871. return;
  872. }
  873. /* Setup multicast filter */
  874. greth_set_hash_filter(dev);
  875. cfg |= GRETH_CTRL_MCEN;
  876. }
  877. GRETH_REGSAVE(regs->control, cfg);
  878. }
  879. static u32 greth_get_msglevel(struct net_device *dev)
  880. {
  881. struct greth_private *greth = netdev_priv(dev);
  882. return greth->msg_enable;
  883. }
  884. static void greth_set_msglevel(struct net_device *dev, u32 value)
  885. {
  886. struct greth_private *greth = netdev_priv(dev);
  887. greth->msg_enable = value;
  888. }
  889. static int greth_get_regs_len(struct net_device *dev)
  890. {
  891. return sizeof(struct greth_regs);
  892. }
  893. static void greth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  894. {
  895. struct greth_private *greth = netdev_priv(dev);
  896. strlcpy(info->driver, dev_driver_string(greth->dev),
  897. sizeof(info->driver));
  898. strlcpy(info->version, "revision: 1.0", sizeof(info->version));
  899. strlcpy(info->bus_info, greth->dev->bus->name, sizeof(info->bus_info));
  900. strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
  901. }
  902. static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  903. {
  904. int i;
  905. struct greth_private *greth = netdev_priv(dev);
  906. u32 __iomem *greth_regs = (u32 __iomem *) greth->regs;
  907. u32 *buff = p;
  908. for (i = 0; i < sizeof(struct greth_regs) / sizeof(u32); i++)
  909. buff[i] = greth_read_bd(&greth_regs[i]);
  910. }
  911. static const struct ethtool_ops greth_ethtool_ops = {
  912. .get_msglevel = greth_get_msglevel,
  913. .set_msglevel = greth_set_msglevel,
  914. .get_drvinfo = greth_get_drvinfo,
  915. .get_regs_len = greth_get_regs_len,
  916. .get_regs = greth_get_regs,
  917. .get_link = ethtool_op_get_link,
  918. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  919. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  920. };
  921. static struct net_device_ops greth_netdev_ops = {
  922. .ndo_open = greth_open,
  923. .ndo_stop = greth_close,
  924. .ndo_start_xmit = greth_start_xmit,
  925. .ndo_set_mac_address = greth_set_mac_add,
  926. .ndo_validate_addr = eth_validate_addr,
  927. };
  928. static inline int wait_for_mdio(struct greth_private *greth)
  929. {
  930. unsigned long timeout = jiffies + 4*HZ/100;
  931. while (GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_BUSY) {
  932. if (time_after(jiffies, timeout))
  933. return 0;
  934. }
  935. return 1;
  936. }
  937. static int greth_mdio_read(struct mii_bus *bus, int phy, int reg)
  938. {
  939. struct greth_private *greth = bus->priv;
  940. int data;
  941. if (!wait_for_mdio(greth))
  942. return -EBUSY;
  943. GRETH_REGSAVE(greth->regs->mdio, ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 2);
  944. if (!wait_for_mdio(greth))
  945. return -EBUSY;
  946. if (!(GRETH_REGLOAD(greth->regs->mdio) & GRETH_MII_NVALID)) {
  947. data = (GRETH_REGLOAD(greth->regs->mdio) >> 16) & 0xFFFF;
  948. return data;
  949. } else {
  950. return -1;
  951. }
  952. }
  953. static int greth_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
  954. {
  955. struct greth_private *greth = bus->priv;
  956. if (!wait_for_mdio(greth))
  957. return -EBUSY;
  958. GRETH_REGSAVE(greth->regs->mdio,
  959. ((val & 0xFFFF) << 16) | ((phy & 0x1F) << 11) | ((reg & 0x1F) << 6) | 1);
  960. if (!wait_for_mdio(greth))
  961. return -EBUSY;
  962. return 0;
  963. }
  964. static void greth_link_change(struct net_device *dev)
  965. {
  966. struct greth_private *greth = netdev_priv(dev);
  967. struct phy_device *phydev = dev->phydev;
  968. unsigned long flags;
  969. int status_change = 0;
  970. u32 ctrl;
  971. spin_lock_irqsave(&greth->devlock, flags);
  972. if (phydev->link) {
  973. if ((greth->speed != phydev->speed) || (greth->duplex != phydev->duplex)) {
  974. ctrl = GRETH_REGLOAD(greth->regs->control) &
  975. ~(GRETH_CTRL_FD | GRETH_CTRL_SP | GRETH_CTRL_GB);
  976. if (phydev->duplex)
  977. ctrl |= GRETH_CTRL_FD;
  978. if (phydev->speed == SPEED_100)
  979. ctrl |= GRETH_CTRL_SP;
  980. else if (phydev->speed == SPEED_1000)
  981. ctrl |= GRETH_CTRL_GB;
  982. GRETH_REGSAVE(greth->regs->control, ctrl);
  983. greth->speed = phydev->speed;
  984. greth->duplex = phydev->duplex;
  985. status_change = 1;
  986. }
  987. }
  988. if (phydev->link != greth->link) {
  989. if (!phydev->link) {
  990. greth->speed = 0;
  991. greth->duplex = -1;
  992. }
  993. greth->link = phydev->link;
  994. status_change = 1;
  995. }
  996. spin_unlock_irqrestore(&greth->devlock, flags);
  997. if (status_change) {
  998. if (phydev->link)
  999. pr_debug("%s: link up (%d/%s)\n",
  1000. dev->name, phydev->speed,
  1001. DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
  1002. else
  1003. pr_debug("%s: link down\n", dev->name);
  1004. }
  1005. }
  1006. static int greth_mdio_probe(struct net_device *dev)
  1007. {
  1008. struct greth_private *greth = netdev_priv(dev);
  1009. struct phy_device *phy = NULL;
  1010. int ret;
  1011. /* Find the first PHY */
  1012. phy = phy_find_first(greth->mdio);
  1013. if (!phy) {
  1014. if (netif_msg_probe(greth))
  1015. dev_err(&dev->dev, "no PHY found\n");
  1016. return -ENXIO;
  1017. }
  1018. ret = phy_connect_direct(dev, phy, &greth_link_change,
  1019. greth->gbit_mac ? PHY_INTERFACE_MODE_GMII : PHY_INTERFACE_MODE_MII);
  1020. if (ret) {
  1021. if (netif_msg_ifup(greth))
  1022. dev_err(&dev->dev, "could not attach to PHY\n");
  1023. return ret;
  1024. }
  1025. if (greth->gbit_mac)
  1026. phy->supported &= PHY_GBIT_FEATURES;
  1027. else
  1028. phy->supported &= PHY_BASIC_FEATURES;
  1029. phy->advertising = phy->supported;
  1030. greth->link = 0;
  1031. greth->speed = 0;
  1032. greth->duplex = -1;
  1033. return 0;
  1034. }
  1035. static int greth_mdio_init(struct greth_private *greth)
  1036. {
  1037. int ret;
  1038. unsigned long timeout;
  1039. struct net_device *ndev = greth->netdev;
  1040. greth->mdio = mdiobus_alloc();
  1041. if (!greth->mdio) {
  1042. return -ENOMEM;
  1043. }
  1044. greth->mdio->name = "greth-mdio";
  1045. snprintf(greth->mdio->id, MII_BUS_ID_SIZE, "%s-%d", greth->mdio->name, greth->irq);
  1046. greth->mdio->read = greth_mdio_read;
  1047. greth->mdio->write = greth_mdio_write;
  1048. greth->mdio->priv = greth;
  1049. ret = mdiobus_register(greth->mdio);
  1050. if (ret) {
  1051. goto error;
  1052. }
  1053. ret = greth_mdio_probe(greth->netdev);
  1054. if (ret) {
  1055. if (netif_msg_probe(greth))
  1056. dev_err(&greth->netdev->dev, "failed to probe MDIO bus\n");
  1057. goto unreg_mdio;
  1058. }
  1059. phy_start(ndev->phydev);
  1060. /* If Ethernet debug link is used make autoneg happen right away */
  1061. if (greth->edcl && greth_edcl == 1) {
  1062. phy_start_aneg(ndev->phydev);
  1063. timeout = jiffies + 6*HZ;
  1064. while (!phy_aneg_done(ndev->phydev) &&
  1065. time_before(jiffies, timeout)) {
  1066. }
  1067. phy_read_status(ndev->phydev);
  1068. greth_link_change(greth->netdev);
  1069. }
  1070. return 0;
  1071. unreg_mdio:
  1072. mdiobus_unregister(greth->mdio);
  1073. error:
  1074. mdiobus_free(greth->mdio);
  1075. return ret;
  1076. }
  1077. /* Initialize the GRETH MAC */
  1078. static int greth_of_probe(struct platform_device *ofdev)
  1079. {
  1080. struct net_device *dev;
  1081. struct greth_private *greth;
  1082. struct greth_regs *regs;
  1083. int i;
  1084. int err;
  1085. int tmp;
  1086. unsigned long timeout;
  1087. dev = alloc_etherdev(sizeof(struct greth_private));
  1088. if (dev == NULL)
  1089. return -ENOMEM;
  1090. greth = netdev_priv(dev);
  1091. greth->netdev = dev;
  1092. greth->dev = &ofdev->dev;
  1093. if (greth_debug > 0)
  1094. greth->msg_enable = greth_debug;
  1095. else
  1096. greth->msg_enable = GRETH_DEF_MSG_ENABLE;
  1097. spin_lock_init(&greth->devlock);
  1098. greth->regs = of_ioremap(&ofdev->resource[0], 0,
  1099. resource_size(&ofdev->resource[0]),
  1100. "grlib-greth regs");
  1101. if (greth->regs == NULL) {
  1102. if (netif_msg_probe(greth))
  1103. dev_err(greth->dev, "ioremap failure.\n");
  1104. err = -EIO;
  1105. goto error1;
  1106. }
  1107. regs = greth->regs;
  1108. greth->irq = ofdev->archdata.irqs[0];
  1109. dev_set_drvdata(greth->dev, dev);
  1110. SET_NETDEV_DEV(dev, greth->dev);
  1111. if (netif_msg_probe(greth))
  1112. dev_dbg(greth->dev, "resetting controller.\n");
  1113. /* Reset the controller. */
  1114. GRETH_REGSAVE(regs->control, GRETH_RESET);
  1115. /* Wait for MAC to reset itself */
  1116. timeout = jiffies + HZ/100;
  1117. while (GRETH_REGLOAD(regs->control) & GRETH_RESET) {
  1118. if (time_after(jiffies, timeout)) {
  1119. err = -EIO;
  1120. if (netif_msg_probe(greth))
  1121. dev_err(greth->dev, "timeout when waiting for reset.\n");
  1122. goto error2;
  1123. }
  1124. }
  1125. /* Get default PHY address */
  1126. greth->phyaddr = (GRETH_REGLOAD(regs->mdio) >> 11) & 0x1F;
  1127. /* Check if we have GBIT capable MAC */
  1128. tmp = GRETH_REGLOAD(regs->control);
  1129. greth->gbit_mac = (tmp >> 27) & 1;
  1130. /* Check for multicast capability */
  1131. greth->multicast = (tmp >> 25) & 1;
  1132. greth->edcl = (tmp >> 31) & 1;
  1133. /* If we have EDCL we disable the EDCL speed-duplex FSM so
  1134. * it doesn't interfere with the software */
  1135. if (greth->edcl != 0)
  1136. GRETH_REGORIN(regs->control, GRETH_CTRL_DISDUPLEX);
  1137. /* Check if MAC can handle MDIO interrupts */
  1138. greth->mdio_int_en = (tmp >> 26) & 1;
  1139. err = greth_mdio_init(greth);
  1140. if (err) {
  1141. if (netif_msg_probe(greth))
  1142. dev_err(greth->dev, "failed to register MDIO bus\n");
  1143. goto error2;
  1144. }
  1145. /* Allocate TX descriptor ring in coherent memory */
  1146. greth->tx_bd_base = dma_zalloc_coherent(greth->dev, 1024,
  1147. &greth->tx_bd_base_phys,
  1148. GFP_KERNEL);
  1149. if (!greth->tx_bd_base) {
  1150. err = -ENOMEM;
  1151. goto error3;
  1152. }
  1153. /* Allocate RX descriptor ring in coherent memory */
  1154. greth->rx_bd_base = dma_zalloc_coherent(greth->dev, 1024,
  1155. &greth->rx_bd_base_phys,
  1156. GFP_KERNEL);
  1157. if (!greth->rx_bd_base) {
  1158. err = -ENOMEM;
  1159. goto error4;
  1160. }
  1161. /* Get MAC address from: module param, OF property or ID prom */
  1162. for (i = 0; i < 6; i++) {
  1163. if (macaddr[i] != 0)
  1164. break;
  1165. }
  1166. if (i == 6) {
  1167. const u8 *addr;
  1168. addr = of_get_mac_address(ofdev->dev.of_node);
  1169. if (addr) {
  1170. for (i = 0; i < 6; i++)
  1171. macaddr[i] = (unsigned int) addr[i];
  1172. } else {
  1173. #ifdef CONFIG_SPARC
  1174. for (i = 0; i < 6; i++)
  1175. macaddr[i] = (unsigned int) idprom->id_ethaddr[i];
  1176. #endif
  1177. }
  1178. }
  1179. for (i = 0; i < 6; i++)
  1180. dev->dev_addr[i] = macaddr[i];
  1181. macaddr[5]++;
  1182. if (!is_valid_ether_addr(&dev->dev_addr[0])) {
  1183. if (netif_msg_probe(greth))
  1184. dev_err(greth->dev, "no valid ethernet address, aborting.\n");
  1185. err = -EINVAL;
  1186. goto error5;
  1187. }
  1188. GRETH_REGSAVE(regs->esa_msb, dev->dev_addr[0] << 8 | dev->dev_addr[1]);
  1189. GRETH_REGSAVE(regs->esa_lsb, dev->dev_addr[2] << 24 | dev->dev_addr[3] << 16 |
  1190. dev->dev_addr[4] << 8 | dev->dev_addr[5]);
  1191. /* Clear all pending interrupts except PHY irq */
  1192. GRETH_REGSAVE(regs->status, 0xFF);
  1193. if (greth->gbit_mac) {
  1194. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
  1195. NETIF_F_RXCSUM;
  1196. dev->features = dev->hw_features | NETIF_F_HIGHDMA;
  1197. greth_netdev_ops.ndo_start_xmit = greth_start_xmit_gbit;
  1198. }
  1199. if (greth->multicast) {
  1200. greth_netdev_ops.ndo_set_rx_mode = greth_set_multicast_list;
  1201. dev->flags |= IFF_MULTICAST;
  1202. } else {
  1203. dev->flags &= ~IFF_MULTICAST;
  1204. }
  1205. dev->netdev_ops = &greth_netdev_ops;
  1206. dev->ethtool_ops = &greth_ethtool_ops;
  1207. err = register_netdev(dev);
  1208. if (err) {
  1209. if (netif_msg_probe(greth))
  1210. dev_err(greth->dev, "netdevice registration failed.\n");
  1211. goto error5;
  1212. }
  1213. /* setup NAPI */
  1214. netif_napi_add(dev, &greth->napi, greth_poll, 64);
  1215. return 0;
  1216. error5:
  1217. dma_free_coherent(greth->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1218. error4:
  1219. dma_free_coherent(greth->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1220. error3:
  1221. mdiobus_unregister(greth->mdio);
  1222. error2:
  1223. of_iounmap(&ofdev->resource[0], greth->regs, resource_size(&ofdev->resource[0]));
  1224. error1:
  1225. free_netdev(dev);
  1226. return err;
  1227. }
  1228. static int greth_of_remove(struct platform_device *of_dev)
  1229. {
  1230. struct net_device *ndev = platform_get_drvdata(of_dev);
  1231. struct greth_private *greth = netdev_priv(ndev);
  1232. /* Free descriptor areas */
  1233. dma_free_coherent(&of_dev->dev, 1024, greth->rx_bd_base, greth->rx_bd_base_phys);
  1234. dma_free_coherent(&of_dev->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys);
  1235. if (ndev->phydev)
  1236. phy_stop(ndev->phydev);
  1237. mdiobus_unregister(greth->mdio);
  1238. unregister_netdev(ndev);
  1239. free_netdev(ndev);
  1240. of_iounmap(&of_dev->resource[0], greth->regs, resource_size(&of_dev->resource[0]));
  1241. return 0;
  1242. }
  1243. static const struct of_device_id greth_of_match[] = {
  1244. {
  1245. .name = "GAISLER_ETHMAC",
  1246. },
  1247. {
  1248. .name = "01_01d",
  1249. },
  1250. {},
  1251. };
  1252. MODULE_DEVICE_TABLE(of, greth_of_match);
  1253. static struct platform_driver greth_of_driver = {
  1254. .driver = {
  1255. .name = "grlib-greth",
  1256. .of_match_table = greth_of_match,
  1257. },
  1258. .probe = greth_of_probe,
  1259. .remove = greth_of_remove,
  1260. };
  1261. module_platform_driver(greth_of_driver);
  1262. MODULE_AUTHOR("Aeroflex Gaisler AB.");
  1263. MODULE_DESCRIPTION("Aeroflex Gaisler Ethernet MAC driver");
  1264. MODULE_LICENSE("GPL");