intel_quark_i2c_gpio.c 7.6 KB

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  1. /*
  2. * Intel Quark MFD PCI driver for I2C & GPIO
  3. *
  4. * Copyright(c) 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * Intel Quark PCI device for I2C and GPIO controller sharing the same
  16. * PCI function. This PCI driver will split the 2 devices into their
  17. * respective drivers.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/clkdev.h>
  24. #include <linux/clk-provider.h>
  25. #include <linux/dmi.h>
  26. #include <linux/platform_data/gpio-dwapb.h>
  27. #include <linux/platform_data/i2c-designware.h>
  28. /* PCI BAR for register base address */
  29. #define MFD_I2C_BAR 0
  30. #define MFD_GPIO_BAR 1
  31. /* ACPI _ADR value to match the child node */
  32. #define MFD_ACPI_MATCH_GPIO 0ULL
  33. #define MFD_ACPI_MATCH_I2C 1ULL
  34. /* The base GPIO number under GPIOLIB framework */
  35. #define INTEL_QUARK_MFD_GPIO_BASE 8
  36. /* The default number of South-Cluster GPIO on Quark. */
  37. #define INTEL_QUARK_MFD_NGPIO 8
  38. /* The DesignWare GPIO ports on Quark. */
  39. #define INTEL_QUARK_GPIO_NPORTS 1
  40. #define INTEL_QUARK_IORES_MEM 0
  41. #define INTEL_QUARK_IORES_IRQ 1
  42. #define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
  43. /* The Quark I2C controller source clock */
  44. #define INTEL_QUARK_I2C_CLK_HZ 33000000
  45. struct intel_quark_mfd {
  46. struct device *dev;
  47. struct clk *i2c_clk;
  48. struct clk_lookup *i2c_clk_lookup;
  49. };
  50. static const struct dmi_system_id dmi_platform_info[] = {
  51. {
  52. .matches = {
  53. DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
  54. },
  55. .driver_data = (void *)100000,
  56. },
  57. {
  58. .matches = {
  59. DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
  60. },
  61. .driver_data = (void *)400000,
  62. },
  63. {
  64. .matches = {
  65. DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
  66. DMI_EXACT_MATCH(DMI_BOARD_ASSET_TAG,
  67. "6ES7647-0AA00-0YA2"),
  68. },
  69. .driver_data = (void *)400000,
  70. },
  71. {
  72. .matches = {
  73. DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
  74. DMI_EXACT_MATCH(DMI_BOARD_ASSET_TAG,
  75. "6ES7647-0AA00-1YA2"),
  76. },
  77. .driver_data = (void *)400000,
  78. },
  79. {}
  80. };
  81. static struct resource intel_quark_i2c_res[] = {
  82. [INTEL_QUARK_IORES_MEM] = {
  83. .flags = IORESOURCE_MEM,
  84. },
  85. [INTEL_QUARK_IORES_IRQ] = {
  86. .flags = IORESOURCE_IRQ,
  87. },
  88. };
  89. static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
  90. .adr = MFD_ACPI_MATCH_I2C,
  91. };
  92. static struct resource intel_quark_gpio_res[] = {
  93. [INTEL_QUARK_IORES_MEM] = {
  94. .flags = IORESOURCE_MEM,
  95. },
  96. };
  97. static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
  98. .adr = MFD_ACPI_MATCH_GPIO,
  99. };
  100. static struct mfd_cell intel_quark_mfd_cells[] = {
  101. {
  102. .id = MFD_GPIO_BAR,
  103. .name = "gpio-dwapb",
  104. .acpi_match = &intel_quark_acpi_match_gpio,
  105. .num_resources = ARRAY_SIZE(intel_quark_gpio_res),
  106. .resources = intel_quark_gpio_res,
  107. .ignore_resource_conflicts = true,
  108. },
  109. {
  110. .id = MFD_I2C_BAR,
  111. .name = "i2c_designware",
  112. .acpi_match = &intel_quark_acpi_match_i2c,
  113. .num_resources = ARRAY_SIZE(intel_quark_i2c_res),
  114. .resources = intel_quark_i2c_res,
  115. .ignore_resource_conflicts = true,
  116. },
  117. };
  118. static const struct pci_device_id intel_quark_mfd_ids[] = {
  119. { PCI_VDEVICE(INTEL, 0x0934), },
  120. {},
  121. };
  122. MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
  123. static int intel_quark_register_i2c_clk(struct device *dev)
  124. {
  125. struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
  126. struct clk *i2c_clk;
  127. i2c_clk = clk_register_fixed_rate(dev,
  128. INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
  129. 0, INTEL_QUARK_I2C_CLK_HZ);
  130. if (IS_ERR(i2c_clk))
  131. return PTR_ERR(i2c_clk);
  132. quark_mfd->i2c_clk = i2c_clk;
  133. quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
  134. INTEL_QUARK_I2C_CONTROLLER_CLK);
  135. if (!quark_mfd->i2c_clk_lookup) {
  136. clk_unregister(quark_mfd->i2c_clk);
  137. dev_err(dev, "Fixed clk register failed\n");
  138. return -ENOMEM;
  139. }
  140. return 0;
  141. }
  142. static void intel_quark_unregister_i2c_clk(struct device *dev)
  143. {
  144. struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
  145. if (!quark_mfd->i2c_clk_lookup)
  146. return;
  147. clkdev_drop(quark_mfd->i2c_clk_lookup);
  148. clk_unregister(quark_mfd->i2c_clk);
  149. }
  150. static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
  151. {
  152. const struct dmi_system_id *dmi_id;
  153. struct dw_i2c_platform_data *pdata;
  154. struct resource *res = (struct resource *)cell->resources;
  155. struct device *dev = &pdev->dev;
  156. res[INTEL_QUARK_IORES_MEM].start =
  157. pci_resource_start(pdev, MFD_I2C_BAR);
  158. res[INTEL_QUARK_IORES_MEM].end =
  159. pci_resource_end(pdev, MFD_I2C_BAR);
  160. res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
  161. res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
  162. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  163. if (!pdata)
  164. return -ENOMEM;
  165. /* Normal mode by default */
  166. pdata->i2c_scl_freq = 100000;
  167. dmi_id = dmi_first_match(dmi_platform_info);
  168. if (dmi_id)
  169. pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;
  170. cell->platform_data = pdata;
  171. cell->pdata_size = sizeof(*pdata);
  172. return 0;
  173. }
  174. static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
  175. {
  176. struct dwapb_platform_data *pdata;
  177. struct resource *res = (struct resource *)cell->resources;
  178. struct device *dev = &pdev->dev;
  179. res[INTEL_QUARK_IORES_MEM].start =
  180. pci_resource_start(pdev, MFD_GPIO_BAR);
  181. res[INTEL_QUARK_IORES_MEM].end =
  182. pci_resource_end(pdev, MFD_GPIO_BAR);
  183. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  184. if (!pdata)
  185. return -ENOMEM;
  186. /* For intel quark x1000, it has only one port: portA */
  187. pdata->nports = INTEL_QUARK_GPIO_NPORTS;
  188. pdata->properties = devm_kcalloc(dev, pdata->nports,
  189. sizeof(*pdata->properties),
  190. GFP_KERNEL);
  191. if (!pdata->properties)
  192. return -ENOMEM;
  193. /* Set the properties for portA */
  194. pdata->properties->fwnode = NULL;
  195. pdata->properties->idx = 0;
  196. pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
  197. pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
  198. pdata->properties->irq[0] = pdev->irq;
  199. pdata->properties->has_irq = true;
  200. pdata->properties->irq_shared = true;
  201. cell->platform_data = pdata;
  202. cell->pdata_size = sizeof(*pdata);
  203. return 0;
  204. }
  205. static int intel_quark_mfd_probe(struct pci_dev *pdev,
  206. const struct pci_device_id *id)
  207. {
  208. struct intel_quark_mfd *quark_mfd;
  209. int ret;
  210. ret = pcim_enable_device(pdev);
  211. if (ret)
  212. return ret;
  213. quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
  214. if (!quark_mfd)
  215. return -ENOMEM;
  216. quark_mfd->dev = &pdev->dev;
  217. dev_set_drvdata(&pdev->dev, quark_mfd);
  218. ret = intel_quark_register_i2c_clk(&pdev->dev);
  219. if (ret)
  220. return ret;
  221. ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
  222. if (ret)
  223. goto err_unregister_i2c_clk;
  224. ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
  225. if (ret)
  226. goto err_unregister_i2c_clk;
  227. ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
  228. ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
  229. NULL);
  230. if (ret)
  231. goto err_unregister_i2c_clk;
  232. return 0;
  233. err_unregister_i2c_clk:
  234. intel_quark_unregister_i2c_clk(&pdev->dev);
  235. return ret;
  236. }
  237. static void intel_quark_mfd_remove(struct pci_dev *pdev)
  238. {
  239. intel_quark_unregister_i2c_clk(&pdev->dev);
  240. mfd_remove_devices(&pdev->dev);
  241. }
  242. static struct pci_driver intel_quark_mfd_driver = {
  243. .name = "intel_quark_mfd_i2c_gpio",
  244. .id_table = intel_quark_mfd_ids,
  245. .probe = intel_quark_mfd_probe,
  246. .remove = intel_quark_mfd_remove,
  247. };
  248. module_pci_driver(intel_quark_mfd_driver);
  249. MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
  250. MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
  251. MODULE_LICENSE("GPL v2");