tda18271-fe.c 32 KB

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  1. /*
  2. tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
  3. Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include "tda18271-priv.h"
  17. #include "tda8290.h"
  18. #include <linux/delay.h>
  19. #include <linux/videodev2.h>
  20. int tda18271_debug;
  21. module_param_named(debug, tda18271_debug, int, 0644);
  22. MODULE_PARM_DESC(debug, "set debug level (info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
  23. static int tda18271_cal_on_startup = -1;
  24. module_param_named(cal, tda18271_cal_on_startup, int, 0644);
  25. MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
  26. static DEFINE_MUTEX(tda18271_list_mutex);
  27. static LIST_HEAD(hybrid_tuner_instance_list);
  28. /*---------------------------------------------------------------------*/
  29. static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
  30. {
  31. struct tda18271_priv *priv = fe->tuner_priv;
  32. int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
  33. priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
  34. priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
  35. if (tda_fail(ret))
  36. goto fail;
  37. tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n",
  38. standby ? "standby" : "active",
  39. priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
  40. priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
  41. fail:
  42. return ret;
  43. }
  44. /*---------------------------------------------------------------------*/
  45. static inline int charge_pump_source(struct dvb_frontend *fe, int force)
  46. {
  47. struct tda18271_priv *priv = fe->tuner_priv;
  48. return tda18271_charge_pump_source(fe,
  49. (priv->role == TDA18271_SLAVE) ?
  50. TDA18271_CAL_PLL :
  51. TDA18271_MAIN_PLL, force);
  52. }
  53. static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
  54. {
  55. struct tda18271_priv *priv = fe->tuner_priv;
  56. unsigned char *regs = priv->tda18271_regs;
  57. switch (priv->mode) {
  58. case TDA18271_ANALOG:
  59. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  60. break;
  61. case TDA18271_DIGITAL:
  62. regs[R_MPD] |= 0x80; /* IF notch = 1 */
  63. break;
  64. }
  65. }
  66. static int tda18271_channel_configuration(struct dvb_frontend *fe,
  67. struct tda18271_std_map_item *map,
  68. u32 freq, u32 bw)
  69. {
  70. struct tda18271_priv *priv = fe->tuner_priv;
  71. unsigned char *regs = priv->tda18271_regs;
  72. int ret;
  73. u32 N;
  74. /* update TV broadcast parameters */
  75. /* set standard */
  76. regs[R_EP3] &= ~0x1f; /* clear std bits */
  77. regs[R_EP3] |= (map->agc_mode << 3) | map->std;
  78. if (priv->id == TDA18271HDC2) {
  79. /* set rfagc to high speed mode */
  80. regs[R_EP3] &= ~0x04;
  81. }
  82. /* set cal mode to normal */
  83. regs[R_EP4] &= ~0x03;
  84. /* update IF output level */
  85. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  86. regs[R_EP4] |= (map->if_lvl << 2);
  87. /* update FM_RFn */
  88. regs[R_EP4] &= ~0x80;
  89. regs[R_EP4] |= map->fm_rfn << 7;
  90. /* update rf top / if top */
  91. regs[R_EB22] = 0x00;
  92. regs[R_EB22] |= map->rfagc_top;
  93. ret = tda18271_write_regs(fe, R_EB22, 1);
  94. if (tda_fail(ret))
  95. goto fail;
  96. /* --------------------------------------------------------------- */
  97. /* disable Power Level Indicator */
  98. regs[R_EP1] |= 0x40;
  99. /* make sure thermometer is off */
  100. regs[R_TM] &= ~0x10;
  101. /* frequency dependent parameters */
  102. tda18271_calc_ir_measure(fe, &freq);
  103. tda18271_calc_bp_filter(fe, &freq);
  104. tda18271_calc_rf_band(fe, &freq);
  105. tda18271_calc_gain_taper(fe, &freq);
  106. /* --------------------------------------------------------------- */
  107. /* dual tuner and agc1 extra configuration */
  108. switch (priv->role) {
  109. case TDA18271_MASTER:
  110. regs[R_EB1] |= 0x04; /* main vco */
  111. break;
  112. case TDA18271_SLAVE:
  113. regs[R_EB1] &= ~0x04; /* cal vco */
  114. break;
  115. }
  116. /* agc1 always active */
  117. regs[R_EB1] &= ~0x02;
  118. /* agc1 has priority on agc2 */
  119. regs[R_EB1] &= ~0x01;
  120. ret = tda18271_write_regs(fe, R_EB1, 1);
  121. if (tda_fail(ret))
  122. goto fail;
  123. /* --------------------------------------------------------------- */
  124. N = map->if_freq * 1000 + freq;
  125. switch (priv->role) {
  126. case TDA18271_MASTER:
  127. tda18271_calc_main_pll(fe, N);
  128. tda18271_set_if_notch(fe);
  129. tda18271_write_regs(fe, R_MPD, 4);
  130. break;
  131. case TDA18271_SLAVE:
  132. tda18271_calc_cal_pll(fe, N);
  133. tda18271_write_regs(fe, R_CPD, 4);
  134. regs[R_MPD] = regs[R_CPD] & 0x7f;
  135. tda18271_set_if_notch(fe);
  136. tda18271_write_regs(fe, R_MPD, 1);
  137. break;
  138. }
  139. ret = tda18271_write_regs(fe, R_TM, 7);
  140. if (tda_fail(ret))
  141. goto fail;
  142. /* force charge pump source */
  143. charge_pump_source(fe, 1);
  144. msleep(1);
  145. /* return pll to normal operation */
  146. charge_pump_source(fe, 0);
  147. msleep(20);
  148. if (priv->id == TDA18271HDC2) {
  149. /* set rfagc to normal speed mode */
  150. if (map->fm_rfn)
  151. regs[R_EP3] &= ~0x04;
  152. else
  153. regs[R_EP3] |= 0x04;
  154. ret = tda18271_write_regs(fe, R_EP3, 1);
  155. }
  156. fail:
  157. return ret;
  158. }
  159. static int tda18271_read_thermometer(struct dvb_frontend *fe)
  160. {
  161. struct tda18271_priv *priv = fe->tuner_priv;
  162. unsigned char *regs = priv->tda18271_regs;
  163. int tm;
  164. /* switch thermometer on */
  165. regs[R_TM] |= 0x10;
  166. tda18271_write_regs(fe, R_TM, 1);
  167. /* read thermometer info */
  168. tda18271_read_regs(fe);
  169. if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
  170. (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
  171. if ((regs[R_TM] & 0x20) == 0x20)
  172. regs[R_TM] &= ~0x20;
  173. else
  174. regs[R_TM] |= 0x20;
  175. tda18271_write_regs(fe, R_TM, 1);
  176. msleep(10); /* temperature sensing */
  177. /* read thermometer info */
  178. tda18271_read_regs(fe);
  179. }
  180. tm = tda18271_lookup_thermometer(fe);
  181. /* switch thermometer off */
  182. regs[R_TM] &= ~0x10;
  183. tda18271_write_regs(fe, R_TM, 1);
  184. /* set CAL mode to normal */
  185. regs[R_EP4] &= ~0x03;
  186. tda18271_write_regs(fe, R_EP4, 1);
  187. return tm;
  188. }
  189. /* ------------------------------------------------------------------ */
  190. static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
  191. u32 freq)
  192. {
  193. struct tda18271_priv *priv = fe->tuner_priv;
  194. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  195. unsigned char *regs = priv->tda18271_regs;
  196. int i, ret;
  197. u8 tm_current, dc_over_dt, rf_tab;
  198. s32 rfcal_comp, approx;
  199. /* power up */
  200. ret = tda18271_set_standby_mode(fe, 0, 0, 0);
  201. if (tda_fail(ret))
  202. goto fail;
  203. /* read die current temperature */
  204. tm_current = tda18271_read_thermometer(fe);
  205. /* frequency dependent parameters */
  206. tda18271_calc_rf_cal(fe, &freq);
  207. rf_tab = regs[R_EB14];
  208. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  209. if (tda_fail(i))
  210. return i;
  211. if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
  212. approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
  213. map[i].rf_b1 + rf_tab;
  214. } else {
  215. approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
  216. map[i].rf_b2 + rf_tab;
  217. }
  218. if (approx < 0)
  219. approx = 0;
  220. if (approx > 255)
  221. approx = 255;
  222. tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
  223. /* calculate temperature compensation */
  224. rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
  225. regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
  226. ret = tda18271_write_regs(fe, R_EB14, 1);
  227. fail:
  228. return ret;
  229. }
  230. static int tda18271_por(struct dvb_frontend *fe)
  231. {
  232. struct tda18271_priv *priv = fe->tuner_priv;
  233. unsigned char *regs = priv->tda18271_regs;
  234. int ret;
  235. /* power up detector 1 */
  236. regs[R_EB12] &= ~0x20;
  237. ret = tda18271_write_regs(fe, R_EB12, 1);
  238. if (tda_fail(ret))
  239. goto fail;
  240. regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
  241. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  242. ret = tda18271_write_regs(fe, R_EB18, 1);
  243. if (tda_fail(ret))
  244. goto fail;
  245. regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
  246. /* POR mode */
  247. ret = tda18271_set_standby_mode(fe, 1, 0, 0);
  248. if (tda_fail(ret))
  249. goto fail;
  250. /* disable 1.5 MHz low pass filter */
  251. regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
  252. regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
  253. ret = tda18271_write_regs(fe, R_EB21, 3);
  254. fail:
  255. return ret;
  256. }
  257. static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
  258. {
  259. struct tda18271_priv *priv = fe->tuner_priv;
  260. unsigned char *regs = priv->tda18271_regs;
  261. u32 N;
  262. /* set CAL mode to normal */
  263. regs[R_EP4] &= ~0x03;
  264. tda18271_write_regs(fe, R_EP4, 1);
  265. /* switch off agc1 */
  266. regs[R_EP3] |= 0x40; /* sm_lt = 1 */
  267. regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
  268. tda18271_write_regs(fe, R_EB18, 1);
  269. /* frequency dependent parameters */
  270. tda18271_calc_bp_filter(fe, &freq);
  271. tda18271_calc_gain_taper(fe, &freq);
  272. tda18271_calc_rf_band(fe, &freq);
  273. tda18271_calc_km(fe, &freq);
  274. tda18271_write_regs(fe, R_EP1, 3);
  275. tda18271_write_regs(fe, R_EB13, 1);
  276. /* main pll charge pump source */
  277. tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
  278. /* cal pll charge pump source */
  279. tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
  280. /* force dcdc converter to 0 V */
  281. regs[R_EB14] = 0x00;
  282. tda18271_write_regs(fe, R_EB14, 1);
  283. /* disable plls lock */
  284. regs[R_EB20] &= ~0x20;
  285. tda18271_write_regs(fe, R_EB20, 1);
  286. /* set CAL mode to RF tracking filter calibration */
  287. regs[R_EP4] |= 0x03;
  288. tda18271_write_regs(fe, R_EP4, 2);
  289. /* --------------------------------------------------------------- */
  290. /* set the internal calibration signal */
  291. N = freq;
  292. tda18271_calc_cal_pll(fe, N);
  293. tda18271_write_regs(fe, R_CPD, 4);
  294. /* downconvert internal calibration */
  295. N += 1000000;
  296. tda18271_calc_main_pll(fe, N);
  297. tda18271_write_regs(fe, R_MPD, 4);
  298. msleep(5);
  299. tda18271_write_regs(fe, R_EP2, 1);
  300. tda18271_write_regs(fe, R_EP1, 1);
  301. tda18271_write_regs(fe, R_EP2, 1);
  302. tda18271_write_regs(fe, R_EP1, 1);
  303. /* --------------------------------------------------------------- */
  304. /* normal operation for the main pll */
  305. tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
  306. /* normal operation for the cal pll */
  307. tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
  308. msleep(10); /* plls locking */
  309. /* launch the rf tracking filters calibration */
  310. regs[R_EB20] |= 0x20;
  311. tda18271_write_regs(fe, R_EB20, 1);
  312. msleep(60); /* calibration */
  313. /* --------------------------------------------------------------- */
  314. /* set CAL mode to normal */
  315. regs[R_EP4] &= ~0x03;
  316. /* switch on agc1 */
  317. regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
  318. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  319. tda18271_write_regs(fe, R_EB18, 1);
  320. tda18271_write_regs(fe, R_EP3, 2);
  321. /* synchronization */
  322. tda18271_write_regs(fe, R_EP1, 1);
  323. /* get calibration result */
  324. tda18271_read_extended(fe);
  325. return regs[R_EB14];
  326. }
  327. static int tda18271_powerscan(struct dvb_frontend *fe,
  328. u32 *freq_in, u32 *freq_out)
  329. {
  330. struct tda18271_priv *priv = fe->tuner_priv;
  331. unsigned char *regs = priv->tda18271_regs;
  332. int sgn, bcal, count, wait, ret;
  333. u8 cid_target;
  334. u16 count_limit;
  335. u32 freq;
  336. freq = *freq_in;
  337. tda18271_calc_rf_band(fe, &freq);
  338. tda18271_calc_rf_cal(fe, &freq);
  339. tda18271_calc_gain_taper(fe, &freq);
  340. tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
  341. tda18271_write_regs(fe, R_EP2, 1);
  342. tda18271_write_regs(fe, R_EB14, 1);
  343. /* downconvert frequency */
  344. freq += 1000000;
  345. tda18271_calc_main_pll(fe, freq);
  346. tda18271_write_regs(fe, R_MPD, 4);
  347. msleep(5); /* pll locking */
  348. /* detection mode */
  349. regs[R_EP4] &= ~0x03;
  350. regs[R_EP4] |= 0x01;
  351. tda18271_write_regs(fe, R_EP4, 1);
  352. /* launch power detection measurement */
  353. tda18271_write_regs(fe, R_EP2, 1);
  354. /* read power detection info, stored in EB10 */
  355. ret = tda18271_read_extended(fe);
  356. if (tda_fail(ret))
  357. return ret;
  358. /* algorithm initialization */
  359. sgn = 1;
  360. *freq_out = *freq_in;
  361. bcal = 0;
  362. count = 0;
  363. wait = false;
  364. while ((regs[R_EB10] & 0x3f) < cid_target) {
  365. /* downconvert updated freq to 1 MHz */
  366. freq = *freq_in + (sgn * count) + 1000000;
  367. tda18271_calc_main_pll(fe, freq);
  368. tda18271_write_regs(fe, R_MPD, 4);
  369. if (wait) {
  370. msleep(5); /* pll locking */
  371. wait = false;
  372. } else
  373. udelay(100); /* pll locking */
  374. /* launch power detection measurement */
  375. tda18271_write_regs(fe, R_EP2, 1);
  376. /* read power detection info, stored in EB10 */
  377. ret = tda18271_read_extended(fe);
  378. if (tda_fail(ret))
  379. return ret;
  380. count += 200;
  381. if (count <= count_limit)
  382. continue;
  383. if (sgn <= 0)
  384. break;
  385. sgn = -1 * sgn;
  386. count = 200;
  387. wait = true;
  388. }
  389. if ((regs[R_EB10] & 0x3f) >= cid_target) {
  390. bcal = 1;
  391. *freq_out = freq - 1000000;
  392. } else
  393. bcal = 0;
  394. tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
  395. bcal, *freq_in, *freq_out, freq);
  396. return bcal;
  397. }
  398. static int tda18271_powerscan_init(struct dvb_frontend *fe)
  399. {
  400. struct tda18271_priv *priv = fe->tuner_priv;
  401. unsigned char *regs = priv->tda18271_regs;
  402. int ret;
  403. /* set standard to digital */
  404. regs[R_EP3] &= ~0x1f; /* clear std bits */
  405. regs[R_EP3] |= 0x12;
  406. /* set cal mode to normal */
  407. regs[R_EP4] &= ~0x03;
  408. /* update IF output level */
  409. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  410. ret = tda18271_write_regs(fe, R_EP3, 2);
  411. if (tda_fail(ret))
  412. goto fail;
  413. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  414. ret = tda18271_write_regs(fe, R_EB18, 1);
  415. if (tda_fail(ret))
  416. goto fail;
  417. regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
  418. /* 1.5 MHz low pass filter */
  419. regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
  420. regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
  421. ret = tda18271_write_regs(fe, R_EB21, 3);
  422. fail:
  423. return ret;
  424. }
  425. static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
  426. {
  427. struct tda18271_priv *priv = fe->tuner_priv;
  428. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  429. unsigned char *regs = priv->tda18271_regs;
  430. int bcal, rf, i;
  431. s32 divisor, dividend;
  432. #define RF1 0
  433. #define RF2 1
  434. #define RF3 2
  435. u32 rf_default[3];
  436. u32 rf_freq[3];
  437. s32 prog_cal[3];
  438. s32 prog_tab[3];
  439. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  440. if (tda_fail(i))
  441. return i;
  442. rf_default[RF1] = 1000 * map[i].rf1_def;
  443. rf_default[RF2] = 1000 * map[i].rf2_def;
  444. rf_default[RF3] = 1000 * map[i].rf3_def;
  445. for (rf = RF1; rf <= RF3; rf++) {
  446. if (0 == rf_default[rf])
  447. return 0;
  448. tda_cal("freq = %d, rf = %d\n", freq, rf);
  449. /* look for optimized calibration frequency */
  450. bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
  451. if (tda_fail(bcal))
  452. return bcal;
  453. tda18271_calc_rf_cal(fe, &rf_freq[rf]);
  454. prog_tab[rf] = (s32)regs[R_EB14];
  455. if (1 == bcal)
  456. prog_cal[rf] =
  457. (s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
  458. else
  459. prog_cal[rf] = prog_tab[rf];
  460. switch (rf) {
  461. case RF1:
  462. map[i].rf_a1 = 0;
  463. map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
  464. map[i].rf1 = rf_freq[RF1] / 1000;
  465. break;
  466. case RF2:
  467. dividend = (prog_cal[RF2] - prog_tab[RF2] -
  468. prog_cal[RF1] + prog_tab[RF1]);
  469. divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
  470. map[i].rf_a1 = (dividend / divisor);
  471. map[i].rf2 = rf_freq[RF2] / 1000;
  472. break;
  473. case RF3:
  474. dividend = (prog_cal[RF3] - prog_tab[RF3] -
  475. prog_cal[RF2] + prog_tab[RF2]);
  476. divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
  477. map[i].rf_a2 = (dividend / divisor);
  478. map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
  479. map[i].rf3 = rf_freq[RF3] / 1000;
  480. break;
  481. default:
  482. BUG();
  483. }
  484. }
  485. return 0;
  486. }
  487. static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
  488. {
  489. struct tda18271_priv *priv = fe->tuner_priv;
  490. unsigned int i;
  491. int ret;
  492. tda_info("performing RF tracking filter calibration\n");
  493. /* wait for die temperature stabilization */
  494. msleep(200);
  495. ret = tda18271_powerscan_init(fe);
  496. if (tda_fail(ret))
  497. goto fail;
  498. /* rf band calibration */
  499. for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
  500. ret =
  501. tda18271_rf_tracking_filters_init(fe, 1000 *
  502. priv->rf_cal_state[i].rfmax);
  503. if (tda_fail(ret))
  504. goto fail;
  505. }
  506. priv->tm_rfcal = tda18271_read_thermometer(fe);
  507. fail:
  508. return ret;
  509. }
  510. /* ------------------------------------------------------------------ */
  511. static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
  512. {
  513. struct tda18271_priv *priv = fe->tuner_priv;
  514. unsigned char *regs = priv->tda18271_regs;
  515. int ret;
  516. /* test RF_CAL_OK to see if we need init */
  517. if ((regs[R_EP1] & 0x10) == 0)
  518. priv->cal_initialized = false;
  519. if (priv->cal_initialized)
  520. return 0;
  521. ret = tda18271_calc_rf_filter_curve(fe);
  522. if (tda_fail(ret))
  523. goto fail;
  524. ret = tda18271_por(fe);
  525. if (tda_fail(ret))
  526. goto fail;
  527. tda_info("RF tracking filter calibration complete\n");
  528. priv->cal_initialized = true;
  529. goto end;
  530. fail:
  531. tda_info("RF tracking filter calibration failed!\n");
  532. end:
  533. return ret;
  534. }
  535. static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
  536. u32 freq, u32 bw)
  537. {
  538. struct tda18271_priv *priv = fe->tuner_priv;
  539. unsigned char *regs = priv->tda18271_regs;
  540. int ret;
  541. u32 N = 0;
  542. /* calculate bp filter */
  543. tda18271_calc_bp_filter(fe, &freq);
  544. tda18271_write_regs(fe, R_EP1, 1);
  545. regs[R_EB4] &= 0x07;
  546. regs[R_EB4] |= 0x60;
  547. tda18271_write_regs(fe, R_EB4, 1);
  548. regs[R_EB7] = 0x60;
  549. tda18271_write_regs(fe, R_EB7, 1);
  550. regs[R_EB14] = 0x00;
  551. tda18271_write_regs(fe, R_EB14, 1);
  552. regs[R_EB20] = 0xcc;
  553. tda18271_write_regs(fe, R_EB20, 1);
  554. /* set cal mode to RF tracking filter calibration */
  555. regs[R_EP4] |= 0x03;
  556. /* calculate cal pll */
  557. switch (priv->mode) {
  558. case TDA18271_ANALOG:
  559. N = freq - 1250000;
  560. break;
  561. case TDA18271_DIGITAL:
  562. N = freq + bw / 2;
  563. break;
  564. }
  565. tda18271_calc_cal_pll(fe, N);
  566. /* calculate main pll */
  567. switch (priv->mode) {
  568. case TDA18271_ANALOG:
  569. N = freq - 250000;
  570. break;
  571. case TDA18271_DIGITAL:
  572. N = freq + bw / 2 + 1000000;
  573. break;
  574. }
  575. tda18271_calc_main_pll(fe, N);
  576. ret = tda18271_write_regs(fe, R_EP3, 11);
  577. if (tda_fail(ret))
  578. return ret;
  579. msleep(5); /* RF tracking filter calibration initialization */
  580. /* search for K,M,CO for RF calibration */
  581. tda18271_calc_km(fe, &freq);
  582. tda18271_write_regs(fe, R_EB13, 1);
  583. /* search for rf band */
  584. tda18271_calc_rf_band(fe, &freq);
  585. /* search for gain taper */
  586. tda18271_calc_gain_taper(fe, &freq);
  587. tda18271_write_regs(fe, R_EP2, 1);
  588. tda18271_write_regs(fe, R_EP1, 1);
  589. tda18271_write_regs(fe, R_EP2, 1);
  590. tda18271_write_regs(fe, R_EP1, 1);
  591. regs[R_EB4] &= 0x07;
  592. regs[R_EB4] |= 0x40;
  593. tda18271_write_regs(fe, R_EB4, 1);
  594. regs[R_EB7] = 0x40;
  595. tda18271_write_regs(fe, R_EB7, 1);
  596. msleep(10); /* pll locking */
  597. regs[R_EB20] = 0xec;
  598. tda18271_write_regs(fe, R_EB20, 1);
  599. msleep(60); /* RF tracking filter calibration completion */
  600. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  601. tda18271_write_regs(fe, R_EP4, 1);
  602. tda18271_write_regs(fe, R_EP1, 1);
  603. /* RF tracking filter correction for VHF_Low band */
  604. if (0 == tda18271_calc_rf_cal(fe, &freq))
  605. tda18271_write_regs(fe, R_EB14, 1);
  606. return 0;
  607. }
  608. /* ------------------------------------------------------------------ */
  609. static int tda18271_ir_cal_init(struct dvb_frontend *fe)
  610. {
  611. struct tda18271_priv *priv = fe->tuner_priv;
  612. unsigned char *regs = priv->tda18271_regs;
  613. int ret;
  614. ret = tda18271_read_regs(fe);
  615. if (tda_fail(ret))
  616. goto fail;
  617. /* test IR_CAL_OK to see if we need init */
  618. if ((regs[R_EP1] & 0x08) == 0)
  619. ret = tda18271_init_regs(fe);
  620. fail:
  621. return ret;
  622. }
  623. static int tda18271_init(struct dvb_frontend *fe)
  624. {
  625. struct tda18271_priv *priv = fe->tuner_priv;
  626. int ret;
  627. mutex_lock(&priv->lock);
  628. /* full power up */
  629. ret = tda18271_set_standby_mode(fe, 0, 0, 0);
  630. if (tda_fail(ret))
  631. goto fail;
  632. /* initialization */
  633. ret = tda18271_ir_cal_init(fe);
  634. if (tda_fail(ret))
  635. goto fail;
  636. if (priv->id == TDA18271HDC2)
  637. tda18271c2_rf_cal_init(fe);
  638. fail:
  639. mutex_unlock(&priv->lock);
  640. return ret;
  641. }
  642. static int tda18271_sleep(struct dvb_frontend *fe)
  643. {
  644. struct tda18271_priv *priv = fe->tuner_priv;
  645. int ret;
  646. mutex_lock(&priv->lock);
  647. /* enter standby mode, with required output features enabled */
  648. ret = tda18271_toggle_output(fe, 1);
  649. mutex_unlock(&priv->lock);
  650. return ret;
  651. }
  652. /* ------------------------------------------------------------------ */
  653. static int tda18271_agc(struct dvb_frontend *fe)
  654. {
  655. struct tda18271_priv *priv = fe->tuner_priv;
  656. int ret = 0;
  657. switch (priv->config) {
  658. case TDA8290_LNA_OFF:
  659. /* no external agc configuration required */
  660. if (tda18271_debug & DBG_ADV)
  661. tda_dbg("no agc configuration provided\n");
  662. break;
  663. case TDA8290_LNA_ON_BRIDGE:
  664. /* switch with GPIO of saa713x */
  665. tda_dbg("invoking callback\n");
  666. if (fe->callback)
  667. ret = fe->callback(priv->i2c_props.adap->algo_data,
  668. DVB_FRONTEND_COMPONENT_TUNER,
  669. TDA18271_CALLBACK_CMD_AGC_ENABLE,
  670. priv->mode);
  671. break;
  672. case TDA8290_LNA_GP0_HIGH_ON:
  673. case TDA8290_LNA_GP0_HIGH_OFF:
  674. default:
  675. /* n/a - currently not supported */
  676. tda_err("unsupported configuration: %d\n", priv->config);
  677. ret = -EINVAL;
  678. break;
  679. }
  680. return ret;
  681. }
  682. static int tda18271_tune(struct dvb_frontend *fe,
  683. struct tda18271_std_map_item *map, u32 freq, u32 bw)
  684. {
  685. struct tda18271_priv *priv = fe->tuner_priv;
  686. int ret;
  687. tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
  688. freq, map->if_freq, bw, map->agc_mode, map->std);
  689. ret = tda18271_agc(fe);
  690. if (tda_fail(ret))
  691. tda_warn("failed to configure agc\n");
  692. ret = tda18271_init(fe);
  693. if (tda_fail(ret))
  694. goto fail;
  695. mutex_lock(&priv->lock);
  696. switch (priv->id) {
  697. case TDA18271HDC1:
  698. tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
  699. break;
  700. case TDA18271HDC2:
  701. tda18271c2_rf_tracking_filters_correction(fe, freq);
  702. break;
  703. }
  704. ret = tda18271_channel_configuration(fe, map, freq, bw);
  705. mutex_unlock(&priv->lock);
  706. fail:
  707. return ret;
  708. }
  709. /* ------------------------------------------------------------------ */
  710. static int tda18271_set_params(struct dvb_frontend *fe)
  711. {
  712. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  713. u32 delsys = c->delivery_system;
  714. u32 bw = c->bandwidth_hz;
  715. u32 freq = c->frequency;
  716. struct tda18271_priv *priv = fe->tuner_priv;
  717. struct tda18271_std_map *std_map = &priv->std;
  718. struct tda18271_std_map_item *map;
  719. int ret;
  720. priv->mode = TDA18271_DIGITAL;
  721. switch (delsys) {
  722. case SYS_ATSC:
  723. map = &std_map->atsc_6;
  724. bw = 6000000;
  725. break;
  726. case SYS_ISDBT:
  727. case SYS_DVBT:
  728. case SYS_DVBT2:
  729. if (bw <= 6000000) {
  730. map = &std_map->dvbt_6;
  731. } else if (bw <= 7000000) {
  732. map = &std_map->dvbt_7;
  733. } else {
  734. map = &std_map->dvbt_8;
  735. }
  736. break;
  737. case SYS_DVBC_ANNEX_B:
  738. bw = 6000000;
  739. /* fall through */
  740. case SYS_DVBC_ANNEX_A:
  741. case SYS_DVBC_ANNEX_C:
  742. if (bw <= 6000000) {
  743. map = &std_map->qam_6;
  744. } else if (bw <= 7000000) {
  745. map = &std_map->qam_7;
  746. } else {
  747. map = &std_map->qam_8;
  748. }
  749. break;
  750. default:
  751. tda_warn("modulation type not supported!\n");
  752. return -EINVAL;
  753. }
  754. /* When tuning digital, the analog demod must be tri-stated */
  755. if (fe->ops.analog_ops.standby)
  756. fe->ops.analog_ops.standby(fe);
  757. ret = tda18271_tune(fe, map, freq, bw);
  758. if (tda_fail(ret))
  759. goto fail;
  760. priv->if_freq = map->if_freq;
  761. priv->frequency = freq;
  762. priv->bandwidth = bw;
  763. fail:
  764. return ret;
  765. }
  766. static int tda18271_set_analog_params(struct dvb_frontend *fe,
  767. struct analog_parameters *params)
  768. {
  769. struct tda18271_priv *priv = fe->tuner_priv;
  770. struct tda18271_std_map *std_map = &priv->std;
  771. struct tda18271_std_map_item *map;
  772. char *mode;
  773. int ret;
  774. u32 freq = params->frequency * 125 *
  775. ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
  776. priv->mode = TDA18271_ANALOG;
  777. if (params->mode == V4L2_TUNER_RADIO) {
  778. map = &std_map->fm_radio;
  779. mode = "fm";
  780. } else if (params->std & V4L2_STD_MN) {
  781. map = &std_map->atv_mn;
  782. mode = "MN";
  783. } else if (params->std & V4L2_STD_B) {
  784. map = &std_map->atv_b;
  785. mode = "B";
  786. } else if (params->std & V4L2_STD_GH) {
  787. map = &std_map->atv_gh;
  788. mode = "GH";
  789. } else if (params->std & V4L2_STD_PAL_I) {
  790. map = &std_map->atv_i;
  791. mode = "I";
  792. } else if (params->std & V4L2_STD_DK) {
  793. map = &std_map->atv_dk;
  794. mode = "DK";
  795. } else if (params->std & V4L2_STD_SECAM_L) {
  796. map = &std_map->atv_l;
  797. mode = "L";
  798. } else if (params->std & V4L2_STD_SECAM_LC) {
  799. map = &std_map->atv_lc;
  800. mode = "L'";
  801. } else {
  802. map = &std_map->atv_i;
  803. mode = "xx";
  804. }
  805. tda_dbg("setting tda18271 to system %s\n", mode);
  806. ret = tda18271_tune(fe, map, freq, 0);
  807. if (tda_fail(ret))
  808. goto fail;
  809. priv->if_freq = map->if_freq;
  810. priv->frequency = freq;
  811. priv->bandwidth = 0;
  812. fail:
  813. return ret;
  814. }
  815. static void tda18271_release(struct dvb_frontend *fe)
  816. {
  817. struct tda18271_priv *priv = fe->tuner_priv;
  818. mutex_lock(&tda18271_list_mutex);
  819. if (priv)
  820. hybrid_tuner_release_state(priv);
  821. mutex_unlock(&tda18271_list_mutex);
  822. fe->tuner_priv = NULL;
  823. }
  824. static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  825. {
  826. struct tda18271_priv *priv = fe->tuner_priv;
  827. *frequency = priv->frequency;
  828. return 0;
  829. }
  830. static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  831. {
  832. struct tda18271_priv *priv = fe->tuner_priv;
  833. *bandwidth = priv->bandwidth;
  834. return 0;
  835. }
  836. static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  837. {
  838. struct tda18271_priv *priv = fe->tuner_priv;
  839. *frequency = (u32)priv->if_freq * 1000;
  840. return 0;
  841. }
  842. /* ------------------------------------------------------------------ */
  843. #define tda18271_update_std(std_cfg, name) do { \
  844. if (map->std_cfg.if_freq + \
  845. map->std_cfg.agc_mode + map->std_cfg.std + \
  846. map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
  847. tda_dbg("Using custom std config for %s\n", name); \
  848. memcpy(&std->std_cfg, &map->std_cfg, \
  849. sizeof(struct tda18271_std_map_item)); \
  850. } } while (0)
  851. #define tda18271_dump_std_item(std_cfg, name) do { \
  852. tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
  853. "if_lvl = %d, rfagc_top = 0x%02x\n", \
  854. name, std->std_cfg.if_freq, \
  855. std->std_cfg.agc_mode, std->std_cfg.std, \
  856. std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
  857. } while (0)
  858. static int tda18271_dump_std_map(struct dvb_frontend *fe)
  859. {
  860. struct tda18271_priv *priv = fe->tuner_priv;
  861. struct tda18271_std_map *std = &priv->std;
  862. tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
  863. tda18271_dump_std_item(fm_radio, " fm ");
  864. tda18271_dump_std_item(atv_b, "atv b ");
  865. tda18271_dump_std_item(atv_dk, "atv dk");
  866. tda18271_dump_std_item(atv_gh, "atv gh");
  867. tda18271_dump_std_item(atv_i, "atv i ");
  868. tda18271_dump_std_item(atv_l, "atv l ");
  869. tda18271_dump_std_item(atv_lc, "atv l'");
  870. tda18271_dump_std_item(atv_mn, "atv mn");
  871. tda18271_dump_std_item(atsc_6, "atsc 6");
  872. tda18271_dump_std_item(dvbt_6, "dvbt 6");
  873. tda18271_dump_std_item(dvbt_7, "dvbt 7");
  874. tda18271_dump_std_item(dvbt_8, "dvbt 8");
  875. tda18271_dump_std_item(qam_6, "qam 6 ");
  876. tda18271_dump_std_item(qam_7, "qam 7 ");
  877. tda18271_dump_std_item(qam_8, "qam 8 ");
  878. return 0;
  879. }
  880. static int tda18271_update_std_map(struct dvb_frontend *fe,
  881. struct tda18271_std_map *map)
  882. {
  883. struct tda18271_priv *priv = fe->tuner_priv;
  884. struct tda18271_std_map *std = &priv->std;
  885. if (!map)
  886. return -EINVAL;
  887. tda18271_update_std(fm_radio, "fm");
  888. tda18271_update_std(atv_b, "atv b");
  889. tda18271_update_std(atv_dk, "atv dk");
  890. tda18271_update_std(atv_gh, "atv gh");
  891. tda18271_update_std(atv_i, "atv i");
  892. tda18271_update_std(atv_l, "atv l");
  893. tda18271_update_std(atv_lc, "atv l'");
  894. tda18271_update_std(atv_mn, "atv mn");
  895. tda18271_update_std(atsc_6, "atsc 6");
  896. tda18271_update_std(dvbt_6, "dvbt 6");
  897. tda18271_update_std(dvbt_7, "dvbt 7");
  898. tda18271_update_std(dvbt_8, "dvbt 8");
  899. tda18271_update_std(qam_6, "qam 6");
  900. tda18271_update_std(qam_7, "qam 7");
  901. tda18271_update_std(qam_8, "qam 8");
  902. return 0;
  903. }
  904. static int tda18271_get_id(struct dvb_frontend *fe)
  905. {
  906. struct tda18271_priv *priv = fe->tuner_priv;
  907. unsigned char *regs = priv->tda18271_regs;
  908. char *name;
  909. int ret;
  910. mutex_lock(&priv->lock);
  911. ret = tda18271_read_regs(fe);
  912. mutex_unlock(&priv->lock);
  913. if (ret) {
  914. tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
  915. i2c_adapter_id(priv->i2c_props.adap),
  916. priv->i2c_props.addr);
  917. return -EIO;
  918. }
  919. switch (regs[R_ID] & 0x7f) {
  920. case 3:
  921. name = "TDA18271HD/C1";
  922. priv->id = TDA18271HDC1;
  923. break;
  924. case 4:
  925. name = "TDA18271HD/C2";
  926. priv->id = TDA18271HDC2;
  927. break;
  928. default:
  929. tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
  930. regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
  931. priv->i2c_props.addr);
  932. return -EINVAL;
  933. }
  934. tda_info("%s detected @ %d-%04x\n", name,
  935. i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
  936. return 0;
  937. }
  938. static int tda18271_setup_configuration(struct dvb_frontend *fe,
  939. struct tda18271_config *cfg)
  940. {
  941. struct tda18271_priv *priv = fe->tuner_priv;
  942. priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
  943. priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
  944. priv->config = (cfg) ? cfg->config : 0;
  945. priv->small_i2c = (cfg) ?
  946. cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
  947. priv->output_opt = (cfg) ?
  948. cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
  949. return 0;
  950. }
  951. static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
  952. {
  953. /* tda18271_cal_on_startup == -1 when cal module option is unset */
  954. return ((tda18271_cal_on_startup == -1) ?
  955. /* honor configuration setting */
  956. ((cfg) && (cfg->rf_cal_on_startup)) :
  957. /* module option overrides configuration setting */
  958. (tda18271_cal_on_startup)) ? 1 : 0;
  959. }
  960. static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
  961. {
  962. struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
  963. tda18271_setup_configuration(fe, cfg);
  964. if (tda18271_need_cal_on_startup(cfg))
  965. tda18271_init(fe);
  966. /* override default std map with values in config struct */
  967. if ((cfg) && (cfg->std_map))
  968. tda18271_update_std_map(fe, cfg->std_map);
  969. return 0;
  970. }
  971. static const struct dvb_tuner_ops tda18271_tuner_ops = {
  972. .info = {
  973. .name = "NXP TDA18271HD",
  974. .frequency_min_hz = 45 * MHz,
  975. .frequency_max_hz = 864 * MHz,
  976. .frequency_step_hz = 62500
  977. },
  978. .init = tda18271_init,
  979. .sleep = tda18271_sleep,
  980. .set_params = tda18271_set_params,
  981. .set_analog_params = tda18271_set_analog_params,
  982. .release = tda18271_release,
  983. .set_config = tda18271_set_config,
  984. .get_frequency = tda18271_get_frequency,
  985. .get_bandwidth = tda18271_get_bandwidth,
  986. .get_if_frequency = tda18271_get_if_frequency,
  987. };
  988. struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
  989. struct i2c_adapter *i2c,
  990. struct tda18271_config *cfg)
  991. {
  992. struct tda18271_priv *priv = NULL;
  993. int instance, ret;
  994. mutex_lock(&tda18271_list_mutex);
  995. instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
  996. hybrid_tuner_instance_list,
  997. i2c, addr, "tda18271");
  998. switch (instance) {
  999. case 0:
  1000. goto fail;
  1001. case 1:
  1002. /* new tuner instance */
  1003. fe->tuner_priv = priv;
  1004. tda18271_setup_configuration(fe, cfg);
  1005. priv->cal_initialized = false;
  1006. mutex_init(&priv->lock);
  1007. ret = tda18271_get_id(fe);
  1008. if (tda_fail(ret))
  1009. goto fail;
  1010. ret = tda18271_assign_map_layout(fe);
  1011. if (tda_fail(ret))
  1012. goto fail;
  1013. /* if delay_cal is set, delay IR & RF calibration until init()
  1014. * module option 'cal' overrides this delay */
  1015. if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
  1016. break;
  1017. mutex_lock(&priv->lock);
  1018. tda18271_init_regs(fe);
  1019. if ((tda18271_need_cal_on_startup(cfg)) &&
  1020. (priv->id == TDA18271HDC2))
  1021. tda18271c2_rf_cal_init(fe);
  1022. /* enter standby mode, with required output features enabled */
  1023. ret = tda18271_toggle_output(fe, 1);
  1024. tda_fail(ret);
  1025. mutex_unlock(&priv->lock);
  1026. break;
  1027. default:
  1028. /* existing tuner instance */
  1029. fe->tuner_priv = priv;
  1030. /* allow dvb driver to override configuration settings */
  1031. if (cfg) {
  1032. if (cfg->gate != TDA18271_GATE_ANALOG)
  1033. priv->gate = cfg->gate;
  1034. if (cfg->role)
  1035. priv->role = cfg->role;
  1036. if (cfg->config)
  1037. priv->config = cfg->config;
  1038. if (cfg->small_i2c)
  1039. priv->small_i2c = cfg->small_i2c;
  1040. if (cfg->output_opt)
  1041. priv->output_opt = cfg->output_opt;
  1042. if (cfg->std_map)
  1043. tda18271_update_std_map(fe, cfg->std_map);
  1044. }
  1045. if (tda18271_need_cal_on_startup(cfg))
  1046. tda18271_init(fe);
  1047. break;
  1048. }
  1049. /* override default std map with values in config struct */
  1050. if ((cfg) && (cfg->std_map))
  1051. tda18271_update_std_map(fe, cfg->std_map);
  1052. mutex_unlock(&tda18271_list_mutex);
  1053. memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
  1054. sizeof(struct dvb_tuner_ops));
  1055. if (tda18271_debug & (DBG_MAP | DBG_ADV))
  1056. tda18271_dump_std_map(fe);
  1057. return fe;
  1058. fail:
  1059. mutex_unlock(&tda18271_list_mutex);
  1060. tda18271_release(fe);
  1061. return NULL;
  1062. }
  1063. EXPORT_SYMBOL_GPL(tda18271_attach);
  1064. MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
  1065. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  1066. MODULE_LICENSE("GPL");
  1067. MODULE_VERSION("0.4");