mt2060.c 13 KB

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  1. /*
  2. * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
  3. *
  4. * Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. */
  17. /* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
  18. #include <linux/module.h>
  19. #include <linux/delay.h>
  20. #include <linux/dvb/frontend.h>
  21. #include <linux/i2c.h>
  22. #include <linux/slab.h>
  23. #include <media/dvb_frontend.h>
  24. #include "mt2060.h"
  25. #include "mt2060_priv.h"
  26. static int debug;
  27. module_param(debug, int, 0644);
  28. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  29. #define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0)
  30. // Reads a single register
  31. static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val)
  32. {
  33. struct i2c_msg msg[2] = {
  34. { .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 },
  35. { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 },
  36. };
  37. int rc = 0;
  38. u8 *b;
  39. b = kmalloc(2, GFP_KERNEL);
  40. if (!b)
  41. return -ENOMEM;
  42. b[0] = reg;
  43. b[1] = 0;
  44. msg[0].buf = b;
  45. msg[1].buf = b + 1;
  46. if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  47. printk(KERN_WARNING "mt2060 I2C read failed\n");
  48. rc = -EREMOTEIO;
  49. }
  50. *val = b[1];
  51. kfree(b);
  52. return rc;
  53. }
  54. // Writes a single register
  55. static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val)
  56. {
  57. struct i2c_msg msg = {
  58. .addr = priv->cfg->i2c_address, .flags = 0, .len = 2
  59. };
  60. u8 *buf;
  61. int rc = 0;
  62. buf = kmalloc(2, GFP_KERNEL);
  63. if (!buf)
  64. return -ENOMEM;
  65. buf[0] = reg;
  66. buf[1] = val;
  67. msg.buf = buf;
  68. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  69. printk(KERN_WARNING "mt2060 I2C write failed\n");
  70. rc = -EREMOTEIO;
  71. }
  72. kfree(buf);
  73. return rc;
  74. }
  75. // Writes a set of consecutive registers
  76. static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len)
  77. {
  78. int rem, val_len;
  79. u8 *xfer_buf;
  80. int rc = 0;
  81. struct i2c_msg msg = {
  82. .addr = priv->cfg->i2c_address, .flags = 0
  83. };
  84. xfer_buf = kmalloc(16, GFP_KERNEL);
  85. if (!xfer_buf)
  86. return -ENOMEM;
  87. msg.buf = xfer_buf;
  88. for (rem = len - 1; rem > 0; rem -= priv->i2c_max_regs) {
  89. val_len = min_t(int, rem, priv->i2c_max_regs);
  90. msg.len = 1 + val_len;
  91. xfer_buf[0] = buf[0] + len - 1 - rem;
  92. memcpy(&xfer_buf[1], &buf[1 + len - 1 - rem], val_len);
  93. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  94. printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n", val_len);
  95. rc = -EREMOTEIO;
  96. break;
  97. }
  98. }
  99. kfree(xfer_buf);
  100. return rc;
  101. }
  102. // Initialisation sequences
  103. // LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
  104. static u8 mt2060_config1[] = {
  105. REG_LO1C1,
  106. 0x3F, 0x74, 0x00, 0x08, 0x93
  107. };
  108. // FMCG=2, GP2=0, GP1=0
  109. static u8 mt2060_config2[] = {
  110. REG_MISC_CTRL,
  111. 0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42
  112. };
  113. // VGAG=3, V1CSE=1
  114. #ifdef MT2060_SPURCHECK
  115. /* The function below calculates the frequency offset between the output frequency if2
  116. and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
  117. static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
  118. {
  119. int I,J;
  120. int dia,diamin,diff;
  121. diamin=1000000;
  122. for (I = 1; I < 10; I++) {
  123. J = ((2*I*lo1)/lo2+1)/2;
  124. diff = I*(int)lo1-J*(int)lo2;
  125. if (diff < 0) diff=-diff;
  126. dia = (diff-(int)if2);
  127. if (dia < 0) dia=-dia;
  128. if (diamin > dia) diamin=dia;
  129. }
  130. return diamin;
  131. }
  132. #define BANDWIDTH 4000 // kHz
  133. /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
  134. static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
  135. {
  136. u32 Spur,Sp1,Sp2;
  137. int I,J;
  138. I=0;
  139. J=1000;
  140. Spur=mt2060_spurcalc(lo1,lo2,if2);
  141. if (Spur < BANDWIDTH) {
  142. /* Potential spurs detected */
  143. dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)",
  144. (int)lo1,(int)lo2);
  145. I=1000;
  146. Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
  147. Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
  148. if (Sp1 < Sp2) {
  149. J=-J; I=-I; Spur=Sp2;
  150. } else
  151. Spur=Sp1;
  152. while (Spur < BANDWIDTH) {
  153. I += J;
  154. Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
  155. }
  156. dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)",
  157. (int)(lo1+I),(int)(lo2+I));
  158. }
  159. return I;
  160. }
  161. #endif
  162. #define IF2 36150 // IF2 frequency = 36.150 MHz
  163. #define FREF 16000 // Quartz oscillator 16 MHz
  164. static int mt2060_set_params(struct dvb_frontend *fe)
  165. {
  166. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  167. struct mt2060_priv *priv;
  168. int i=0;
  169. u32 freq;
  170. u8 lnaband;
  171. u32 f_lo1,f_lo2;
  172. u32 div1,num1,div2,num2;
  173. u8 b[8];
  174. u32 if1;
  175. priv = fe->tuner_priv;
  176. if1 = priv->if1_freq;
  177. b[0] = REG_LO1B1;
  178. b[1] = 0xFF;
  179. if (fe->ops.i2c_gate_ctrl)
  180. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  181. mt2060_writeregs(priv,b,2);
  182. freq = c->frequency / 1000; /* Hz -> kHz */
  183. f_lo1 = freq + if1 * 1000;
  184. f_lo1 = (f_lo1 / 250) * 250;
  185. f_lo2 = f_lo1 - freq - IF2;
  186. // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise
  187. f_lo2 = ((f_lo2 + 25) / 50) * 50;
  188. priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000,
  189. #ifdef MT2060_SPURCHECK
  190. // LO-related spurs detection and correction
  191. num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2);
  192. f_lo1 += num1;
  193. f_lo2 += num1;
  194. #endif
  195. //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
  196. num1 = f_lo1 / (FREF / 64);
  197. div1 = num1 / 64;
  198. num1 &= 0x3f;
  199. // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
  200. num2 = f_lo2 * 64 / (FREF / 128);
  201. div2 = num2 / 8192;
  202. num2 &= 0x1fff;
  203. if (freq <= 95000) lnaband = 0xB0; else
  204. if (freq <= 180000) lnaband = 0xA0; else
  205. if (freq <= 260000) lnaband = 0x90; else
  206. if (freq <= 335000) lnaband = 0x80; else
  207. if (freq <= 425000) lnaband = 0x70; else
  208. if (freq <= 480000) lnaband = 0x60; else
  209. if (freq <= 570000) lnaband = 0x50; else
  210. if (freq <= 645000) lnaband = 0x40; else
  211. if (freq <= 730000) lnaband = 0x30; else
  212. if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
  213. b[0] = REG_LO1C1;
  214. b[1] = lnaband | ((num1 >>2) & 0x0F);
  215. b[2] = div1;
  216. b[3] = (num2 & 0x0F) | ((num1 & 3) << 4);
  217. b[4] = num2 >> 4;
  218. b[5] = ((num2 >>12) & 1) | (div2 << 1);
  219. dprintk("IF1: %dMHz",(int)if1);
  220. dprintk("PLL freq=%dkHz f_lo1=%dkHz f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2);
  221. dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);
  222. dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
  223. mt2060_writeregs(priv,b,6);
  224. //Waits for pll lock or timeout
  225. i = 0;
  226. do {
  227. mt2060_readreg(priv,REG_LO_STATUS,b);
  228. if ((b[0] & 0x88)==0x88)
  229. break;
  230. msleep(4);
  231. i++;
  232. } while (i<10);
  233. if (fe->ops.i2c_gate_ctrl)
  234. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  235. return 0;
  236. }
  237. static void mt2060_calibrate(struct mt2060_priv *priv)
  238. {
  239. u8 b = 0;
  240. int i = 0;
  241. if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1)))
  242. return;
  243. if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2)))
  244. return;
  245. /* initialize the clock output */
  246. mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30);
  247. do {
  248. b |= (1 << 6); // FM1SS;
  249. mt2060_writereg(priv, REG_LO2C1,b);
  250. msleep(20);
  251. if (i == 0) {
  252. b |= (1 << 7); // FM1CA;
  253. mt2060_writereg(priv, REG_LO2C1,b);
  254. b &= ~(1 << 7); // FM1CA;
  255. msleep(20);
  256. }
  257. b &= ~(1 << 6); // FM1SS
  258. mt2060_writereg(priv, REG_LO2C1,b);
  259. msleep(20);
  260. i++;
  261. } while (i < 9);
  262. i = 0;
  263. while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
  264. msleep(20);
  265. if (i <= 10) {
  266. mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :)
  267. dprintk("calibration was successful: %d", (int)priv->fmfreq);
  268. } else
  269. dprintk("FMCAL timed out");
  270. }
  271. static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  272. {
  273. struct mt2060_priv *priv = fe->tuner_priv;
  274. *frequency = priv->frequency;
  275. return 0;
  276. }
  277. static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  278. {
  279. *frequency = IF2 * 1000;
  280. return 0;
  281. }
  282. static int mt2060_init(struct dvb_frontend *fe)
  283. {
  284. struct mt2060_priv *priv = fe->tuner_priv;
  285. int ret;
  286. if (fe->ops.i2c_gate_ctrl)
  287. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  288. if (priv->sleep) {
  289. ret = mt2060_writereg(priv, REG_MISC_CTRL, 0x20);
  290. if (ret)
  291. goto err_i2c_gate_ctrl;
  292. }
  293. ret = mt2060_writereg(priv, REG_VGAG,
  294. (priv->cfg->clock_out << 6) | 0x33);
  295. err_i2c_gate_ctrl:
  296. if (fe->ops.i2c_gate_ctrl)
  297. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  298. return ret;
  299. }
  300. static int mt2060_sleep(struct dvb_frontend *fe)
  301. {
  302. struct mt2060_priv *priv = fe->tuner_priv;
  303. int ret;
  304. if (fe->ops.i2c_gate_ctrl)
  305. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  306. ret = mt2060_writereg(priv, REG_VGAG,
  307. (priv->cfg->clock_out << 6) | 0x30);
  308. if (ret)
  309. goto err_i2c_gate_ctrl;
  310. if (priv->sleep)
  311. ret = mt2060_writereg(priv, REG_MISC_CTRL, 0xe8);
  312. err_i2c_gate_ctrl:
  313. if (fe->ops.i2c_gate_ctrl)
  314. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  315. return ret;
  316. }
  317. static void mt2060_release(struct dvb_frontend *fe)
  318. {
  319. kfree(fe->tuner_priv);
  320. fe->tuner_priv = NULL;
  321. }
  322. static const struct dvb_tuner_ops mt2060_tuner_ops = {
  323. .info = {
  324. .name = "Microtune MT2060",
  325. .frequency_min_hz = 48 * MHz,
  326. .frequency_max_hz = 860 * MHz,
  327. .frequency_step_hz = 50 * kHz,
  328. },
  329. .release = mt2060_release,
  330. .init = mt2060_init,
  331. .sleep = mt2060_sleep,
  332. .set_params = mt2060_set_params,
  333. .get_frequency = mt2060_get_frequency,
  334. .get_if_frequency = mt2060_get_if_frequency,
  335. };
  336. /* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
  337. struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1)
  338. {
  339. struct mt2060_priv *priv = NULL;
  340. u8 id = 0;
  341. priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL);
  342. if (priv == NULL)
  343. return NULL;
  344. priv->cfg = cfg;
  345. priv->i2c = i2c;
  346. priv->if1_freq = if1;
  347. priv->i2c_max_regs = ~0;
  348. if (fe->ops.i2c_gate_ctrl)
  349. fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
  350. if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) {
  351. kfree(priv);
  352. return NULL;
  353. }
  354. if (id != PART_REV) {
  355. kfree(priv);
  356. return NULL;
  357. }
  358. printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1);
  359. memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops));
  360. fe->tuner_priv = priv;
  361. mt2060_calibrate(priv);
  362. if (fe->ops.i2c_gate_ctrl)
  363. fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
  364. return fe;
  365. }
  366. EXPORT_SYMBOL(mt2060_attach);
  367. static int mt2060_probe(struct i2c_client *client,
  368. const struct i2c_device_id *id)
  369. {
  370. struct mt2060_platform_data *pdata = client->dev.platform_data;
  371. struct dvb_frontend *fe;
  372. struct mt2060_priv *dev;
  373. int ret;
  374. u8 chip_id;
  375. dev_dbg(&client->dev, "\n");
  376. if (!pdata) {
  377. dev_err(&client->dev, "Cannot proceed without platform data\n");
  378. ret = -EINVAL;
  379. goto err;
  380. }
  381. dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
  382. if (!dev) {
  383. ret = -ENOMEM;
  384. goto err;
  385. }
  386. fe = pdata->dvb_frontend;
  387. dev->config.i2c_address = client->addr;
  388. dev->config.clock_out = pdata->clock_out;
  389. dev->cfg = &dev->config;
  390. dev->i2c = client->adapter;
  391. dev->if1_freq = pdata->if1 ? pdata->if1 : 1220;
  392. dev->client = client;
  393. dev->i2c_max_regs = pdata->i2c_write_max ? pdata->i2c_write_max - 1 : ~0;
  394. dev->sleep = true;
  395. ret = mt2060_readreg(dev, REG_PART_REV, &chip_id);
  396. if (ret) {
  397. ret = -ENODEV;
  398. goto err;
  399. }
  400. dev_dbg(&client->dev, "chip id=%02x\n", chip_id);
  401. if (chip_id != PART_REV) {
  402. ret = -ENODEV;
  403. goto err;
  404. }
  405. /* Power on, calibrate, sleep */
  406. ret = mt2060_writereg(dev, REG_MISC_CTRL, 0x20);
  407. if (ret)
  408. goto err;
  409. mt2060_calibrate(dev);
  410. ret = mt2060_writereg(dev, REG_MISC_CTRL, 0xe8);
  411. if (ret)
  412. goto err;
  413. dev_info(&client->dev, "Microtune MT2060 successfully identified\n");
  414. memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(fe->ops.tuner_ops));
  415. fe->ops.tuner_ops.release = NULL;
  416. fe->tuner_priv = dev;
  417. i2c_set_clientdata(client, dev);
  418. return 0;
  419. err:
  420. dev_dbg(&client->dev, "failed=%d\n", ret);
  421. return ret;
  422. }
  423. static int mt2060_remove(struct i2c_client *client)
  424. {
  425. dev_dbg(&client->dev, "\n");
  426. return 0;
  427. }
  428. static const struct i2c_device_id mt2060_id_table[] = {
  429. {"mt2060", 0},
  430. {}
  431. };
  432. MODULE_DEVICE_TABLE(i2c, mt2060_id_table);
  433. static struct i2c_driver mt2060_driver = {
  434. .driver = {
  435. .name = "mt2060",
  436. .suppress_bind_attrs = true,
  437. },
  438. .probe = mt2060_probe,
  439. .remove = mt2060_remove,
  440. .id_table = mt2060_id_table,
  441. };
  442. module_i2c_driver(mt2060_driver);
  443. MODULE_AUTHOR("Olivier DANET");
  444. MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
  445. MODULE_LICENSE("GPL");