e4000.c 18 KB

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  1. /*
  2. * Elonics E4000 silicon tuner driver
  3. *
  4. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "e4000_priv.h"
  21. static int e4000_init(struct e4000_dev *dev)
  22. {
  23. struct i2c_client *client = dev->client;
  24. int ret;
  25. dev_dbg(&client->dev, "\n");
  26. /* reset */
  27. ret = regmap_write(dev->regmap, 0x00, 0x01);
  28. if (ret)
  29. goto err;
  30. /* disable output clock */
  31. ret = regmap_write(dev->regmap, 0x06, 0x00);
  32. if (ret)
  33. goto err;
  34. ret = regmap_write(dev->regmap, 0x7a, 0x96);
  35. if (ret)
  36. goto err;
  37. /* configure gains */
  38. ret = regmap_bulk_write(dev->regmap, 0x7e, "\x01\xfe", 2);
  39. if (ret)
  40. goto err;
  41. ret = regmap_write(dev->regmap, 0x82, 0x00);
  42. if (ret)
  43. goto err;
  44. ret = regmap_write(dev->regmap, 0x24, 0x05);
  45. if (ret)
  46. goto err;
  47. ret = regmap_bulk_write(dev->regmap, 0x87, "\x20\x01", 2);
  48. if (ret)
  49. goto err;
  50. ret = regmap_bulk_write(dev->regmap, 0x9f, "\x7f\x07", 2);
  51. if (ret)
  52. goto err;
  53. /* DC offset control */
  54. ret = regmap_write(dev->regmap, 0x2d, 0x1f);
  55. if (ret)
  56. goto err;
  57. ret = regmap_bulk_write(dev->regmap, 0x70, "\x01\x01", 2);
  58. if (ret)
  59. goto err;
  60. /* gain control */
  61. ret = regmap_write(dev->regmap, 0x1a, 0x17);
  62. if (ret)
  63. goto err;
  64. ret = regmap_write(dev->regmap, 0x1f, 0x1a);
  65. if (ret)
  66. goto err;
  67. dev->active = true;
  68. return 0;
  69. err:
  70. dev_dbg(&client->dev, "failed=%d\n", ret);
  71. return ret;
  72. }
  73. static int e4000_sleep(struct e4000_dev *dev)
  74. {
  75. struct i2c_client *client = dev->client;
  76. int ret;
  77. dev_dbg(&client->dev, "\n");
  78. dev->active = false;
  79. ret = regmap_write(dev->regmap, 0x00, 0x00);
  80. if (ret)
  81. goto err;
  82. return 0;
  83. err:
  84. dev_dbg(&client->dev, "failed=%d\n", ret);
  85. return ret;
  86. }
  87. static int e4000_set_params(struct e4000_dev *dev)
  88. {
  89. struct i2c_client *client = dev->client;
  90. int ret, i;
  91. unsigned int div_n, k, k_cw, div_out;
  92. u64 f_vco;
  93. u8 buf[5], i_data[4], q_data[4];
  94. if (!dev->active) {
  95. dev_dbg(&client->dev, "tuner is sleeping\n");
  96. return 0;
  97. }
  98. /* gain control manual */
  99. ret = regmap_write(dev->regmap, 0x1a, 0x00);
  100. if (ret)
  101. goto err;
  102. /*
  103. * Fractional-N synthesizer
  104. *
  105. * +----------------------------+
  106. * v |
  107. * Fref +----+ +-------+ +------+ +---+
  108. * ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
  109. * +----+ +-------+ +------+ +---+
  110. * |
  111. * |
  112. * v
  113. * +-------+ Fout
  114. * | /Rout | ------>
  115. * +-------+
  116. */
  117. for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
  118. if (dev->f_frequency <= e4000_pll_lut[i].freq)
  119. break;
  120. }
  121. if (i == ARRAY_SIZE(e4000_pll_lut)) {
  122. ret = -EINVAL;
  123. goto err;
  124. }
  125. #define F_REF dev->clk
  126. div_out = e4000_pll_lut[i].div_out;
  127. f_vco = (u64) dev->f_frequency * div_out;
  128. /* calculate PLL integer and fractional control word */
  129. div_n = div_u64_rem(f_vco, F_REF, &k);
  130. k_cw = div_u64((u64) k * 0x10000, F_REF);
  131. dev_dbg(&client->dev,
  132. "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
  133. dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_n, k,
  134. k_cw, div_out);
  135. buf[0] = div_n;
  136. buf[1] = (k_cw >> 0) & 0xff;
  137. buf[2] = (k_cw >> 8) & 0xff;
  138. buf[3] = 0x00;
  139. buf[4] = e4000_pll_lut[i].div_out_reg;
  140. ret = regmap_bulk_write(dev->regmap, 0x09, buf, 5);
  141. if (ret)
  142. goto err;
  143. /* LNA filter (RF filter) */
  144. for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
  145. if (dev->f_frequency <= e400_lna_filter_lut[i].freq)
  146. break;
  147. }
  148. if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
  149. ret = -EINVAL;
  150. goto err;
  151. }
  152. ret = regmap_write(dev->regmap, 0x10, e400_lna_filter_lut[i].val);
  153. if (ret)
  154. goto err;
  155. /* IF filters */
  156. for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
  157. if (dev->f_bandwidth <= e4000_if_filter_lut[i].freq)
  158. break;
  159. }
  160. if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
  161. ret = -EINVAL;
  162. goto err;
  163. }
  164. buf[0] = e4000_if_filter_lut[i].reg11_val;
  165. buf[1] = e4000_if_filter_lut[i].reg12_val;
  166. ret = regmap_bulk_write(dev->regmap, 0x11, buf, 2);
  167. if (ret)
  168. goto err;
  169. /* frequency band */
  170. for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
  171. if (dev->f_frequency <= e4000_band_lut[i].freq)
  172. break;
  173. }
  174. if (i == ARRAY_SIZE(e4000_band_lut)) {
  175. ret = -EINVAL;
  176. goto err;
  177. }
  178. ret = regmap_write(dev->regmap, 0x07, e4000_band_lut[i].reg07_val);
  179. if (ret)
  180. goto err;
  181. ret = regmap_write(dev->regmap, 0x78, e4000_band_lut[i].reg78_val);
  182. if (ret)
  183. goto err;
  184. /* DC offset */
  185. for (i = 0; i < 4; i++) {
  186. if (i == 0)
  187. ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7e\x24", 3);
  188. else if (i == 1)
  189. ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7f", 2);
  190. else if (i == 2)
  191. ret = regmap_bulk_write(dev->regmap, 0x15, "\x01", 1);
  192. else
  193. ret = regmap_bulk_write(dev->regmap, 0x16, "\x7e", 1);
  194. if (ret)
  195. goto err;
  196. ret = regmap_write(dev->regmap, 0x29, 0x01);
  197. if (ret)
  198. goto err;
  199. ret = regmap_bulk_read(dev->regmap, 0x2a, buf, 3);
  200. if (ret)
  201. goto err;
  202. i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
  203. q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
  204. }
  205. swap(q_data[2], q_data[3]);
  206. swap(i_data[2], i_data[3]);
  207. ret = regmap_bulk_write(dev->regmap, 0x50, q_data, 4);
  208. if (ret)
  209. goto err;
  210. ret = regmap_bulk_write(dev->regmap, 0x60, i_data, 4);
  211. if (ret)
  212. goto err;
  213. /* gain control auto */
  214. ret = regmap_write(dev->regmap, 0x1a, 0x17);
  215. if (ret)
  216. goto err;
  217. return 0;
  218. err:
  219. dev_dbg(&client->dev, "failed=%d\n", ret);
  220. return ret;
  221. }
  222. /*
  223. * V4L2 API
  224. */
  225. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  226. static const struct v4l2_frequency_band bands[] = {
  227. {
  228. .type = V4L2_TUNER_RF,
  229. .index = 0,
  230. .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
  231. .rangelow = 59000000,
  232. .rangehigh = 1105000000,
  233. },
  234. {
  235. .type = V4L2_TUNER_RF,
  236. .index = 1,
  237. .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
  238. .rangelow = 1249000000,
  239. .rangehigh = 2208000000UL,
  240. },
  241. };
  242. static inline struct e4000_dev *e4000_subdev_to_dev(struct v4l2_subdev *sd)
  243. {
  244. return container_of(sd, struct e4000_dev, sd);
  245. }
  246. static int e4000_standby(struct v4l2_subdev *sd)
  247. {
  248. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  249. int ret;
  250. ret = e4000_sleep(dev);
  251. if (ret)
  252. return ret;
  253. return e4000_set_params(dev);
  254. }
  255. static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
  256. {
  257. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  258. struct i2c_client *client = dev->client;
  259. dev_dbg(&client->dev, "index=%d\n", v->index);
  260. strlcpy(v->name, "Elonics E4000", sizeof(v->name));
  261. v->type = V4L2_TUNER_RF;
  262. v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
  263. v->rangelow = bands[0].rangelow;
  264. v->rangehigh = bands[1].rangehigh;
  265. return 0;
  266. }
  267. static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
  268. {
  269. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  270. struct i2c_client *client = dev->client;
  271. dev_dbg(&client->dev, "index=%d\n", v->index);
  272. return 0;
  273. }
  274. static int e4000_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
  275. {
  276. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  277. struct i2c_client *client = dev->client;
  278. dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
  279. f->frequency = dev->f_frequency;
  280. return 0;
  281. }
  282. static int e4000_s_frequency(struct v4l2_subdev *sd,
  283. const struct v4l2_frequency *f)
  284. {
  285. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  286. struct i2c_client *client = dev->client;
  287. dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
  288. f->tuner, f->type, f->frequency);
  289. dev->f_frequency = clamp_t(unsigned int, f->frequency,
  290. bands[0].rangelow, bands[1].rangehigh);
  291. return e4000_set_params(dev);
  292. }
  293. static int e4000_enum_freq_bands(struct v4l2_subdev *sd,
  294. struct v4l2_frequency_band *band)
  295. {
  296. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  297. struct i2c_client *client = dev->client;
  298. dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
  299. band->tuner, band->type, band->index);
  300. if (band->index >= ARRAY_SIZE(bands))
  301. return -EINVAL;
  302. band->capability = bands[band->index].capability;
  303. band->rangelow = bands[band->index].rangelow;
  304. band->rangehigh = bands[band->index].rangehigh;
  305. return 0;
  306. }
  307. static const struct v4l2_subdev_tuner_ops e4000_subdev_tuner_ops = {
  308. .standby = e4000_standby,
  309. .g_tuner = e4000_g_tuner,
  310. .s_tuner = e4000_s_tuner,
  311. .g_frequency = e4000_g_frequency,
  312. .s_frequency = e4000_s_frequency,
  313. .enum_freq_bands = e4000_enum_freq_bands,
  314. };
  315. static const struct v4l2_subdev_ops e4000_subdev_ops = {
  316. .tuner = &e4000_subdev_tuner_ops,
  317. };
  318. static int e4000_set_lna_gain(struct dvb_frontend *fe)
  319. {
  320. struct e4000_dev *dev = fe->tuner_priv;
  321. struct i2c_client *client = dev->client;
  322. int ret;
  323. u8 u8tmp;
  324. dev_dbg(&client->dev, "lna auto=%d->%d val=%d->%d\n",
  325. dev->lna_gain_auto->cur.val, dev->lna_gain_auto->val,
  326. dev->lna_gain->cur.val, dev->lna_gain->val);
  327. if (dev->lna_gain_auto->val && dev->if_gain_auto->cur.val)
  328. u8tmp = 0x17;
  329. else if (dev->lna_gain_auto->val)
  330. u8tmp = 0x19;
  331. else if (dev->if_gain_auto->cur.val)
  332. u8tmp = 0x16;
  333. else
  334. u8tmp = 0x10;
  335. ret = regmap_write(dev->regmap, 0x1a, u8tmp);
  336. if (ret)
  337. goto err;
  338. if (dev->lna_gain_auto->val == false) {
  339. ret = regmap_write(dev->regmap, 0x14, dev->lna_gain->val);
  340. if (ret)
  341. goto err;
  342. }
  343. return 0;
  344. err:
  345. dev_dbg(&client->dev, "failed=%d\n", ret);
  346. return ret;
  347. }
  348. static int e4000_set_mixer_gain(struct dvb_frontend *fe)
  349. {
  350. struct e4000_dev *dev = fe->tuner_priv;
  351. struct i2c_client *client = dev->client;
  352. int ret;
  353. u8 u8tmp;
  354. dev_dbg(&client->dev, "mixer auto=%d->%d val=%d->%d\n",
  355. dev->mixer_gain_auto->cur.val, dev->mixer_gain_auto->val,
  356. dev->mixer_gain->cur.val, dev->mixer_gain->val);
  357. if (dev->mixer_gain_auto->val)
  358. u8tmp = 0x15;
  359. else
  360. u8tmp = 0x14;
  361. ret = regmap_write(dev->regmap, 0x20, u8tmp);
  362. if (ret)
  363. goto err;
  364. if (dev->mixer_gain_auto->val == false) {
  365. ret = regmap_write(dev->regmap, 0x15, dev->mixer_gain->val);
  366. if (ret)
  367. goto err;
  368. }
  369. return 0;
  370. err:
  371. dev_dbg(&client->dev, "failed=%d\n", ret);
  372. return ret;
  373. }
  374. static int e4000_set_if_gain(struct dvb_frontend *fe)
  375. {
  376. struct e4000_dev *dev = fe->tuner_priv;
  377. struct i2c_client *client = dev->client;
  378. int ret;
  379. u8 buf[2];
  380. u8 u8tmp;
  381. dev_dbg(&client->dev, "if auto=%d->%d val=%d->%d\n",
  382. dev->if_gain_auto->cur.val, dev->if_gain_auto->val,
  383. dev->if_gain->cur.val, dev->if_gain->val);
  384. if (dev->if_gain_auto->val && dev->lna_gain_auto->cur.val)
  385. u8tmp = 0x17;
  386. else if (dev->lna_gain_auto->cur.val)
  387. u8tmp = 0x19;
  388. else if (dev->if_gain_auto->val)
  389. u8tmp = 0x16;
  390. else
  391. u8tmp = 0x10;
  392. ret = regmap_write(dev->regmap, 0x1a, u8tmp);
  393. if (ret)
  394. goto err;
  395. if (dev->if_gain_auto->val == false) {
  396. buf[0] = e4000_if_gain_lut[dev->if_gain->val].reg16_val;
  397. buf[1] = e4000_if_gain_lut[dev->if_gain->val].reg17_val;
  398. ret = regmap_bulk_write(dev->regmap, 0x16, buf, 2);
  399. if (ret)
  400. goto err;
  401. }
  402. return 0;
  403. err:
  404. dev_dbg(&client->dev, "failed=%d\n", ret);
  405. return ret;
  406. }
  407. static int e4000_pll_lock(struct dvb_frontend *fe)
  408. {
  409. struct e4000_dev *dev = fe->tuner_priv;
  410. struct i2c_client *client = dev->client;
  411. int ret;
  412. unsigned int uitmp;
  413. ret = regmap_read(dev->regmap, 0x07, &uitmp);
  414. if (ret)
  415. goto err;
  416. dev->pll_lock->val = (uitmp & 0x01);
  417. return 0;
  418. err:
  419. dev_dbg(&client->dev, "failed=%d\n", ret);
  420. return ret;
  421. }
  422. static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  423. {
  424. struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
  425. struct i2c_client *client = dev->client;
  426. int ret;
  427. if (!dev->active)
  428. return 0;
  429. switch (ctrl->id) {
  430. case V4L2_CID_RF_TUNER_PLL_LOCK:
  431. ret = e4000_pll_lock(dev->fe);
  432. break;
  433. default:
  434. dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
  435. ctrl->id, ctrl->name);
  436. ret = -EINVAL;
  437. }
  438. return ret;
  439. }
  440. static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
  441. {
  442. struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
  443. struct i2c_client *client = dev->client;
  444. int ret;
  445. if (!dev->active)
  446. return 0;
  447. switch (ctrl->id) {
  448. case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
  449. case V4L2_CID_RF_TUNER_BANDWIDTH:
  450. /*
  451. * TODO: Auto logic does not work 100% correctly as tuner driver
  452. * do not have information to calculate maximum suitable
  453. * bandwidth. Calculating it is responsible of master driver.
  454. */
  455. dev->f_bandwidth = dev->bandwidth->val;
  456. ret = e4000_set_params(dev);
  457. break;
  458. case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
  459. case V4L2_CID_RF_TUNER_LNA_GAIN:
  460. ret = e4000_set_lna_gain(dev->fe);
  461. break;
  462. case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
  463. case V4L2_CID_RF_TUNER_MIXER_GAIN:
  464. ret = e4000_set_mixer_gain(dev->fe);
  465. break;
  466. case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
  467. case V4L2_CID_RF_TUNER_IF_GAIN:
  468. ret = e4000_set_if_gain(dev->fe);
  469. break;
  470. default:
  471. dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
  472. ctrl->id, ctrl->name);
  473. ret = -EINVAL;
  474. }
  475. return ret;
  476. }
  477. static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
  478. .g_volatile_ctrl = e4000_g_volatile_ctrl,
  479. .s_ctrl = e4000_s_ctrl,
  480. };
  481. #endif
  482. /*
  483. * DVB API
  484. */
  485. static int e4000_dvb_set_params(struct dvb_frontend *fe)
  486. {
  487. struct e4000_dev *dev = fe->tuner_priv;
  488. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  489. dev->f_frequency = c->frequency;
  490. dev->f_bandwidth = c->bandwidth_hz;
  491. return e4000_set_params(dev);
  492. }
  493. static int e4000_dvb_init(struct dvb_frontend *fe)
  494. {
  495. return e4000_init(fe->tuner_priv);
  496. }
  497. static int e4000_dvb_sleep(struct dvb_frontend *fe)
  498. {
  499. return e4000_sleep(fe->tuner_priv);
  500. }
  501. static int e4000_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  502. {
  503. *frequency = 0; /* Zero-IF */
  504. return 0;
  505. }
  506. static const struct dvb_tuner_ops e4000_dvb_tuner_ops = {
  507. .info = {
  508. .name = "Elonics E4000",
  509. .frequency_min_hz = 174 * MHz,
  510. .frequency_max_hz = 862 * MHz,
  511. },
  512. .init = e4000_dvb_init,
  513. .sleep = e4000_dvb_sleep,
  514. .set_params = e4000_dvb_set_params,
  515. .get_if_frequency = e4000_dvb_get_if_frequency,
  516. };
  517. static int e4000_probe(struct i2c_client *client,
  518. const struct i2c_device_id *id)
  519. {
  520. struct e4000_dev *dev;
  521. struct e4000_config *cfg = client->dev.platform_data;
  522. struct dvb_frontend *fe = cfg->fe;
  523. int ret;
  524. unsigned int uitmp;
  525. static const struct regmap_config regmap_config = {
  526. .reg_bits = 8,
  527. .val_bits = 8,
  528. };
  529. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  530. if (!dev) {
  531. ret = -ENOMEM;
  532. goto err;
  533. }
  534. dev->clk = cfg->clock;
  535. dev->client = client;
  536. dev->fe = cfg->fe;
  537. dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
  538. if (IS_ERR(dev->regmap)) {
  539. ret = PTR_ERR(dev->regmap);
  540. goto err_kfree;
  541. }
  542. /* check if the tuner is there */
  543. ret = regmap_read(dev->regmap, 0x02, &uitmp);
  544. if (ret)
  545. goto err_kfree;
  546. dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
  547. if (uitmp != 0x40) {
  548. ret = -ENODEV;
  549. goto err_kfree;
  550. }
  551. /* put sleep as chip seems to be in normal mode by default */
  552. ret = regmap_write(dev->regmap, 0x00, 0x00);
  553. if (ret)
  554. goto err_kfree;
  555. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  556. /* Register controls */
  557. v4l2_ctrl_handler_init(&dev->hdl, 9);
  558. dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  559. V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
  560. dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  561. V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
  562. v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
  563. dev->lna_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  564. V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
  565. dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  566. V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
  567. v4l2_ctrl_auto_cluster(2, &dev->lna_gain_auto, 0, false);
  568. dev->mixer_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  569. V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
  570. dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  571. V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
  572. v4l2_ctrl_auto_cluster(2, &dev->mixer_gain_auto, 0, false);
  573. dev->if_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  574. V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
  575. dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  576. V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
  577. v4l2_ctrl_auto_cluster(2, &dev->if_gain_auto, 0, false);
  578. dev->pll_lock = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  579. V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
  580. if (dev->hdl.error) {
  581. ret = dev->hdl.error;
  582. dev_err(&client->dev, "Could not initialize controls\n");
  583. v4l2_ctrl_handler_free(&dev->hdl);
  584. goto err_kfree;
  585. }
  586. dev->sd.ctrl_handler = &dev->hdl;
  587. dev->f_frequency = bands[0].rangelow;
  588. dev->f_bandwidth = dev->bandwidth->val;
  589. v4l2_i2c_subdev_init(&dev->sd, client, &e4000_subdev_ops);
  590. #endif
  591. fe->tuner_priv = dev;
  592. memcpy(&fe->ops.tuner_ops, &e4000_dvb_tuner_ops,
  593. sizeof(fe->ops.tuner_ops));
  594. v4l2_set_subdevdata(&dev->sd, client);
  595. i2c_set_clientdata(client, &dev->sd);
  596. dev_info(&client->dev, "Elonics E4000 successfully identified\n");
  597. return 0;
  598. err_kfree:
  599. kfree(dev);
  600. err:
  601. dev_dbg(&client->dev, "failed=%d\n", ret);
  602. return ret;
  603. }
  604. static int e4000_remove(struct i2c_client *client)
  605. {
  606. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  607. struct e4000_dev *dev = container_of(sd, struct e4000_dev, sd);
  608. dev_dbg(&client->dev, "\n");
  609. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  610. v4l2_ctrl_handler_free(&dev->hdl);
  611. #endif
  612. kfree(dev);
  613. return 0;
  614. }
  615. static const struct i2c_device_id e4000_id_table[] = {
  616. {"e4000", 0},
  617. {}
  618. };
  619. MODULE_DEVICE_TABLE(i2c, e4000_id_table);
  620. static struct i2c_driver e4000_driver = {
  621. .driver = {
  622. .name = "e4000",
  623. .suppress_bind_attrs = true,
  624. },
  625. .probe = e4000_probe,
  626. .remove = e4000_remove,
  627. .id_table = e4000_id_table,
  628. };
  629. module_i2c_driver(e4000_driver);
  630. MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
  631. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  632. MODULE_LICENSE("GPL");