mx2_emmaprp.c 25 KB

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  1. /*
  2. * Support eMMa-PrP through mem2mem framework.
  3. *
  4. * eMMa-PrP is a piece of HW that allows fetching buffers
  5. * from one memory location and do several operations on
  6. * them such as scaling or format conversion giving, as a result
  7. * a new processed buffer in another memory location.
  8. *
  9. * Based on mem2mem_testdev.c by Pawel Osciak.
  10. *
  11. * Copyright (c) 2011 Vista Silicon S.L.
  12. * Javier Martin <javier.martin@vista-silicon.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by the
  16. * Free Software Foundation; either version 2 of the
  17. * License, or (at your option) any later version
  18. */
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/platform_device.h>
  25. #include <media/v4l2-mem2mem.h>
  26. #include <media/v4l2-device.h>
  27. #include <media/v4l2-ioctl.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <linux/sizes.h>
  30. #define EMMAPRP_MODULE_NAME "mem2mem-emmaprp"
  31. MODULE_DESCRIPTION("Mem-to-mem device which supports eMMa-PrP present in mx2 SoCs");
  32. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com");
  33. MODULE_LICENSE("GPL");
  34. MODULE_VERSION("0.0.1");
  35. static bool debug;
  36. module_param(debug, bool, 0644);
  37. #define MIN_W 32
  38. #define MIN_H 32
  39. #define MAX_W 2040
  40. #define MAX_H 2046
  41. #define S_ALIGN 1 /* multiple of 2 */
  42. #define W_ALIGN_YUV420 3 /* multiple of 8 */
  43. #define W_ALIGN_OTHERS 2 /* multiple of 4 */
  44. #define H_ALIGN 1 /* multiple of 2 */
  45. /* Flags that indicate a format can be used for capture/output */
  46. #define MEM2MEM_CAPTURE (1 << 0)
  47. #define MEM2MEM_OUTPUT (1 << 1)
  48. #define MEM2MEM_NAME "m2m-emmaprp"
  49. /* In bytes, per queue */
  50. #define MEM2MEM_VID_MEM_LIMIT SZ_16M
  51. #define dprintk(dev, fmt, arg...) \
  52. v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg)
  53. /* EMMA PrP */
  54. #define PRP_CNTL 0x00
  55. #define PRP_INTR_CNTL 0x04
  56. #define PRP_INTRSTATUS 0x08
  57. #define PRP_SOURCE_Y_PTR 0x0c
  58. #define PRP_SOURCE_CB_PTR 0x10
  59. #define PRP_SOURCE_CR_PTR 0x14
  60. #define PRP_DEST_RGB1_PTR 0x18
  61. #define PRP_DEST_RGB2_PTR 0x1c
  62. #define PRP_DEST_Y_PTR 0x20
  63. #define PRP_DEST_CB_PTR 0x24
  64. #define PRP_DEST_CR_PTR 0x28
  65. #define PRP_SRC_FRAME_SIZE 0x2c
  66. #define PRP_DEST_CH1_LINE_STRIDE 0x30
  67. #define PRP_SRC_PIXEL_FORMAT_CNTL 0x34
  68. #define PRP_CH1_PIXEL_FORMAT_CNTL 0x38
  69. #define PRP_CH1_OUT_IMAGE_SIZE 0x3c
  70. #define PRP_CH2_OUT_IMAGE_SIZE 0x40
  71. #define PRP_SRC_LINE_STRIDE 0x44
  72. #define PRP_CSC_COEF_012 0x48
  73. #define PRP_CSC_COEF_345 0x4c
  74. #define PRP_CSC_COEF_678 0x50
  75. #define PRP_CH1_RZ_HORI_COEF1 0x54
  76. #define PRP_CH1_RZ_HORI_COEF2 0x58
  77. #define PRP_CH1_RZ_HORI_VALID 0x5c
  78. #define PRP_CH1_RZ_VERT_COEF1 0x60
  79. #define PRP_CH1_RZ_VERT_COEF2 0x64
  80. #define PRP_CH1_RZ_VERT_VALID 0x68
  81. #define PRP_CH2_RZ_HORI_COEF1 0x6c
  82. #define PRP_CH2_RZ_HORI_COEF2 0x70
  83. #define PRP_CH2_RZ_HORI_VALID 0x74
  84. #define PRP_CH2_RZ_VERT_COEF1 0x78
  85. #define PRP_CH2_RZ_VERT_COEF2 0x7c
  86. #define PRP_CH2_RZ_VERT_VALID 0x80
  87. #define PRP_CNTL_CH1EN (1 << 0)
  88. #define PRP_CNTL_CH2EN (1 << 1)
  89. #define PRP_CNTL_CSIEN (1 << 2)
  90. #define PRP_CNTL_DATA_IN_YUV420 (0 << 3)
  91. #define PRP_CNTL_DATA_IN_YUV422 (1 << 3)
  92. #define PRP_CNTL_DATA_IN_RGB16 (2 << 3)
  93. #define PRP_CNTL_DATA_IN_RGB32 (3 << 3)
  94. #define PRP_CNTL_CH1_OUT_RGB8 (0 << 5)
  95. #define PRP_CNTL_CH1_OUT_RGB16 (1 << 5)
  96. #define PRP_CNTL_CH1_OUT_RGB32 (2 << 5)
  97. #define PRP_CNTL_CH1_OUT_YUV422 (3 << 5)
  98. #define PRP_CNTL_CH2_OUT_YUV420 (0 << 7)
  99. #define PRP_CNTL_CH2_OUT_YUV422 (1 << 7)
  100. #define PRP_CNTL_CH2_OUT_YUV444 (2 << 7)
  101. #define PRP_CNTL_CH1_LEN (1 << 9)
  102. #define PRP_CNTL_CH2_LEN (1 << 10)
  103. #define PRP_CNTL_SKIP_FRAME (1 << 11)
  104. #define PRP_CNTL_SWRST (1 << 12)
  105. #define PRP_CNTL_CLKEN (1 << 13)
  106. #define PRP_CNTL_WEN (1 << 14)
  107. #define PRP_CNTL_CH1BYP (1 << 15)
  108. #define PRP_CNTL_IN_TSKIP(x) ((x) << 16)
  109. #define PRP_CNTL_CH1_TSKIP(x) ((x) << 19)
  110. #define PRP_CNTL_CH2_TSKIP(x) ((x) << 22)
  111. #define PRP_CNTL_INPUT_FIFO_LEVEL(x) ((x) << 25)
  112. #define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27)
  113. #define PRP_CNTL_CH2B1EN (1 << 29)
  114. #define PRP_CNTL_CH2B2EN (1 << 30)
  115. #define PRP_CNTL_CH2FEN (1 << 31)
  116. #define PRP_SIZE_HEIGHT(x) (x)
  117. #define PRP_SIZE_WIDTH(x) ((x) << 16)
  118. /* IRQ Enable and status register */
  119. #define PRP_INTR_RDERR (1 << 0)
  120. #define PRP_INTR_CH1WERR (1 << 1)
  121. #define PRP_INTR_CH2WERR (1 << 2)
  122. #define PRP_INTR_CH1FC (1 << 3)
  123. #define PRP_INTR_CH2FC (1 << 5)
  124. #define PRP_INTR_LBOVF (1 << 7)
  125. #define PRP_INTR_CH2OVF (1 << 8)
  126. #define PRP_INTR_ST_RDERR (1 << 0)
  127. #define PRP_INTR_ST_CH1WERR (1 << 1)
  128. #define PRP_INTR_ST_CH2WERR (1 << 2)
  129. #define PRP_INTR_ST_CH2B2CI (1 << 3)
  130. #define PRP_INTR_ST_CH2B1CI (1 << 4)
  131. #define PRP_INTR_ST_CH1B2CI (1 << 5)
  132. #define PRP_INTR_ST_CH1B1CI (1 << 6)
  133. #define PRP_INTR_ST_LBOVF (1 << 7)
  134. #define PRP_INTR_ST_CH2OVF (1 << 8)
  135. struct emmaprp_fmt {
  136. char *name;
  137. u32 fourcc;
  138. /* Types the format can be used for */
  139. u32 types;
  140. };
  141. static struct emmaprp_fmt formats[] = {
  142. {
  143. .name = "YUV 4:2:0 Planar",
  144. .fourcc = V4L2_PIX_FMT_YUV420,
  145. .types = MEM2MEM_CAPTURE,
  146. },
  147. {
  148. .name = "4:2:2, packed, YUYV",
  149. .fourcc = V4L2_PIX_FMT_YUYV,
  150. .types = MEM2MEM_OUTPUT,
  151. },
  152. };
  153. /* Per-queue, driver-specific private data */
  154. struct emmaprp_q_data {
  155. unsigned int width;
  156. unsigned int height;
  157. unsigned int sizeimage;
  158. struct emmaprp_fmt *fmt;
  159. };
  160. enum {
  161. V4L2_M2M_SRC = 0,
  162. V4L2_M2M_DST = 1,
  163. };
  164. #define NUM_FORMATS ARRAY_SIZE(formats)
  165. static struct emmaprp_fmt *find_format(struct v4l2_format *f)
  166. {
  167. struct emmaprp_fmt *fmt;
  168. unsigned int k;
  169. for (k = 0; k < NUM_FORMATS; k++) {
  170. fmt = &formats[k];
  171. if (fmt->fourcc == f->fmt.pix.pixelformat)
  172. break;
  173. }
  174. if (k == NUM_FORMATS)
  175. return NULL;
  176. return &formats[k];
  177. }
  178. struct emmaprp_dev {
  179. struct v4l2_device v4l2_dev;
  180. struct video_device *vfd;
  181. struct mutex dev_mutex;
  182. spinlock_t irqlock;
  183. void __iomem *base_emma;
  184. struct clk *clk_emma_ahb, *clk_emma_ipg;
  185. struct v4l2_m2m_dev *m2m_dev;
  186. };
  187. struct emmaprp_ctx {
  188. struct emmaprp_dev *dev;
  189. /* Abort requested by m2m */
  190. int aborting;
  191. struct emmaprp_q_data q_data[2];
  192. struct v4l2_m2m_ctx *m2m_ctx;
  193. };
  194. static struct emmaprp_q_data *get_q_data(struct emmaprp_ctx *ctx,
  195. enum v4l2_buf_type type)
  196. {
  197. switch (type) {
  198. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  199. return &(ctx->q_data[V4L2_M2M_SRC]);
  200. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  201. return &(ctx->q_data[V4L2_M2M_DST]);
  202. default:
  203. BUG();
  204. }
  205. return NULL;
  206. }
  207. /*
  208. * mem2mem callbacks
  209. */
  210. static void emmaprp_job_abort(void *priv)
  211. {
  212. struct emmaprp_ctx *ctx = priv;
  213. struct emmaprp_dev *pcdev = ctx->dev;
  214. ctx->aborting = 1;
  215. dprintk(pcdev, "Aborting task\n");
  216. v4l2_m2m_job_finish(pcdev->m2m_dev, ctx->m2m_ctx);
  217. }
  218. static inline void emmaprp_dump_regs(struct emmaprp_dev *pcdev)
  219. {
  220. dprintk(pcdev,
  221. "eMMa-PrP Registers:\n"
  222. " SOURCE_Y_PTR = 0x%08X\n"
  223. " SRC_FRAME_SIZE = 0x%08X\n"
  224. " DEST_Y_PTR = 0x%08X\n"
  225. " DEST_CR_PTR = 0x%08X\n"
  226. " DEST_CB_PTR = 0x%08X\n"
  227. " CH2_OUT_IMAGE_SIZE = 0x%08X\n"
  228. " CNTL = 0x%08X\n",
  229. readl(pcdev->base_emma + PRP_SOURCE_Y_PTR),
  230. readl(pcdev->base_emma + PRP_SRC_FRAME_SIZE),
  231. readl(pcdev->base_emma + PRP_DEST_Y_PTR),
  232. readl(pcdev->base_emma + PRP_DEST_CR_PTR),
  233. readl(pcdev->base_emma + PRP_DEST_CB_PTR),
  234. readl(pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE),
  235. readl(pcdev->base_emma + PRP_CNTL));
  236. }
  237. static void emmaprp_device_run(void *priv)
  238. {
  239. struct emmaprp_ctx *ctx = priv;
  240. struct emmaprp_q_data *s_q_data, *d_q_data;
  241. struct vb2_v4l2_buffer *src_buf, *dst_buf;
  242. struct emmaprp_dev *pcdev = ctx->dev;
  243. unsigned int s_width, s_height;
  244. unsigned int d_width, d_height;
  245. unsigned int d_size;
  246. dma_addr_t p_in, p_out;
  247. u32 tmp;
  248. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  249. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  250. s_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  251. s_width = s_q_data->width;
  252. s_height = s_q_data->height;
  253. d_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  254. d_width = d_q_data->width;
  255. d_height = d_q_data->height;
  256. d_size = d_width * d_height;
  257. p_in = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
  258. p_out = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
  259. if (!p_in || !p_out) {
  260. v4l2_err(&pcdev->v4l2_dev,
  261. "Acquiring kernel pointers to buffers failed\n");
  262. return;
  263. }
  264. /* Input frame parameters */
  265. writel(p_in, pcdev->base_emma + PRP_SOURCE_Y_PTR);
  266. writel(PRP_SIZE_WIDTH(s_width) | PRP_SIZE_HEIGHT(s_height),
  267. pcdev->base_emma + PRP_SRC_FRAME_SIZE);
  268. /* Output frame parameters */
  269. writel(p_out, pcdev->base_emma + PRP_DEST_Y_PTR);
  270. writel(p_out + d_size, pcdev->base_emma + PRP_DEST_CB_PTR);
  271. writel(p_out + d_size + (d_size >> 2),
  272. pcdev->base_emma + PRP_DEST_CR_PTR);
  273. writel(PRP_SIZE_WIDTH(d_width) | PRP_SIZE_HEIGHT(d_height),
  274. pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE);
  275. /* IRQ configuration */
  276. tmp = readl(pcdev->base_emma + PRP_INTR_CNTL);
  277. writel(tmp | PRP_INTR_RDERR |
  278. PRP_INTR_CH2WERR |
  279. PRP_INTR_CH2FC,
  280. pcdev->base_emma + PRP_INTR_CNTL);
  281. emmaprp_dump_regs(pcdev);
  282. /* Enable transfer */
  283. tmp = readl(pcdev->base_emma + PRP_CNTL);
  284. writel(tmp | PRP_CNTL_CH2_OUT_YUV420 |
  285. PRP_CNTL_DATA_IN_YUV422 |
  286. PRP_CNTL_CH2EN,
  287. pcdev->base_emma + PRP_CNTL);
  288. }
  289. static irqreturn_t emmaprp_irq(int irq_emma, void *data)
  290. {
  291. struct emmaprp_dev *pcdev = data;
  292. struct emmaprp_ctx *curr_ctx;
  293. struct vb2_v4l2_buffer *src_vb, *dst_vb;
  294. unsigned long flags;
  295. u32 irqst;
  296. /* Check irq flags and clear irq */
  297. irqst = readl(pcdev->base_emma + PRP_INTRSTATUS);
  298. writel(irqst, pcdev->base_emma + PRP_INTRSTATUS);
  299. dprintk(pcdev, "irqst = 0x%08x\n", irqst);
  300. curr_ctx = v4l2_m2m_get_curr_priv(pcdev->m2m_dev);
  301. if (curr_ctx == NULL) {
  302. pr_err("Instance released before the end of transaction\n");
  303. return IRQ_HANDLED;
  304. }
  305. if (!curr_ctx->aborting) {
  306. if ((irqst & PRP_INTR_ST_RDERR) ||
  307. (irqst & PRP_INTR_ST_CH2WERR)) {
  308. pr_err("PrP bus error occurred, this transfer is probably corrupted\n");
  309. writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
  310. } else if (irqst & PRP_INTR_ST_CH2B1CI) { /* buffer ready */
  311. src_vb = v4l2_m2m_src_buf_remove(curr_ctx->m2m_ctx);
  312. dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->m2m_ctx);
  313. dst_vb->vb2_buf.timestamp = src_vb->vb2_buf.timestamp;
  314. dst_vb->flags &=
  315. ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  316. dst_vb->flags |=
  317. src_vb->flags
  318. & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  319. dst_vb->timecode = src_vb->timecode;
  320. spin_lock_irqsave(&pcdev->irqlock, flags);
  321. v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE);
  322. v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE);
  323. spin_unlock_irqrestore(&pcdev->irqlock, flags);
  324. }
  325. }
  326. v4l2_m2m_job_finish(pcdev->m2m_dev, curr_ctx->m2m_ctx);
  327. return IRQ_HANDLED;
  328. }
  329. /*
  330. * video ioctls
  331. */
  332. static int vidioc_querycap(struct file *file, void *priv,
  333. struct v4l2_capability *cap)
  334. {
  335. strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1);
  336. strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1);
  337. cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  338. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  339. return 0;
  340. }
  341. static int enum_fmt(struct v4l2_fmtdesc *f, u32 type)
  342. {
  343. int i, num;
  344. struct emmaprp_fmt *fmt;
  345. num = 0;
  346. for (i = 0; i < NUM_FORMATS; ++i) {
  347. if (formats[i].types & type) {
  348. /* index-th format of type type found ? */
  349. if (num == f->index)
  350. break;
  351. /* Correct type but haven't reached our index yet,
  352. * just increment per-type index */
  353. ++num;
  354. }
  355. }
  356. if (i < NUM_FORMATS) {
  357. /* Format found */
  358. fmt = &formats[i];
  359. strlcpy(f->description, fmt->name, sizeof(f->description) - 1);
  360. f->pixelformat = fmt->fourcc;
  361. return 0;
  362. }
  363. /* Format not found */
  364. return -EINVAL;
  365. }
  366. static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
  367. struct v4l2_fmtdesc *f)
  368. {
  369. return enum_fmt(f, MEM2MEM_CAPTURE);
  370. }
  371. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  372. struct v4l2_fmtdesc *f)
  373. {
  374. return enum_fmt(f, MEM2MEM_OUTPUT);
  375. }
  376. static int vidioc_g_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  377. {
  378. struct vb2_queue *vq;
  379. struct emmaprp_q_data *q_data;
  380. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  381. if (!vq)
  382. return -EINVAL;
  383. q_data = get_q_data(ctx, f->type);
  384. f->fmt.pix.width = q_data->width;
  385. f->fmt.pix.height = q_data->height;
  386. f->fmt.pix.field = V4L2_FIELD_NONE;
  387. f->fmt.pix.pixelformat = q_data->fmt->fourcc;
  388. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
  389. f->fmt.pix.bytesperline = q_data->width * 3 / 2;
  390. else /* YUYV */
  391. f->fmt.pix.bytesperline = q_data->width * 2;
  392. f->fmt.pix.sizeimage = q_data->sizeimage;
  393. return 0;
  394. }
  395. static int vidioc_g_fmt_vid_out(struct file *file, void *priv,
  396. struct v4l2_format *f)
  397. {
  398. return vidioc_g_fmt(priv, f);
  399. }
  400. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  401. struct v4l2_format *f)
  402. {
  403. return vidioc_g_fmt(priv, f);
  404. }
  405. static int vidioc_try_fmt(struct v4l2_format *f)
  406. {
  407. enum v4l2_field field;
  408. if (!find_format(f))
  409. return -EINVAL;
  410. field = f->fmt.pix.field;
  411. if (field == V4L2_FIELD_ANY)
  412. field = V4L2_FIELD_NONE;
  413. else if (V4L2_FIELD_NONE != field)
  414. return -EINVAL;
  415. /* V4L2 specification suggests the driver corrects the format struct
  416. * if any of the dimensions is unsupported */
  417. f->fmt.pix.field = field;
  418. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
  419. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  420. W_ALIGN_YUV420, &f->fmt.pix.height,
  421. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  422. f->fmt.pix.bytesperline = f->fmt.pix.width * 3 / 2;
  423. } else {
  424. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  425. W_ALIGN_OTHERS, &f->fmt.pix.height,
  426. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  427. f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
  428. }
  429. f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
  430. return 0;
  431. }
  432. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  433. struct v4l2_format *f)
  434. {
  435. struct emmaprp_fmt *fmt;
  436. struct emmaprp_ctx *ctx = priv;
  437. fmt = find_format(f);
  438. if (!fmt || !(fmt->types & MEM2MEM_CAPTURE)) {
  439. v4l2_err(&ctx->dev->v4l2_dev,
  440. "Fourcc format (0x%08x) invalid.\n",
  441. f->fmt.pix.pixelformat);
  442. return -EINVAL;
  443. }
  444. return vidioc_try_fmt(f);
  445. }
  446. static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
  447. struct v4l2_format *f)
  448. {
  449. struct emmaprp_fmt *fmt;
  450. struct emmaprp_ctx *ctx = priv;
  451. fmt = find_format(f);
  452. if (!fmt || !(fmt->types & MEM2MEM_OUTPUT)) {
  453. v4l2_err(&ctx->dev->v4l2_dev,
  454. "Fourcc format (0x%08x) invalid.\n",
  455. f->fmt.pix.pixelformat);
  456. return -EINVAL;
  457. }
  458. return vidioc_try_fmt(f);
  459. }
  460. static int vidioc_s_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  461. {
  462. struct emmaprp_q_data *q_data;
  463. struct vb2_queue *vq;
  464. int ret;
  465. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  466. if (!vq)
  467. return -EINVAL;
  468. q_data = get_q_data(ctx, f->type);
  469. if (!q_data)
  470. return -EINVAL;
  471. if (vb2_is_busy(vq)) {
  472. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  473. return -EBUSY;
  474. }
  475. ret = vidioc_try_fmt(f);
  476. if (ret)
  477. return ret;
  478. q_data->fmt = find_format(f);
  479. q_data->width = f->fmt.pix.width;
  480. q_data->height = f->fmt.pix.height;
  481. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  482. q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
  483. else /* YUYV */
  484. q_data->sizeimage = q_data->width * q_data->height * 2;
  485. dprintk(ctx->dev,
  486. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  487. f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
  488. return 0;
  489. }
  490. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  491. struct v4l2_format *f)
  492. {
  493. int ret;
  494. ret = vidioc_try_fmt_vid_cap(file, priv, f);
  495. if (ret)
  496. return ret;
  497. return vidioc_s_fmt(priv, f);
  498. }
  499. static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
  500. struct v4l2_format *f)
  501. {
  502. int ret;
  503. ret = vidioc_try_fmt_vid_out(file, priv, f);
  504. if (ret)
  505. return ret;
  506. return vidioc_s_fmt(priv, f);
  507. }
  508. static int vidioc_reqbufs(struct file *file, void *priv,
  509. struct v4l2_requestbuffers *reqbufs)
  510. {
  511. struct emmaprp_ctx *ctx = priv;
  512. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  513. }
  514. static int vidioc_querybuf(struct file *file, void *priv,
  515. struct v4l2_buffer *buf)
  516. {
  517. struct emmaprp_ctx *ctx = priv;
  518. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  519. }
  520. static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  521. {
  522. struct emmaprp_ctx *ctx = priv;
  523. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  524. }
  525. static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  526. {
  527. struct emmaprp_ctx *ctx = priv;
  528. return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  529. }
  530. static int vidioc_streamon(struct file *file, void *priv,
  531. enum v4l2_buf_type type)
  532. {
  533. struct emmaprp_ctx *ctx = priv;
  534. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  535. }
  536. static int vidioc_streamoff(struct file *file, void *priv,
  537. enum v4l2_buf_type type)
  538. {
  539. struct emmaprp_ctx *ctx = priv;
  540. return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  541. }
  542. static const struct v4l2_ioctl_ops emmaprp_ioctl_ops = {
  543. .vidioc_querycap = vidioc_querycap,
  544. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  545. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  546. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  547. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  548. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  549. .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
  550. .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
  551. .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
  552. .vidioc_reqbufs = vidioc_reqbufs,
  553. .vidioc_querybuf = vidioc_querybuf,
  554. .vidioc_qbuf = vidioc_qbuf,
  555. .vidioc_dqbuf = vidioc_dqbuf,
  556. .vidioc_streamon = vidioc_streamon,
  557. .vidioc_streamoff = vidioc_streamoff,
  558. };
  559. /*
  560. * Queue operations
  561. */
  562. static int emmaprp_queue_setup(struct vb2_queue *vq,
  563. unsigned int *nbuffers, unsigned int *nplanes,
  564. unsigned int sizes[], struct device *alloc_devs[])
  565. {
  566. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vq);
  567. struct emmaprp_q_data *q_data;
  568. unsigned int size, count = *nbuffers;
  569. q_data = get_q_data(ctx, vq->type);
  570. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  571. size = q_data->width * q_data->height * 3 / 2;
  572. else
  573. size = q_data->width * q_data->height * 2;
  574. while (size * count > MEM2MEM_VID_MEM_LIMIT)
  575. (count)--;
  576. *nplanes = 1;
  577. *nbuffers = count;
  578. sizes[0] = size;
  579. dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size);
  580. return 0;
  581. }
  582. static int emmaprp_buf_prepare(struct vb2_buffer *vb)
  583. {
  584. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  585. struct emmaprp_q_data *q_data;
  586. dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type);
  587. q_data = get_q_data(ctx, vb->vb2_queue->type);
  588. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  589. dprintk(ctx->dev,
  590. "%s data will not fit into plane(%lu < %lu)\n",
  591. __func__, vb2_plane_size(vb, 0),
  592. (long)q_data->sizeimage);
  593. return -EINVAL;
  594. }
  595. vb2_set_plane_payload(vb, 0, q_data->sizeimage);
  596. return 0;
  597. }
  598. static void emmaprp_buf_queue(struct vb2_buffer *vb)
  599. {
  600. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  601. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  602. v4l2_m2m_buf_queue(ctx->m2m_ctx, vbuf);
  603. }
  604. static const struct vb2_ops emmaprp_qops = {
  605. .queue_setup = emmaprp_queue_setup,
  606. .buf_prepare = emmaprp_buf_prepare,
  607. .buf_queue = emmaprp_buf_queue,
  608. .wait_prepare = vb2_ops_wait_prepare,
  609. .wait_finish = vb2_ops_wait_finish,
  610. };
  611. static int queue_init(void *priv, struct vb2_queue *src_vq,
  612. struct vb2_queue *dst_vq)
  613. {
  614. struct emmaprp_ctx *ctx = priv;
  615. int ret;
  616. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  617. src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  618. src_vq->drv_priv = ctx;
  619. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  620. src_vq->ops = &emmaprp_qops;
  621. src_vq->mem_ops = &vb2_dma_contig_memops;
  622. src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  623. src_vq->dev = ctx->dev->v4l2_dev.dev;
  624. src_vq->lock = &ctx->dev->dev_mutex;
  625. ret = vb2_queue_init(src_vq);
  626. if (ret)
  627. return ret;
  628. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  629. dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  630. dst_vq->drv_priv = ctx;
  631. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  632. dst_vq->ops = &emmaprp_qops;
  633. dst_vq->mem_ops = &vb2_dma_contig_memops;
  634. dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  635. dst_vq->dev = ctx->dev->v4l2_dev.dev;
  636. dst_vq->lock = &ctx->dev->dev_mutex;
  637. return vb2_queue_init(dst_vq);
  638. }
  639. /*
  640. * File operations
  641. */
  642. static int emmaprp_open(struct file *file)
  643. {
  644. struct emmaprp_dev *pcdev = video_drvdata(file);
  645. struct emmaprp_ctx *ctx;
  646. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  647. if (!ctx)
  648. return -ENOMEM;
  649. file->private_data = ctx;
  650. ctx->dev = pcdev;
  651. if (mutex_lock_interruptible(&pcdev->dev_mutex)) {
  652. kfree(ctx);
  653. return -ERESTARTSYS;
  654. }
  655. ctx->m2m_ctx = v4l2_m2m_ctx_init(pcdev->m2m_dev, ctx, &queue_init);
  656. if (IS_ERR(ctx->m2m_ctx)) {
  657. int ret = PTR_ERR(ctx->m2m_ctx);
  658. mutex_unlock(&pcdev->dev_mutex);
  659. kfree(ctx);
  660. return ret;
  661. }
  662. clk_prepare_enable(pcdev->clk_emma_ipg);
  663. clk_prepare_enable(pcdev->clk_emma_ahb);
  664. ctx->q_data[V4L2_M2M_SRC].fmt = &formats[1];
  665. ctx->q_data[V4L2_M2M_DST].fmt = &formats[0];
  666. mutex_unlock(&pcdev->dev_mutex);
  667. dprintk(pcdev, "Created instance %p, m2m_ctx: %p\n", ctx, ctx->m2m_ctx);
  668. return 0;
  669. }
  670. static int emmaprp_release(struct file *file)
  671. {
  672. struct emmaprp_dev *pcdev = video_drvdata(file);
  673. struct emmaprp_ctx *ctx = file->private_data;
  674. dprintk(pcdev, "Releasing instance %p\n", ctx);
  675. mutex_lock(&pcdev->dev_mutex);
  676. clk_disable_unprepare(pcdev->clk_emma_ahb);
  677. clk_disable_unprepare(pcdev->clk_emma_ipg);
  678. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  679. mutex_unlock(&pcdev->dev_mutex);
  680. kfree(ctx);
  681. return 0;
  682. }
  683. static __poll_t emmaprp_poll(struct file *file,
  684. struct poll_table_struct *wait)
  685. {
  686. struct emmaprp_dev *pcdev = video_drvdata(file);
  687. struct emmaprp_ctx *ctx = file->private_data;
  688. __poll_t res;
  689. mutex_lock(&pcdev->dev_mutex);
  690. res = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  691. mutex_unlock(&pcdev->dev_mutex);
  692. return res;
  693. }
  694. static int emmaprp_mmap(struct file *file, struct vm_area_struct *vma)
  695. {
  696. struct emmaprp_dev *pcdev = video_drvdata(file);
  697. struct emmaprp_ctx *ctx = file->private_data;
  698. int ret;
  699. if (mutex_lock_interruptible(&pcdev->dev_mutex))
  700. return -ERESTARTSYS;
  701. ret = v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  702. mutex_unlock(&pcdev->dev_mutex);
  703. return ret;
  704. }
  705. static const struct v4l2_file_operations emmaprp_fops = {
  706. .owner = THIS_MODULE,
  707. .open = emmaprp_open,
  708. .release = emmaprp_release,
  709. .poll = emmaprp_poll,
  710. .unlocked_ioctl = video_ioctl2,
  711. .mmap = emmaprp_mmap,
  712. };
  713. static const struct video_device emmaprp_videodev = {
  714. .name = MEM2MEM_NAME,
  715. .fops = &emmaprp_fops,
  716. .ioctl_ops = &emmaprp_ioctl_ops,
  717. .minor = -1,
  718. .release = video_device_release,
  719. .vfl_dir = VFL_DIR_M2M,
  720. };
  721. static const struct v4l2_m2m_ops m2m_ops = {
  722. .device_run = emmaprp_device_run,
  723. .job_abort = emmaprp_job_abort,
  724. };
  725. static int emmaprp_probe(struct platform_device *pdev)
  726. {
  727. struct emmaprp_dev *pcdev;
  728. struct video_device *vfd;
  729. struct resource *res;
  730. int irq, ret;
  731. pcdev = devm_kzalloc(&pdev->dev, sizeof(*pcdev), GFP_KERNEL);
  732. if (!pcdev)
  733. return -ENOMEM;
  734. spin_lock_init(&pcdev->irqlock);
  735. pcdev->clk_emma_ipg = devm_clk_get(&pdev->dev, "ipg");
  736. if (IS_ERR(pcdev->clk_emma_ipg)) {
  737. return PTR_ERR(pcdev->clk_emma_ipg);
  738. }
  739. pcdev->clk_emma_ahb = devm_clk_get(&pdev->dev, "ahb");
  740. if (IS_ERR(pcdev->clk_emma_ahb))
  741. return PTR_ERR(pcdev->clk_emma_ahb);
  742. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  743. pcdev->base_emma = devm_ioremap_resource(&pdev->dev, res);
  744. if (IS_ERR(pcdev->base_emma))
  745. return PTR_ERR(pcdev->base_emma);
  746. ret = v4l2_device_register(&pdev->dev, &pcdev->v4l2_dev);
  747. if (ret)
  748. return ret;
  749. mutex_init(&pcdev->dev_mutex);
  750. vfd = video_device_alloc();
  751. if (!vfd) {
  752. v4l2_err(&pcdev->v4l2_dev, "Failed to allocate video device\n");
  753. ret = -ENOMEM;
  754. goto unreg_dev;
  755. }
  756. *vfd = emmaprp_videodev;
  757. vfd->lock = &pcdev->dev_mutex;
  758. vfd->v4l2_dev = &pcdev->v4l2_dev;
  759. video_set_drvdata(vfd, pcdev);
  760. pcdev->vfd = vfd;
  761. v4l2_info(&pcdev->v4l2_dev, EMMAPRP_MODULE_NAME
  762. " Device registered as /dev/video%d\n", vfd->num);
  763. platform_set_drvdata(pdev, pcdev);
  764. irq = platform_get_irq(pdev, 0);
  765. if (irq < 0)
  766. return irq;
  767. ret = devm_request_irq(&pdev->dev, irq, emmaprp_irq, 0,
  768. dev_name(&pdev->dev), pcdev);
  769. if (ret)
  770. goto rel_vdev;
  771. pcdev->m2m_dev = v4l2_m2m_init(&m2m_ops);
  772. if (IS_ERR(pcdev->m2m_dev)) {
  773. v4l2_err(&pcdev->v4l2_dev, "Failed to init mem2mem device\n");
  774. ret = PTR_ERR(pcdev->m2m_dev);
  775. goto rel_vdev;
  776. }
  777. ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
  778. if (ret) {
  779. v4l2_err(&pcdev->v4l2_dev, "Failed to register video device\n");
  780. goto rel_m2m;
  781. }
  782. return 0;
  783. rel_m2m:
  784. v4l2_m2m_release(pcdev->m2m_dev);
  785. rel_vdev:
  786. video_device_release(vfd);
  787. unreg_dev:
  788. v4l2_device_unregister(&pcdev->v4l2_dev);
  789. mutex_destroy(&pcdev->dev_mutex);
  790. return ret;
  791. }
  792. static int emmaprp_remove(struct platform_device *pdev)
  793. {
  794. struct emmaprp_dev *pcdev = platform_get_drvdata(pdev);
  795. v4l2_info(&pcdev->v4l2_dev, "Removing " EMMAPRP_MODULE_NAME);
  796. video_unregister_device(pcdev->vfd);
  797. v4l2_m2m_release(pcdev->m2m_dev);
  798. v4l2_device_unregister(&pcdev->v4l2_dev);
  799. mutex_destroy(&pcdev->dev_mutex);
  800. return 0;
  801. }
  802. static struct platform_driver emmaprp_pdrv = {
  803. .probe = emmaprp_probe,
  804. .remove = emmaprp_remove,
  805. .driver = {
  806. .name = MEM2MEM_NAME,
  807. },
  808. };
  809. module_platform_driver(emmaprp_pdrv);