fimc-capture.c 50 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-v4l2.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "common.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. #include "media-dev.h"
  31. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  32. {
  33. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  34. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  35. int ret;
  36. unsigned long flags;
  37. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  38. return -EINVAL;
  39. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  40. ret = fimc_hw_camblk_cfg_writeback(fimc);
  41. if (ret < 0)
  42. return ret;
  43. }
  44. spin_lock_irqsave(&fimc->slock, flags);
  45. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  46. fimc_set_yuv_order(ctx);
  47. fimc_hw_set_camera_polarity(fimc, si);
  48. fimc_hw_set_camera_type(fimc, si);
  49. fimc_hw_set_camera_source(fimc, si);
  50. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  51. ret = fimc_set_scaler_info(ctx);
  52. if (!ret) {
  53. fimc_hw_set_input_path(ctx);
  54. fimc_hw_set_prescaler(ctx);
  55. fimc_hw_set_mainscaler(ctx);
  56. fimc_hw_set_target_format(ctx);
  57. fimc_hw_set_rotation(ctx);
  58. fimc_hw_set_effect(ctx);
  59. fimc_hw_set_output_path(ctx);
  60. fimc_hw_set_out_dma(ctx);
  61. if (fimc->drv_data->alpha_color)
  62. fimc_hw_set_rgb_alpha(ctx);
  63. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  64. }
  65. spin_unlock_irqrestore(&fimc->slock, flags);
  66. return ret;
  67. }
  68. /*
  69. * Reinitialize the driver so it is ready to start the streaming again.
  70. * Set fimc->state to indicate stream off and the hardware shut down state.
  71. * If not suspending (@suspend is false), return any buffers to videobuf2.
  72. * Otherwise put any owned buffers onto the pending buffers queue, so they
  73. * can be re-spun when the device is being resumed. Also perform FIMC
  74. * software reset and disable streaming on the whole pipeline if required.
  75. */
  76. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  77. {
  78. struct fimc_vid_cap *cap = &fimc->vid_cap;
  79. struct fimc_vid_buffer *buf;
  80. unsigned long flags;
  81. bool streaming;
  82. spin_lock_irqsave(&fimc->slock, flags);
  83. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  84. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  85. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  86. if (suspend)
  87. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  88. else
  89. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  90. /* Release unused buffers */
  91. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  92. buf = fimc_pending_queue_pop(cap);
  93. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  94. }
  95. /* If suspending put unused buffers onto pending queue */
  96. while (!list_empty(&cap->active_buf_q)) {
  97. buf = fimc_active_queue_pop(cap);
  98. if (suspend)
  99. fimc_pending_queue_add(cap, buf);
  100. else
  101. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  102. }
  103. fimc_hw_reset(fimc);
  104. cap->buf_index = 0;
  105. spin_unlock_irqrestore(&fimc->slock, flags);
  106. if (streaming)
  107. return fimc_pipeline_call(&cap->ve, set_stream, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. * @ctx: FIMC capture context
  128. *
  129. * To be called from within the interrupt handler with fimc.slock
  130. * spinlock held. It updates the camera pixel crop, rotation and
  131. * image flip in H/W.
  132. */
  133. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  134. {
  135. struct fimc_dev *fimc = ctx->fimc_dev;
  136. int ret;
  137. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  138. ret = fimc_set_scaler_info(ctx);
  139. if (ret)
  140. return ret;
  141. fimc_hw_set_prescaler(ctx);
  142. fimc_hw_set_mainscaler(ctx);
  143. fimc_hw_set_target_format(ctx);
  144. fimc_hw_set_rotation(ctx);
  145. fimc_hw_set_effect(ctx);
  146. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  147. fimc_hw_set_out_dma(ctx);
  148. if (fimc->drv_data->alpha_color)
  149. fimc_hw_set_rgb_alpha(ctx);
  150. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  151. return ret;
  152. }
  153. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  154. {
  155. struct fimc_vid_cap *cap = &fimc->vid_cap;
  156. struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
  157. struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
  158. struct fimc_frame *f = &cap->ctx->d_frame;
  159. struct fimc_vid_buffer *v_buf;
  160. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  161. wake_up(&fimc->irq_queue);
  162. goto done;
  163. }
  164. if (!list_empty(&cap->active_buf_q) &&
  165. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  166. v_buf = fimc_active_queue_pop(cap);
  167. v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
  168. v_buf->vb.sequence = cap->frame_count++;
  169. vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
  170. }
  171. if (!list_empty(&cap->pending_buf_q)) {
  172. v_buf = fimc_pending_queue_pop(cap);
  173. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  174. v_buf->index = cap->buf_index;
  175. /* Move the buffer to the capture active queue */
  176. fimc_active_queue_add(cap, v_buf);
  177. dbg("next frame: %d, done frame: %d",
  178. fimc_hw_get_frame_index(fimc), v_buf->index);
  179. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  180. cap->buf_index = 0;
  181. }
  182. /*
  183. * Set up a buffer at MIPI-CSIS if current image format
  184. * requires the frame embedded data capture.
  185. */
  186. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  187. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  188. unsigned int size = f->payload[plane];
  189. s32 index = fimc_hw_get_frame_index(fimc);
  190. void *vaddr;
  191. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  192. if (v_buf->index != index)
  193. continue;
  194. vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
  195. v4l2_subdev_call(csis, video, s_rx_buffer,
  196. vaddr, &size);
  197. break;
  198. }
  199. }
  200. if (cap->active_buf_cnt == 0) {
  201. if (deq_buf)
  202. clear_bit(ST_CAPT_RUN, &fimc->state);
  203. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  204. cap->buf_index = 0;
  205. } else {
  206. set_bit(ST_CAPT_RUN, &fimc->state);
  207. }
  208. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  209. fimc_capture_config_update(cap->ctx);
  210. done:
  211. if (cap->active_buf_cnt == 1) {
  212. fimc_deactivate_capture(fimc);
  213. clear_bit(ST_CAPT_STREAM, &fimc->state);
  214. }
  215. dbg("frame: %d, active_buf_cnt: %d",
  216. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  217. }
  218. static int start_streaming(struct vb2_queue *q, unsigned int count)
  219. {
  220. struct fimc_ctx *ctx = q->drv_priv;
  221. struct fimc_dev *fimc = ctx->fimc_dev;
  222. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  223. int min_bufs;
  224. int ret;
  225. vid_cap->frame_count = 0;
  226. ret = fimc_capture_hw_init(fimc);
  227. if (ret) {
  228. fimc_capture_state_cleanup(fimc, false);
  229. return ret;
  230. }
  231. set_bit(ST_CAPT_PEND, &fimc->state);
  232. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  233. if (vid_cap->active_buf_cnt >= min_bufs &&
  234. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  235. fimc_activate_capture(ctx);
  236. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  237. return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
  238. }
  239. return 0;
  240. }
  241. static void stop_streaming(struct vb2_queue *q)
  242. {
  243. struct fimc_ctx *ctx = q->drv_priv;
  244. struct fimc_dev *fimc = ctx->fimc_dev;
  245. if (!fimc_capture_active(fimc))
  246. return;
  247. fimc_stop_capture(fimc, false);
  248. }
  249. int fimc_capture_suspend(struct fimc_dev *fimc)
  250. {
  251. bool suspend = fimc_capture_busy(fimc);
  252. int ret = fimc_stop_capture(fimc, suspend);
  253. if (ret)
  254. return ret;
  255. return fimc_pipeline_call(&fimc->vid_cap.ve, close);
  256. }
  257. static void buffer_queue(struct vb2_buffer *vb);
  258. int fimc_capture_resume(struct fimc_dev *fimc)
  259. {
  260. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  261. struct exynos_video_entity *ve = &vid_cap->ve;
  262. struct fimc_vid_buffer *buf;
  263. int i;
  264. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  265. return 0;
  266. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  267. vid_cap->buf_index = 0;
  268. fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
  269. fimc_capture_hw_init(fimc);
  270. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  271. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  272. if (list_empty(&vid_cap->pending_buf_q))
  273. break;
  274. buf = fimc_pending_queue_pop(vid_cap);
  275. buffer_queue(&buf->vb.vb2_buf);
  276. }
  277. return 0;
  278. }
  279. static int queue_setup(struct vb2_queue *vq,
  280. unsigned int *num_buffers, unsigned int *num_planes,
  281. unsigned int sizes[], struct device *alloc_devs[])
  282. {
  283. struct fimc_ctx *ctx = vq->drv_priv;
  284. struct fimc_frame *frame = &ctx->d_frame;
  285. struct fimc_fmt *fmt = frame->fmt;
  286. unsigned long wh = frame->f_width * frame->f_height;
  287. int i;
  288. if (fmt == NULL)
  289. return -EINVAL;
  290. if (*num_planes) {
  291. if (*num_planes != fmt->memplanes)
  292. return -EINVAL;
  293. for (i = 0; i < *num_planes; i++)
  294. if (sizes[i] < (wh * fmt->depth[i]) / 8)
  295. return -EINVAL;
  296. return 0;
  297. }
  298. *num_planes = fmt->memplanes;
  299. for (i = 0; i < fmt->memplanes; i++) {
  300. unsigned int size = (wh * fmt->depth[i]) / 8;
  301. if (fimc_fmt_is_user_defined(fmt->color))
  302. sizes[i] = frame->payload[i];
  303. else
  304. sizes[i] = max_t(u32, size, frame->payload[i]);
  305. }
  306. return 0;
  307. }
  308. static int buffer_prepare(struct vb2_buffer *vb)
  309. {
  310. struct vb2_queue *vq = vb->vb2_queue;
  311. struct fimc_ctx *ctx = vq->drv_priv;
  312. int i;
  313. if (ctx->d_frame.fmt == NULL)
  314. return -EINVAL;
  315. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  316. unsigned long size = ctx->d_frame.payload[i];
  317. if (vb2_plane_size(vb, i) < size) {
  318. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  319. "User buffer too small (%ld < %ld)\n",
  320. vb2_plane_size(vb, i), size);
  321. return -EINVAL;
  322. }
  323. vb2_set_plane_payload(vb, i, size);
  324. }
  325. return 0;
  326. }
  327. static void buffer_queue(struct vb2_buffer *vb)
  328. {
  329. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  330. struct fimc_vid_buffer *buf
  331. = container_of(vbuf, struct fimc_vid_buffer, vb);
  332. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  333. struct fimc_dev *fimc = ctx->fimc_dev;
  334. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  335. struct exynos_video_entity *ve = &vid_cap->ve;
  336. unsigned long flags;
  337. int min_bufs;
  338. spin_lock_irqsave(&fimc->slock, flags);
  339. fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
  340. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  341. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  342. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  343. /* Setup the buffer directly for processing. */
  344. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  345. vid_cap->buf_index;
  346. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  347. buf->index = vid_cap->buf_index;
  348. fimc_active_queue_add(vid_cap, buf);
  349. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  350. vid_cap->buf_index = 0;
  351. } else {
  352. fimc_pending_queue_add(vid_cap, buf);
  353. }
  354. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  355. if (vb2_is_streaming(&vid_cap->vbq) &&
  356. vid_cap->active_buf_cnt >= min_bufs &&
  357. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  358. int ret;
  359. fimc_activate_capture(ctx);
  360. spin_unlock_irqrestore(&fimc->slock, flags);
  361. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  362. return;
  363. ret = fimc_pipeline_call(ve, set_stream, 1);
  364. if (ret < 0)
  365. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  366. return;
  367. }
  368. spin_unlock_irqrestore(&fimc->slock, flags);
  369. }
  370. static const struct vb2_ops fimc_capture_qops = {
  371. .queue_setup = queue_setup,
  372. .buf_prepare = buffer_prepare,
  373. .buf_queue = buffer_queue,
  374. .wait_prepare = vb2_ops_wait_prepare,
  375. .wait_finish = vb2_ops_wait_finish,
  376. .start_streaming = start_streaming,
  377. .stop_streaming = stop_streaming,
  378. };
  379. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  380. static int fimc_capture_open(struct file *file)
  381. {
  382. struct fimc_dev *fimc = video_drvdata(file);
  383. struct fimc_vid_cap *vc = &fimc->vid_cap;
  384. struct exynos_video_entity *ve = &vc->ve;
  385. int ret = -EBUSY;
  386. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  387. mutex_lock(&fimc->lock);
  388. if (fimc_m2m_active(fimc))
  389. goto unlock;
  390. set_bit(ST_CAPT_BUSY, &fimc->state);
  391. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  392. if (ret < 0)
  393. goto unlock;
  394. ret = v4l2_fh_open(file);
  395. if (ret) {
  396. pm_runtime_put_sync(&fimc->pdev->dev);
  397. goto unlock;
  398. }
  399. if (v4l2_fh_is_singular_file(file)) {
  400. fimc_md_graph_lock(ve);
  401. ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
  402. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  403. /*
  404. * Recreate controls of the the video node to drop
  405. * any controls inherited from the sensor subdev.
  406. */
  407. fimc_ctrls_delete(vc->ctx);
  408. ret = fimc_ctrls_create(vc->ctx);
  409. if (ret == 0)
  410. vc->inh_sensor_ctrls = false;
  411. }
  412. if (ret == 0)
  413. ve->vdev.entity.use_count++;
  414. fimc_md_graph_unlock(ve);
  415. if (ret == 0)
  416. ret = fimc_capture_set_default_format(fimc);
  417. if (ret < 0) {
  418. clear_bit(ST_CAPT_BUSY, &fimc->state);
  419. pm_runtime_put_sync(&fimc->pdev->dev);
  420. v4l2_fh_release(file);
  421. }
  422. }
  423. unlock:
  424. mutex_unlock(&fimc->lock);
  425. return ret;
  426. }
  427. static int fimc_capture_release(struct file *file)
  428. {
  429. struct fimc_dev *fimc = video_drvdata(file);
  430. struct fimc_vid_cap *vc = &fimc->vid_cap;
  431. bool close = v4l2_fh_is_singular_file(file);
  432. int ret;
  433. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  434. mutex_lock(&fimc->lock);
  435. if (close && vc->streaming) {
  436. media_pipeline_stop(&vc->ve.vdev.entity);
  437. vc->streaming = false;
  438. }
  439. ret = _vb2_fop_release(file, NULL);
  440. if (close) {
  441. clear_bit(ST_CAPT_BUSY, &fimc->state);
  442. fimc_pipeline_call(&vc->ve, close);
  443. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  444. fimc_md_graph_lock(&vc->ve);
  445. vc->ve.vdev.entity.use_count--;
  446. fimc_md_graph_unlock(&vc->ve);
  447. }
  448. pm_runtime_put_sync(&fimc->pdev->dev);
  449. mutex_unlock(&fimc->lock);
  450. return ret;
  451. }
  452. static const struct v4l2_file_operations fimc_capture_fops = {
  453. .owner = THIS_MODULE,
  454. .open = fimc_capture_open,
  455. .release = fimc_capture_release,
  456. .poll = vb2_fop_poll,
  457. .unlocked_ioctl = video_ioctl2,
  458. .mmap = vb2_fop_mmap,
  459. };
  460. /*
  461. * Format and crop negotiation helpers
  462. */
  463. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  464. u32 *width, u32 *height,
  465. u32 *code, u32 *fourcc, int pad)
  466. {
  467. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  468. struct fimc_dev *fimc = ctx->fimc_dev;
  469. const struct fimc_variant *var = fimc->variant;
  470. const struct fimc_pix_limit *pl = var->pix_limit;
  471. struct fimc_frame *dst = &ctx->d_frame;
  472. u32 depth, min_w, max_w, min_h, align_h = 3;
  473. u32 mask = FMT_FLAGS_CAM;
  474. struct fimc_fmt *ffmt;
  475. /* Conversion from/to JPEG or User Defined format is not supported */
  476. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  477. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  478. *code = ctx->s_frame.fmt->mbus_code;
  479. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  480. mask |= FMT_FLAGS_M2M;
  481. if (pad == FIMC_SD_PAD_SINK_FIFO)
  482. mask = FMT_FLAGS_WRITEBACK;
  483. ffmt = fimc_find_format(fourcc, code, mask, 0);
  484. if (WARN_ON(!ffmt))
  485. return NULL;
  486. if (code)
  487. *code = ffmt->mbus_code;
  488. if (fourcc)
  489. *fourcc = ffmt->fourcc;
  490. if (pad != FIMC_SD_PAD_SOURCE) {
  491. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  492. pl->scaler_dis_w : pl->scaler_en_w;
  493. /* Apply the camera input interface pixel constraints */
  494. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  495. height, max_t(u32, *height, 32),
  496. FIMC_CAMIF_MAX_HEIGHT,
  497. fimc_fmt_is_user_defined(ffmt->color) ?
  498. 3 : 1,
  499. 0);
  500. return ffmt;
  501. }
  502. /* Can't scale or crop in transparent (JPEG) transfer mode */
  503. if (fimc_fmt_is_user_defined(ffmt->color)) {
  504. *width = ctx->s_frame.f_width;
  505. *height = ctx->s_frame.f_height;
  506. return ffmt;
  507. }
  508. /* Apply the scaler and the output DMA constraints */
  509. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  510. if (ctx->state & FIMC_COMPOSE) {
  511. min_w = dst->offs_h + dst->width;
  512. min_h = dst->offs_v + dst->height;
  513. } else {
  514. min_w = var->min_out_pixsize;
  515. min_h = var->min_out_pixsize;
  516. }
  517. if (var->min_vsize_align == 1 && !rotation)
  518. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  519. depth = fimc_get_format_depth(ffmt);
  520. v4l_bound_align_image(width, min_w, max_w,
  521. ffs(var->min_out_pixsize) - 1,
  522. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  523. align_h,
  524. 64/(ALIGN(depth, 8)));
  525. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  526. pad, code ? *code : 0, *width, *height,
  527. dst->f_width, dst->f_height);
  528. return ffmt;
  529. }
  530. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  531. struct v4l2_rect *r,
  532. int target)
  533. {
  534. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  535. struct fimc_dev *fimc = ctx->fimc_dev;
  536. const struct fimc_variant *var = fimc->variant;
  537. const struct fimc_pix_limit *pl = var->pix_limit;
  538. struct fimc_frame *sink = &ctx->s_frame;
  539. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  540. u32 align_sz = 0, align_h = 4;
  541. u32 max_sc_h, max_sc_v;
  542. /* In JPEG transparent transfer mode cropping is not supported */
  543. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  544. r->width = sink->f_width;
  545. r->height = sink->f_height;
  546. r->left = r->top = 0;
  547. return;
  548. }
  549. if (target == V4L2_SEL_TGT_COMPOSE) {
  550. u32 tmp_min_h = ffs(sink->width) - 3;
  551. u32 tmp_min_v = ffs(sink->height) - 1;
  552. if (ctx->rotation != 90 && ctx->rotation != 270)
  553. align_h = 1;
  554. max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
  555. max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
  556. min_sz = var->min_out_pixsize;
  557. } else {
  558. u32 depth = fimc_get_format_depth(sink->fmt);
  559. align_sz = 64/ALIGN(depth, 8);
  560. min_sz = var->min_inp_pixsize;
  561. min_w = min_h = min_sz;
  562. max_sc_h = max_sc_v = 1;
  563. }
  564. /*
  565. * For the compose rectangle the following constraints must be met:
  566. * - it must fit in the sink pad format rectangle (f_width/f_height);
  567. * - maximum downscaling ratio is 64;
  568. * - maximum crop size depends if the rotator is used or not;
  569. * - the sink pad format width/height must be 4 multiple of the
  570. * prescaler ratios determined by sink pad size and source pad crop,
  571. * the prescaler ratio is returned by fimc_get_scaler_factor().
  572. */
  573. max_w = min_t(u32,
  574. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  575. rotate ? sink->f_height : sink->f_width);
  576. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  577. if (target == V4L2_SEL_TGT_COMPOSE) {
  578. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  579. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  580. if (rotate) {
  581. swap(max_sc_h, max_sc_v);
  582. swap(min_w, min_h);
  583. }
  584. }
  585. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  586. &r->height, min_h, max_h, align_h,
  587. align_sz);
  588. /* Adjust left/top if crop/compose rectangle is out of bounds */
  589. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  590. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  591. r->left = round_down(r->left, var->hor_offs_align);
  592. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  593. target, r->left, r->top, r->width, r->height,
  594. sink->f_width, sink->f_height);
  595. }
  596. /*
  597. * The video node ioctl operations
  598. */
  599. static int fimc_cap_querycap(struct file *file, void *priv,
  600. struct v4l2_capability *cap)
  601. {
  602. struct fimc_dev *fimc = video_drvdata(file);
  603. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  604. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  605. return 0;
  606. }
  607. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  608. struct v4l2_fmtdesc *f)
  609. {
  610. struct fimc_fmt *fmt;
  611. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  612. f->index);
  613. if (!fmt)
  614. return -EINVAL;
  615. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  616. f->pixelformat = fmt->fourcc;
  617. if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
  618. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  619. return 0;
  620. }
  621. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  622. {
  623. struct media_pad *pad = &me->pads[0];
  624. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  625. pad = media_entity_remote_pad(pad);
  626. if (!pad)
  627. break;
  628. me = pad->entity;
  629. pad = &me->pads[0];
  630. }
  631. return me;
  632. }
  633. /**
  634. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  635. * elements
  636. * @ctx: FIMC capture context
  637. * @tfmt: media bus format to try/set on subdevs
  638. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  639. * @set: true to set format on subdevs, false to try only
  640. */
  641. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  642. struct v4l2_mbus_framefmt *tfmt,
  643. struct fimc_fmt **fmt_id,
  644. bool set)
  645. {
  646. struct fimc_dev *fimc = ctx->fimc_dev;
  647. struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
  648. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  649. struct v4l2_subdev_format sfmt;
  650. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  651. struct media_entity *me;
  652. struct fimc_fmt *ffmt;
  653. struct media_pad *pad;
  654. int ret, i = 1;
  655. u32 fcc;
  656. if (WARN_ON(!sd || !tfmt))
  657. return -EINVAL;
  658. memset(&sfmt, 0, sizeof(sfmt));
  659. sfmt.format = *tfmt;
  660. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  661. me = fimc_pipeline_get_head(&sd->entity);
  662. while (1) {
  663. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  664. FMT_FLAGS_CAM, i++);
  665. if (ffmt == NULL) {
  666. /*
  667. * Notify user-space if common pixel code for
  668. * host and sensor does not exist.
  669. */
  670. return -EINVAL;
  671. }
  672. mf->code = tfmt->code = ffmt->mbus_code;
  673. /* set format on all pipeline subdevs */
  674. while (me != &fimc->vid_cap.subdev.entity) {
  675. sd = media_entity_to_v4l2_subdev(me);
  676. sfmt.pad = 0;
  677. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  678. if (ret)
  679. return ret;
  680. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  681. sfmt.pad = me->num_pads - 1;
  682. mf->code = tfmt->code;
  683. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  684. &sfmt);
  685. if (ret)
  686. return ret;
  687. }
  688. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  689. if (!pad)
  690. return -EINVAL;
  691. me = pad->entity;
  692. }
  693. if (mf->code != tfmt->code)
  694. continue;
  695. fcc = ffmt->fourcc;
  696. tfmt->width = mf->width;
  697. tfmt->height = mf->height;
  698. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  699. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  700. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  701. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  702. if (ffmt && ffmt->mbus_code)
  703. mf->code = ffmt->mbus_code;
  704. if (mf->width != tfmt->width || mf->height != tfmt->height)
  705. continue;
  706. tfmt->code = mf->code;
  707. break;
  708. }
  709. if (fmt_id && ffmt)
  710. *fmt_id = ffmt;
  711. *tfmt = *mf;
  712. return 0;
  713. }
  714. /**
  715. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  716. * @sensor: pointer to the sensor subdev
  717. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  718. * @num_planes: number of planes
  719. * @try: true to set the frame parameters, false to query only
  720. *
  721. * This function is used by this driver only for compressed/blob data formats.
  722. */
  723. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  724. struct v4l2_plane_pix_format *plane_fmt,
  725. unsigned int num_planes, bool try)
  726. {
  727. struct v4l2_mbus_frame_desc fd;
  728. int i, ret;
  729. int pad;
  730. for (i = 0; i < num_planes; i++)
  731. fd.entry[i].length = plane_fmt[i].sizeimage;
  732. pad = sensor->entity.num_pads - 1;
  733. if (try)
  734. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  735. else
  736. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  737. if (ret < 0)
  738. return ret;
  739. if (num_planes != fd.num_entries)
  740. return -EINVAL;
  741. for (i = 0; i < num_planes; i++)
  742. plane_fmt[i].sizeimage = fd.entry[i].length;
  743. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  744. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  745. fd.entry[0].length);
  746. return -EINVAL;
  747. }
  748. return 0;
  749. }
  750. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  751. struct v4l2_format *f)
  752. {
  753. struct fimc_dev *fimc = video_drvdata(file);
  754. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  755. return 0;
  756. }
  757. /*
  758. * Try or set format on the fimc.X.capture video node and additionally
  759. * on the whole pipeline if @try is false.
  760. * Locking: the caller must _not_ hold the graph mutex.
  761. */
  762. static int __video_try_or_set_format(struct fimc_dev *fimc,
  763. struct v4l2_format *f, bool try,
  764. struct fimc_fmt **inp_fmt,
  765. struct fimc_fmt **out_fmt)
  766. {
  767. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  768. struct fimc_vid_cap *vc = &fimc->vid_cap;
  769. struct exynos_video_entity *ve = &vc->ve;
  770. struct fimc_ctx *ctx = vc->ctx;
  771. unsigned int width = 0, height = 0;
  772. int ret = 0;
  773. /* Pre-configure format at the camera input interface, for JPEG only */
  774. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  775. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  776. NULL, &pix->pixelformat,
  777. FIMC_SD_PAD_SINK_CAM);
  778. if (try) {
  779. width = pix->width;
  780. height = pix->height;
  781. } else {
  782. ctx->s_frame.f_width = pix->width;
  783. ctx->s_frame.f_height = pix->height;
  784. }
  785. }
  786. /* Try the format at the scaler and the DMA output */
  787. *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  788. NULL, &pix->pixelformat,
  789. FIMC_SD_PAD_SOURCE);
  790. if (*out_fmt == NULL)
  791. return -EINVAL;
  792. /* Restore image width/height for JPEG (no resizing supported). */
  793. if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
  794. pix->width = width;
  795. pix->height = height;
  796. }
  797. /* Try to match format at the host and the sensor */
  798. if (!vc->user_subdev_api) {
  799. struct v4l2_mbus_framefmt mbus_fmt;
  800. struct v4l2_mbus_framefmt *mf;
  801. mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
  802. mf->code = (*out_fmt)->mbus_code;
  803. mf->width = pix->width;
  804. mf->height = pix->height;
  805. fimc_md_graph_lock(ve);
  806. ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
  807. fimc_md_graph_unlock(ve);
  808. if (ret < 0)
  809. return ret;
  810. pix->width = mf->width;
  811. pix->height = mf->height;
  812. }
  813. fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
  814. if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
  815. struct v4l2_subdev *sensor;
  816. fimc_md_graph_lock(ve);
  817. sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  818. if (sensor)
  819. fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
  820. (*out_fmt)->memplanes, try);
  821. else
  822. ret = -EPIPE;
  823. fimc_md_graph_unlock(ve);
  824. }
  825. return ret;
  826. }
  827. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  828. struct v4l2_format *f)
  829. {
  830. struct fimc_dev *fimc = video_drvdata(file);
  831. struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
  832. return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
  833. }
  834. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  835. enum fimc_color_fmt color)
  836. {
  837. bool jpeg = fimc_fmt_is_user_defined(color);
  838. ctx->scaler.enabled = !jpeg;
  839. fimc_ctrls_activate(ctx, !jpeg);
  840. if (jpeg)
  841. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  842. else
  843. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  844. }
  845. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  846. struct v4l2_format *f)
  847. {
  848. struct fimc_vid_cap *vc = &fimc->vid_cap;
  849. struct fimc_ctx *ctx = vc->ctx;
  850. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  851. struct fimc_frame *ff = &ctx->d_frame;
  852. struct fimc_fmt *inp_fmt = NULL;
  853. int ret, i;
  854. if (vb2_is_busy(&fimc->vid_cap.vbq))
  855. return -EBUSY;
  856. ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
  857. if (ret < 0)
  858. return ret;
  859. /* Update RGB Alpha control state and value range */
  860. fimc_alpha_ctrl_update(ctx);
  861. for (i = 0; i < ff->fmt->memplanes; i++) {
  862. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  863. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  864. }
  865. set_frame_bounds(ff, pix->width, pix->height);
  866. /* Reset the composition rectangle if not yet configured */
  867. if (!(ctx->state & FIMC_COMPOSE))
  868. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  869. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  870. /* Reset cropping and set format at the camera interface input */
  871. if (!vc->user_subdev_api) {
  872. ctx->s_frame.fmt = inp_fmt;
  873. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  874. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  875. }
  876. return ret;
  877. }
  878. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  879. struct v4l2_format *f)
  880. {
  881. struct fimc_dev *fimc = video_drvdata(file);
  882. return __fimc_capture_set_format(fimc, f);
  883. }
  884. static int fimc_cap_enum_input(struct file *file, void *priv,
  885. struct v4l2_input *i)
  886. {
  887. struct fimc_dev *fimc = video_drvdata(file);
  888. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  889. struct v4l2_subdev *sd;
  890. if (i->index != 0)
  891. return -EINVAL;
  892. i->type = V4L2_INPUT_TYPE_CAMERA;
  893. fimc_md_graph_lock(ve);
  894. sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  895. fimc_md_graph_unlock(ve);
  896. if (sd)
  897. strlcpy(i->name, sd->name, sizeof(i->name));
  898. return 0;
  899. }
  900. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  901. {
  902. return i == 0 ? i : -EINVAL;
  903. }
  904. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  905. {
  906. *i = 0;
  907. return 0;
  908. }
  909. /**
  910. * fimc_pipeline_validate - check for formats inconsistencies
  911. * between source and sink pad of each link
  912. * @fimc: the FIMC device this context applies to
  913. *
  914. * Return 0 if all formats match or -EPIPE otherwise.
  915. */
  916. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  917. {
  918. struct v4l2_subdev_format sink_fmt, src_fmt;
  919. struct fimc_vid_cap *vc = &fimc->vid_cap;
  920. struct v4l2_subdev *sd = &vc->subdev;
  921. struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
  922. struct media_pad *sink_pad, *src_pad;
  923. int i, ret;
  924. while (1) {
  925. /*
  926. * Find current entity sink pad and any remote sink pad linked
  927. * to it. We stop if there is no sink pad in current entity or
  928. * it is not linked to any other remote entity.
  929. */
  930. src_pad = NULL;
  931. for (i = 0; i < sd->entity.num_pads; i++) {
  932. struct media_pad *p = &sd->entity.pads[i];
  933. if (p->flags & MEDIA_PAD_FL_SINK) {
  934. sink_pad = p;
  935. src_pad = media_entity_remote_pad(sink_pad);
  936. if (src_pad)
  937. break;
  938. }
  939. }
  940. if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
  941. break;
  942. /* Don't call FIMC subdev operation to avoid nested locking */
  943. if (sd == &vc->subdev) {
  944. struct fimc_frame *ff = &vc->ctx->s_frame;
  945. sink_fmt.format.width = ff->f_width;
  946. sink_fmt.format.height = ff->f_height;
  947. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  948. } else {
  949. sink_fmt.pad = sink_pad->index;
  950. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  951. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  952. if (ret < 0 && ret != -ENOIOCTLCMD)
  953. return -EPIPE;
  954. }
  955. /* Retrieve format at the source pad */
  956. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  957. src_fmt.pad = src_pad->index;
  958. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  959. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  960. if (ret < 0 && ret != -ENOIOCTLCMD)
  961. return -EPIPE;
  962. if (src_fmt.format.width != sink_fmt.format.width ||
  963. src_fmt.format.height != sink_fmt.format.height ||
  964. src_fmt.format.code != sink_fmt.format.code)
  965. return -EPIPE;
  966. if (sd == p->subdevs[IDX_SENSOR] &&
  967. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  968. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  969. struct fimc_frame *frame = &vc->ctx->d_frame;
  970. unsigned int i;
  971. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  972. frame->fmt->memplanes,
  973. false);
  974. if (ret < 0)
  975. return -EPIPE;
  976. for (i = 0; i < frame->fmt->memplanes; i++)
  977. if (frame->payload[i] < plane_fmt[i].sizeimage)
  978. return -EPIPE;
  979. }
  980. }
  981. return 0;
  982. }
  983. static int fimc_cap_streamon(struct file *file, void *priv,
  984. enum v4l2_buf_type type)
  985. {
  986. struct fimc_dev *fimc = video_drvdata(file);
  987. struct fimc_vid_cap *vc = &fimc->vid_cap;
  988. struct media_entity *entity = &vc->ve.vdev.entity;
  989. struct fimc_source_info *si = NULL;
  990. struct v4l2_subdev *sd;
  991. int ret;
  992. if (fimc_capture_active(fimc))
  993. return -EBUSY;
  994. ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
  995. if (ret < 0)
  996. return ret;
  997. sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
  998. if (sd)
  999. si = v4l2_get_subdev_hostdata(sd);
  1000. if (si == NULL) {
  1001. ret = -EPIPE;
  1002. goto err_p_stop;
  1003. }
  1004. /*
  1005. * Save configuration data related to currently attached image
  1006. * sensor or other data source, e.g. FIMC-IS.
  1007. */
  1008. vc->source_config = *si;
  1009. if (vc->input == GRP_ID_FIMC_IS)
  1010. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1011. if (vc->user_subdev_api) {
  1012. ret = fimc_pipeline_validate(fimc);
  1013. if (ret < 0)
  1014. goto err_p_stop;
  1015. }
  1016. ret = vb2_ioctl_streamon(file, priv, type);
  1017. if (!ret) {
  1018. vc->streaming = true;
  1019. return ret;
  1020. }
  1021. err_p_stop:
  1022. media_pipeline_stop(entity);
  1023. return ret;
  1024. }
  1025. static int fimc_cap_streamoff(struct file *file, void *priv,
  1026. enum v4l2_buf_type type)
  1027. {
  1028. struct fimc_dev *fimc = video_drvdata(file);
  1029. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1030. int ret;
  1031. ret = vb2_ioctl_streamoff(file, priv, type);
  1032. if (ret < 0)
  1033. return ret;
  1034. media_pipeline_stop(&vc->ve.vdev.entity);
  1035. vc->streaming = false;
  1036. return 0;
  1037. }
  1038. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1039. struct v4l2_requestbuffers *reqbufs)
  1040. {
  1041. struct fimc_dev *fimc = video_drvdata(file);
  1042. int ret;
  1043. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1044. if (!ret)
  1045. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1046. return ret;
  1047. }
  1048. static int fimc_cap_g_selection(struct file *file, void *fh,
  1049. struct v4l2_selection *s)
  1050. {
  1051. struct fimc_dev *fimc = video_drvdata(file);
  1052. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1053. struct fimc_frame *f = &ctx->s_frame;
  1054. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  1055. return -EINVAL;
  1056. switch (s->target) {
  1057. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1058. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1059. f = &ctx->d_frame;
  1060. /* fall through */
  1061. case V4L2_SEL_TGT_CROP_BOUNDS:
  1062. case V4L2_SEL_TGT_CROP_DEFAULT:
  1063. s->r.left = 0;
  1064. s->r.top = 0;
  1065. s->r.width = f->o_width;
  1066. s->r.height = f->o_height;
  1067. return 0;
  1068. case V4L2_SEL_TGT_COMPOSE:
  1069. f = &ctx->d_frame;
  1070. /* fall through */
  1071. case V4L2_SEL_TGT_CROP:
  1072. s->r.left = f->offs_h;
  1073. s->r.top = f->offs_v;
  1074. s->r.width = f->width;
  1075. s->r.height = f->height;
  1076. return 0;
  1077. }
  1078. return -EINVAL;
  1079. }
  1080. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1081. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1082. {
  1083. if (a->left < b->left || a->top < b->top)
  1084. return 0;
  1085. if (a->left + a->width > b->left + b->width)
  1086. return 0;
  1087. if (a->top + a->height > b->top + b->height)
  1088. return 0;
  1089. return 1;
  1090. }
  1091. static int fimc_cap_s_selection(struct file *file, void *fh,
  1092. struct v4l2_selection *s)
  1093. {
  1094. struct fimc_dev *fimc = video_drvdata(file);
  1095. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1096. struct v4l2_rect rect = s->r;
  1097. struct fimc_frame *f;
  1098. unsigned long flags;
  1099. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  1100. return -EINVAL;
  1101. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1102. f = &ctx->d_frame;
  1103. else if (s->target == V4L2_SEL_TGT_CROP)
  1104. f = &ctx->s_frame;
  1105. else
  1106. return -EINVAL;
  1107. fimc_capture_try_selection(ctx, &rect, s->target);
  1108. if (s->flags & V4L2_SEL_FLAG_LE &&
  1109. !enclosed_rectangle(&rect, &s->r))
  1110. return -ERANGE;
  1111. if (s->flags & V4L2_SEL_FLAG_GE &&
  1112. !enclosed_rectangle(&s->r, &rect))
  1113. return -ERANGE;
  1114. s->r = rect;
  1115. spin_lock_irqsave(&fimc->slock, flags);
  1116. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1117. s->r.height);
  1118. spin_unlock_irqrestore(&fimc->slock, flags);
  1119. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1120. return 0;
  1121. }
  1122. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1123. .vidioc_querycap = fimc_cap_querycap,
  1124. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1125. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1126. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1127. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1128. .vidioc_reqbufs = fimc_cap_reqbufs,
  1129. .vidioc_querybuf = vb2_ioctl_querybuf,
  1130. .vidioc_qbuf = vb2_ioctl_qbuf,
  1131. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1132. .vidioc_expbuf = vb2_ioctl_expbuf,
  1133. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1134. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1135. .vidioc_streamon = fimc_cap_streamon,
  1136. .vidioc_streamoff = fimc_cap_streamoff,
  1137. .vidioc_g_selection = fimc_cap_g_selection,
  1138. .vidioc_s_selection = fimc_cap_s_selection,
  1139. .vidioc_enum_input = fimc_cap_enum_input,
  1140. .vidioc_s_input = fimc_cap_s_input,
  1141. .vidioc_g_input = fimc_cap_g_input,
  1142. };
  1143. /* Capture subdev media entity operations */
  1144. static int fimc_link_setup(struct media_entity *entity,
  1145. const struct media_pad *local,
  1146. const struct media_pad *remote, u32 flags)
  1147. {
  1148. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1149. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1150. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1151. struct v4l2_subdev *sensor;
  1152. if (!is_media_entity_v4l2_subdev(remote->entity))
  1153. return -EINVAL;
  1154. if (WARN_ON(fimc == NULL))
  1155. return 0;
  1156. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1157. local->entity->name, remote->entity->name, flags,
  1158. fimc->vid_cap.input);
  1159. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1160. fimc->vid_cap.input = 0;
  1161. return 0;
  1162. }
  1163. if (vc->input != 0)
  1164. return -EBUSY;
  1165. vc->input = sd->grp_id;
  1166. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1167. return 0;
  1168. /* Inherit V4L2 controls from the image sensor subdev. */
  1169. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1170. if (sensor == NULL)
  1171. return 0;
  1172. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1173. sensor->ctrl_handler, NULL);
  1174. }
  1175. static const struct media_entity_operations fimc_sd_media_ops = {
  1176. .link_setup = fimc_link_setup,
  1177. };
  1178. /**
  1179. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1180. * @sd: pointer to a subdev generating the notification
  1181. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1182. * @arg: pointer to an u32 type integer that stores the frame payload value
  1183. *
  1184. * The End Of Frame notification sent by sensor subdev in its still capture
  1185. * mode. If there is only a single VSYNC generated by the sensor at the
  1186. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1187. * (end of frame) interrupt. And this notification is used to complete the
  1188. * frame capture and returning a buffer to user-space. Subdev drivers should
  1189. * call this notification from their last 'End of frame capture' interrupt.
  1190. */
  1191. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1192. void *arg)
  1193. {
  1194. struct fimc_source_info *si;
  1195. struct fimc_vid_buffer *buf;
  1196. struct fimc_md *fmd;
  1197. struct fimc_dev *fimc;
  1198. unsigned long flags;
  1199. if (sd == NULL)
  1200. return;
  1201. si = v4l2_get_subdev_hostdata(sd);
  1202. fmd = entity_to_fimc_mdev(&sd->entity);
  1203. spin_lock_irqsave(&fmd->slock, flags);
  1204. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1205. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1206. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1207. unsigned long irq_flags;
  1208. spin_lock_irqsave(&fimc->slock, irq_flags);
  1209. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1210. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1211. struct fimc_vid_buffer, list);
  1212. vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
  1213. *((u32 *)arg));
  1214. }
  1215. fimc_capture_irq_handler(fimc, 1);
  1216. fimc_deactivate_capture(fimc);
  1217. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1218. }
  1219. spin_unlock_irqrestore(&fmd->slock, flags);
  1220. }
  1221. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1222. struct v4l2_subdev_pad_config *cfg,
  1223. struct v4l2_subdev_mbus_code_enum *code)
  1224. {
  1225. struct fimc_fmt *fmt;
  1226. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1227. if (!fmt)
  1228. return -EINVAL;
  1229. code->code = fmt->mbus_code;
  1230. return 0;
  1231. }
  1232. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1233. struct v4l2_subdev_pad_config *cfg,
  1234. struct v4l2_subdev_format *fmt)
  1235. {
  1236. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1237. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1238. struct fimc_frame *ff = &ctx->s_frame;
  1239. struct v4l2_mbus_framefmt *mf;
  1240. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1241. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1242. fmt->format = *mf;
  1243. return 0;
  1244. }
  1245. mf = &fmt->format;
  1246. mutex_lock(&fimc->lock);
  1247. switch (fmt->pad) {
  1248. case FIMC_SD_PAD_SOURCE:
  1249. if (!WARN_ON(ff->fmt == NULL))
  1250. mf->code = ff->fmt->mbus_code;
  1251. /* Sink pads crop rectangle size */
  1252. mf->width = ff->width;
  1253. mf->height = ff->height;
  1254. break;
  1255. case FIMC_SD_PAD_SINK_FIFO:
  1256. *mf = fimc->vid_cap.wb_fmt;
  1257. break;
  1258. case FIMC_SD_PAD_SINK_CAM:
  1259. default:
  1260. *mf = fimc->vid_cap.ci_fmt;
  1261. break;
  1262. }
  1263. mutex_unlock(&fimc->lock);
  1264. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1265. return 0;
  1266. }
  1267. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1268. struct v4l2_subdev_pad_config *cfg,
  1269. struct v4l2_subdev_format *fmt)
  1270. {
  1271. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1272. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1273. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1274. struct fimc_ctx *ctx = vc->ctx;
  1275. struct fimc_frame *ff;
  1276. struct fimc_fmt *ffmt;
  1277. dbg("pad%d: code: 0x%x, %dx%d",
  1278. fmt->pad, mf->code, mf->width, mf->height);
  1279. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1280. return -EBUSY;
  1281. mutex_lock(&fimc->lock);
  1282. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1283. &mf->code, NULL, fmt->pad);
  1284. mutex_unlock(&fimc->lock);
  1285. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1286. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1287. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1288. *mf = fmt->format;
  1289. return 0;
  1290. }
  1291. /* There must be a bug in the driver if this happens */
  1292. if (WARN_ON(ffmt == NULL))
  1293. return -EINVAL;
  1294. /* Update RGB Alpha control state and value range */
  1295. fimc_alpha_ctrl_update(ctx);
  1296. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1297. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1298. ff = &ctx->d_frame;
  1299. /* Sink pads crop rectangle size */
  1300. mf->width = ctx->s_frame.width;
  1301. mf->height = ctx->s_frame.height;
  1302. } else {
  1303. ff = &ctx->s_frame;
  1304. }
  1305. mutex_lock(&fimc->lock);
  1306. set_frame_bounds(ff, mf->width, mf->height);
  1307. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1308. vc->wb_fmt = *mf;
  1309. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1310. vc->ci_fmt = *mf;
  1311. ff->fmt = ffmt;
  1312. /* Reset the crop rectangle if required. */
  1313. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1314. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1315. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1316. ctx->state &= ~FIMC_COMPOSE;
  1317. mutex_unlock(&fimc->lock);
  1318. return 0;
  1319. }
  1320. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1321. struct v4l2_subdev_pad_config *cfg,
  1322. struct v4l2_subdev_selection *sel)
  1323. {
  1324. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1325. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1326. struct fimc_frame *f = &ctx->s_frame;
  1327. struct v4l2_rect *r = &sel->r;
  1328. struct v4l2_rect *try_sel;
  1329. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1330. return -EINVAL;
  1331. mutex_lock(&fimc->lock);
  1332. switch (sel->target) {
  1333. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1334. f = &ctx->d_frame;
  1335. /* fall through */
  1336. case V4L2_SEL_TGT_CROP_BOUNDS:
  1337. r->width = f->o_width;
  1338. r->height = f->o_height;
  1339. r->left = 0;
  1340. r->top = 0;
  1341. mutex_unlock(&fimc->lock);
  1342. return 0;
  1343. case V4L2_SEL_TGT_CROP:
  1344. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1345. break;
  1346. case V4L2_SEL_TGT_COMPOSE:
  1347. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1348. f = &ctx->d_frame;
  1349. break;
  1350. default:
  1351. mutex_unlock(&fimc->lock);
  1352. return -EINVAL;
  1353. }
  1354. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1355. sel->r = *try_sel;
  1356. } else {
  1357. r->left = f->offs_h;
  1358. r->top = f->offs_v;
  1359. r->width = f->width;
  1360. r->height = f->height;
  1361. }
  1362. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1363. sel->pad, r->left, r->top, r->width, r->height,
  1364. f->f_width, f->f_height);
  1365. mutex_unlock(&fimc->lock);
  1366. return 0;
  1367. }
  1368. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1369. struct v4l2_subdev_pad_config *cfg,
  1370. struct v4l2_subdev_selection *sel)
  1371. {
  1372. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1373. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1374. struct fimc_frame *f = &ctx->s_frame;
  1375. struct v4l2_rect *r = &sel->r;
  1376. struct v4l2_rect *try_sel;
  1377. unsigned long flags;
  1378. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1379. return -EINVAL;
  1380. mutex_lock(&fimc->lock);
  1381. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1382. switch (sel->target) {
  1383. case V4L2_SEL_TGT_CROP:
  1384. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1385. break;
  1386. case V4L2_SEL_TGT_COMPOSE:
  1387. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1388. f = &ctx->d_frame;
  1389. break;
  1390. default:
  1391. mutex_unlock(&fimc->lock);
  1392. return -EINVAL;
  1393. }
  1394. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1395. *try_sel = sel->r;
  1396. } else {
  1397. spin_lock_irqsave(&fimc->slock, flags);
  1398. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1399. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1400. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1401. ctx->state |= FIMC_COMPOSE;
  1402. spin_unlock_irqrestore(&fimc->slock, flags);
  1403. }
  1404. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1405. r->width, r->height);
  1406. mutex_unlock(&fimc->lock);
  1407. return 0;
  1408. }
  1409. static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1410. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1411. .get_selection = fimc_subdev_get_selection,
  1412. .set_selection = fimc_subdev_set_selection,
  1413. .get_fmt = fimc_subdev_get_fmt,
  1414. .set_fmt = fimc_subdev_set_fmt,
  1415. };
  1416. static const struct v4l2_subdev_ops fimc_subdev_ops = {
  1417. .pad = &fimc_subdev_pad_ops,
  1418. };
  1419. /* Set default format at the sensor and host interface */
  1420. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1421. {
  1422. struct v4l2_format fmt = {
  1423. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1424. .fmt.pix_mp = {
  1425. .width = FIMC_DEFAULT_WIDTH,
  1426. .height = FIMC_DEFAULT_HEIGHT,
  1427. .pixelformat = V4L2_PIX_FMT_YUYV,
  1428. .field = V4L2_FIELD_NONE,
  1429. .colorspace = V4L2_COLORSPACE_JPEG,
  1430. },
  1431. };
  1432. return __fimc_capture_set_format(fimc, &fmt);
  1433. }
  1434. /* fimc->lock must be already initialized */
  1435. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1436. struct v4l2_device *v4l2_dev)
  1437. {
  1438. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1439. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1440. struct fimc_ctx *ctx;
  1441. struct fimc_vid_cap *vid_cap;
  1442. struct fimc_fmt *fmt;
  1443. int ret = -ENOMEM;
  1444. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1445. if (!ctx)
  1446. return -ENOMEM;
  1447. ctx->fimc_dev = fimc;
  1448. ctx->in_path = FIMC_IO_CAMERA;
  1449. ctx->out_path = FIMC_IO_DMA;
  1450. ctx->state = FIMC_CTX_CAP;
  1451. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1452. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1453. memset(vfd, 0, sizeof(*vfd));
  1454. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1455. vfd->fops = &fimc_capture_fops;
  1456. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1457. vfd->v4l2_dev = v4l2_dev;
  1458. vfd->minor = -1;
  1459. vfd->release = video_device_release_empty;
  1460. vfd->queue = q;
  1461. vfd->lock = &fimc->lock;
  1462. video_set_drvdata(vfd, fimc);
  1463. vid_cap = &fimc->vid_cap;
  1464. vid_cap->active_buf_cnt = 0;
  1465. vid_cap->reqbufs_count = 0;
  1466. vid_cap->ctx = ctx;
  1467. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1468. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1469. memset(q, 0, sizeof(*q));
  1470. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1471. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1472. q->drv_priv = ctx;
  1473. q->ops = &fimc_capture_qops;
  1474. q->mem_ops = &vb2_dma_contig_memops;
  1475. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1476. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1477. q->lock = &fimc->lock;
  1478. q->dev = &fimc->pdev->dev;
  1479. ret = vb2_queue_init(q);
  1480. if (ret)
  1481. goto err_free_ctx;
  1482. /* Default format configuration */
  1483. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1484. vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
  1485. vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
  1486. vid_cap->ci_fmt.code = fmt->mbus_code;
  1487. ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
  1488. ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
  1489. ctx->s_frame.fmt = fmt;
  1490. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
  1491. vid_cap->wb_fmt = vid_cap->ci_fmt;
  1492. vid_cap->wb_fmt.code = fmt->mbus_code;
  1493. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1494. vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
  1495. ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
  1496. if (ret)
  1497. goto err_free_ctx;
  1498. ret = fimc_ctrls_create(ctx);
  1499. if (ret)
  1500. goto err_me_cleanup;
  1501. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1502. if (ret)
  1503. goto err_ctrl_free;
  1504. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1505. vfd->name, video_device_node_name(vfd));
  1506. vfd->ctrl_handler = &ctx->ctrls.handler;
  1507. return 0;
  1508. err_ctrl_free:
  1509. fimc_ctrls_delete(ctx);
  1510. err_me_cleanup:
  1511. media_entity_cleanup(&vfd->entity);
  1512. err_free_ctx:
  1513. kfree(ctx);
  1514. return ret;
  1515. }
  1516. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1517. {
  1518. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1519. int ret;
  1520. if (fimc == NULL)
  1521. return -ENXIO;
  1522. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1523. if (ret)
  1524. return ret;
  1525. fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
  1526. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1527. if (ret) {
  1528. fimc_unregister_m2m_device(fimc);
  1529. fimc->vid_cap.ve.pipe = NULL;
  1530. }
  1531. return ret;
  1532. }
  1533. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1534. {
  1535. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1536. struct video_device *vdev;
  1537. if (fimc == NULL)
  1538. return;
  1539. mutex_lock(&fimc->lock);
  1540. fimc_unregister_m2m_device(fimc);
  1541. vdev = &fimc->vid_cap.ve.vdev;
  1542. if (video_is_registered(vdev)) {
  1543. video_unregister_device(vdev);
  1544. media_entity_cleanup(&vdev->entity);
  1545. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1546. fimc->vid_cap.ve.pipe = NULL;
  1547. }
  1548. kfree(fimc->vid_cap.ctx);
  1549. fimc->vid_cap.ctx = NULL;
  1550. mutex_unlock(&fimc->lock);
  1551. }
  1552. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1553. .registered = fimc_capture_subdev_registered,
  1554. .unregistered = fimc_capture_subdev_unregistered,
  1555. };
  1556. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1557. {
  1558. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1559. int ret;
  1560. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1561. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1562. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1563. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1564. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1565. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1566. ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
  1567. fimc->vid_cap.sd_pads);
  1568. if (ret)
  1569. return ret;
  1570. sd->entity.ops = &fimc_sd_media_ops;
  1571. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1572. v4l2_set_subdevdata(sd, fimc);
  1573. return 0;
  1574. }
  1575. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1576. {
  1577. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1578. v4l2_device_unregister_subdev(sd);
  1579. media_entity_cleanup(&sd->entity);
  1580. v4l2_set_subdevdata(sd, NULL);
  1581. }