saa7164-core.c 41 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/list.h>
  19. #include <linux/module.h>
  20. #include <linux/moduleparam.h>
  21. #include <linux/kmod.h>
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/delay.h>
  26. #include <asm/div64.h>
  27. #ifdef CONFIG_PROC_FS
  28. #include <linux/proc_fs.h>
  29. #endif
  30. #include "saa7164.h"
  31. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  32. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  33. MODULE_LICENSE("GPL");
  34. /*
  35. * 1 Basic
  36. * 2
  37. * 4 i2c
  38. * 8 api
  39. * 16 cmd
  40. * 32 bus
  41. */
  42. unsigned int saa_debug;
  43. module_param_named(debug, saa_debug, int, 0644);
  44. MODULE_PARM_DESC(debug, "enable debug messages");
  45. static unsigned int fw_debug;
  46. module_param(fw_debug, int, 0644);
  47. MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
  48. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  49. module_param(encoder_buffers, int, 0644);
  50. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  51. unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
  52. module_param(vbi_buffers, int, 0644);
  53. MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
  54. unsigned int waitsecs = 10;
  55. module_param(waitsecs, int, 0644);
  56. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  57. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  58. module_param_array(card, int, NULL, 0444);
  59. MODULE_PARM_DESC(card, "card type");
  60. static unsigned int print_histogram = 64;
  61. module_param(print_histogram, int, 0644);
  62. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  63. unsigned int crc_checking = 1;
  64. module_param(crc_checking, int, 0644);
  65. MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
  66. static unsigned int guard_checking = 1;
  67. module_param(guard_checking, int, 0644);
  68. MODULE_PARM_DESC(guard_checking,
  69. "enable dma sanity checking for buffer overruns");
  70. static bool enable_msi = true;
  71. module_param(enable_msi, bool, 0444);
  72. MODULE_PARM_DESC(enable_msi,
  73. "enable the use of an msi interrupt if available");
  74. static unsigned int saa7164_devcount;
  75. static DEFINE_MUTEX(devlist);
  76. LIST_HEAD(saa7164_devlist);
  77. #define INT_SIZE 16
  78. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  79. {
  80. u8 *p = (u8 *)buf->cpu;
  81. int i;
  82. for (i = 0; i < buf->actual_size; i += 2048) {
  83. if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
  84. (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
  85. printk(KERN_ERR "No pack at 0x%x\n", i);
  86. #if 0
  87. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  88. p + 1, 32, false);
  89. #endif
  90. }
  91. }
  92. }
  93. #define FIXED_VIDEO_PID 0xf1
  94. #define FIXED_AUDIO_PID 0xf2
  95. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  96. {
  97. struct saa7164_port *port = buf->port;
  98. u32 i;
  99. u8 cc, a;
  100. u16 pid;
  101. u8 *bufcpu = (u8 *)buf->cpu;
  102. port->sync_errors = 0;
  103. port->v_cc_errors = 0;
  104. port->a_cc_errors = 0;
  105. for (i = 0; i < buf->actual_size; i += 188) {
  106. if (*(bufcpu + i) != 0x47)
  107. port->sync_errors++;
  108. /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
  109. pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
  110. cc = *(bufcpu + i + 3) & 0x0f;
  111. if (pid == FIXED_VIDEO_PID) {
  112. a = ((port->last_v_cc + 1) & 0x0f);
  113. if (a != cc) {
  114. printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
  115. port->last_v_cc, cc, i);
  116. port->v_cc_errors++;
  117. }
  118. port->last_v_cc = cc;
  119. } else
  120. if (pid == FIXED_AUDIO_PID) {
  121. a = ((port->last_a_cc + 1) & 0x0f);
  122. if (a != cc) {
  123. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
  124. port->last_a_cc, cc, i);
  125. port->a_cc_errors++;
  126. }
  127. port->last_a_cc = cc;
  128. }
  129. }
  130. /* Only report errors if we've been through this function atleast
  131. * once already and the cached cc values are primed. First time through
  132. * always generates errors.
  133. */
  134. if (port->v_cc_errors && (port->done_first_interrupt > 1))
  135. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  136. if (port->a_cc_errors && (port->done_first_interrupt > 1))
  137. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  138. if (port->sync_errors && (port->done_first_interrupt > 1))
  139. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  140. if (port->done_first_interrupt == 1)
  141. port->done_first_interrupt++;
  142. }
  143. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  144. {
  145. int i;
  146. memset(hg, 0, sizeof(struct saa7164_histogram));
  147. strcpy(hg->name, name);
  148. /* First 30ms x 1ms */
  149. for (i = 0; i < 30; i++)
  150. hg->counter1[0 + i].val = i;
  151. /* 30 - 200ms x 10ms */
  152. for (i = 0; i < 18; i++)
  153. hg->counter1[30 + i].val = 30 + (i * 10);
  154. /* 200 - 2000ms x 100ms */
  155. for (i = 0; i < 15; i++)
  156. hg->counter1[48 + i].val = 200 + (i * 200);
  157. /* Catch all massive value (2secs) */
  158. hg->counter1[55].val = 2000;
  159. /* Catch all massive value (4secs) */
  160. hg->counter1[56].val = 4000;
  161. /* Catch all massive value (8secs) */
  162. hg->counter1[57].val = 8000;
  163. /* Catch all massive value (15secs) */
  164. hg->counter1[58].val = 15000;
  165. /* Catch all massive value (30secs) */
  166. hg->counter1[59].val = 30000;
  167. /* Catch all massive value (60secs) */
  168. hg->counter1[60].val = 60000;
  169. /* Catch all massive value (5mins) */
  170. hg->counter1[61].val = 300000;
  171. /* Catch all massive value (15mins) */
  172. hg->counter1[62].val = 900000;
  173. /* Catch all massive values (1hr) */
  174. hg->counter1[63].val = 3600000;
  175. }
  176. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  177. {
  178. int i;
  179. for (i = 0; i < 64; i++) {
  180. if (val <= hg->counter1[i].val) {
  181. hg->counter1[i].count++;
  182. hg->counter1[i].update_time = jiffies;
  183. break;
  184. }
  185. }
  186. }
  187. static void saa7164_histogram_print(struct saa7164_port *port,
  188. struct saa7164_histogram *hg)
  189. {
  190. u32 entries = 0;
  191. int i;
  192. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  193. for (i = 0; i < 64; i++) {
  194. if (hg->counter1[i].count == 0)
  195. continue;
  196. printk(KERN_ERR " %4d %12d %Ld\n",
  197. hg->counter1[i].val,
  198. hg->counter1[i].count,
  199. hg->counter1[i].update_time);
  200. entries++;
  201. }
  202. printk(KERN_ERR "Total: %d\n", entries);
  203. }
  204. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  205. {
  206. struct saa7164_dev *dev = port->dev;
  207. struct saa7164_buffer *buf = NULL;
  208. struct saa7164_user_buffer *ubuf = NULL;
  209. struct list_head *c, *n;
  210. int i = 0;
  211. u8 *p;
  212. mutex_lock(&port->dmaqueue_lock);
  213. list_for_each_safe(c, n, &port->dmaqueue.list) {
  214. buf = list_entry(c, struct saa7164_buffer, list);
  215. if (i++ > port->hwcfg.buffercount) {
  216. printk(KERN_ERR "%s() illegal i count %d\n",
  217. __func__, i);
  218. break;
  219. }
  220. if (buf->idx == bufnr) {
  221. /* Found the buffer, deal with it */
  222. dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
  223. if (crc_checking) {
  224. /* Throw a new checksum on the dma buffer */
  225. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  226. }
  227. if (guard_checking) {
  228. p = (u8 *)buf->cpu;
  229. if ((*(p + buf->actual_size + 0) != 0xff) ||
  230. (*(p + buf->actual_size + 1) != 0xff) ||
  231. (*(p + buf->actual_size + 2) != 0xff) ||
  232. (*(p + buf->actual_size + 3) != 0xff) ||
  233. (*(p + buf->actual_size + 0x10) != 0xff) ||
  234. (*(p + buf->actual_size + 0x11) != 0xff) ||
  235. (*(p + buf->actual_size + 0x12) != 0xff) ||
  236. (*(p + buf->actual_size + 0x13) != 0xff)) {
  237. printk(KERN_ERR "%s() buf %p guard buffer breach\n",
  238. __func__, buf);
  239. #if 0
  240. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  241. p + buf->actual_size - 32, 64, false);
  242. #endif
  243. }
  244. }
  245. if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
  246. /* Validate the incoming buffer content */
  247. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  248. saa7164_ts_verifier(buf);
  249. else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  250. saa7164_pack_verifier(buf);
  251. }
  252. /* find a free user buffer and clone to it */
  253. if (!list_empty(&port->list_buf_free.list)) {
  254. /* Pull the first buffer from the used list */
  255. ubuf = list_first_entry(&port->list_buf_free.list,
  256. struct saa7164_user_buffer, list);
  257. if (buf->actual_size <= ubuf->actual_size) {
  258. memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
  259. if (crc_checking) {
  260. /* Throw a new checksum on the read buffer */
  261. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  262. }
  263. /* Requeue the buffer on the free list */
  264. ubuf->pos = 0;
  265. list_move_tail(&ubuf->list,
  266. &port->list_buf_used.list);
  267. /* Flag any userland waiters */
  268. wake_up_interruptible(&port->wait_read);
  269. } else {
  270. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  271. }
  272. } else
  273. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  274. /* Ensure offset into buffer remains 0, fill buffer
  275. * with known bad data. We check for this data at a later point
  276. * in time. */
  277. saa7164_buffer_zero_offsets(port, bufnr);
  278. memset(buf->cpu, 0xff, buf->pci_size);
  279. if (crc_checking) {
  280. /* Throw yet aanother new checksum on the dma buffer */
  281. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  282. }
  283. break;
  284. }
  285. }
  286. mutex_unlock(&port->dmaqueue_lock);
  287. }
  288. static void saa7164_work_enchandler(struct work_struct *w)
  289. {
  290. struct saa7164_port *port =
  291. container_of(w, struct saa7164_port, workenc);
  292. struct saa7164_dev *dev = port->dev;
  293. u32 wp, mcb, rp, cnt = 0;
  294. port->last_svc_msecs_diff = port->last_svc_msecs;
  295. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  296. port->last_svc_msecs_diff = port->last_svc_msecs -
  297. port->last_svc_msecs_diff;
  298. saa7164_histogram_update(&port->svc_interval,
  299. port->last_svc_msecs_diff);
  300. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  301. port->last_irq_msecs;
  302. saa7164_histogram_update(&port->irq_svc_interval,
  303. port->last_irq_svc_msecs_diff);
  304. dprintk(DBGLVL_IRQ,
  305. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  306. __func__,
  307. port->last_svc_msecs_diff,
  308. port->last_irq_svc_msecs_diff,
  309. port->last_svc_wp,
  310. port->last_svc_rp
  311. );
  312. /* Current write position */
  313. wp = saa7164_readl(port->bufcounter);
  314. if (wp > (port->hwcfg.buffercount - 1)) {
  315. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  316. return;
  317. }
  318. /* Most current complete buffer */
  319. if (wp == 0)
  320. mcb = (port->hwcfg.buffercount - 1);
  321. else
  322. mcb = wp - 1;
  323. while (1) {
  324. if (port->done_first_interrupt == 0) {
  325. port->done_first_interrupt++;
  326. rp = mcb;
  327. } else
  328. rp = (port->last_svc_rp + 1) % 8;
  329. if (rp > (port->hwcfg.buffercount - 1)) {
  330. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  331. break;
  332. }
  333. saa7164_work_enchandler_helper(port, rp);
  334. port->last_svc_rp = rp;
  335. cnt++;
  336. if (rp == mcb)
  337. break;
  338. }
  339. /* TODO: Convert this into a /proc/saa7164 style readable file */
  340. if (print_histogram == port->nr) {
  341. saa7164_histogram_print(port, &port->irq_interval);
  342. saa7164_histogram_print(port, &port->svc_interval);
  343. saa7164_histogram_print(port, &port->irq_svc_interval);
  344. saa7164_histogram_print(port, &port->read_interval);
  345. saa7164_histogram_print(port, &port->poll_interval);
  346. /* TODO: fix this to preserve any previous state */
  347. print_histogram = 64 + port->nr;
  348. }
  349. }
  350. static void saa7164_work_vbihandler(struct work_struct *w)
  351. {
  352. struct saa7164_port *port =
  353. container_of(w, struct saa7164_port, workenc);
  354. struct saa7164_dev *dev = port->dev;
  355. u32 wp, mcb, rp, cnt = 0;
  356. port->last_svc_msecs_diff = port->last_svc_msecs;
  357. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  358. port->last_svc_msecs_diff = port->last_svc_msecs -
  359. port->last_svc_msecs_diff;
  360. saa7164_histogram_update(&port->svc_interval,
  361. port->last_svc_msecs_diff);
  362. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  363. port->last_irq_msecs;
  364. saa7164_histogram_update(&port->irq_svc_interval,
  365. port->last_irq_svc_msecs_diff);
  366. dprintk(DBGLVL_IRQ,
  367. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  368. __func__,
  369. port->last_svc_msecs_diff,
  370. port->last_irq_svc_msecs_diff,
  371. port->last_svc_wp,
  372. port->last_svc_rp
  373. );
  374. /* Current write position */
  375. wp = saa7164_readl(port->bufcounter);
  376. if (wp > (port->hwcfg.buffercount - 1)) {
  377. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  378. return;
  379. }
  380. /* Most current complete buffer */
  381. if (wp == 0)
  382. mcb = (port->hwcfg.buffercount - 1);
  383. else
  384. mcb = wp - 1;
  385. while (1) {
  386. if (port->done_first_interrupt == 0) {
  387. port->done_first_interrupt++;
  388. rp = mcb;
  389. } else
  390. rp = (port->last_svc_rp + 1) % 8;
  391. if (rp > (port->hwcfg.buffercount - 1)) {
  392. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  393. break;
  394. }
  395. saa7164_work_enchandler_helper(port, rp);
  396. port->last_svc_rp = rp;
  397. cnt++;
  398. if (rp == mcb)
  399. break;
  400. }
  401. /* TODO: Convert this into a /proc/saa7164 style readable file */
  402. if (print_histogram == port->nr) {
  403. saa7164_histogram_print(port, &port->irq_interval);
  404. saa7164_histogram_print(port, &port->svc_interval);
  405. saa7164_histogram_print(port, &port->irq_svc_interval);
  406. saa7164_histogram_print(port, &port->read_interval);
  407. saa7164_histogram_print(port, &port->poll_interval);
  408. /* TODO: fix this to preserve any previous state */
  409. print_histogram = 64 + port->nr;
  410. }
  411. }
  412. static void saa7164_work_cmdhandler(struct work_struct *w)
  413. {
  414. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  415. /* Wake up any complete commands */
  416. saa7164_irq_dequeue(dev);
  417. }
  418. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  419. {
  420. struct saa7164_port *port = buf->port;
  421. /* Feed the transport payload into the kernel demux */
  422. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  423. SAA7164_TS_NUMBER_OF_LINES);
  424. }
  425. static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
  426. {
  427. struct saa7164_dev *dev = port->dev;
  428. /* Store old time */
  429. port->last_irq_msecs_diff = port->last_irq_msecs;
  430. /* Collect new stats */
  431. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  432. /* Calculate stats */
  433. port->last_irq_msecs_diff = port->last_irq_msecs -
  434. port->last_irq_msecs_diff;
  435. saa7164_histogram_update(&port->irq_interval,
  436. port->last_irq_msecs_diff);
  437. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  438. port->last_irq_msecs_diff);
  439. /* Tis calls the vbi irq handler */
  440. schedule_work(&port->workenc);
  441. return 0;
  442. }
  443. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  444. {
  445. struct saa7164_dev *dev = port->dev;
  446. /* Store old time */
  447. port->last_irq_msecs_diff = port->last_irq_msecs;
  448. /* Collect new stats */
  449. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  450. /* Calculate stats */
  451. port->last_irq_msecs_diff = port->last_irq_msecs -
  452. port->last_irq_msecs_diff;
  453. saa7164_histogram_update(&port->irq_interval,
  454. port->last_irq_msecs_diff);
  455. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  456. port->last_irq_msecs_diff);
  457. schedule_work(&port->workenc);
  458. return 0;
  459. }
  460. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  461. {
  462. struct saa7164_dev *dev = port->dev;
  463. struct saa7164_buffer *buf;
  464. struct list_head *c, *n;
  465. int wp, i = 0, rp;
  466. /* Find the current write point from the hardware */
  467. wp = saa7164_readl(port->bufcounter);
  468. if (wp > (port->hwcfg.buffercount - 1))
  469. BUG();
  470. /* Find the previous buffer to the current write point */
  471. if (wp == 0)
  472. rp = (port->hwcfg.buffercount - 1);
  473. else
  474. rp = wp - 1;
  475. /* Lookup the WP in the buffer list */
  476. /* TODO: turn this into a worker thread */
  477. list_for_each_safe(c, n, &port->dmaqueue.list) {
  478. buf = list_entry(c, struct saa7164_buffer, list);
  479. if (i++ > port->hwcfg.buffercount)
  480. BUG();
  481. if (buf->idx == rp) {
  482. /* Found the buffer, deal with it */
  483. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  484. __func__, wp, rp);
  485. saa7164_buffer_deliver(buf);
  486. break;
  487. }
  488. }
  489. return 0;
  490. }
  491. /* Primary IRQ handler and dispatch mechanism */
  492. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  493. {
  494. struct saa7164_dev *dev = dev_id;
  495. struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
  496. u32 intid, intstat[INT_SIZE/4];
  497. int i, handled = 0, bit;
  498. if (dev == NULL) {
  499. printk(KERN_ERR "%s() No device specified\n", __func__);
  500. handled = 0;
  501. goto out;
  502. }
  503. porta = &dev->ports[SAA7164_PORT_TS1];
  504. portb = &dev->ports[SAA7164_PORT_TS2];
  505. portc = &dev->ports[SAA7164_PORT_ENC1];
  506. portd = &dev->ports[SAA7164_PORT_ENC2];
  507. porte = &dev->ports[SAA7164_PORT_VBI1];
  508. portf = &dev->ports[SAA7164_PORT_VBI2];
  509. /* Check that the hardware is accessible. If the status bytes are
  510. * 0xFF then the device is not accessible, the the IRQ belongs
  511. * to another driver.
  512. * 4 x u32 interrupt registers.
  513. */
  514. for (i = 0; i < INT_SIZE/4; i++) {
  515. /* TODO: Convert into saa7164_readl() */
  516. /* Read the 4 hardware interrupt registers */
  517. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  518. if (intstat[i])
  519. handled = 1;
  520. }
  521. if (handled == 0)
  522. goto out;
  523. /* For each of the HW interrupt registers */
  524. for (i = 0; i < INT_SIZE/4; i++) {
  525. if (intstat[i]) {
  526. /* Each function of the board has it's own interruptid.
  527. * Find the function that triggered then call
  528. * it's handler.
  529. */
  530. for (bit = 0; bit < 32; bit++) {
  531. if (((intstat[i] >> bit) & 0x00000001) == 0)
  532. continue;
  533. /* Calculate the interrupt id (0x00 to 0x7f) */
  534. intid = (i * 32) + bit;
  535. if (intid == dev->intfdesc.bInterruptId) {
  536. /* A response to an cmd/api call */
  537. schedule_work(&dev->workcmd);
  538. } else if (intid == porta->hwcfg.interruptid) {
  539. /* Transport path 1 */
  540. saa7164_irq_ts(porta);
  541. } else if (intid == portb->hwcfg.interruptid) {
  542. /* Transport path 2 */
  543. saa7164_irq_ts(portb);
  544. } else if (intid == portc->hwcfg.interruptid) {
  545. /* Encoder path 1 */
  546. saa7164_irq_encoder(portc);
  547. } else if (intid == portd->hwcfg.interruptid) {
  548. /* Encoder path 2 */
  549. saa7164_irq_encoder(portd);
  550. } else if (intid == porte->hwcfg.interruptid) {
  551. /* VBI path 1 */
  552. saa7164_irq_vbi(porte);
  553. } else if (intid == portf->hwcfg.interruptid) {
  554. /* VBI path 2 */
  555. saa7164_irq_vbi(portf);
  556. } else {
  557. /* Find the function */
  558. dprintk(DBGLVL_IRQ,
  559. "%s() unhandled interrupt reg 0x%x bit 0x%x intid = 0x%x\n",
  560. __func__, i, bit, intid);
  561. }
  562. }
  563. /* Ack it */
  564. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  565. }
  566. }
  567. out:
  568. return IRQ_RETVAL(handled);
  569. }
  570. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  571. {
  572. struct saa7164_fw_status *s = &dev->fw_status;
  573. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  574. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  575. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  576. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  577. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  578. dev->fw_status.remainheap =
  579. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  580. dprintk(1, "Firmware status:\n");
  581. dprintk(1, " .status = 0x%08x\n", s->status);
  582. dprintk(1, " .mode = 0x%08x\n", s->mode);
  583. dprintk(1, " .spec = 0x%08x\n", s->spec);
  584. dprintk(1, " .inst = 0x%08x\n", s->inst);
  585. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  586. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  587. }
  588. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  589. {
  590. u32 reg;
  591. reg = saa7164_readl(SAA_DEVICE_VERSION);
  592. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  593. (reg & 0x0000fc00) >> 10,
  594. (reg & 0x000003e0) >> 5,
  595. (reg & 0x0000001f),
  596. (reg & 0xffff0000) >> 16,
  597. reg);
  598. return reg;
  599. }
  600. /* TODO: Debugging func, remove */
  601. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  602. {
  603. int i;
  604. dprintk(1, "--------------------> 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  605. for (i = 0; i < 0x100; i += 16)
  606. dprintk(1, "region0[0x%08x] = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
  607. i,
  608. (u8)saa7164_readb(addr + i + 0),
  609. (u8)saa7164_readb(addr + i + 1),
  610. (u8)saa7164_readb(addr + i + 2),
  611. (u8)saa7164_readb(addr + i + 3),
  612. (u8)saa7164_readb(addr + i + 4),
  613. (u8)saa7164_readb(addr + i + 5),
  614. (u8)saa7164_readb(addr + i + 6),
  615. (u8)saa7164_readb(addr + i + 7),
  616. (u8)saa7164_readb(addr + i + 8),
  617. (u8)saa7164_readb(addr + i + 9),
  618. (u8)saa7164_readb(addr + i + 10),
  619. (u8)saa7164_readb(addr + i + 11),
  620. (u8)saa7164_readb(addr + i + 12),
  621. (u8)saa7164_readb(addr + i + 13),
  622. (u8)saa7164_readb(addr + i + 14),
  623. (u8)saa7164_readb(addr + i + 15)
  624. );
  625. }
  626. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  627. {
  628. dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
  629. &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
  630. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  631. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  632. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  633. dev->hwdesc.bDescriptorSubtype);
  634. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  635. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  636. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  637. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  638. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  639. dev->hwdesc.dwDeviceRegistersLocation);
  640. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  641. dev->hwdesc.dwHostMemoryRegion);
  642. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  643. dev->hwdesc.dwHostMemoryRegionSize);
  644. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  645. dev->hwdesc.dwHostHibernatMemRegion);
  646. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  647. dev->hwdesc.dwHostHibernatMemRegionSize);
  648. }
  649. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  650. {
  651. dprintk(1, "@0x%p intfdesc sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
  652. &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
  653. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  654. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  655. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  656. dev->intfdesc.bDescriptorSubtype);
  657. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  658. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  659. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  660. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  661. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  662. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  663. dev->intfdesc.bDebugInterruptId);
  664. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  665. }
  666. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  667. {
  668. dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
  669. &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
  670. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  671. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  672. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  673. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  674. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  675. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  676. }
  677. /* Much of the hardware configuration and PCI registers are configured
  678. * dynamically depending on firmware. We have to cache some initial
  679. * structures then use these to locate other important structures
  680. * from PCI space.
  681. */
  682. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  683. {
  684. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
  685. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
  686. sizeof(struct tmComResInterfaceDescr));
  687. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  688. sizeof(struct tmComResBusDescr));
  689. if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
  690. printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
  691. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  692. (u32)sizeof(struct tmComResHWDescr));
  693. } else
  694. saa7164_dump_hwdesc(dev);
  695. if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
  696. printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
  697. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  698. (u32)sizeof(struct tmComResInterfaceDescr));
  699. } else
  700. saa7164_dump_intfdesc(dev);
  701. saa7164_dump_busdesc(dev);
  702. }
  703. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  704. {
  705. return 0;
  706. }
  707. static int get_resources(struct saa7164_dev *dev)
  708. {
  709. if (request_mem_region(pci_resource_start(dev->pci, 0),
  710. pci_resource_len(dev->pci, 0), dev->name)) {
  711. if (request_mem_region(pci_resource_start(dev->pci, 2),
  712. pci_resource_len(dev->pci, 2), dev->name))
  713. return 0;
  714. }
  715. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  716. dev->name,
  717. (u64)pci_resource_start(dev->pci, 0),
  718. (u64)pci_resource_start(dev->pci, 2));
  719. return -EBUSY;
  720. }
  721. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  722. {
  723. struct saa7164_port *port = NULL;
  724. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  725. BUG();
  726. port = &dev->ports[portnr];
  727. port->dev = dev;
  728. port->nr = portnr;
  729. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  730. port->type = SAA7164_MPEG_DVB;
  731. else
  732. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
  733. port->type = SAA7164_MPEG_ENCODER;
  734. /* We need a deferred interrupt handler for cmd handling */
  735. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  736. } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
  737. port->type = SAA7164_MPEG_VBI;
  738. /* We need a deferred interrupt handler for cmd handling */
  739. INIT_WORK(&port->workenc, saa7164_work_vbihandler);
  740. } else
  741. BUG();
  742. /* Init all the critical resources */
  743. mutex_init(&port->dvb.lock);
  744. INIT_LIST_HEAD(&port->dmaqueue.list);
  745. mutex_init(&port->dmaqueue_lock);
  746. INIT_LIST_HEAD(&port->list_buf_used.list);
  747. INIT_LIST_HEAD(&port->list_buf_free.list);
  748. init_waitqueue_head(&port->wait_read);
  749. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  750. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  751. saa7164_histogram_reset(&port->irq_svc_interval,
  752. "irq to deferred intervals");
  753. saa7164_histogram_reset(&port->read_interval,
  754. "encoder/vbi read() intervals");
  755. saa7164_histogram_reset(&port->poll_interval,
  756. "encoder/vbi poll() intervals");
  757. return 0;
  758. }
  759. static int saa7164_dev_setup(struct saa7164_dev *dev)
  760. {
  761. int i;
  762. mutex_init(&dev->lock);
  763. atomic_inc(&dev->refcount);
  764. dev->nr = saa7164_devcount++;
  765. snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
  766. mutex_lock(&devlist);
  767. list_add_tail(&dev->devlist, &saa7164_devlist);
  768. mutex_unlock(&devlist);
  769. /* board config */
  770. dev->board = UNSET;
  771. if (card[dev->nr] < saa7164_bcount)
  772. dev->board = card[dev->nr];
  773. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  774. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  775. dev->pci->subsystem_device ==
  776. saa7164_subids[i].subdevice)
  777. dev->board = saa7164_subids[i].card;
  778. if (UNSET == dev->board) {
  779. dev->board = SAA7164_BOARD_UNKNOWN;
  780. saa7164_card_list(dev);
  781. }
  782. dev->pci_bus = dev->pci->bus->number;
  783. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  784. /* I2C Defaults / setup */
  785. dev->i2c_bus[0].dev = dev;
  786. dev->i2c_bus[0].nr = 0;
  787. dev->i2c_bus[1].dev = dev;
  788. dev->i2c_bus[1].nr = 1;
  789. dev->i2c_bus[2].dev = dev;
  790. dev->i2c_bus[2].nr = 2;
  791. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  792. saa7164_port_init(dev, SAA7164_PORT_TS1);
  793. saa7164_port_init(dev, SAA7164_PORT_TS2);
  794. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  795. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  796. saa7164_port_init(dev, SAA7164_PORT_VBI1);
  797. saa7164_port_init(dev, SAA7164_PORT_VBI2);
  798. if (get_resources(dev) < 0) {
  799. printk(KERN_ERR "CORE %s No more PCIe resources for subsystem: %04x:%04x\n",
  800. dev->name, dev->pci->subsystem_vendor,
  801. dev->pci->subsystem_device);
  802. saa7164_devcount--;
  803. return -ENODEV;
  804. }
  805. /* PCI/e allocations */
  806. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  807. pci_resource_len(dev->pci, 0));
  808. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  809. pci_resource_len(dev->pci, 2));
  810. dev->bmmio = (u8 __iomem *)dev->lmmio;
  811. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  812. /* Inerrupt and ack register locations offset of bmmio */
  813. dev->int_status = 0x183000 + 0xf80;
  814. dev->int_ack = 0x183000 + 0xf90;
  815. printk(KERN_INFO
  816. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  817. dev->name, dev->pci->subsystem_vendor,
  818. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  819. dev->board, card[dev->nr] == dev->board ?
  820. "insmod option" : "autodetected");
  821. saa7164_pci_quirks(dev);
  822. return 0;
  823. }
  824. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  825. {
  826. dprintk(1, "%s()\n", __func__);
  827. release_mem_region(pci_resource_start(dev->pci, 0),
  828. pci_resource_len(dev->pci, 0));
  829. release_mem_region(pci_resource_start(dev->pci, 2),
  830. pci_resource_len(dev->pci, 2));
  831. if (!atomic_dec_and_test(&dev->refcount))
  832. return;
  833. iounmap(dev->lmmio);
  834. iounmap(dev->lmmio2);
  835. return;
  836. }
  837. #ifdef CONFIG_PROC_FS
  838. static int saa7164_proc_show(struct seq_file *m, void *v)
  839. {
  840. struct saa7164_dev *dev;
  841. struct tmComResBusInfo *b;
  842. struct list_head *list;
  843. int i, c;
  844. if (saa7164_devcount == 0)
  845. return 0;
  846. list_for_each(list, &saa7164_devlist) {
  847. dev = list_entry(list, struct saa7164_dev, devlist);
  848. seq_printf(m, "%s = %p\n", dev->name, dev);
  849. /* Lock the bus from any other access */
  850. b = &dev->bus;
  851. mutex_lock(&b->lock);
  852. seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
  853. b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
  854. seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n",
  855. b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
  856. seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
  857. b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
  858. seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
  859. b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
  860. c = 0;
  861. seq_printf(m, "\n Set Ring:\n");
  862. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  863. for (i = 0; i < b->m_dwSizeSetRing; i++) {
  864. if (c == 0)
  865. seq_printf(m, " %04x:", i);
  866. seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
  867. if (++c == 16) {
  868. seq_printf(m, "\n");
  869. c = 0;
  870. }
  871. }
  872. c = 0;
  873. seq_printf(m, "\n Get Ring:\n");
  874. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  875. for (i = 0; i < b->m_dwSizeGetRing; i++) {
  876. if (c == 0)
  877. seq_printf(m, " %04x:", i);
  878. seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
  879. if (++c == 16) {
  880. seq_printf(m, "\n");
  881. c = 0;
  882. }
  883. }
  884. mutex_unlock(&b->lock);
  885. }
  886. return 0;
  887. }
  888. static struct proc_dir_entry *saa7164_pe;
  889. static int saa7164_proc_create(void)
  890. {
  891. saa7164_pe = proc_create_single("saa7164", 0444, NULL, saa7164_proc_show);
  892. if (!saa7164_pe)
  893. return -ENOMEM;
  894. return 0;
  895. }
  896. static void saa7164_proc_destroy(void)
  897. {
  898. if (saa7164_pe)
  899. remove_proc_entry("saa7164", NULL);
  900. }
  901. #else
  902. static int saa7164_proc_create(void) { return 0; }
  903. static void saa7164_proc_destroy(void) {}
  904. #endif
  905. static int saa7164_thread_function(void *data)
  906. {
  907. struct saa7164_dev *dev = data;
  908. struct tmFwInfoStruct fwinfo;
  909. u64 last_poll_time = 0;
  910. dprintk(DBGLVL_THR, "thread started\n");
  911. set_freezable();
  912. while (1) {
  913. msleep_interruptible(100);
  914. if (kthread_should_stop())
  915. break;
  916. try_to_freeze();
  917. dprintk(DBGLVL_THR, "thread running\n");
  918. /* Dump the firmware debug message to console */
  919. /* Polling this costs us 1-2% of the arm CPU */
  920. /* convert this into a respnde to interrupt 0x7a */
  921. saa7164_api_collect_debug(dev);
  922. /* Monitor CPU load every 1 second */
  923. if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
  924. saa7164_api_get_load_info(dev, &fwinfo);
  925. last_poll_time = jiffies_to_msecs(jiffies);
  926. }
  927. }
  928. dprintk(DBGLVL_THR, "thread exiting\n");
  929. return 0;
  930. }
  931. static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
  932. {
  933. int err;
  934. if (!enable_msi) {
  935. printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
  936. , __func__);
  937. return false;
  938. }
  939. err = pci_enable_msi(pci_dev);
  940. if (err) {
  941. printk(KERN_ERR "%s() Failed to enable MSI interrupt. Falling back to a shared IRQ\n",
  942. __func__);
  943. return false;
  944. }
  945. /* no error - so request an msi interrupt */
  946. err = request_irq(pci_dev->irq, saa7164_irq, 0,
  947. dev->name, dev);
  948. if (err) {
  949. /* fall back to legacy interrupt */
  950. printk(KERN_ERR "%s() Failed to get an MSI interrupt. Falling back to a shared IRQ\n",
  951. __func__);
  952. pci_disable_msi(pci_dev);
  953. return false;
  954. }
  955. return true;
  956. }
  957. static int saa7164_initdev(struct pci_dev *pci_dev,
  958. const struct pci_device_id *pci_id)
  959. {
  960. struct saa7164_dev *dev;
  961. int err, i;
  962. u32 version;
  963. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  964. if (NULL == dev)
  965. return -ENOMEM;
  966. err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
  967. if (err < 0) {
  968. dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
  969. goto fail_free;
  970. }
  971. /* pci init */
  972. dev->pci = pci_dev;
  973. if (pci_enable_device(pci_dev)) {
  974. err = -EIO;
  975. goto fail_free;
  976. }
  977. if (saa7164_dev_setup(dev) < 0) {
  978. err = -EINVAL;
  979. goto fail_free;
  980. }
  981. /* print pci info */
  982. dev->pci_rev = pci_dev->revision;
  983. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  984. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
  985. dev->name,
  986. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  987. dev->pci_lat,
  988. (unsigned long long)pci_resource_start(pci_dev, 0));
  989. pci_set_master(pci_dev);
  990. /* TODO */
  991. err = pci_set_dma_mask(pci_dev, 0xffffffff);
  992. if (err) {
  993. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  994. goto fail_irq;
  995. }
  996. /* irq bit */
  997. if (saa7164_enable_msi(pci_dev, dev)) {
  998. dev->msi = true;
  999. } else {
  1000. /* if we have an error (i.e. we don't have an interrupt)
  1001. or msi is not enabled - fallback to shared interrupt */
  1002. err = request_irq(pci_dev->irq, saa7164_irq,
  1003. IRQF_SHARED, dev->name, dev);
  1004. if (err < 0) {
  1005. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  1006. pci_dev->irq);
  1007. err = -EIO;
  1008. goto fail_irq;
  1009. }
  1010. }
  1011. pci_set_drvdata(pci_dev, dev);
  1012. /* Init the internal command list */
  1013. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  1014. dev->cmds[i].seqno = i;
  1015. dev->cmds[i].inuse = 0;
  1016. mutex_init(&dev->cmds[i].lock);
  1017. init_waitqueue_head(&dev->cmds[i].wait);
  1018. }
  1019. /* We need a deferred interrupt handler for cmd handling */
  1020. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  1021. /* Only load the firmware if we know the board */
  1022. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1023. err = saa7164_downloadfirmware(dev);
  1024. if (err < 0) {
  1025. printk(KERN_ERR
  1026. "Failed to boot firmware, no features registered\n");
  1027. goto fail_fw;
  1028. }
  1029. saa7164_get_descriptors(dev);
  1030. saa7164_dumpregs(dev, 0);
  1031. saa7164_getcurrentfirmwareversion(dev);
  1032. saa7164_getfirmwarestatus(dev);
  1033. err = saa7164_bus_setup(dev);
  1034. if (err < 0)
  1035. printk(KERN_ERR
  1036. "Failed to setup the bus, will continue\n");
  1037. saa7164_bus_dump(dev);
  1038. /* Ping the running firmware via the command bus and get the
  1039. * firmware version, this checks the bus is running OK.
  1040. */
  1041. version = 0;
  1042. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  1043. dprintk(1, "Bus is operating correctly using version %d.%d.%d.%d (0x%x)\n",
  1044. (version & 0x0000fc00) >> 10,
  1045. (version & 0x000003e0) >> 5,
  1046. (version & 0x0000001f),
  1047. (version & 0xffff0000) >> 16,
  1048. version);
  1049. else
  1050. printk(KERN_ERR
  1051. "Failed to communicate with the firmware\n");
  1052. /* Bring up the I2C buses */
  1053. saa7164_i2c_register(&dev->i2c_bus[0]);
  1054. saa7164_i2c_register(&dev->i2c_bus[1]);
  1055. saa7164_i2c_register(&dev->i2c_bus[2]);
  1056. saa7164_gpio_setup(dev);
  1057. saa7164_card_setup(dev);
  1058. /* Parse the dynamic device configuration, find various
  1059. * media endpoints (MPEG, WMV, PS, TS) and cache their
  1060. * configuration details into the driver, so we can
  1061. * reference them later during simething_register() func,
  1062. * interrupt handlers, deferred work handlers etc.
  1063. */
  1064. saa7164_api_enum_subdevs(dev);
  1065. /* Begin to create the video sub-systems and register funcs */
  1066. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  1067. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
  1068. printk(KERN_ERR "%s() Failed to register dvb adapters on porta\n",
  1069. __func__);
  1070. }
  1071. }
  1072. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  1073. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
  1074. printk(KERN_ERR"%s() Failed to register dvb adapters on portb\n",
  1075. __func__);
  1076. }
  1077. }
  1078. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  1079. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
  1080. printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
  1081. __func__);
  1082. }
  1083. }
  1084. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  1085. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
  1086. printk(KERN_ERR"%s() Failed to register mpeg encoder\n",
  1087. __func__);
  1088. }
  1089. }
  1090. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
  1091. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
  1092. printk(KERN_ERR"%s() Failed to register vbi device\n",
  1093. __func__);
  1094. }
  1095. }
  1096. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
  1097. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
  1098. printk(KERN_ERR"%s() Failed to register vbi device\n",
  1099. __func__);
  1100. }
  1101. }
  1102. saa7164_api_set_debug(dev, fw_debug);
  1103. if (fw_debug) {
  1104. dev->kthread = kthread_run(saa7164_thread_function, dev,
  1105. "saa7164 debug");
  1106. if (IS_ERR(dev->kthread)) {
  1107. dev->kthread = NULL;
  1108. printk(KERN_ERR "%s() Failed to create debug kernel thread\n",
  1109. __func__);
  1110. }
  1111. }
  1112. } /* != BOARD_UNKNOWN */
  1113. else
  1114. printk(KERN_ERR "%s() Unsupported board detected, registering without firmware\n",
  1115. __func__);
  1116. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  1117. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  1118. fail_fw:
  1119. return 0;
  1120. fail_irq:
  1121. saa7164_dev_unregister(dev);
  1122. fail_free:
  1123. v4l2_device_unregister(&dev->v4l2_dev);
  1124. kfree(dev);
  1125. return err;
  1126. }
  1127. static void saa7164_shutdown(struct saa7164_dev *dev)
  1128. {
  1129. dprintk(1, "%s()\n", __func__);
  1130. }
  1131. static void saa7164_finidev(struct pci_dev *pci_dev)
  1132. {
  1133. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  1134. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1135. if (fw_debug && dev->kthread) {
  1136. kthread_stop(dev->kthread);
  1137. dev->kthread = NULL;
  1138. }
  1139. if (dev->firmwareloaded)
  1140. saa7164_api_set_debug(dev, 0x00);
  1141. }
  1142. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1143. &dev->ports[SAA7164_PORT_ENC1].irq_interval);
  1144. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1145. &dev->ports[SAA7164_PORT_ENC1].svc_interval);
  1146. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1147. &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
  1148. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1149. &dev->ports[SAA7164_PORT_ENC1].read_interval);
  1150. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1151. &dev->ports[SAA7164_PORT_ENC1].poll_interval);
  1152. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
  1153. &dev->ports[SAA7164_PORT_VBI1].read_interval);
  1154. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
  1155. &dev->ports[SAA7164_PORT_VBI2].poll_interval);
  1156. saa7164_shutdown(dev);
  1157. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  1158. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
  1159. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  1160. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
  1161. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  1162. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
  1163. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  1164. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
  1165. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
  1166. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
  1167. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
  1168. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
  1169. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  1170. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  1171. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  1172. /* unregister stuff */
  1173. free_irq(pci_dev->irq, dev);
  1174. if (dev->msi) {
  1175. pci_disable_msi(pci_dev);
  1176. dev->msi = false;
  1177. }
  1178. pci_disable_device(pci_dev);
  1179. mutex_lock(&devlist);
  1180. list_del(&dev->devlist);
  1181. mutex_unlock(&devlist);
  1182. saa7164_dev_unregister(dev);
  1183. v4l2_device_unregister(&dev->v4l2_dev);
  1184. kfree(dev);
  1185. }
  1186. static const struct pci_device_id saa7164_pci_tbl[] = {
  1187. {
  1188. /* SAA7164 */
  1189. .vendor = 0x1131,
  1190. .device = 0x7164,
  1191. .subvendor = PCI_ANY_ID,
  1192. .subdevice = PCI_ANY_ID,
  1193. }, {
  1194. /* --- end of list --- */
  1195. }
  1196. };
  1197. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  1198. static struct pci_driver saa7164_pci_driver = {
  1199. .name = "saa7164",
  1200. .id_table = saa7164_pci_tbl,
  1201. .probe = saa7164_initdev,
  1202. .remove = saa7164_finidev,
  1203. /* TODO */
  1204. .suspend = NULL,
  1205. .resume = NULL,
  1206. };
  1207. static int __init saa7164_init(void)
  1208. {
  1209. int ret = pci_register_driver(&saa7164_pci_driver);
  1210. if (ret)
  1211. return ret;
  1212. saa7164_proc_create();
  1213. pr_info("saa7164 driver loaded\n");
  1214. return 0;
  1215. }
  1216. static void __exit saa7164_fini(void)
  1217. {
  1218. saa7164_proc_destroy();
  1219. pci_unregister_driver(&saa7164_pci_driver);
  1220. }
  1221. module_init(saa7164_init);
  1222. module_exit(saa7164_fini);