netup_unidvb_spi.c 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249
  1. /*
  2. * netup_unidvb_spi.c
  3. *
  4. * Internal SPI driver for NetUP Universal Dual DVB-CI
  5. *
  6. * Copyright (C) 2014 NetUP Inc.
  7. * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
  8. * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. #include "netup_unidvb.h"
  21. #include <linux/spi/spi.h>
  22. #include <linux/spi/flash.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <mtd/mtd-abi.h>
  25. #define NETUP_SPI_CTRL_IRQ 0x1000
  26. #define NETUP_SPI_CTRL_IMASK 0x2000
  27. #define NETUP_SPI_CTRL_START 0x8000
  28. #define NETUP_SPI_CTRL_LAST_CS 0x4000
  29. #define NETUP_SPI_TIMEOUT 6000
  30. enum netup_spi_state {
  31. SPI_STATE_START,
  32. SPI_STATE_DONE,
  33. };
  34. struct netup_spi_regs {
  35. __u8 data[1024];
  36. __le16 control_stat;
  37. __le16 clock_divider;
  38. } __packed __aligned(1);
  39. struct netup_spi {
  40. struct device *dev;
  41. struct spi_master *master;
  42. struct netup_spi_regs __iomem *regs;
  43. u8 __iomem *mmio;
  44. spinlock_t lock;
  45. wait_queue_head_t waitq;
  46. enum netup_spi_state state;
  47. };
  48. static char netup_spi_name[64] = "fpga";
  49. static struct mtd_partition netup_spi_flash_partitions = {
  50. .name = netup_spi_name,
  51. .size = 0x1000000, /* 16MB */
  52. .offset = 0,
  53. .mask_flags = MTD_CAP_ROM
  54. };
  55. static struct flash_platform_data spi_flash_data = {
  56. .name = "netup0_m25p128",
  57. .parts = &netup_spi_flash_partitions,
  58. .nr_parts = 1,
  59. };
  60. static struct spi_board_info netup_spi_board = {
  61. .modalias = "m25p128",
  62. .max_speed_hz = 11000000,
  63. .chip_select = 0,
  64. .mode = SPI_MODE_0,
  65. .platform_data = &spi_flash_data,
  66. };
  67. irqreturn_t netup_spi_interrupt(struct netup_spi *spi)
  68. {
  69. u16 reg;
  70. unsigned long flags;
  71. if (!spi)
  72. return IRQ_NONE;
  73. spin_lock_irqsave(&spi->lock, flags);
  74. reg = readw(&spi->regs->control_stat);
  75. if (!(reg & NETUP_SPI_CTRL_IRQ)) {
  76. spin_unlock_irqrestore(&spi->lock, flags);
  77. dev_dbg(&spi->master->dev,
  78. "%s(): not mine interrupt\n", __func__);
  79. return IRQ_NONE;
  80. }
  81. writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
  82. reg = readw(&spi->regs->control_stat);
  83. writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
  84. spi->state = SPI_STATE_DONE;
  85. wake_up(&spi->waitq);
  86. spin_unlock_irqrestore(&spi->lock, flags);
  87. dev_dbg(&spi->master->dev,
  88. "%s(): SPI interrupt handled\n", __func__);
  89. return IRQ_HANDLED;
  90. }
  91. static int netup_spi_transfer(struct spi_master *master,
  92. struct spi_message *msg)
  93. {
  94. struct netup_spi *spi = spi_master_get_devdata(master);
  95. struct spi_transfer *t;
  96. int result = 0;
  97. u32 tr_size;
  98. /* reset CS */
  99. writew(NETUP_SPI_CTRL_LAST_CS, &spi->regs->control_stat);
  100. writew(0, &spi->regs->control_stat);
  101. list_for_each_entry(t, &msg->transfers, transfer_list) {
  102. tr_size = t->len;
  103. while (tr_size) {
  104. u32 frag_offset = t->len - tr_size;
  105. u32 frag_size = (tr_size > sizeof(spi->regs->data)) ?
  106. sizeof(spi->regs->data) : tr_size;
  107. int frag_last = 0;
  108. if (list_is_last(&t->transfer_list,
  109. &msg->transfers) &&
  110. frag_offset + frag_size == t->len) {
  111. frag_last = 1;
  112. }
  113. if (t->tx_buf) {
  114. memcpy_toio(spi->regs->data,
  115. t->tx_buf + frag_offset,
  116. frag_size);
  117. } else {
  118. memset_io(spi->regs->data,
  119. 0, frag_size);
  120. }
  121. spi->state = SPI_STATE_START;
  122. writew((frag_size & 0x3ff) |
  123. NETUP_SPI_CTRL_IMASK |
  124. NETUP_SPI_CTRL_START |
  125. (frag_last ? NETUP_SPI_CTRL_LAST_CS : 0),
  126. &spi->regs->control_stat);
  127. dev_dbg(&spi->master->dev,
  128. "%s(): control_stat 0x%04x\n",
  129. __func__, readw(&spi->regs->control_stat));
  130. wait_event_timeout(spi->waitq,
  131. spi->state != SPI_STATE_START,
  132. msecs_to_jiffies(NETUP_SPI_TIMEOUT));
  133. if (spi->state == SPI_STATE_DONE) {
  134. if (t->rx_buf) {
  135. memcpy_fromio(t->rx_buf + frag_offset,
  136. spi->regs->data, frag_size);
  137. }
  138. } else {
  139. if (spi->state == SPI_STATE_START) {
  140. dev_dbg(&spi->master->dev,
  141. "%s(): transfer timeout\n",
  142. __func__);
  143. } else {
  144. dev_dbg(&spi->master->dev,
  145. "%s(): invalid state %d\n",
  146. __func__, spi->state);
  147. }
  148. result = -EIO;
  149. goto done;
  150. }
  151. tr_size -= frag_size;
  152. msg->actual_length += frag_size;
  153. }
  154. }
  155. done:
  156. msg->status = result;
  157. spi_finalize_current_message(master);
  158. return result;
  159. }
  160. static int netup_spi_setup(struct spi_device *spi)
  161. {
  162. return 0;
  163. }
  164. int netup_spi_init(struct netup_unidvb_dev *ndev)
  165. {
  166. struct spi_master *master;
  167. struct netup_spi *nspi;
  168. master = spi_alloc_master(&ndev->pci_dev->dev,
  169. sizeof(struct netup_spi));
  170. if (!master) {
  171. dev_err(&ndev->pci_dev->dev,
  172. "%s(): unable to alloc SPI master\n", __func__);
  173. return -EINVAL;
  174. }
  175. nspi = spi_master_get_devdata(master);
  176. master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
  177. master->bus_num = -1;
  178. master->num_chipselect = 1;
  179. master->transfer_one_message = netup_spi_transfer;
  180. master->setup = netup_spi_setup;
  181. spin_lock_init(&nspi->lock);
  182. init_waitqueue_head(&nspi->waitq);
  183. nspi->master = master;
  184. nspi->regs = (struct netup_spi_regs __iomem *)(ndev->bmmio0 + 0x4000);
  185. writew(2, &nspi->regs->clock_divider);
  186. writew(NETUP_UNIDVB_IRQ_SPI, ndev->bmmio0 + REG_IMASK_SET);
  187. ndev->spi = nspi;
  188. if (spi_register_master(master)) {
  189. ndev->spi = NULL;
  190. dev_err(&ndev->pci_dev->dev,
  191. "%s(): unable to register SPI bus\n", __func__);
  192. return -EINVAL;
  193. }
  194. snprintf(netup_spi_name,
  195. sizeof(netup_spi_name),
  196. "fpga_%02x:%02x.%01x",
  197. ndev->pci_bus,
  198. ndev->pci_slot,
  199. ndev->pci_func);
  200. if (!spi_new_device(master, &netup_spi_board)) {
  201. ndev->spi = NULL;
  202. dev_err(&ndev->pci_dev->dev,
  203. "%s(): unable to create SPI device\n", __func__);
  204. return -EINVAL;
  205. }
  206. dev_dbg(&ndev->pci_dev->dev, "%s(): SPI init OK\n", __func__);
  207. return 0;
  208. }
  209. void netup_spi_release(struct netup_unidvb_dev *ndev)
  210. {
  211. u16 reg;
  212. unsigned long flags;
  213. struct netup_spi *spi = ndev->spi;
  214. if (!spi)
  215. return;
  216. spin_lock_irqsave(&spi->lock, flags);
  217. reg = readw(&spi->regs->control_stat);
  218. writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
  219. reg = readw(&spi->regs->control_stat);
  220. writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
  221. spin_unlock_irqrestore(&spi->lock, flags);
  222. spi_unregister_master(spi->master);
  223. ndev->spi = NULL;
  224. }