ddbridge-mci.c 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ddbridge-mci.c: Digital Devices microcode interface
  4. *
  5. * Copyright (C) 2017-2018 Digital Devices GmbH
  6. * Ralph Metzler <rjkm@metzlerbros.de>
  7. * Marcus Metzler <mocm@metzlerbros.de>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 only, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include "ddbridge.h"
  19. #include "ddbridge-io.h"
  20. #include "ddbridge-mci.h"
  21. static LIST_HEAD(mci_list);
  22. static int mci_reset(struct mci *state)
  23. {
  24. struct ddb_link *link = state->base->link;
  25. u32 status = 0;
  26. u32 timeout = 40;
  27. ddblwritel(link, MCI_CONTROL_RESET, MCI_CONTROL);
  28. ddblwritel(link, 0, MCI_CONTROL + 4); /* 1= no internal init */
  29. msleep(300);
  30. ddblwritel(link, 0, MCI_CONTROL);
  31. while (1) {
  32. status = ddblreadl(link, MCI_CONTROL);
  33. if ((status & MCI_CONTROL_READY) == MCI_CONTROL_READY)
  34. break;
  35. if (--timeout == 0)
  36. break;
  37. msleep(50);
  38. }
  39. if ((status & MCI_CONTROL_READY) == 0)
  40. return -1;
  41. if (link->ids.device == 0x0009)
  42. ddblwritel(link, SX8_TSCONFIG_MODE_NORMAL, SX8_TSCONFIG);
  43. return 0;
  44. }
  45. int ddb_mci_config(struct mci *state, u32 config)
  46. {
  47. struct ddb_link *link = state->base->link;
  48. if (link->ids.device != 0x0009)
  49. return -EINVAL;
  50. ddblwritel(link, config, SX8_TSCONFIG);
  51. return 0;
  52. }
  53. static int _mci_cmd_unlocked(struct mci *state,
  54. u32 *cmd, u32 cmd_len,
  55. u32 *res, u32 res_len)
  56. {
  57. struct ddb_link *link = state->base->link;
  58. u32 i, val;
  59. unsigned long stat;
  60. val = ddblreadl(link, MCI_CONTROL);
  61. if (val & (MCI_CONTROL_RESET | MCI_CONTROL_START_COMMAND))
  62. return -EIO;
  63. if (cmd && cmd_len)
  64. for (i = 0; i < cmd_len; i++)
  65. ddblwritel(link, cmd[i], MCI_COMMAND + i * 4);
  66. val |= (MCI_CONTROL_START_COMMAND | MCI_CONTROL_ENABLE_DONE_INTERRUPT);
  67. ddblwritel(link, val, MCI_CONTROL);
  68. stat = wait_for_completion_timeout(&state->base->completion, HZ);
  69. if (stat == 0) {
  70. dev_warn(state->base->dev, "MCI-%d: MCI timeout\n", state->nr);
  71. return -EIO;
  72. }
  73. if (res && res_len)
  74. for (i = 0; i < res_len; i++)
  75. res[i] = ddblreadl(link, MCI_RESULT + i * 4);
  76. return 0;
  77. }
  78. int ddb_mci_cmd(struct mci *state,
  79. struct mci_command *command,
  80. struct mci_result *result)
  81. {
  82. int stat;
  83. mutex_lock(&state->base->mci_lock);
  84. stat = _mci_cmd_unlocked(state,
  85. (u32 *)command, sizeof(*command) / sizeof(u32),
  86. (u32 *)result, sizeof(*result) / sizeof(u32));
  87. mutex_unlock(&state->base->mci_lock);
  88. return stat;
  89. }
  90. static void mci_handler(void *priv)
  91. {
  92. struct mci_base *base = (struct mci_base *)priv;
  93. complete(&base->completion);
  94. }
  95. static struct mci_base *match_base(void *key)
  96. {
  97. struct mci_base *p;
  98. list_for_each_entry(p, &mci_list, mci_list)
  99. if (p->key == key)
  100. return p;
  101. return NULL;
  102. }
  103. static int probe(struct mci *state)
  104. {
  105. mci_reset(state);
  106. return 0;
  107. }
  108. struct dvb_frontend
  109. *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
  110. int (**fn_set_input)(struct dvb_frontend *fe, int input))
  111. {
  112. struct ddb_port *port = input->port;
  113. struct ddb *dev = port->dev;
  114. struct ddb_link *link = &dev->link[port->lnr];
  115. struct mci_base *base;
  116. struct mci *state;
  117. void *key = cfg->type ? (void *)port : (void *)link;
  118. state = kzalloc(cfg->state_size, GFP_KERNEL);
  119. if (!state)
  120. return NULL;
  121. base = match_base(key);
  122. if (base) {
  123. base->count++;
  124. state->base = base;
  125. } else {
  126. base = kzalloc(cfg->base_size, GFP_KERNEL);
  127. if (!base)
  128. goto fail;
  129. base->key = key;
  130. base->count = 1;
  131. base->link = link;
  132. base->dev = dev->dev;
  133. mutex_init(&base->mci_lock);
  134. mutex_init(&base->tuner_lock);
  135. ddb_irq_set(dev, link->nr, 0, mci_handler, base);
  136. init_completion(&base->completion);
  137. state->base = base;
  138. if (probe(state) < 0) {
  139. kfree(base);
  140. goto fail;
  141. }
  142. list_add(&base->mci_list, &mci_list);
  143. if (cfg->base_init)
  144. cfg->base_init(base);
  145. }
  146. memcpy(&state->fe.ops, cfg->fe_ops, sizeof(struct dvb_frontend_ops));
  147. state->fe.demodulator_priv = state;
  148. state->nr = nr;
  149. *fn_set_input = cfg->set_input;
  150. state->tuner = nr;
  151. state->demod = nr;
  152. if (cfg->init)
  153. cfg->init(state);
  154. return &state->fe;
  155. fail:
  156. kfree(state);
  157. return NULL;
  158. }