ddbridge-core.c 84 KB

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  1. /*
  2. * ddbridge-core.c: Digital Devices bridge core functions
  3. *
  4. * Copyright (C) 2010-2017 Digital Devices GmbH
  5. * Marcus Metzler <mocm@metzlerbros.de>
  6. * Ralph Metzler <rjkm@metzlerbros.de>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 only, as published by the Free Software Foundation.
  12. *
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * To obtain the license, point your browser to
  20. * http://www.gnu.org/copyleft/gpl.html
  21. */
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/poll.h>
  28. #include <linux/io.h>
  29. #include <linux/pci.h>
  30. #include <linux/pci_ids.h>
  31. #include <linux/timer.h>
  32. #include <linux/i2c.h>
  33. #include <linux/swab.h>
  34. #include <linux/vmalloc.h>
  35. #include "ddbridge.h"
  36. #include "ddbridge-i2c.h"
  37. #include "ddbridge-regs.h"
  38. #include "ddbridge-max.h"
  39. #include "ddbridge-ci.h"
  40. #include "ddbridge-io.h"
  41. #include "tda18271c2dd.h"
  42. #include "stv6110x.h"
  43. #include "stv090x.h"
  44. #include "lnbh24.h"
  45. #include "drxk.h"
  46. #include "stv0367.h"
  47. #include "stv0367_priv.h"
  48. #include "cxd2841er.h"
  49. #include "tda18212.h"
  50. #include "stv0910.h"
  51. #include "stv6111.h"
  52. #include "lnbh25.h"
  53. #include "cxd2099.h"
  54. #include "dvb_dummy_fe.h"
  55. /****************************************************************************/
  56. #define DDB_MAX_ADAPTER 64
  57. /****************************************************************************/
  58. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  59. static int adapter_alloc;
  60. module_param(adapter_alloc, int, 0444);
  61. MODULE_PARM_DESC(adapter_alloc,
  62. "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
  63. static int ci_bitrate = 70000;
  64. module_param(ci_bitrate, int, 0444);
  65. MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI.");
  66. static int ts_loop = -1;
  67. module_param(ts_loop, int, 0444);
  68. MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop");
  69. static int xo2_speed = 2;
  70. module_param(xo2_speed, int, 0444);
  71. MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards");
  72. #ifdef __arm__
  73. static int alt_dma = 1;
  74. #else
  75. static int alt_dma;
  76. #endif
  77. module_param(alt_dma, int, 0444);
  78. MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling");
  79. static int no_init;
  80. module_param(no_init, int, 0444);
  81. MODULE_PARM_DESC(no_init, "do not initialize most devices");
  82. static int stv0910_single;
  83. module_param(stv0910_single, int, 0444);
  84. MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods");
  85. static int dma_buf_num = 8;
  86. module_param(dma_buf_num, int, 0444);
  87. MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32");
  88. static int dma_buf_size = 21;
  89. module_param(dma_buf_size, int, 0444);
  90. MODULE_PARM_DESC(dma_buf_size,
  91. "DMA buffer size as multiple of 128*47, possible values: 1-43");
  92. static int dummy_tuner;
  93. module_param(dummy_tuner, int, 0444);
  94. MODULE_PARM_DESC(dummy_tuner,
  95. "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards");
  96. /****************************************************************************/
  97. static DEFINE_MUTEX(redirect_lock);
  98. static struct workqueue_struct *ddb_wq;
  99. static struct ddb *ddbs[DDB_MAX_ADAPTER];
  100. /****************************************************************************/
  101. /****************************************************************************/
  102. /****************************************************************************/
  103. struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
  104. void (*handler)(void *), void *data)
  105. {
  106. struct ddb_irq *irq = &dev->link[link].irq[nr];
  107. irq->handler = handler;
  108. irq->data = data;
  109. return irq;
  110. }
  111. static void ddb_set_dma_table(struct ddb_io *io)
  112. {
  113. struct ddb *dev = io->port->dev;
  114. struct ddb_dma *dma = io->dma;
  115. u32 i;
  116. u64 mem;
  117. if (!dma)
  118. return;
  119. for (i = 0; i < dma->num; i++) {
  120. mem = dma->pbuf[i];
  121. ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8);
  122. ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4);
  123. }
  124. dma->bufval = ((dma->div & 0x0f) << 16) |
  125. ((dma->num & 0x1f) << 11) |
  126. ((dma->size >> 7) & 0x7ff);
  127. }
  128. static void ddb_set_dma_tables(struct ddb *dev)
  129. {
  130. u32 i;
  131. for (i = 0; i < DDB_MAX_PORT; i++) {
  132. if (dev->port[i].input[0])
  133. ddb_set_dma_table(dev->port[i].input[0]);
  134. if (dev->port[i].input[1])
  135. ddb_set_dma_table(dev->port[i].input[1]);
  136. if (dev->port[i].output)
  137. ddb_set_dma_table(dev->port[i].output);
  138. }
  139. }
  140. /****************************************************************************/
  141. /****************************************************************************/
  142. /****************************************************************************/
  143. static void ddb_redirect_dma(struct ddb *dev,
  144. struct ddb_dma *sdma,
  145. struct ddb_dma *ddma)
  146. {
  147. u32 i, base;
  148. u64 mem;
  149. sdma->bufval = ddma->bufval;
  150. base = sdma->bufregs;
  151. for (i = 0; i < ddma->num; i++) {
  152. mem = ddma->pbuf[i];
  153. ddbwritel(dev, mem & 0xffffffff, base + i * 8);
  154. ddbwritel(dev, mem >> 32, base + i * 8 + 4);
  155. }
  156. }
  157. static int ddb_unredirect(struct ddb_port *port)
  158. {
  159. struct ddb_input *oredi, *iredi = NULL;
  160. struct ddb_output *iredo = NULL;
  161. /* dev_info(port->dev->dev,
  162. * "unredirect %d.%d\n", port->dev->nr, port->nr);
  163. */
  164. mutex_lock(&redirect_lock);
  165. if (port->output->dma->running) {
  166. mutex_unlock(&redirect_lock);
  167. return -EBUSY;
  168. }
  169. oredi = port->output->redi;
  170. if (!oredi)
  171. goto done;
  172. if (port->input[0]) {
  173. iredi = port->input[0]->redi;
  174. iredo = port->input[0]->redo;
  175. if (iredo) {
  176. iredo->port->output->redi = oredi;
  177. if (iredo->port->input[0]) {
  178. iredo->port->input[0]->redi = iredi;
  179. ddb_redirect_dma(oredi->port->dev,
  180. oredi->dma, iredo->dma);
  181. }
  182. port->input[0]->redo = NULL;
  183. ddb_set_dma_table(port->input[0]);
  184. }
  185. oredi->redi = iredi;
  186. port->input[0]->redi = NULL;
  187. }
  188. oredi->redo = NULL;
  189. port->output->redi = NULL;
  190. ddb_set_dma_table(oredi);
  191. done:
  192. mutex_unlock(&redirect_lock);
  193. return 0;
  194. }
  195. static int ddb_redirect(u32 i, u32 p)
  196. {
  197. struct ddb *idev = ddbs[(i >> 4) & 0x3f];
  198. struct ddb_input *input, *input2;
  199. struct ddb *pdev = ddbs[(p >> 4) & 0x3f];
  200. struct ddb_port *port;
  201. if (!idev || !pdev)
  202. return -EINVAL;
  203. if (!idev->has_dma || !pdev->has_dma)
  204. return -EINVAL;
  205. port = &pdev->port[p & 0x0f];
  206. if (!port->output)
  207. return -EINVAL;
  208. if (ddb_unredirect(port))
  209. return -EBUSY;
  210. if (i == 8)
  211. return 0;
  212. input = &idev->input[i & 7];
  213. if (!input)
  214. return -EINVAL;
  215. mutex_lock(&redirect_lock);
  216. if (port->output->dma->running || input->dma->running) {
  217. mutex_unlock(&redirect_lock);
  218. return -EBUSY;
  219. }
  220. input2 = port->input[0];
  221. if (input2) {
  222. if (input->redi) {
  223. input2->redi = input->redi;
  224. input->redi = NULL;
  225. } else {
  226. input2->redi = input;
  227. }
  228. }
  229. input->redo = port->output;
  230. port->output->redi = input;
  231. ddb_redirect_dma(input->port->dev, input->dma, port->output->dma);
  232. mutex_unlock(&redirect_lock);
  233. return 0;
  234. }
  235. /****************************************************************************/
  236. /****************************************************************************/
  237. /****************************************************************************/
  238. static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
  239. {
  240. int i;
  241. if (!dma)
  242. return;
  243. for (i = 0; i < dma->num; i++) {
  244. if (dma->vbuf[i]) {
  245. if (alt_dma) {
  246. dma_unmap_single(&pdev->dev, dma->pbuf[i],
  247. dma->size,
  248. dir ? DMA_TO_DEVICE :
  249. DMA_FROM_DEVICE);
  250. kfree(dma->vbuf[i]);
  251. dma->vbuf[i] = NULL;
  252. } else {
  253. dma_free_coherent(&pdev->dev, dma->size,
  254. dma->vbuf[i], dma->pbuf[i]);
  255. }
  256. dma->vbuf[i] = NULL;
  257. }
  258. }
  259. }
  260. static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
  261. {
  262. int i;
  263. if (!dma)
  264. return 0;
  265. for (i = 0; i < dma->num; i++) {
  266. if (alt_dma) {
  267. dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL);
  268. if (!dma->vbuf[i])
  269. return -ENOMEM;
  270. dma->pbuf[i] = dma_map_single(&pdev->dev,
  271. dma->vbuf[i],
  272. dma->size,
  273. dir ? DMA_TO_DEVICE :
  274. DMA_FROM_DEVICE);
  275. if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) {
  276. kfree(dma->vbuf[i]);
  277. dma->vbuf[i] = NULL;
  278. return -ENOMEM;
  279. }
  280. } else {
  281. dma->vbuf[i] = dma_alloc_coherent(&pdev->dev,
  282. dma->size,
  283. &dma->pbuf[i],
  284. GFP_KERNEL);
  285. if (!dma->vbuf[i])
  286. return -ENOMEM;
  287. }
  288. }
  289. return 0;
  290. }
  291. int ddb_buffers_alloc(struct ddb *dev)
  292. {
  293. int i;
  294. struct ddb_port *port;
  295. for (i = 0; i < dev->port_num; i++) {
  296. port = &dev->port[i];
  297. switch (port->class) {
  298. case DDB_PORT_TUNER:
  299. if (port->input[0]->dma)
  300. if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
  301. < 0)
  302. return -1;
  303. if (port->input[1]->dma)
  304. if (dma_alloc(dev->pdev, port->input[1]->dma, 0)
  305. < 0)
  306. return -1;
  307. break;
  308. case DDB_PORT_CI:
  309. case DDB_PORT_LOOP:
  310. if (port->input[0]->dma)
  311. if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
  312. < 0)
  313. return -1;
  314. if (port->output->dma)
  315. if (dma_alloc(dev->pdev, port->output->dma, 1)
  316. < 0)
  317. return -1;
  318. break;
  319. default:
  320. break;
  321. }
  322. }
  323. ddb_set_dma_tables(dev);
  324. return 0;
  325. }
  326. void ddb_buffers_free(struct ddb *dev)
  327. {
  328. int i;
  329. struct ddb_port *port;
  330. for (i = 0; i < dev->port_num; i++) {
  331. port = &dev->port[i];
  332. if (port->input[0] && port->input[0]->dma)
  333. dma_free(dev->pdev, port->input[0]->dma, 0);
  334. if (port->input[1] && port->input[1]->dma)
  335. dma_free(dev->pdev, port->input[1]->dma, 0);
  336. if (port->output && port->output->dma)
  337. dma_free(dev->pdev, port->output->dma, 1);
  338. }
  339. }
  340. static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
  341. {
  342. struct ddb *dev = output->port->dev;
  343. u32 bitrate = output->port->obr, max_bitrate = 72000;
  344. u32 gap = 4, nco = 0;
  345. *con = 0x1c;
  346. if (output->port->gap != 0xffffffff) {
  347. flags |= 1;
  348. gap = output->port->gap;
  349. max_bitrate = 0;
  350. }
  351. if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) {
  352. *con = 0x10c;
  353. if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) {
  354. if (!(flags & 2)) {
  355. /* NCO */
  356. max_bitrate = 0;
  357. gap = 0;
  358. if (bitrate != 72000) {
  359. if (bitrate >= 96000) {
  360. *con |= 0x800;
  361. } else {
  362. *con |= 0x1000;
  363. nco = (bitrate * 8192 + 71999)
  364. / 72000;
  365. }
  366. }
  367. } else {
  368. /* Divider and gap */
  369. *con |= 0x1810;
  370. if (bitrate <= 64000) {
  371. max_bitrate = 64000;
  372. nco = 8;
  373. } else if (bitrate <= 72000) {
  374. max_bitrate = 72000;
  375. nco = 7;
  376. } else {
  377. max_bitrate = 96000;
  378. nco = 5;
  379. }
  380. }
  381. } else {
  382. if (bitrate > 72000) {
  383. *con |= 0x810; /* 96 MBit/s and gap */
  384. max_bitrate = 96000;
  385. }
  386. *con |= 0x10; /* enable gap */
  387. }
  388. }
  389. if (max_bitrate > 0) {
  390. if (bitrate > max_bitrate)
  391. bitrate = max_bitrate;
  392. if (bitrate < 31000)
  393. bitrate = 31000;
  394. gap = ((max_bitrate - bitrate) * 94) / bitrate;
  395. if (gap < 2)
  396. *con &= ~0x10; /* Disable gap */
  397. else
  398. gap -= 2;
  399. if (gap > 127)
  400. gap = 127;
  401. }
  402. *con2 = (nco << 16) | gap;
  403. }
  404. static void ddb_output_start(struct ddb_output *output)
  405. {
  406. struct ddb *dev = output->port->dev;
  407. u32 con = 0x11c, con2 = 0;
  408. spin_lock_irq(&output->dma->lock);
  409. output->dma->cbuf = 0;
  410. output->dma->coff = 0;
  411. output->dma->stat = 0;
  412. ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
  413. if (output->port->input[0]->port->class == DDB_PORT_LOOP)
  414. con = (1UL << 13) | 0x14;
  415. else
  416. calc_con(output, &con, &con2, 0);
  417. ddbwritel(dev, 0, TS_CONTROL(output));
  418. ddbwritel(dev, 2, TS_CONTROL(output));
  419. ddbwritel(dev, 0, TS_CONTROL(output));
  420. ddbwritel(dev, con, TS_CONTROL(output));
  421. ddbwritel(dev, con2, TS_CONTROL2(output));
  422. ddbwritel(dev, output->dma->bufval,
  423. DMA_BUFFER_SIZE(output->dma));
  424. ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma));
  425. ddbwritel(dev, 1, DMA_BASE_READ);
  426. ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma));
  427. ddbwritel(dev, con | 1, TS_CONTROL(output));
  428. output->dma->running = 1;
  429. spin_unlock_irq(&output->dma->lock);
  430. }
  431. static void ddb_output_stop(struct ddb_output *output)
  432. {
  433. struct ddb *dev = output->port->dev;
  434. spin_lock_irq(&output->dma->lock);
  435. ddbwritel(dev, 0, TS_CONTROL(output));
  436. ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
  437. output->dma->running = 0;
  438. spin_unlock_irq(&output->dma->lock);
  439. }
  440. static void ddb_input_stop(struct ddb_input *input)
  441. {
  442. struct ddb *dev = input->port->dev;
  443. u32 tag = DDB_LINK_TAG(input->port->lnr);
  444. spin_lock_irq(&input->dma->lock);
  445. ddbwritel(dev, 0, tag | TS_CONTROL(input));
  446. ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
  447. input->dma->running = 0;
  448. spin_unlock_irq(&input->dma->lock);
  449. }
  450. static void ddb_input_start(struct ddb_input *input)
  451. {
  452. struct ddb *dev = input->port->dev;
  453. spin_lock_irq(&input->dma->lock);
  454. input->dma->cbuf = 0;
  455. input->dma->coff = 0;
  456. input->dma->stat = 0;
  457. ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
  458. ddbwritel(dev, 0, TS_CONTROL(input));
  459. ddbwritel(dev, 2, TS_CONTROL(input));
  460. ddbwritel(dev, 0, TS_CONTROL(input));
  461. ddbwritel(dev, input->dma->bufval,
  462. DMA_BUFFER_SIZE(input->dma));
  463. ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma));
  464. ddbwritel(dev, 1, DMA_BASE_WRITE);
  465. ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma));
  466. ddbwritel(dev, 0x09, TS_CONTROL(input));
  467. if (input->port->type == DDB_TUNER_DUMMY)
  468. ddbwritel(dev, 0x000fff01, TS_CONTROL2(input));
  469. input->dma->running = 1;
  470. spin_unlock_irq(&input->dma->lock);
  471. }
  472. static void ddb_input_start_all(struct ddb_input *input)
  473. {
  474. struct ddb_input *i = input;
  475. struct ddb_output *o;
  476. mutex_lock(&redirect_lock);
  477. while (i && (o = i->redo)) {
  478. ddb_output_start(o);
  479. i = o->port->input[0];
  480. if (i)
  481. ddb_input_start(i);
  482. }
  483. ddb_input_start(input);
  484. mutex_unlock(&redirect_lock);
  485. }
  486. static void ddb_input_stop_all(struct ddb_input *input)
  487. {
  488. struct ddb_input *i = input;
  489. struct ddb_output *o;
  490. mutex_lock(&redirect_lock);
  491. ddb_input_stop(input);
  492. while (i && (o = i->redo)) {
  493. ddb_output_stop(o);
  494. i = o->port->input[0];
  495. if (i)
  496. ddb_input_stop(i);
  497. }
  498. mutex_unlock(&redirect_lock);
  499. }
  500. static u32 ddb_output_free(struct ddb_output *output)
  501. {
  502. u32 idx, off, stat = output->dma->stat;
  503. s32 diff;
  504. idx = (stat >> 11) & 0x1f;
  505. off = (stat & 0x7ff) << 7;
  506. if (output->dma->cbuf != idx) {
  507. if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
  508. (output->dma->size - output->dma->coff <= (2 * 188)))
  509. return 0;
  510. return 188;
  511. }
  512. diff = off - output->dma->coff;
  513. if (diff <= 0 || diff > (2 * 188))
  514. return 188;
  515. return 0;
  516. }
  517. static ssize_t ddb_output_write(struct ddb_output *output,
  518. const __user u8 *buf, size_t count)
  519. {
  520. struct ddb *dev = output->port->dev;
  521. u32 idx, off, stat = output->dma->stat;
  522. u32 left = count, len;
  523. idx = (stat >> 11) & 0x1f;
  524. off = (stat & 0x7ff) << 7;
  525. while (left) {
  526. len = output->dma->size - output->dma->coff;
  527. if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
  528. off == 0) {
  529. if (len <= 188)
  530. break;
  531. len -= 188;
  532. }
  533. if (output->dma->cbuf == idx) {
  534. if (off > output->dma->coff) {
  535. len = off - output->dma->coff;
  536. len -= (len % 188);
  537. if (len <= 188)
  538. break;
  539. len -= 188;
  540. }
  541. }
  542. if (len > left)
  543. len = left;
  544. if (copy_from_user(output->dma->vbuf[output->dma->cbuf] +
  545. output->dma->coff,
  546. buf, len))
  547. return -EIO;
  548. if (alt_dma)
  549. dma_sync_single_for_device(
  550. dev->dev,
  551. output->dma->pbuf[output->dma->cbuf],
  552. output->dma->size, DMA_TO_DEVICE);
  553. left -= len;
  554. buf += len;
  555. output->dma->coff += len;
  556. if (output->dma->coff == output->dma->size) {
  557. output->dma->coff = 0;
  558. output->dma->cbuf = ((output->dma->cbuf + 1) %
  559. output->dma->num);
  560. }
  561. ddbwritel(dev,
  562. (output->dma->cbuf << 11) |
  563. (output->dma->coff >> 7),
  564. DMA_BUFFER_ACK(output->dma));
  565. }
  566. return count - left;
  567. }
  568. static u32 ddb_input_avail(struct ddb_input *input)
  569. {
  570. struct ddb *dev = input->port->dev;
  571. u32 idx, off, stat = input->dma->stat;
  572. u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma));
  573. idx = (stat >> 11) & 0x1f;
  574. off = (stat & 0x7ff) << 7;
  575. if (ctrl & 4) {
  576. dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl);
  577. ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma));
  578. return 0;
  579. }
  580. if (input->dma->cbuf != idx)
  581. return 188;
  582. return 0;
  583. }
  584. static ssize_t ddb_input_read(struct ddb_input *input,
  585. __user u8 *buf, size_t count)
  586. {
  587. struct ddb *dev = input->port->dev;
  588. u32 left = count;
  589. u32 idx, free, stat = input->dma->stat;
  590. int ret;
  591. idx = (stat >> 11) & 0x1f;
  592. while (left) {
  593. if (input->dma->cbuf == idx)
  594. return count - left;
  595. free = input->dma->size - input->dma->coff;
  596. if (free > left)
  597. free = left;
  598. if (alt_dma)
  599. dma_sync_single_for_cpu(
  600. dev->dev,
  601. input->dma->pbuf[input->dma->cbuf],
  602. input->dma->size, DMA_FROM_DEVICE);
  603. ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] +
  604. input->dma->coff, free);
  605. if (ret)
  606. return -EFAULT;
  607. input->dma->coff += free;
  608. if (input->dma->coff == input->dma->size) {
  609. input->dma->coff = 0;
  610. input->dma->cbuf = (input->dma->cbuf + 1) %
  611. input->dma->num;
  612. }
  613. left -= free;
  614. buf += free;
  615. ddbwritel(dev,
  616. (input->dma->cbuf << 11) | (input->dma->coff >> 7),
  617. DMA_BUFFER_ACK(input->dma));
  618. }
  619. return count;
  620. }
  621. /****************************************************************************/
  622. /****************************************************************************/
  623. static ssize_t ts_write(struct file *file, const __user char *buf,
  624. size_t count, loff_t *ppos)
  625. {
  626. struct dvb_device *dvbdev = file->private_data;
  627. struct ddb_output *output = dvbdev->priv;
  628. struct ddb *dev = output->port->dev;
  629. size_t left = count;
  630. int stat;
  631. if (!dev->has_dma)
  632. return -EINVAL;
  633. while (left) {
  634. if (ddb_output_free(output) < 188) {
  635. if (file->f_flags & O_NONBLOCK)
  636. break;
  637. if (wait_event_interruptible(
  638. output->dma->wq,
  639. ddb_output_free(output) >= 188) < 0)
  640. break;
  641. }
  642. stat = ddb_output_write(output, buf, left);
  643. if (stat < 0)
  644. return stat;
  645. buf += stat;
  646. left -= stat;
  647. }
  648. return (left == count) ? -EAGAIN : (count - left);
  649. }
  650. static ssize_t ts_read(struct file *file, __user char *buf,
  651. size_t count, loff_t *ppos)
  652. {
  653. struct dvb_device *dvbdev = file->private_data;
  654. struct ddb_output *output = dvbdev->priv;
  655. struct ddb_input *input = output->port->input[0];
  656. struct ddb *dev = output->port->dev;
  657. size_t left = count;
  658. int stat;
  659. if (!dev->has_dma)
  660. return -EINVAL;
  661. while (left) {
  662. if (ddb_input_avail(input) < 188) {
  663. if (file->f_flags & O_NONBLOCK)
  664. break;
  665. if (wait_event_interruptible(
  666. input->dma->wq,
  667. ddb_input_avail(input) >= 188) < 0)
  668. break;
  669. }
  670. stat = ddb_input_read(input, buf, left);
  671. if (stat < 0)
  672. return stat;
  673. left -= stat;
  674. buf += stat;
  675. }
  676. return (count && (left == count)) ? -EAGAIN : (count - left);
  677. }
  678. static __poll_t ts_poll(struct file *file, poll_table *wait)
  679. {
  680. struct dvb_device *dvbdev = file->private_data;
  681. struct ddb_output *output = dvbdev->priv;
  682. struct ddb_input *input = output->port->input[0];
  683. __poll_t mask = 0;
  684. poll_wait(file, &input->dma->wq, wait);
  685. poll_wait(file, &output->dma->wq, wait);
  686. if (ddb_input_avail(input) >= 188)
  687. mask |= EPOLLIN | EPOLLRDNORM;
  688. if (ddb_output_free(output) >= 188)
  689. mask |= EPOLLOUT | EPOLLWRNORM;
  690. return mask;
  691. }
  692. static int ts_release(struct inode *inode, struct file *file)
  693. {
  694. struct dvb_device *dvbdev = file->private_data;
  695. struct ddb_output *output = NULL;
  696. struct ddb_input *input = NULL;
  697. if (dvbdev) {
  698. output = dvbdev->priv;
  699. input = output->port->input[0];
  700. }
  701. if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
  702. if (!input)
  703. return -EINVAL;
  704. ddb_input_stop(input);
  705. } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
  706. if (!output)
  707. return -EINVAL;
  708. ddb_output_stop(output);
  709. }
  710. return dvb_generic_release(inode, file);
  711. }
  712. static int ts_open(struct inode *inode, struct file *file)
  713. {
  714. int err;
  715. struct dvb_device *dvbdev = file->private_data;
  716. struct ddb_output *output = NULL;
  717. struct ddb_input *input = NULL;
  718. if (dvbdev) {
  719. output = dvbdev->priv;
  720. input = output->port->input[0];
  721. }
  722. if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
  723. if (!input)
  724. return -EINVAL;
  725. if (input->redo || input->redi)
  726. return -EBUSY;
  727. } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
  728. if (!output)
  729. return -EINVAL;
  730. } else {
  731. return -EINVAL;
  732. }
  733. err = dvb_generic_open(inode, file);
  734. if (err < 0)
  735. return err;
  736. if ((file->f_flags & O_ACCMODE) == O_RDONLY)
  737. ddb_input_start(input);
  738. else if ((file->f_flags & O_ACCMODE) == O_WRONLY)
  739. ddb_output_start(output);
  740. return err;
  741. }
  742. static const struct file_operations ci_fops = {
  743. .owner = THIS_MODULE,
  744. .read = ts_read,
  745. .write = ts_write,
  746. .open = ts_open,
  747. .release = ts_release,
  748. .poll = ts_poll,
  749. .mmap = NULL,
  750. };
  751. static struct dvb_device dvbdev_ci = {
  752. .priv = NULL,
  753. .readers = 1,
  754. .writers = 1,
  755. .users = 2,
  756. .fops = &ci_fops,
  757. };
  758. /****************************************************************************/
  759. /****************************************************************************/
  760. static int locked_gate_ctrl(struct dvb_frontend *fe, int enable)
  761. {
  762. struct ddb_input *input = fe->sec_priv;
  763. struct ddb_port *port = input->port;
  764. struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
  765. int status;
  766. if (enable) {
  767. mutex_lock(&port->i2c_gate_lock);
  768. status = dvb->i2c_gate_ctrl(fe, 1);
  769. } else {
  770. status = dvb->i2c_gate_ctrl(fe, 0);
  771. mutex_unlock(&port->i2c_gate_lock);
  772. }
  773. return status;
  774. }
  775. static int demod_attach_drxk(struct ddb_input *input)
  776. {
  777. struct i2c_adapter *i2c = &input->port->i2c->adap;
  778. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  779. struct device *dev = input->port->dev->dev;
  780. struct drxk_config config;
  781. memset(&config, 0, sizeof(config));
  782. config.adr = 0x29 + (input->nr & 1);
  783. config.microcode_name = "drxk_a3.mc";
  784. dvb->fe = dvb_attach(drxk_attach, &config, i2c);
  785. if (!dvb->fe) {
  786. dev_err(dev, "No DRXK found!\n");
  787. return -ENODEV;
  788. }
  789. dvb->fe->sec_priv = input;
  790. dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
  791. dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
  792. return 0;
  793. }
  794. static int tuner_attach_tda18271(struct ddb_input *input)
  795. {
  796. struct i2c_adapter *i2c = &input->port->i2c->adap;
  797. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  798. struct device *dev = input->port->dev->dev;
  799. struct dvb_frontend *fe;
  800. if (dvb->fe->ops.i2c_gate_ctrl)
  801. dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
  802. fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60);
  803. if (dvb->fe->ops.i2c_gate_ctrl)
  804. dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
  805. if (!fe) {
  806. dev_err(dev, "No TDA18271 found!\n");
  807. return -ENODEV;
  808. }
  809. return 0;
  810. }
  811. /******************************************************************************/
  812. /******************************************************************************/
  813. /******************************************************************************/
  814. static struct stv0367_config ddb_stv0367_config[] = {
  815. {
  816. .demod_address = 0x1f,
  817. .xtal = 27000000,
  818. .if_khz = 0,
  819. .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
  820. .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
  821. .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
  822. }, {
  823. .demod_address = 0x1e,
  824. .xtal = 27000000,
  825. .if_khz = 0,
  826. .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
  827. .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
  828. .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
  829. },
  830. };
  831. static int demod_attach_stv0367(struct ddb_input *input)
  832. {
  833. struct i2c_adapter *i2c = &input->port->i2c->adap;
  834. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  835. struct device *dev = input->port->dev->dev;
  836. /* attach frontend */
  837. dvb->fe = dvb_attach(stv0367ddb_attach,
  838. &ddb_stv0367_config[(input->nr & 1)], i2c);
  839. if (!dvb->fe) {
  840. dev_err(dev, "No stv0367 found!\n");
  841. return -ENODEV;
  842. }
  843. dvb->fe->sec_priv = input;
  844. dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
  845. dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
  846. return 0;
  847. }
  848. static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr)
  849. {
  850. struct i2c_adapter *adapter = &input->port->i2c->adap;
  851. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  852. struct device *dev = input->port->dev->dev;
  853. u8 tda_id[2];
  854. u8 subaddr = 0x00;
  855. dev_dbg(dev, "stv0367-tda18212 tuner ping\n");
  856. if (dvb->fe->ops.i2c_gate_ctrl)
  857. dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
  858. if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
  859. dev_dbg(dev, "tda18212 ping 1 fail\n");
  860. if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
  861. dev_warn(dev, "tda18212 ping failed, expect problems\n");
  862. if (dvb->fe->ops.i2c_gate_ctrl)
  863. dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
  864. return 0;
  865. }
  866. static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24)
  867. {
  868. struct i2c_adapter *i2c = &input->port->i2c->adap;
  869. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  870. struct device *dev = input->port->dev->dev;
  871. struct cxd2841er_config cfg;
  872. /* the cxd2841er driver expects 8bit/shifted I2C addresses */
  873. cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1;
  874. cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500;
  875. cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE |
  876. CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG |
  877. CXD2841ER_TSBITS;
  878. if (!par)
  879. cfg.flags |= CXD2841ER_TS_SERIAL;
  880. /* attach frontend */
  881. dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c);
  882. if (!dvb->fe) {
  883. dev_err(dev, "No cxd2837/38/43/54 found!\n");
  884. return -ENODEV;
  885. }
  886. dvb->fe->sec_priv = input;
  887. dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
  888. dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
  889. return 0;
  890. }
  891. static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype)
  892. {
  893. struct i2c_adapter *adapter = &input->port->i2c->adap;
  894. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  895. struct device *dev = input->port->dev->dev;
  896. struct i2c_client *client;
  897. struct tda18212_config config = {
  898. .fe = dvb->fe,
  899. .if_dvbt_6 = 3550,
  900. .if_dvbt_7 = 3700,
  901. .if_dvbt_8 = 4150,
  902. .if_dvbt2_6 = 3250,
  903. .if_dvbt2_7 = 4000,
  904. .if_dvbt2_8 = 4000,
  905. .if_dvbc = 5000,
  906. };
  907. u8 addr = (input->nr & 1) ? 0x63 : 0x60;
  908. /* due to a hardware quirk with the I2C gate on the stv0367+tda18212
  909. * combo, the tda18212 must be probed by reading it's id _twice_ when
  910. * cold started, or it very likely will fail.
  911. */
  912. if (porttype == DDB_TUNER_DVBCT_ST)
  913. tuner_tda18212_ping(input, addr);
  914. /* perform tuner probe/init/attach */
  915. client = dvb_module_probe("tda18212", NULL, adapter, addr, &config);
  916. if (!client)
  917. goto err;
  918. dvb->i2c_client[0] = client;
  919. return 0;
  920. err:
  921. dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n");
  922. return -ENODEV;
  923. }
  924. /****************************************************************************/
  925. /****************************************************************************/
  926. /****************************************************************************/
  927. static struct stv090x_config stv0900 = {
  928. .device = STV0900,
  929. .demod_mode = STV090x_DUAL,
  930. .clk_mode = STV090x_CLK_EXT,
  931. .xtal = 27000000,
  932. .address = 0x69,
  933. .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
  934. .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
  935. .ts1_tei = 1,
  936. .ts2_tei = 1,
  937. .repeater_level = STV090x_RPTLEVEL_16,
  938. .adc1_range = STV090x_ADC_1Vpp,
  939. .adc2_range = STV090x_ADC_1Vpp,
  940. .diseqc_envelope_mode = true,
  941. };
  942. static struct stv090x_config stv0900_aa = {
  943. .device = STV0900,
  944. .demod_mode = STV090x_DUAL,
  945. .clk_mode = STV090x_CLK_EXT,
  946. .xtal = 27000000,
  947. .address = 0x68,
  948. .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
  949. .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
  950. .ts1_tei = 1,
  951. .ts2_tei = 1,
  952. .repeater_level = STV090x_RPTLEVEL_16,
  953. .adc1_range = STV090x_ADC_1Vpp,
  954. .adc2_range = STV090x_ADC_1Vpp,
  955. .diseqc_envelope_mode = true,
  956. };
  957. static struct stv6110x_config stv6110a = {
  958. .addr = 0x60,
  959. .refclk = 27000000,
  960. .clk_div = 1,
  961. };
  962. static struct stv6110x_config stv6110b = {
  963. .addr = 0x63,
  964. .refclk = 27000000,
  965. .clk_div = 1,
  966. };
  967. static int demod_attach_stv0900(struct ddb_input *input, int type)
  968. {
  969. struct i2c_adapter *i2c = &input->port->i2c->adap;
  970. struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
  971. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  972. struct device *dev = input->port->dev->dev;
  973. dvb->fe = dvb_attach(stv090x_attach, feconf, i2c,
  974. (input->nr & 1) ? STV090x_DEMODULATOR_1
  975. : STV090x_DEMODULATOR_0);
  976. if (!dvb->fe) {
  977. dev_err(dev, "No STV0900 found!\n");
  978. return -ENODEV;
  979. }
  980. if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0,
  981. 0, (input->nr & 1) ?
  982. (0x09 - type) : (0x0b - type))) {
  983. dev_err(dev, "No LNBH24 found!\n");
  984. dvb_frontend_detach(dvb->fe);
  985. return -ENODEV;
  986. }
  987. return 0;
  988. }
  989. static int tuner_attach_stv6110(struct ddb_input *input, int type)
  990. {
  991. struct i2c_adapter *i2c = &input->port->i2c->adap;
  992. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  993. struct device *dev = input->port->dev->dev;
  994. struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
  995. struct stv6110x_config *tunerconf = (input->nr & 1) ?
  996. &stv6110b : &stv6110a;
  997. const struct stv6110x_devctl *ctl;
  998. ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c);
  999. if (!ctl) {
  1000. dev_err(dev, "No STV6110X found!\n");
  1001. return -ENODEV;
  1002. }
  1003. dev_info(dev, "attach tuner input %d adr %02x\n",
  1004. input->nr, tunerconf->addr);
  1005. feconf->tuner_init = ctl->tuner_init;
  1006. feconf->tuner_sleep = ctl->tuner_sleep;
  1007. feconf->tuner_set_mode = ctl->tuner_set_mode;
  1008. feconf->tuner_set_frequency = ctl->tuner_set_frequency;
  1009. feconf->tuner_get_frequency = ctl->tuner_get_frequency;
  1010. feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
  1011. feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
  1012. feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
  1013. feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
  1014. feconf->tuner_set_refclk = ctl->tuner_set_refclk;
  1015. feconf->tuner_get_status = ctl->tuner_get_status;
  1016. return 0;
  1017. }
  1018. static const struct stv0910_cfg stv0910_p = {
  1019. .adr = 0x68,
  1020. .parallel = 1,
  1021. .rptlvl = 4,
  1022. .clk = 30000000,
  1023. .tsspeed = 0x28,
  1024. };
  1025. static const struct lnbh25_config lnbh25_cfg = {
  1026. .i2c_address = 0x0c << 1,
  1027. .data2_config = LNBH25_TEN
  1028. };
  1029. static int has_lnbh25(struct i2c_adapter *i2c, u8 adr)
  1030. {
  1031. u8 val;
  1032. return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1;
  1033. }
  1034. static int demod_attach_stv0910(struct ddb_input *input, int type, int tsfast)
  1035. {
  1036. struct i2c_adapter *i2c = &input->port->i2c->adap;
  1037. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1038. struct device *dev = input->port->dev->dev;
  1039. struct stv0910_cfg cfg = stv0910_p;
  1040. struct lnbh25_config lnbcfg = lnbh25_cfg;
  1041. if (stv0910_single)
  1042. cfg.single = 1;
  1043. if (type)
  1044. cfg.parallel = 2;
  1045. if (tsfast) {
  1046. dev_info(dev, "Enabling stv0910 higher speed TS\n");
  1047. cfg.tsspeed = 0x10;
  1048. }
  1049. dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1));
  1050. if (!dvb->fe) {
  1051. cfg.adr = 0x6c;
  1052. dvb->fe = dvb_attach(stv0910_attach, i2c,
  1053. &cfg, (input->nr & 1));
  1054. }
  1055. if (!dvb->fe) {
  1056. dev_err(dev, "No STV0910 found!\n");
  1057. return -ENODEV;
  1058. }
  1059. /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit
  1060. * i2c addresses
  1061. */
  1062. if (has_lnbh25(i2c, 0x0d))
  1063. lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1);
  1064. else
  1065. lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1);
  1066. if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) {
  1067. dev_err(dev, "No LNBH25 found!\n");
  1068. dvb_frontend_detach(dvb->fe);
  1069. return -ENODEV;
  1070. }
  1071. return 0;
  1072. }
  1073. static int tuner_attach_stv6111(struct ddb_input *input, int type)
  1074. {
  1075. struct i2c_adapter *i2c = &input->port->i2c->adap;
  1076. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1077. struct device *dev = input->port->dev->dev;
  1078. struct dvb_frontend *fe;
  1079. u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60);
  1080. fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr);
  1081. if (!fe) {
  1082. fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4);
  1083. if (!fe) {
  1084. dev_err(dev, "No STV6111 found at 0x%02x!\n", adr);
  1085. return -ENODEV;
  1086. }
  1087. }
  1088. return 0;
  1089. }
  1090. static int demod_attach_dummy(struct ddb_input *input)
  1091. {
  1092. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1093. struct device *dev = input->port->dev->dev;
  1094. dvb->fe = dvb_attach(dvb_dummy_fe_qam_attach);
  1095. if (!dvb->fe) {
  1096. dev_err(dev, "QAM dummy attach failed!\n");
  1097. return -ENODEV;
  1098. }
  1099. return 0;
  1100. }
  1101. static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
  1102. {
  1103. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  1104. struct ddb_input *input = dvbdmx->priv;
  1105. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1106. if (!dvb->users)
  1107. ddb_input_start_all(input);
  1108. return ++dvb->users;
  1109. }
  1110. static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
  1111. {
  1112. struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
  1113. struct ddb_input *input = dvbdmx->priv;
  1114. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1115. if (--dvb->users)
  1116. return dvb->users;
  1117. ddb_input_stop_all(input);
  1118. return 0;
  1119. }
  1120. static void dvb_input_detach(struct ddb_input *input)
  1121. {
  1122. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1123. struct dvb_demux *dvbdemux = &dvb->demux;
  1124. switch (dvb->attached) {
  1125. case 0x31:
  1126. if (dvb->fe2)
  1127. dvb_unregister_frontend(dvb->fe2);
  1128. if (dvb->fe)
  1129. dvb_unregister_frontend(dvb->fe);
  1130. /* fallthrough */
  1131. case 0x30:
  1132. dvb_module_release(dvb->i2c_client[0]);
  1133. dvb->i2c_client[0] = NULL;
  1134. if (dvb->fe2)
  1135. dvb_frontend_detach(dvb->fe2);
  1136. if (dvb->fe)
  1137. dvb_frontend_detach(dvb->fe);
  1138. dvb->fe = NULL;
  1139. dvb->fe2 = NULL;
  1140. /* fallthrough */
  1141. case 0x20:
  1142. dvb_net_release(&dvb->dvbnet);
  1143. /* fallthrough */
  1144. case 0x12:
  1145. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
  1146. &dvb->hw_frontend);
  1147. dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
  1148. &dvb->mem_frontend);
  1149. /* fallthrough */
  1150. case 0x11:
  1151. dvb_dmxdev_release(&dvb->dmxdev);
  1152. /* fallthrough */
  1153. case 0x10:
  1154. dvb_dmx_release(&dvb->demux);
  1155. /* fallthrough */
  1156. case 0x01:
  1157. break;
  1158. }
  1159. dvb->attached = 0x00;
  1160. }
  1161. static int dvb_register_adapters(struct ddb *dev)
  1162. {
  1163. int i, ret = 0;
  1164. struct ddb_port *port;
  1165. struct dvb_adapter *adap;
  1166. if (adapter_alloc == 3) {
  1167. port = &dev->port[0];
  1168. adap = port->dvb[0].adap;
  1169. ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
  1170. port->dev->dev,
  1171. adapter_nr);
  1172. if (ret < 0)
  1173. return ret;
  1174. port->dvb[0].adap_registered = 1;
  1175. for (i = 0; i < dev->port_num; i++) {
  1176. port = &dev->port[i];
  1177. port->dvb[0].adap = adap;
  1178. port->dvb[1].adap = adap;
  1179. }
  1180. return 0;
  1181. }
  1182. for (i = 0; i < dev->port_num; i++) {
  1183. port = &dev->port[i];
  1184. switch (port->class) {
  1185. case DDB_PORT_TUNER:
  1186. adap = port->dvb[0].adap;
  1187. ret = dvb_register_adapter(adap, "DDBridge",
  1188. THIS_MODULE,
  1189. port->dev->dev,
  1190. adapter_nr);
  1191. if (ret < 0)
  1192. return ret;
  1193. port->dvb[0].adap_registered = 1;
  1194. if (adapter_alloc > 0) {
  1195. port->dvb[1].adap = port->dvb[0].adap;
  1196. break;
  1197. }
  1198. adap = port->dvb[1].adap;
  1199. ret = dvb_register_adapter(adap, "DDBridge",
  1200. THIS_MODULE,
  1201. port->dev->dev,
  1202. adapter_nr);
  1203. if (ret < 0)
  1204. return ret;
  1205. port->dvb[1].adap_registered = 1;
  1206. break;
  1207. case DDB_PORT_CI:
  1208. case DDB_PORT_LOOP:
  1209. adap = port->dvb[0].adap;
  1210. ret = dvb_register_adapter(adap, "DDBridge",
  1211. THIS_MODULE,
  1212. port->dev->dev,
  1213. adapter_nr);
  1214. if (ret < 0)
  1215. return ret;
  1216. port->dvb[0].adap_registered = 1;
  1217. break;
  1218. default:
  1219. if (adapter_alloc < 2)
  1220. break;
  1221. adap = port->dvb[0].adap;
  1222. ret = dvb_register_adapter(adap, "DDBridge",
  1223. THIS_MODULE,
  1224. port->dev->dev,
  1225. adapter_nr);
  1226. if (ret < 0)
  1227. return ret;
  1228. port->dvb[0].adap_registered = 1;
  1229. break;
  1230. }
  1231. }
  1232. return ret;
  1233. }
  1234. static void dvb_unregister_adapters(struct ddb *dev)
  1235. {
  1236. int i;
  1237. struct ddb_port *port;
  1238. struct ddb_dvb *dvb;
  1239. for (i = 0; i < dev->link[0].info->port_num; i++) {
  1240. port = &dev->port[i];
  1241. dvb = &port->dvb[0];
  1242. if (dvb->adap_registered)
  1243. dvb_unregister_adapter(dvb->adap);
  1244. dvb->adap_registered = 0;
  1245. dvb = &port->dvb[1];
  1246. if (dvb->adap_registered)
  1247. dvb_unregister_adapter(dvb->adap);
  1248. dvb->adap_registered = 0;
  1249. }
  1250. }
  1251. static int dvb_input_attach(struct ddb_input *input)
  1252. {
  1253. int ret = 0;
  1254. struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
  1255. struct ddb_port *port = input->port;
  1256. struct dvb_adapter *adap = dvb->adap;
  1257. struct dvb_demux *dvbdemux = &dvb->demux;
  1258. struct ddb_ids *devids = &input->port->dev->link[input->port->lnr].ids;
  1259. int par = 0, osc24 = 0, tsfast = 0;
  1260. /*
  1261. * Determine if bridges with stv0910 demods can run with fast TS and
  1262. * thus support high bandwidth transponders.
  1263. * STV0910_PR and STV0910_P tuner types covers all relevant bridges,
  1264. * namely the CineS2 V7(A) and the Octopus CI S2 Pro/Advanced. All
  1265. * DuoFlex S2 V4(A) have type=DDB_TUNER_DVBS_STV0910 without any suffix
  1266. * and are limited by the serial link to the bridge, thus won't work
  1267. * in fast TS mode.
  1268. */
  1269. if (port->nr == 0 &&
  1270. (port->type == DDB_TUNER_DVBS_STV0910_PR ||
  1271. port->type == DDB_TUNER_DVBS_STV0910_P)) {
  1272. /* fast TS on port 0 requires FPGA version >= 1.7 */
  1273. if ((devids->hwid & 0x00ffffff) >= 0x00010007)
  1274. tsfast = 1;
  1275. }
  1276. dvb->attached = 0x01;
  1277. dvbdemux->priv = input;
  1278. dvbdemux->dmx.capabilities = DMX_TS_FILTERING |
  1279. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
  1280. dvbdemux->start_feed = start_feed;
  1281. dvbdemux->stop_feed = stop_feed;
  1282. dvbdemux->filternum = 256;
  1283. dvbdemux->feednum = 256;
  1284. ret = dvb_dmx_init(dvbdemux);
  1285. if (ret < 0)
  1286. return ret;
  1287. dvb->attached = 0x10;
  1288. dvb->dmxdev.filternum = 256;
  1289. dvb->dmxdev.demux = &dvbdemux->dmx;
  1290. ret = dvb_dmxdev_init(&dvb->dmxdev, adap);
  1291. if (ret < 0)
  1292. goto err_detach;
  1293. dvb->attached = 0x11;
  1294. dvb->mem_frontend.source = DMX_MEMORY_FE;
  1295. dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend);
  1296. dvb->hw_frontend.source = DMX_FRONTEND_0;
  1297. dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend);
  1298. ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend);
  1299. if (ret < 0)
  1300. goto err_detach;
  1301. dvb->attached = 0x12;
  1302. ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux);
  1303. if (ret < 0)
  1304. goto err_detach;
  1305. dvb->attached = 0x20;
  1306. dvb->fe = NULL;
  1307. dvb->fe2 = NULL;
  1308. switch (port->type) {
  1309. case DDB_TUNER_MXL5XX:
  1310. if (ddb_fe_attach_mxl5xx(input) < 0)
  1311. goto err_detach;
  1312. break;
  1313. case DDB_TUNER_DVBS_ST:
  1314. if (demod_attach_stv0900(input, 0) < 0)
  1315. goto err_detach;
  1316. if (tuner_attach_stv6110(input, 0) < 0)
  1317. goto err_tuner;
  1318. break;
  1319. case DDB_TUNER_DVBS_ST_AA:
  1320. if (demod_attach_stv0900(input, 1) < 0)
  1321. goto err_detach;
  1322. if (tuner_attach_stv6110(input, 1) < 0)
  1323. goto err_tuner;
  1324. break;
  1325. case DDB_TUNER_DVBS_STV0910:
  1326. if (demod_attach_stv0910(input, 0, tsfast) < 0)
  1327. goto err_detach;
  1328. if (tuner_attach_stv6111(input, 0) < 0)
  1329. goto err_tuner;
  1330. break;
  1331. case DDB_TUNER_DVBS_STV0910_PR:
  1332. if (demod_attach_stv0910(input, 1, tsfast) < 0)
  1333. goto err_detach;
  1334. if (tuner_attach_stv6111(input, 1) < 0)
  1335. goto err_tuner;
  1336. break;
  1337. case DDB_TUNER_DVBS_STV0910_P:
  1338. if (demod_attach_stv0910(input, 0, tsfast) < 0)
  1339. goto err_detach;
  1340. if (tuner_attach_stv6111(input, 1) < 0)
  1341. goto err_tuner;
  1342. break;
  1343. case DDB_TUNER_DVBCT_TR:
  1344. if (demod_attach_drxk(input) < 0)
  1345. goto err_detach;
  1346. if (tuner_attach_tda18271(input) < 0)
  1347. goto err_tuner;
  1348. break;
  1349. case DDB_TUNER_DVBCT_ST:
  1350. if (demod_attach_stv0367(input) < 0)
  1351. goto err_detach;
  1352. if (tuner_attach_tda18212(input, port->type) < 0)
  1353. goto err_tuner;
  1354. break;
  1355. case DDB_TUNER_DVBC2T2I_SONY_P:
  1356. if (input->port->dev->link[input->port->lnr].info->ts_quirks &
  1357. TS_QUIRK_ALT_OSC)
  1358. osc24 = 0;
  1359. else
  1360. osc24 = 1;
  1361. /* fall-through */
  1362. case DDB_TUNER_DVBCT2_SONY_P:
  1363. case DDB_TUNER_DVBC2T2_SONY_P:
  1364. case DDB_TUNER_ISDBT_SONY_P:
  1365. if (input->port->dev->link[input->port->lnr].info->ts_quirks
  1366. & TS_QUIRK_SERIAL)
  1367. par = 0;
  1368. else
  1369. par = 1;
  1370. if (demod_attach_cxd28xx(input, par, osc24) < 0)
  1371. goto err_detach;
  1372. if (tuner_attach_tda18212(input, port->type) < 0)
  1373. goto err_tuner;
  1374. break;
  1375. case DDB_TUNER_DVBC2T2I_SONY:
  1376. osc24 = 1;
  1377. /* fall-through */
  1378. case DDB_TUNER_DVBCT2_SONY:
  1379. case DDB_TUNER_DVBC2T2_SONY:
  1380. case DDB_TUNER_ISDBT_SONY:
  1381. if (demod_attach_cxd28xx(input, 0, osc24) < 0)
  1382. goto err_detach;
  1383. if (tuner_attach_tda18212(input, port->type) < 0)
  1384. goto err_tuner;
  1385. break;
  1386. case DDB_TUNER_DUMMY:
  1387. if (demod_attach_dummy(input) < 0)
  1388. goto err_detach;
  1389. break;
  1390. case DDB_TUNER_MCI_SX8:
  1391. if (ddb_fe_attach_mci(input, port->type) < 0)
  1392. goto err_detach;
  1393. break;
  1394. default:
  1395. return 0;
  1396. }
  1397. dvb->attached = 0x30;
  1398. if (dvb->fe) {
  1399. if (dvb_register_frontend(adap, dvb->fe) < 0)
  1400. goto err_detach;
  1401. if (dvb->fe2) {
  1402. if (dvb_register_frontend(adap, dvb->fe2) < 0) {
  1403. dvb_unregister_frontend(dvb->fe);
  1404. goto err_detach;
  1405. }
  1406. dvb->fe2->tuner_priv = dvb->fe->tuner_priv;
  1407. memcpy(&dvb->fe2->ops.tuner_ops,
  1408. &dvb->fe->ops.tuner_ops,
  1409. sizeof(struct dvb_tuner_ops));
  1410. }
  1411. }
  1412. dvb->attached = 0x31;
  1413. return 0;
  1414. err_tuner:
  1415. dev_err(port->dev->dev, "tuner attach failed!\n");
  1416. if (dvb->fe2)
  1417. dvb_frontend_detach(dvb->fe2);
  1418. if (dvb->fe)
  1419. dvb_frontend_detach(dvb->fe);
  1420. err_detach:
  1421. dvb_input_detach(input);
  1422. /* return error from ret if set */
  1423. if (ret < 0)
  1424. return ret;
  1425. return -ENODEV;
  1426. }
  1427. static int port_has_encti(struct ddb_port *port)
  1428. {
  1429. struct device *dev = port->dev->dev;
  1430. u8 val;
  1431. int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val);
  1432. if (!ret)
  1433. dev_info(dev, "[0x20]=0x%02x\n", val);
  1434. return ret ? 0 : 1;
  1435. }
  1436. static int port_has_cxd(struct ddb_port *port, u8 *type)
  1437. {
  1438. u8 val;
  1439. u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4];
  1440. struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0,
  1441. .buf = probe, .len = 4 },
  1442. { .addr = 0x40, .flags = I2C_M_RD,
  1443. .buf = data, .len = 4 } };
  1444. val = i2c_transfer(&port->i2c->adap, msgs, 2);
  1445. if (val != 2)
  1446. return 0;
  1447. if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43)
  1448. *type = 2;
  1449. else
  1450. *type = 1;
  1451. return 1;
  1452. }
  1453. static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id)
  1454. {
  1455. u8 probe[1] = { 0x00 }, data[4];
  1456. if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4))
  1457. return 0;
  1458. if (data[0] == 'D' && data[1] == 'F') {
  1459. *id = data[2];
  1460. *type = 1;
  1461. return 1;
  1462. }
  1463. if (data[0] == 'C' && data[1] == 'I') {
  1464. *id = data[2];
  1465. *type = 2;
  1466. return 1;
  1467. }
  1468. return 0;
  1469. }
  1470. static int port_has_stv0900(struct ddb_port *port)
  1471. {
  1472. u8 val;
  1473. if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
  1474. return 0;
  1475. return 1;
  1476. }
  1477. static int port_has_stv0900_aa(struct ddb_port *port, u8 *id)
  1478. {
  1479. if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0)
  1480. return 0;
  1481. return 1;
  1482. }
  1483. static int port_has_drxks(struct ddb_port *port)
  1484. {
  1485. u8 val;
  1486. if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
  1487. return 0;
  1488. if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
  1489. return 0;
  1490. return 1;
  1491. }
  1492. static int port_has_stv0367(struct ddb_port *port)
  1493. {
  1494. u8 val;
  1495. if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0)
  1496. return 0;
  1497. if (val != 0x60)
  1498. return 0;
  1499. if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0)
  1500. return 0;
  1501. if (val != 0x60)
  1502. return 0;
  1503. return 1;
  1504. }
  1505. static int init_xo2(struct ddb_port *port)
  1506. {
  1507. struct i2c_adapter *i2c = &port->i2c->adap;
  1508. struct ddb *dev = port->dev;
  1509. u8 val, data[2];
  1510. int res;
  1511. res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
  1512. if (res < 0)
  1513. return res;
  1514. if (data[0] != 0x01) {
  1515. dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr);
  1516. return -1;
  1517. }
  1518. i2c_read_reg(i2c, 0x10, 0x08, &val);
  1519. if (val != 0) {
  1520. i2c_write_reg(i2c, 0x10, 0x08, 0x00);
  1521. msleep(100);
  1522. }
  1523. /* Enable tuner power, disable pll, reset demods */
  1524. i2c_write_reg(i2c, 0x10, 0x08, 0x04);
  1525. usleep_range(2000, 3000);
  1526. /* Release demod resets */
  1527. i2c_write_reg(i2c, 0x10, 0x08, 0x07);
  1528. /* speed: 0=55,1=75,2=90,3=104 MBit/s */
  1529. i2c_write_reg(i2c, 0x10, 0x09, xo2_speed);
  1530. if (dev->link[port->lnr].info->con_clock) {
  1531. dev_info(dev->dev, "Setting continuous clock for XO2\n");
  1532. i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
  1533. i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
  1534. } else {
  1535. i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
  1536. i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
  1537. }
  1538. usleep_range(2000, 3000);
  1539. /* Start XO2 PLL */
  1540. i2c_write_reg(i2c, 0x10, 0x08, 0x87);
  1541. return 0;
  1542. }
  1543. static int init_xo2_ci(struct ddb_port *port)
  1544. {
  1545. struct i2c_adapter *i2c = &port->i2c->adap;
  1546. struct ddb *dev = port->dev;
  1547. u8 val, data[2];
  1548. int res;
  1549. res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
  1550. if (res < 0)
  1551. return res;
  1552. if (data[0] > 1) {
  1553. dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n",
  1554. port->nr, data[0]);
  1555. return -1;
  1556. }
  1557. dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n",
  1558. port->nr, data[0], data[1]);
  1559. i2c_read_reg(i2c, 0x10, 0x08, &val);
  1560. if (val != 0) {
  1561. i2c_write_reg(i2c, 0x10, 0x08, 0x00);
  1562. msleep(100);
  1563. }
  1564. /* Enable both CI */
  1565. i2c_write_reg(i2c, 0x10, 0x08, 3);
  1566. usleep_range(2000, 3000);
  1567. /* speed: 0=55,1=75,2=90,3=104 MBit/s */
  1568. i2c_write_reg(i2c, 0x10, 0x09, 1);
  1569. i2c_write_reg(i2c, 0x10, 0x08, 0x83);
  1570. usleep_range(2000, 3000);
  1571. if (dev->link[port->lnr].info->con_clock) {
  1572. dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n");
  1573. i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
  1574. i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
  1575. } else {
  1576. i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
  1577. i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
  1578. }
  1579. return 0;
  1580. }
  1581. static int port_has_cxd28xx(struct ddb_port *port, u8 *id)
  1582. {
  1583. struct i2c_adapter *i2c = &port->i2c->adap;
  1584. int status;
  1585. status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0);
  1586. if (status)
  1587. return 0;
  1588. status = i2c_read_reg(i2c, 0x6e, 0xfd, id);
  1589. if (status)
  1590. return 0;
  1591. return 1;
  1592. }
  1593. static char *xo2names[] = {
  1594. "DUAL DVB-S2", "DUAL DVB-C/T/T2",
  1595. "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2",
  1596. "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T",
  1597. "", ""
  1598. };
  1599. static char *xo2types[] = {
  1600. "DVBS_ST", "DVBCT2_SONY",
  1601. "ISDBT_SONY", "DVBC2T2_SONY",
  1602. "ATSC_ST", "DVBC2T2I_SONY"
  1603. };
  1604. static void ddb_port_probe(struct ddb_port *port)
  1605. {
  1606. struct ddb *dev = port->dev;
  1607. u32 l = port->lnr;
  1608. struct ddb_link *link = &dev->link[l];
  1609. u8 id, type;
  1610. port->name = "NO MODULE";
  1611. port->type_name = "NONE";
  1612. port->class = DDB_PORT_NONE;
  1613. /* Handle missing ports and ports without I2C */
  1614. if (dummy_tuner && !port->nr &&
  1615. link->ids.device == 0x0005) {
  1616. port->name = "DUMMY";
  1617. port->class = DDB_PORT_TUNER;
  1618. port->type = DDB_TUNER_DUMMY;
  1619. port->type_name = "DUMMY";
  1620. return;
  1621. }
  1622. if (port->nr == ts_loop) {
  1623. port->name = "TS LOOP";
  1624. port->class = DDB_PORT_LOOP;
  1625. return;
  1626. }
  1627. if (port->nr == 1 && link->info->type == DDB_OCTOPUS_CI &&
  1628. link->info->i2c_mask == 1) {
  1629. port->name = "NO TAB";
  1630. port->class = DDB_PORT_NONE;
  1631. return;
  1632. }
  1633. if (link->info->type == DDB_OCTOPUS_MAX) {
  1634. port->name = "DUAL DVB-S2 MAX";
  1635. port->type_name = "MXL5XX";
  1636. port->class = DDB_PORT_TUNER;
  1637. port->type = DDB_TUNER_MXL5XX;
  1638. if (port->i2c)
  1639. ddbwritel(dev, I2C_SPEED_400,
  1640. port->i2c->regs + I2C_TIMING);
  1641. return;
  1642. }
  1643. if (link->info->type == DDB_OCTOPUS_MCI) {
  1644. if (port->nr >= link->info->mci_ports)
  1645. return;
  1646. port->name = "DUAL MCI";
  1647. port->type_name = "MCI";
  1648. port->class = DDB_PORT_TUNER;
  1649. port->type = DDB_TUNER_MCI + link->info->mci_type;
  1650. return;
  1651. }
  1652. if (port->nr > 1 && link->info->type == DDB_OCTOPUS_CI) {
  1653. port->name = "CI internal";
  1654. port->type_name = "INTERNAL";
  1655. port->class = DDB_PORT_CI;
  1656. port->type = DDB_CI_INTERNAL;
  1657. }
  1658. if (!port->i2c)
  1659. return;
  1660. /* Probe ports with I2C */
  1661. if (port_has_cxd(port, &id)) {
  1662. if (id == 1) {
  1663. port->name = "CI";
  1664. port->type_name = "CXD2099";
  1665. port->class = DDB_PORT_CI;
  1666. port->type = DDB_CI_EXTERNAL_SONY;
  1667. ddbwritel(dev, I2C_SPEED_400,
  1668. port->i2c->regs + I2C_TIMING);
  1669. } else {
  1670. dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n",
  1671. port->nr);
  1672. return;
  1673. }
  1674. } else if (port_has_xo2(port, &type, &id)) {
  1675. ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
  1676. /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/
  1677. if (type == 2) {
  1678. port->name = "DuoFlex CI";
  1679. port->class = DDB_PORT_CI;
  1680. port->type = DDB_CI_EXTERNAL_XO2;
  1681. port->type_name = "CI_XO2";
  1682. init_xo2_ci(port);
  1683. return;
  1684. }
  1685. id >>= 2;
  1686. if (id > 5) {
  1687. port->name = "unknown XO2 DuoFlex";
  1688. port->type_name = "UNKNOWN";
  1689. } else {
  1690. port->name = xo2names[id];
  1691. port->class = DDB_PORT_TUNER;
  1692. port->type = DDB_TUNER_XO2 + id;
  1693. port->type_name = xo2types[id];
  1694. init_xo2(port);
  1695. }
  1696. } else if (port_has_cxd28xx(port, &id)) {
  1697. switch (id) {
  1698. case 0xa4:
  1699. port->name = "DUAL DVB-C2T2 CXD2843";
  1700. port->type = DDB_TUNER_DVBC2T2_SONY_P;
  1701. port->type_name = "DVBC2T2_SONY";
  1702. break;
  1703. case 0xb1:
  1704. port->name = "DUAL DVB-CT2 CXD2837";
  1705. port->type = DDB_TUNER_DVBCT2_SONY_P;
  1706. port->type_name = "DVBCT2_SONY";
  1707. break;
  1708. case 0xb0:
  1709. port->name = "DUAL ISDB-T CXD2838";
  1710. port->type = DDB_TUNER_ISDBT_SONY_P;
  1711. port->type_name = "ISDBT_SONY";
  1712. break;
  1713. case 0xc1:
  1714. port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
  1715. port->type = DDB_TUNER_DVBC2T2I_SONY_P;
  1716. port->type_name = "DVBC2T2I_ISDBT_SONY";
  1717. break;
  1718. default:
  1719. return;
  1720. }
  1721. port->class = DDB_PORT_TUNER;
  1722. ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
  1723. } else if (port_has_stv0900(port)) {
  1724. port->name = "DUAL DVB-S2";
  1725. port->class = DDB_PORT_TUNER;
  1726. port->type = DDB_TUNER_DVBS_ST;
  1727. port->type_name = "DVBS_ST";
  1728. ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
  1729. } else if (port_has_stv0900_aa(port, &id)) {
  1730. port->name = "DUAL DVB-S2";
  1731. port->class = DDB_PORT_TUNER;
  1732. if (id == 0x51) {
  1733. if (port->nr == 0 &&
  1734. link->info->ts_quirks & TS_QUIRK_REVERSED)
  1735. port->type = DDB_TUNER_DVBS_STV0910_PR;
  1736. else
  1737. port->type = DDB_TUNER_DVBS_STV0910_P;
  1738. port->type_name = "DVBS_ST_0910";
  1739. } else {
  1740. port->type = DDB_TUNER_DVBS_ST_AA;
  1741. port->type_name = "DVBS_ST_AA";
  1742. }
  1743. ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
  1744. } else if (port_has_drxks(port)) {
  1745. port->name = "DUAL DVB-C/T";
  1746. port->class = DDB_PORT_TUNER;
  1747. port->type = DDB_TUNER_DVBCT_TR;
  1748. port->type_name = "DVBCT_TR";
  1749. ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
  1750. } else if (port_has_stv0367(port)) {
  1751. port->name = "DUAL DVB-C/T";
  1752. port->class = DDB_PORT_TUNER;
  1753. port->type = DDB_TUNER_DVBCT_ST;
  1754. port->type_name = "DVBCT_ST";
  1755. ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
  1756. } else if (port_has_encti(port)) {
  1757. port->name = "ENCTI";
  1758. port->class = DDB_PORT_LOOP;
  1759. }
  1760. }
  1761. /****************************************************************************/
  1762. /****************************************************************************/
  1763. /****************************************************************************/
  1764. static int ddb_port_attach(struct ddb_port *port)
  1765. {
  1766. int ret = 0;
  1767. switch (port->class) {
  1768. case DDB_PORT_TUNER:
  1769. ret = dvb_input_attach(port->input[0]);
  1770. if (ret < 0)
  1771. break;
  1772. ret = dvb_input_attach(port->input[1]);
  1773. if (ret < 0) {
  1774. dvb_input_detach(port->input[0]);
  1775. break;
  1776. }
  1777. port->input[0]->redi = port->input[0];
  1778. port->input[1]->redi = port->input[1];
  1779. break;
  1780. case DDB_PORT_CI:
  1781. ret = ddb_ci_attach(port, ci_bitrate);
  1782. if (ret < 0)
  1783. break;
  1784. /* fall-through */
  1785. case DDB_PORT_LOOP:
  1786. ret = dvb_register_device(port->dvb[0].adap,
  1787. &port->dvb[0].dev,
  1788. &dvbdev_ci, (void *)port->output,
  1789. DVB_DEVICE_SEC, 0);
  1790. break;
  1791. default:
  1792. break;
  1793. }
  1794. if (ret < 0)
  1795. dev_err(port->dev->dev, "port_attach on port %d failed\n",
  1796. port->nr);
  1797. return ret;
  1798. }
  1799. int ddb_ports_attach(struct ddb *dev)
  1800. {
  1801. int i, numports, err_ports = 0, ret = 0;
  1802. struct ddb_port *port;
  1803. if (dev->port_num) {
  1804. ret = dvb_register_adapters(dev);
  1805. if (ret < 0) {
  1806. dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n");
  1807. return ret;
  1808. }
  1809. }
  1810. numports = dev->port_num;
  1811. for (i = 0; i < dev->port_num; i++) {
  1812. port = &dev->port[i];
  1813. if (port->class != DDB_PORT_NONE) {
  1814. ret = ddb_port_attach(port);
  1815. if (ret)
  1816. err_ports++;
  1817. } else {
  1818. numports--;
  1819. }
  1820. }
  1821. if (err_ports) {
  1822. if (err_ports == numports) {
  1823. dev_err(dev->dev, "All connected ports failed to initialise!\n");
  1824. return -ENODEV;
  1825. }
  1826. dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n",
  1827. err_ports, numports);
  1828. }
  1829. return 0;
  1830. }
  1831. void ddb_ports_detach(struct ddb *dev)
  1832. {
  1833. int i;
  1834. struct ddb_port *port;
  1835. for (i = 0; i < dev->port_num; i++) {
  1836. port = &dev->port[i];
  1837. switch (port->class) {
  1838. case DDB_PORT_TUNER:
  1839. dvb_input_detach(port->input[1]);
  1840. dvb_input_detach(port->input[0]);
  1841. break;
  1842. case DDB_PORT_CI:
  1843. case DDB_PORT_LOOP:
  1844. ddb_ci_detach(port);
  1845. break;
  1846. }
  1847. }
  1848. dvb_unregister_adapters(dev);
  1849. }
  1850. /* Copy input DMA pointers to output DMA and ACK. */
  1851. static void input_write_output(struct ddb_input *input,
  1852. struct ddb_output *output)
  1853. {
  1854. ddbwritel(output->port->dev,
  1855. input->dma->stat, DMA_BUFFER_ACK(output->dma));
  1856. output->dma->cbuf = (input->dma->stat >> 11) & 0x1f;
  1857. output->dma->coff = (input->dma->stat & 0x7ff) << 7;
  1858. }
  1859. static void output_ack_input(struct ddb_output *output,
  1860. struct ddb_input *input)
  1861. {
  1862. ddbwritel(input->port->dev,
  1863. output->dma->stat, DMA_BUFFER_ACK(input->dma));
  1864. }
  1865. static void input_write_dvb(struct ddb_input *input,
  1866. struct ddb_input *input2)
  1867. {
  1868. struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1];
  1869. struct ddb_dma *dma, *dma2;
  1870. struct ddb *dev = input->port->dev;
  1871. int ack = 1;
  1872. dma = input->dma;
  1873. dma2 = input->dma;
  1874. /*
  1875. * if there also is an output connected, do not ACK.
  1876. * input_write_output will ACK.
  1877. */
  1878. if (input->redo) {
  1879. dma2 = input->redo->dma;
  1880. ack = 0;
  1881. }
  1882. while (dma->cbuf != ((dma->stat >> 11) & 0x1f) ||
  1883. (4 & dma->ctrl)) {
  1884. if (4 & dma->ctrl) {
  1885. /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */
  1886. ack = 1;
  1887. }
  1888. if (alt_dma)
  1889. dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
  1890. dma2->size, DMA_FROM_DEVICE);
  1891. dvb_dmx_swfilter_packets(&dvb->demux,
  1892. dma2->vbuf[dma->cbuf],
  1893. dma2->size / 188);
  1894. dma->cbuf = (dma->cbuf + 1) % dma2->num;
  1895. if (ack)
  1896. ddbwritel(dev, (dma->cbuf << 11),
  1897. DMA_BUFFER_ACK(dma));
  1898. dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
  1899. dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
  1900. }
  1901. }
  1902. static void input_work(struct work_struct *work)
  1903. {
  1904. struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
  1905. struct ddb_input *input = (struct ddb_input *)dma->io;
  1906. struct ddb *dev = input->port->dev;
  1907. unsigned long flags;
  1908. spin_lock_irqsave(&dma->lock, flags);
  1909. if (!dma->running) {
  1910. spin_unlock_irqrestore(&dma->lock, flags);
  1911. return;
  1912. }
  1913. dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
  1914. dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
  1915. if (input->redi)
  1916. input_write_dvb(input, input->redi);
  1917. if (input->redo)
  1918. input_write_output(input, input->redo);
  1919. wake_up(&dma->wq);
  1920. spin_unlock_irqrestore(&dma->lock, flags);
  1921. }
  1922. static void input_handler(void *data)
  1923. {
  1924. struct ddb_input *input = (struct ddb_input *)data;
  1925. struct ddb_dma *dma = input->dma;
  1926. queue_work(ddb_wq, &dma->work);
  1927. }
  1928. static void output_work(struct work_struct *work)
  1929. {
  1930. struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
  1931. struct ddb_output *output = (struct ddb_output *)dma->io;
  1932. struct ddb *dev = output->port->dev;
  1933. unsigned long flags;
  1934. spin_lock_irqsave(&dma->lock, flags);
  1935. if (!dma->running)
  1936. goto unlock_exit;
  1937. dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
  1938. dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
  1939. if (output->redi)
  1940. output_ack_input(output, output->redi);
  1941. wake_up(&dma->wq);
  1942. unlock_exit:
  1943. spin_unlock_irqrestore(&dma->lock, flags);
  1944. }
  1945. static void output_handler(void *data)
  1946. {
  1947. struct ddb_output *output = (struct ddb_output *)data;
  1948. struct ddb_dma *dma = output->dma;
  1949. queue_work(ddb_wq, &dma->work);
  1950. }
  1951. /****************************************************************************/
  1952. /****************************************************************************/
  1953. static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
  1954. {
  1955. const struct ddb_info *info;
  1956. if (link)
  1957. info = io->port->dev->link[io->port->lnr].info;
  1958. else
  1959. info = io->port->dev->link[0].info;
  1960. if (!info)
  1961. return NULL;
  1962. return info->regmap;
  1963. }
  1964. static void ddb_dma_init(struct ddb_io *io, int nr, int out)
  1965. {
  1966. struct ddb_dma *dma;
  1967. const struct ddb_regmap *rm = io_regmap(io, 0);
  1968. dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
  1969. io->dma = dma;
  1970. dma->io = io;
  1971. spin_lock_init(&dma->lock);
  1972. init_waitqueue_head(&dma->wq);
  1973. if (out) {
  1974. INIT_WORK(&dma->work, output_work);
  1975. dma->regs = rm->odma->base + rm->odma->size * nr;
  1976. dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr;
  1977. dma->num = dma_buf_num;
  1978. dma->size = dma_buf_size * 128 * 47;
  1979. dma->div = 1;
  1980. } else {
  1981. INIT_WORK(&dma->work, input_work);
  1982. dma->regs = rm->idma->base + rm->idma->size * nr;
  1983. dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
  1984. dma->num = dma_buf_num;
  1985. dma->size = dma_buf_size * 128 * 47;
  1986. dma->div = 1;
  1987. }
  1988. ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
  1989. dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
  1990. io->port->lnr, io->nr, nr, dma->regs, dma->bufregs);
  1991. }
  1992. static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
  1993. {
  1994. struct ddb *dev = port->dev;
  1995. struct ddb_input *input = &dev->input[anr];
  1996. const struct ddb_regmap *rm;
  1997. port->input[pnr] = input;
  1998. input->nr = nr;
  1999. input->port = port;
  2000. rm = io_regmap(input, 1);
  2001. input->regs = DDB_LINK_TAG(port->lnr) |
  2002. (rm->input->base + rm->input->size * nr);
  2003. dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n",
  2004. port->lnr, nr, input->regs);
  2005. if (dev->has_dma) {
  2006. const struct ddb_regmap *rm0 = io_regmap(input, 0);
  2007. u32 base = rm0->irq_base_idma;
  2008. u32 dma_nr = nr;
  2009. if (port->lnr)
  2010. dma_nr += 32 + (port->lnr - 1) * 8;
  2011. dev_dbg(dev->dev, "init link %u, input %u, handler %u\n",
  2012. port->lnr, nr, dma_nr + base);
  2013. ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input);
  2014. ddb_dma_init(input, dma_nr, 0);
  2015. }
  2016. }
  2017. static void ddb_output_init(struct ddb_port *port, int nr)
  2018. {
  2019. struct ddb *dev = port->dev;
  2020. struct ddb_output *output = &dev->output[nr];
  2021. const struct ddb_regmap *rm;
  2022. port->output = output;
  2023. output->nr = nr;
  2024. output->port = port;
  2025. rm = io_regmap(output, 1);
  2026. output->regs = DDB_LINK_TAG(port->lnr) |
  2027. (rm->output->base + rm->output->size * nr);
  2028. dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n",
  2029. port->lnr, nr, output->regs);
  2030. if (dev->has_dma) {
  2031. const struct ddb_regmap *rm0 = io_regmap(output, 0);
  2032. u32 base = rm0->irq_base_odma;
  2033. ddb_irq_set(dev, 0, nr + base, &output_handler, output);
  2034. ddb_dma_init(output, nr, 1);
  2035. }
  2036. }
  2037. static int ddb_port_match_i2c(struct ddb_port *port)
  2038. {
  2039. struct ddb *dev = port->dev;
  2040. u32 i;
  2041. for (i = 0; i < dev->i2c_num; i++) {
  2042. if (dev->i2c[i].link == port->lnr &&
  2043. dev->i2c[i].nr == port->nr) {
  2044. port->i2c = &dev->i2c[i];
  2045. return 1;
  2046. }
  2047. }
  2048. return 0;
  2049. }
  2050. static int ddb_port_match_link_i2c(struct ddb_port *port)
  2051. {
  2052. struct ddb *dev = port->dev;
  2053. u32 i;
  2054. for (i = 0; i < dev->i2c_num; i++) {
  2055. if (dev->i2c[i].link == port->lnr) {
  2056. port->i2c = &dev->i2c[i];
  2057. return 1;
  2058. }
  2059. }
  2060. return 0;
  2061. }
  2062. void ddb_ports_init(struct ddb *dev)
  2063. {
  2064. u32 i, l, p;
  2065. struct ddb_port *port;
  2066. const struct ddb_info *info;
  2067. const struct ddb_regmap *rm;
  2068. for (p = l = 0; l < DDB_MAX_LINK; l++) {
  2069. info = dev->link[l].info;
  2070. if (!info)
  2071. continue;
  2072. rm = info->regmap;
  2073. if (!rm)
  2074. continue;
  2075. for (i = 0; i < info->port_num; i++, p++) {
  2076. port = &dev->port[p];
  2077. port->dev = dev;
  2078. port->nr = i;
  2079. port->lnr = l;
  2080. port->pnr = p;
  2081. port->gap = 0xffffffff;
  2082. port->obr = ci_bitrate;
  2083. mutex_init(&port->i2c_gate_lock);
  2084. if (!ddb_port_match_i2c(port)) {
  2085. if (info->type == DDB_OCTOPUS_MAX)
  2086. ddb_port_match_link_i2c(port);
  2087. }
  2088. ddb_port_probe(port);
  2089. port->dvb[0].adap = &dev->adap[2 * p];
  2090. port->dvb[1].adap = &dev->adap[2 * p + 1];
  2091. if (port->class == DDB_PORT_NONE && i && p &&
  2092. dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) {
  2093. port->class = DDB_PORT_CI;
  2094. port->type = DDB_CI_EXTERNAL_XO2_B;
  2095. port->name = "DuoFlex CI_B";
  2096. port->i2c = dev->port[p - 1].i2c;
  2097. }
  2098. dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n",
  2099. port->pnr, port->lnr, port->nr, port->nr + 1,
  2100. port->name);
  2101. if (port->class == DDB_PORT_CI &&
  2102. port->type == DDB_CI_EXTERNAL_XO2) {
  2103. ddb_input_init(port, 2 * i, 0, 2 * i);
  2104. ddb_output_init(port, i);
  2105. continue;
  2106. }
  2107. if (port->class == DDB_PORT_CI &&
  2108. port->type == DDB_CI_EXTERNAL_XO2_B) {
  2109. ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1);
  2110. ddb_output_init(port, i);
  2111. continue;
  2112. }
  2113. if (port->class == DDB_PORT_NONE)
  2114. continue;
  2115. switch (dev->link[l].info->type) {
  2116. case DDB_OCTOPUS_CI:
  2117. if (i >= 2) {
  2118. ddb_input_init(port, 2 + i, 0, 2 + i);
  2119. ddb_input_init(port, 4 + i, 1, 4 + i);
  2120. ddb_output_init(port, i);
  2121. break;
  2122. } /* fallthrough */
  2123. case DDB_OCTOPUS:
  2124. ddb_input_init(port, 2 * i, 0, 2 * i);
  2125. ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
  2126. ddb_output_init(port, i);
  2127. break;
  2128. case DDB_OCTOPUS_MAX:
  2129. case DDB_OCTOPUS_MAX_CT:
  2130. case DDB_OCTOPUS_MCI:
  2131. ddb_input_init(port, 2 * i, 0, 2 * p);
  2132. ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1);
  2133. break;
  2134. default:
  2135. break;
  2136. }
  2137. }
  2138. }
  2139. dev->port_num = p;
  2140. }
  2141. void ddb_ports_release(struct ddb *dev)
  2142. {
  2143. int i;
  2144. struct ddb_port *port;
  2145. for (i = 0; i < dev->port_num; i++) {
  2146. port = &dev->port[i];
  2147. if (port->input[0] && port->input[0]->dma)
  2148. cancel_work_sync(&port->input[0]->dma->work);
  2149. if (port->input[1] && port->input[1]->dma)
  2150. cancel_work_sync(&port->input[1]->dma->work);
  2151. if (port->output && port->output->dma)
  2152. cancel_work_sync(&port->output->dma->work);
  2153. }
  2154. }
  2155. /****************************************************************************/
  2156. /****************************************************************************/
  2157. /****************************************************************************/
  2158. #define IRQ_HANDLE(_nr) \
  2159. do { if ((s & (1UL << ((_nr) & 0x1f))) && \
  2160. dev->link[0].irq[_nr].handler) \
  2161. dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \
  2162. while (0)
  2163. #define IRQ_HANDLE_NIBBLE(_shift) { \
  2164. if (s & (0x0000000f << ((_shift) & 0x1f))) { \
  2165. IRQ_HANDLE(0 + (_shift)); \
  2166. IRQ_HANDLE(1 + (_shift)); \
  2167. IRQ_HANDLE(2 + (_shift)); \
  2168. IRQ_HANDLE(3 + (_shift)); \
  2169. } \
  2170. }
  2171. #define IRQ_HANDLE_BYTE(_shift) { \
  2172. if (s & (0x000000ff << ((_shift) & 0x1f))) { \
  2173. IRQ_HANDLE(0 + (_shift)); \
  2174. IRQ_HANDLE(1 + (_shift)); \
  2175. IRQ_HANDLE(2 + (_shift)); \
  2176. IRQ_HANDLE(3 + (_shift)); \
  2177. IRQ_HANDLE(4 + (_shift)); \
  2178. IRQ_HANDLE(5 + (_shift)); \
  2179. IRQ_HANDLE(6 + (_shift)); \
  2180. IRQ_HANDLE(7 + (_shift)); \
  2181. } \
  2182. }
  2183. static void irq_handle_msg(struct ddb *dev, u32 s)
  2184. {
  2185. dev->i2c_irq++;
  2186. IRQ_HANDLE_NIBBLE(0);
  2187. }
  2188. static void irq_handle_io(struct ddb *dev, u32 s)
  2189. {
  2190. dev->ts_irq++;
  2191. IRQ_HANDLE_NIBBLE(4);
  2192. IRQ_HANDLE_BYTE(8);
  2193. IRQ_HANDLE_BYTE(16);
  2194. IRQ_HANDLE_BYTE(24);
  2195. }
  2196. irqreturn_t ddb_irq_handler0(int irq, void *dev_id)
  2197. {
  2198. struct ddb *dev = (struct ddb *)dev_id;
  2199. u32 mask = 0x8fffff00;
  2200. u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
  2201. if (!s)
  2202. return IRQ_NONE;
  2203. do {
  2204. if (s & 0x80000000)
  2205. return IRQ_NONE;
  2206. ddbwritel(dev, s, INTERRUPT_ACK);
  2207. irq_handle_io(dev, s);
  2208. } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
  2209. return IRQ_HANDLED;
  2210. }
  2211. irqreturn_t ddb_irq_handler1(int irq, void *dev_id)
  2212. {
  2213. struct ddb *dev = (struct ddb *)dev_id;
  2214. u32 mask = 0x8000000f;
  2215. u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
  2216. if (!s)
  2217. return IRQ_NONE;
  2218. do {
  2219. if (s & 0x80000000)
  2220. return IRQ_NONE;
  2221. ddbwritel(dev, s, INTERRUPT_ACK);
  2222. irq_handle_msg(dev, s);
  2223. } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
  2224. return IRQ_HANDLED;
  2225. }
  2226. irqreturn_t ddb_irq_handler(int irq, void *dev_id)
  2227. {
  2228. struct ddb *dev = (struct ddb *)dev_id;
  2229. u32 s = ddbreadl(dev, INTERRUPT_STATUS);
  2230. int ret = IRQ_HANDLED;
  2231. if (!s)
  2232. return IRQ_NONE;
  2233. do {
  2234. if (s & 0x80000000)
  2235. return IRQ_NONE;
  2236. ddbwritel(dev, s, INTERRUPT_ACK);
  2237. if (s & 0x0000000f)
  2238. irq_handle_msg(dev, s);
  2239. if (s & 0x0fffff00)
  2240. irq_handle_io(dev, s);
  2241. } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
  2242. return ret;
  2243. }
  2244. /****************************************************************************/
  2245. /****************************************************************************/
  2246. /****************************************************************************/
  2247. static int reg_wait(struct ddb *dev, u32 reg, u32 bit)
  2248. {
  2249. u32 count = 0;
  2250. while (safe_ddbreadl(dev, reg) & bit) {
  2251. ndelay(10);
  2252. if (++count == 100)
  2253. return -1;
  2254. }
  2255. return 0;
  2256. }
  2257. static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf,
  2258. u32 rlen)
  2259. {
  2260. u32 data, shift;
  2261. u32 tag = DDB_LINK_TAG(lnr);
  2262. struct ddb_link *link = &dev->link[lnr];
  2263. mutex_lock(&link->flash_mutex);
  2264. if (wlen > 4)
  2265. ddbwritel(dev, 1, tag | SPI_CONTROL);
  2266. while (wlen > 4) {
  2267. /* FIXME: check for big-endian */
  2268. data = swab32(*(u32 *)wbuf);
  2269. wbuf += 4;
  2270. wlen -= 4;
  2271. ddbwritel(dev, data, tag | SPI_DATA);
  2272. if (reg_wait(dev, tag | SPI_CONTROL, 4))
  2273. goto fail;
  2274. }
  2275. if (rlen)
  2276. ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00),
  2277. tag | SPI_CONTROL);
  2278. else
  2279. ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00),
  2280. tag | SPI_CONTROL);
  2281. data = 0;
  2282. shift = ((4 - wlen) * 8);
  2283. while (wlen) {
  2284. data <<= 8;
  2285. data |= *wbuf;
  2286. wlen--;
  2287. wbuf++;
  2288. }
  2289. if (shift)
  2290. data <<= shift;
  2291. ddbwritel(dev, data, tag | SPI_DATA);
  2292. if (reg_wait(dev, tag | SPI_CONTROL, 4))
  2293. goto fail;
  2294. if (!rlen) {
  2295. ddbwritel(dev, 0, tag | SPI_CONTROL);
  2296. goto exit;
  2297. }
  2298. if (rlen > 4)
  2299. ddbwritel(dev, 1, tag | SPI_CONTROL);
  2300. while (rlen > 4) {
  2301. ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
  2302. if (reg_wait(dev, tag | SPI_CONTROL, 4))
  2303. goto fail;
  2304. data = ddbreadl(dev, tag | SPI_DATA);
  2305. *(u32 *)rbuf = swab32(data);
  2306. rbuf += 4;
  2307. rlen -= 4;
  2308. }
  2309. ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00),
  2310. tag | SPI_CONTROL);
  2311. ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
  2312. if (reg_wait(dev, tag | SPI_CONTROL, 4))
  2313. goto fail;
  2314. data = ddbreadl(dev, tag | SPI_DATA);
  2315. ddbwritel(dev, 0, tag | SPI_CONTROL);
  2316. if (rlen < 4)
  2317. data <<= ((4 - rlen) * 8);
  2318. while (rlen > 0) {
  2319. *rbuf = ((data >> 24) & 0xff);
  2320. data <<= 8;
  2321. rbuf++;
  2322. rlen--;
  2323. }
  2324. exit:
  2325. mutex_unlock(&link->flash_mutex);
  2326. return 0;
  2327. fail:
  2328. mutex_unlock(&link->flash_mutex);
  2329. return -1;
  2330. }
  2331. int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len)
  2332. {
  2333. u8 cmd[4] = {0x03, (addr >> 16) & 0xff,
  2334. (addr >> 8) & 0xff, addr & 0xff};
  2335. return flashio(dev, link, cmd, 4, buf, len);
  2336. }
  2337. /*
  2338. * TODO/FIXME: add/implement IOCTLs from upstream driver
  2339. */
  2340. #define DDB_NAME "ddbridge"
  2341. static u32 ddb_num;
  2342. static int ddb_major;
  2343. static DEFINE_MUTEX(ddb_mutex);
  2344. static int ddb_release(struct inode *inode, struct file *file)
  2345. {
  2346. struct ddb *dev = file->private_data;
  2347. dev->ddb_dev_users--;
  2348. return 0;
  2349. }
  2350. static int ddb_open(struct inode *inode, struct file *file)
  2351. {
  2352. struct ddb *dev = ddbs[iminor(inode)];
  2353. if (dev->ddb_dev_users)
  2354. return -EBUSY;
  2355. dev->ddb_dev_users++;
  2356. file->private_data = dev;
  2357. return 0;
  2358. }
  2359. static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  2360. {
  2361. struct ddb *dev = file->private_data;
  2362. dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n",
  2363. cmd, arg);
  2364. return -ENOTTY;
  2365. }
  2366. static const struct file_operations ddb_fops = {
  2367. .unlocked_ioctl = ddb_ioctl,
  2368. .open = ddb_open,
  2369. .release = ddb_release,
  2370. };
  2371. static char *ddb_devnode(struct device *device, umode_t *mode)
  2372. {
  2373. struct ddb *dev = dev_get_drvdata(device);
  2374. return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
  2375. }
  2376. #define __ATTR_MRO(_name, _show) { \
  2377. .attr = { .name = __stringify(_name), .mode = 0444 }, \
  2378. .show = _show, \
  2379. }
  2380. #define __ATTR_MWO(_name, _store) { \
  2381. .attr = { .name = __stringify(_name), .mode = 0222 }, \
  2382. .store = _store, \
  2383. }
  2384. static ssize_t ports_show(struct device *device,
  2385. struct device_attribute *attr, char *buf)
  2386. {
  2387. struct ddb *dev = dev_get_drvdata(device);
  2388. return sprintf(buf, "%d\n", dev->port_num);
  2389. }
  2390. static ssize_t ts_irq_show(struct device *device,
  2391. struct device_attribute *attr, char *buf)
  2392. {
  2393. struct ddb *dev = dev_get_drvdata(device);
  2394. return sprintf(buf, "%d\n", dev->ts_irq);
  2395. }
  2396. static ssize_t i2c_irq_show(struct device *device,
  2397. struct device_attribute *attr, char *buf)
  2398. {
  2399. struct ddb *dev = dev_get_drvdata(device);
  2400. return sprintf(buf, "%d\n", dev->i2c_irq);
  2401. }
  2402. static ssize_t fan_show(struct device *device,
  2403. struct device_attribute *attr, char *buf)
  2404. {
  2405. struct ddb *dev = dev_get_drvdata(device);
  2406. u32 val;
  2407. val = ddbreadl(dev, GPIO_OUTPUT) & 1;
  2408. return sprintf(buf, "%d\n", val);
  2409. }
  2410. static ssize_t fan_store(struct device *device, struct device_attribute *d,
  2411. const char *buf, size_t count)
  2412. {
  2413. struct ddb *dev = dev_get_drvdata(device);
  2414. u32 val;
  2415. if (sscanf(buf, "%u\n", &val) != 1)
  2416. return -EINVAL;
  2417. ddbwritel(dev, 1, GPIO_DIRECTION);
  2418. ddbwritel(dev, val & 1, GPIO_OUTPUT);
  2419. return count;
  2420. }
  2421. static ssize_t fanspeed_show(struct device *device,
  2422. struct device_attribute *attr, char *buf)
  2423. {
  2424. struct ddb *dev = dev_get_drvdata(device);
  2425. int num = attr->attr.name[8] - 0x30;
  2426. struct ddb_link *link = &dev->link[num];
  2427. u32 spd;
  2428. spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff;
  2429. return sprintf(buf, "%u\n", spd * 100);
  2430. }
  2431. static ssize_t temp_show(struct device *device,
  2432. struct device_attribute *attr, char *buf)
  2433. {
  2434. struct ddb *dev = dev_get_drvdata(device);
  2435. struct ddb_link *link = &dev->link[0];
  2436. struct i2c_adapter *adap;
  2437. int temp, temp2;
  2438. u8 tmp[2];
  2439. if (!link->info->temp_num)
  2440. return sprintf(buf, "no sensor\n");
  2441. adap = &dev->i2c[link->info->temp_bus].adap;
  2442. if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0)
  2443. return sprintf(buf, "read_error\n");
  2444. temp = (tmp[0] << 3) | (tmp[1] >> 5);
  2445. temp *= 125;
  2446. if (link->info->temp_num == 2) {
  2447. if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
  2448. return sprintf(buf, "read_error\n");
  2449. temp2 = (tmp[0] << 3) | (tmp[1] >> 5);
  2450. temp2 *= 125;
  2451. return sprintf(buf, "%d %d\n", temp, temp2);
  2452. }
  2453. return sprintf(buf, "%d\n", temp);
  2454. }
  2455. static ssize_t ctemp_show(struct device *device,
  2456. struct device_attribute *attr, char *buf)
  2457. {
  2458. struct ddb *dev = dev_get_drvdata(device);
  2459. struct i2c_adapter *adap;
  2460. int temp;
  2461. u8 tmp[2];
  2462. int num = attr->attr.name[4] - 0x30;
  2463. adap = &dev->i2c[num].adap;
  2464. if (!adap)
  2465. return 0;
  2466. if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
  2467. if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0)
  2468. return sprintf(buf, "no sensor\n");
  2469. temp = tmp[0] * 1000;
  2470. return sprintf(buf, "%d\n", temp);
  2471. }
  2472. static ssize_t led_show(struct device *device,
  2473. struct device_attribute *attr, char *buf)
  2474. {
  2475. struct ddb *dev = dev_get_drvdata(device);
  2476. int num = attr->attr.name[3] - 0x30;
  2477. return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
  2478. }
  2479. static void ddb_set_led(struct ddb *dev, int num, int val)
  2480. {
  2481. if (!dev->link[0].info->led_num)
  2482. return;
  2483. switch (dev->port[num].class) {
  2484. case DDB_PORT_TUNER:
  2485. switch (dev->port[num].type) {
  2486. case DDB_TUNER_DVBS_ST:
  2487. i2c_write_reg16(&dev->i2c[num].adap,
  2488. 0x69, 0xf14c, val ? 2 : 0);
  2489. break;
  2490. case DDB_TUNER_DVBCT_ST:
  2491. i2c_write_reg16(&dev->i2c[num].adap,
  2492. 0x1f, 0xf00e, 0);
  2493. i2c_write_reg16(&dev->i2c[num].adap,
  2494. 0x1f, 0xf00f, val ? 1 : 0);
  2495. break;
  2496. case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY:
  2497. {
  2498. u8 v;
  2499. i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v);
  2500. v = (v & ~0x10) | (val ? 0x10 : 0);
  2501. i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v);
  2502. break;
  2503. }
  2504. default:
  2505. break;
  2506. }
  2507. break;
  2508. }
  2509. }
  2510. static ssize_t led_store(struct device *device,
  2511. struct device_attribute *attr,
  2512. const char *buf, size_t count)
  2513. {
  2514. struct ddb *dev = dev_get_drvdata(device);
  2515. int num = attr->attr.name[3] - 0x30;
  2516. u32 val;
  2517. if (sscanf(buf, "%u\n", &val) != 1)
  2518. return -EINVAL;
  2519. if (val)
  2520. dev->leds |= (1 << num);
  2521. else
  2522. dev->leds &= ~(1 << num);
  2523. ddb_set_led(dev, num, val);
  2524. return count;
  2525. }
  2526. static ssize_t snr_show(struct device *device,
  2527. struct device_attribute *attr, char *buf)
  2528. {
  2529. struct ddb *dev = dev_get_drvdata(device);
  2530. char snr[32];
  2531. int num = attr->attr.name[3] - 0x30;
  2532. if (dev->port[num].type >= DDB_TUNER_XO2) {
  2533. if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0)
  2534. return sprintf(buf, "NO SNR\n");
  2535. snr[16] = 0;
  2536. } else {
  2537. /* serial number at 0x100-0x11f */
  2538. if (i2c_read_regs16(&dev->i2c[num].adap,
  2539. 0x57, 0x100, snr, 32) < 0)
  2540. if (i2c_read_regs16(&dev->i2c[num].adap,
  2541. 0x50, 0x100, snr, 32) < 0)
  2542. return sprintf(buf, "NO SNR\n");
  2543. snr[31] = 0; /* in case it is not terminated on EEPROM */
  2544. }
  2545. return sprintf(buf, "%s\n", snr);
  2546. }
  2547. static ssize_t bsnr_show(struct device *device,
  2548. struct device_attribute *attr, char *buf)
  2549. {
  2550. struct ddb *dev = dev_get_drvdata(device);
  2551. char snr[16];
  2552. ddbridge_flashread(dev, 0, snr, 0x10, 15);
  2553. snr[15] = 0; /* in case it is not terminated on EEPROM */
  2554. return sprintf(buf, "%s\n", snr);
  2555. }
  2556. static ssize_t bpsnr_show(struct device *device,
  2557. struct device_attribute *attr, char *buf)
  2558. {
  2559. struct ddb *dev = dev_get_drvdata(device);
  2560. unsigned char snr[32];
  2561. if (!dev->i2c_num)
  2562. return 0;
  2563. if (i2c_read_regs16(&dev->i2c[0].adap,
  2564. 0x50, 0x0000, snr, 32) < 0 ||
  2565. snr[0] == 0xff)
  2566. return sprintf(buf, "NO SNR\n");
  2567. snr[31] = 0; /* in case it is not terminated on EEPROM */
  2568. return sprintf(buf, "%s\n", snr);
  2569. }
  2570. static ssize_t redirect_show(struct device *device,
  2571. struct device_attribute *attr, char *buf)
  2572. {
  2573. return 0;
  2574. }
  2575. static ssize_t redirect_store(struct device *device,
  2576. struct device_attribute *attr,
  2577. const char *buf, size_t count)
  2578. {
  2579. unsigned int i, p;
  2580. int res;
  2581. if (sscanf(buf, "%x %x\n", &i, &p) != 2)
  2582. return -EINVAL;
  2583. res = ddb_redirect(i, p);
  2584. if (res < 0)
  2585. return res;
  2586. dev_info(device, "redirect: %02x, %02x\n", i, p);
  2587. return count;
  2588. }
  2589. static ssize_t gap_show(struct device *device,
  2590. struct device_attribute *attr, char *buf)
  2591. {
  2592. struct ddb *dev = dev_get_drvdata(device);
  2593. int num = attr->attr.name[3] - 0x30;
  2594. return sprintf(buf, "%d\n", dev->port[num].gap);
  2595. }
  2596. static ssize_t gap_store(struct device *device, struct device_attribute *attr,
  2597. const char *buf, size_t count)
  2598. {
  2599. struct ddb *dev = dev_get_drvdata(device);
  2600. int num = attr->attr.name[3] - 0x30;
  2601. unsigned int val;
  2602. if (sscanf(buf, "%u\n", &val) != 1)
  2603. return -EINVAL;
  2604. if (val > 128)
  2605. return -EINVAL;
  2606. if (val == 128)
  2607. val = 0xffffffff;
  2608. dev->port[num].gap = val;
  2609. return count;
  2610. }
  2611. static ssize_t version_show(struct device *device,
  2612. struct device_attribute *attr, char *buf)
  2613. {
  2614. struct ddb *dev = dev_get_drvdata(device);
  2615. return sprintf(buf, "%08x %08x\n",
  2616. dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
  2617. }
  2618. static ssize_t hwid_show(struct device *device,
  2619. struct device_attribute *attr, char *buf)
  2620. {
  2621. struct ddb *dev = dev_get_drvdata(device);
  2622. return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid);
  2623. }
  2624. static ssize_t regmap_show(struct device *device,
  2625. struct device_attribute *attr, char *buf)
  2626. {
  2627. struct ddb *dev = dev_get_drvdata(device);
  2628. return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid);
  2629. }
  2630. static ssize_t fmode_show(struct device *device,
  2631. struct device_attribute *attr, char *buf)
  2632. {
  2633. int num = attr->attr.name[5] - 0x30;
  2634. struct ddb *dev = dev_get_drvdata(device);
  2635. return sprintf(buf, "%u\n", dev->link[num].lnb.fmode);
  2636. }
  2637. static ssize_t devid_show(struct device *device,
  2638. struct device_attribute *attr, char *buf)
  2639. {
  2640. int num = attr->attr.name[5] - 0x30;
  2641. struct ddb *dev = dev_get_drvdata(device);
  2642. return sprintf(buf, "%08x\n", dev->link[num].ids.devid);
  2643. }
  2644. static ssize_t fmode_store(struct device *device, struct device_attribute *attr,
  2645. const char *buf, size_t count)
  2646. {
  2647. struct ddb *dev = dev_get_drvdata(device);
  2648. int num = attr->attr.name[5] - 0x30;
  2649. unsigned int val;
  2650. if (sscanf(buf, "%u\n", &val) != 1)
  2651. return -EINVAL;
  2652. if (val > 3)
  2653. return -EINVAL;
  2654. ddb_lnb_init_fmode(dev, &dev->link[num], val);
  2655. return count;
  2656. }
  2657. static struct device_attribute ddb_attrs[] = {
  2658. __ATTR_RO(version),
  2659. __ATTR_RO(ports),
  2660. __ATTR_RO(ts_irq),
  2661. __ATTR_RO(i2c_irq),
  2662. __ATTR(gap0, 0664, gap_show, gap_store),
  2663. __ATTR(gap1, 0664, gap_show, gap_store),
  2664. __ATTR(gap2, 0664, gap_show, gap_store),
  2665. __ATTR(gap3, 0664, gap_show, gap_store),
  2666. __ATTR(fmode0, 0664, fmode_show, fmode_store),
  2667. __ATTR(fmode1, 0664, fmode_show, fmode_store),
  2668. __ATTR(fmode2, 0664, fmode_show, fmode_store),
  2669. __ATTR(fmode3, 0664, fmode_show, fmode_store),
  2670. __ATTR_MRO(devid0, devid_show),
  2671. __ATTR_MRO(devid1, devid_show),
  2672. __ATTR_MRO(devid2, devid_show),
  2673. __ATTR_MRO(devid3, devid_show),
  2674. __ATTR_RO(hwid),
  2675. __ATTR_RO(regmap),
  2676. __ATTR(redirect, 0664, redirect_show, redirect_store),
  2677. __ATTR_MRO(snr, bsnr_show),
  2678. __ATTR_RO(bpsnr),
  2679. __ATTR_NULL,
  2680. };
  2681. static struct device_attribute ddb_attrs_temp[] = {
  2682. __ATTR_RO(temp),
  2683. };
  2684. static struct device_attribute ddb_attrs_fan[] = {
  2685. __ATTR(fan, 0664, fan_show, fan_store),
  2686. };
  2687. static struct device_attribute ddb_attrs_snr[] = {
  2688. __ATTR_MRO(snr0, snr_show),
  2689. __ATTR_MRO(snr1, snr_show),
  2690. __ATTR_MRO(snr2, snr_show),
  2691. __ATTR_MRO(snr3, snr_show),
  2692. };
  2693. static struct device_attribute ddb_attrs_ctemp[] = {
  2694. __ATTR_MRO(temp0, ctemp_show),
  2695. __ATTR_MRO(temp1, ctemp_show),
  2696. __ATTR_MRO(temp2, ctemp_show),
  2697. __ATTR_MRO(temp3, ctemp_show),
  2698. };
  2699. static struct device_attribute ddb_attrs_led[] = {
  2700. __ATTR(led0, 0664, led_show, led_store),
  2701. __ATTR(led1, 0664, led_show, led_store),
  2702. __ATTR(led2, 0664, led_show, led_store),
  2703. __ATTR(led3, 0664, led_show, led_store),
  2704. };
  2705. static struct device_attribute ddb_attrs_fanspeed[] = {
  2706. __ATTR_MRO(fanspeed0, fanspeed_show),
  2707. __ATTR_MRO(fanspeed1, fanspeed_show),
  2708. __ATTR_MRO(fanspeed2, fanspeed_show),
  2709. __ATTR_MRO(fanspeed3, fanspeed_show),
  2710. };
  2711. static struct class ddb_class = {
  2712. .name = "ddbridge",
  2713. .owner = THIS_MODULE,
  2714. .devnode = ddb_devnode,
  2715. };
  2716. static int ddb_class_create(void)
  2717. {
  2718. ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
  2719. if (ddb_major < 0)
  2720. return ddb_major;
  2721. if (class_register(&ddb_class) < 0)
  2722. return -1;
  2723. return 0;
  2724. }
  2725. static void ddb_class_destroy(void)
  2726. {
  2727. class_unregister(&ddb_class);
  2728. unregister_chrdev(ddb_major, DDB_NAME);
  2729. }
  2730. static void ddb_device_attrs_del(struct ddb *dev)
  2731. {
  2732. int i;
  2733. for (i = 0; i < 4; i++)
  2734. if (dev->link[i].info && dev->link[i].info->tempmon_irq)
  2735. device_remove_file(dev->ddb_dev,
  2736. &ddb_attrs_fanspeed[i]);
  2737. for (i = 0; i < dev->link[0].info->temp_num; i++)
  2738. device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
  2739. for (i = 0; i < dev->link[0].info->fan_num; i++)
  2740. device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]);
  2741. for (i = 0; i < dev->i2c_num && i < 4; i++) {
  2742. if (dev->link[0].info->led_num)
  2743. device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]);
  2744. device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
  2745. device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
  2746. }
  2747. for (i = 0; ddb_attrs[i].attr.name; i++)
  2748. device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
  2749. }
  2750. static int ddb_device_attrs_add(struct ddb *dev)
  2751. {
  2752. int i;
  2753. for (i = 0; ddb_attrs[i].attr.name; i++)
  2754. if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
  2755. goto fail;
  2756. for (i = 0; i < dev->link[0].info->temp_num; i++)
  2757. if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i]))
  2758. goto fail;
  2759. for (i = 0; i < dev->link[0].info->fan_num; i++)
  2760. if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i]))
  2761. goto fail;
  2762. for (i = 0; (i < dev->i2c_num) && (i < 4); i++) {
  2763. if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i]))
  2764. goto fail;
  2765. if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i]))
  2766. goto fail;
  2767. if (dev->link[0].info->led_num)
  2768. if (device_create_file(dev->ddb_dev,
  2769. &ddb_attrs_led[i]))
  2770. goto fail;
  2771. }
  2772. for (i = 0; i < 4; i++)
  2773. if (dev->link[i].info && dev->link[i].info->tempmon_irq)
  2774. if (device_create_file(dev->ddb_dev,
  2775. &ddb_attrs_fanspeed[i]))
  2776. goto fail;
  2777. return 0;
  2778. fail:
  2779. return -1;
  2780. }
  2781. int ddb_device_create(struct ddb *dev)
  2782. {
  2783. int res = 0;
  2784. if (ddb_num == DDB_MAX_ADAPTER)
  2785. return -ENOMEM;
  2786. mutex_lock(&ddb_mutex);
  2787. dev->nr = ddb_num;
  2788. ddbs[dev->nr] = dev;
  2789. dev->ddb_dev = device_create(&ddb_class, dev->dev,
  2790. MKDEV(ddb_major, dev->nr),
  2791. dev, "ddbridge%d", dev->nr);
  2792. if (IS_ERR(dev->ddb_dev)) {
  2793. res = PTR_ERR(dev->ddb_dev);
  2794. dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr);
  2795. goto fail;
  2796. }
  2797. res = ddb_device_attrs_add(dev);
  2798. if (res) {
  2799. ddb_device_attrs_del(dev);
  2800. device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
  2801. ddbs[dev->nr] = NULL;
  2802. dev->ddb_dev = ERR_PTR(-ENODEV);
  2803. } else {
  2804. ddb_num++;
  2805. }
  2806. fail:
  2807. mutex_unlock(&ddb_mutex);
  2808. return res;
  2809. }
  2810. void ddb_device_destroy(struct ddb *dev)
  2811. {
  2812. if (IS_ERR(dev->ddb_dev))
  2813. return;
  2814. ddb_device_attrs_del(dev);
  2815. device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
  2816. }
  2817. /****************************************************************************/
  2818. /****************************************************************************/
  2819. /****************************************************************************/
  2820. static void tempmon_setfan(struct ddb_link *link)
  2821. {
  2822. u32 temp, temp2, pwm;
  2823. if ((ddblreadl(link, TEMPMON_CONTROL) &
  2824. TEMPMON_CONTROL_OVERTEMP) != 0) {
  2825. dev_info(link->dev->dev, "Over temperature condition\n");
  2826. link->overtemperature_error = 1;
  2827. }
  2828. temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
  2829. if (temp & 0x80)
  2830. temp = 0;
  2831. temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF;
  2832. if (temp2 & 0x80)
  2833. temp2 = 0;
  2834. if (temp2 > temp)
  2835. temp = temp2;
  2836. pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
  2837. if (pwm > 10)
  2838. pwm = 10;
  2839. if (temp >= link->temp_tab[pwm]) {
  2840. while (pwm < 10 && temp >= link->temp_tab[pwm + 1])
  2841. pwm += 1;
  2842. } else {
  2843. while (pwm > 1 && temp < link->temp_tab[pwm - 2])
  2844. pwm -= 1;
  2845. }
  2846. ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
  2847. }
  2848. static void temp_handler(void *data)
  2849. {
  2850. struct ddb_link *link = (struct ddb_link *)data;
  2851. spin_lock(&link->temp_lock);
  2852. tempmon_setfan(link);
  2853. spin_unlock(&link->temp_lock);
  2854. }
  2855. static int tempmon_init(struct ddb_link *link, int first_time)
  2856. {
  2857. struct ddb *dev = link->dev;
  2858. int status = 0;
  2859. u32 l = link->nr;
  2860. spin_lock_irq(&link->temp_lock);
  2861. if (first_time) {
  2862. static u8 temperature_table[11] = {
  2863. 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 };
  2864. memcpy(link->temp_tab, temperature_table,
  2865. sizeof(temperature_table));
  2866. }
  2867. ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link);
  2868. ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
  2869. TEMPMON_CONTROL_INTENABLE),
  2870. TEMPMON_CONTROL);
  2871. ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
  2872. link->overtemperature_error =
  2873. ((ddblreadl(link, TEMPMON_CONTROL) &
  2874. TEMPMON_CONTROL_OVERTEMP) != 0);
  2875. if (link->overtemperature_error) {
  2876. dev_info(link->dev->dev, "Over temperature condition\n");
  2877. status = -1;
  2878. }
  2879. tempmon_setfan(link);
  2880. spin_unlock_irq(&link->temp_lock);
  2881. return status;
  2882. }
  2883. static int ddb_init_tempmon(struct ddb_link *link)
  2884. {
  2885. const struct ddb_info *info = link->info;
  2886. if (!info->tempmon_irq)
  2887. return 0;
  2888. if (info->type == DDB_OCTOPUS_MAX_CT)
  2889. if (link->ids.regmapid < 0x00010002)
  2890. return 0;
  2891. spin_lock_init(&link->temp_lock);
  2892. dev_dbg(link->dev->dev, "init_tempmon\n");
  2893. return tempmon_init(link, 1);
  2894. }
  2895. /****************************************************************************/
  2896. /****************************************************************************/
  2897. /****************************************************************************/
  2898. static int ddb_init_boards(struct ddb *dev)
  2899. {
  2900. const struct ddb_info *info;
  2901. struct ddb_link *link;
  2902. u32 l;
  2903. for (l = 0; l < DDB_MAX_LINK; l++) {
  2904. link = &dev->link[l];
  2905. info = link->info;
  2906. if (!info)
  2907. continue;
  2908. if (info->board_control) {
  2909. ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
  2910. msleep(100);
  2911. ddbwritel(dev, info->board_control_2,
  2912. DDB_LINK_TAG(l) | BOARD_CONTROL);
  2913. usleep_range(2000, 3000);
  2914. ddbwritel(dev,
  2915. info->board_control_2 | info->board_control,
  2916. DDB_LINK_TAG(l) | BOARD_CONTROL);
  2917. usleep_range(2000, 3000);
  2918. }
  2919. ddb_init_tempmon(link);
  2920. }
  2921. return 0;
  2922. }
  2923. int ddb_init(struct ddb *dev)
  2924. {
  2925. mutex_init(&dev->link[0].lnb.lock);
  2926. mutex_init(&dev->link[0].flash_mutex);
  2927. if (no_init) {
  2928. ddb_device_create(dev);
  2929. return 0;
  2930. }
  2931. ddb_init_boards(dev);
  2932. if (ddb_i2c_init(dev) < 0)
  2933. goto fail1;
  2934. ddb_ports_init(dev);
  2935. if (ddb_buffers_alloc(dev) < 0) {
  2936. dev_info(dev->dev, "Could not allocate buffer memory\n");
  2937. goto fail2;
  2938. }
  2939. if (ddb_ports_attach(dev) < 0)
  2940. goto fail3;
  2941. ddb_device_create(dev);
  2942. if (dev->link[0].info->fan_num) {
  2943. ddbwritel(dev, 1, GPIO_DIRECTION);
  2944. ddbwritel(dev, 1, GPIO_OUTPUT);
  2945. }
  2946. return 0;
  2947. fail3:
  2948. dev_err(dev->dev, "fail3\n");
  2949. ddb_ports_detach(dev);
  2950. ddb_buffers_free(dev);
  2951. fail2:
  2952. dev_err(dev->dev, "fail2\n");
  2953. ddb_ports_release(dev);
  2954. ddb_i2c_release(dev);
  2955. fail1:
  2956. dev_err(dev->dev, "fail1\n");
  2957. return -1;
  2958. }
  2959. void ddb_unmap(struct ddb *dev)
  2960. {
  2961. if (dev->regs)
  2962. iounmap(dev->regs);
  2963. vfree(dev);
  2964. }
  2965. int ddb_exit_ddbridge(int stage, int error)
  2966. {
  2967. switch (stage) {
  2968. default:
  2969. case 2:
  2970. destroy_workqueue(ddb_wq);
  2971. /* fall-through */
  2972. case 1:
  2973. ddb_class_destroy();
  2974. break;
  2975. }
  2976. return error;
  2977. }
  2978. int ddb_init_ddbridge(void)
  2979. {
  2980. if (dma_buf_num < 8)
  2981. dma_buf_num = 8;
  2982. if (dma_buf_num > 32)
  2983. dma_buf_num = 32;
  2984. if (dma_buf_size < 1)
  2985. dma_buf_size = 1;
  2986. if (dma_buf_size > 43)
  2987. dma_buf_size = 43;
  2988. if (ddb_class_create() < 0)
  2989. return -1;
  2990. ddb_wq = alloc_workqueue("ddbridge", 0, 0);
  2991. if (!ddb_wq)
  2992. return ddb_exit_ddbridge(1, -1);
  2993. return 0;
  2994. }