upd64031a.c 6.6 KB

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  1. /*
  2. * upd64031A - NEC Electronics Ghost Reduction for NTSC in Japan
  3. *
  4. * 2003 by T.Adachi <tadachi@tadachi-net.com>
  5. * 2003 by Takeru KOMORIYA <komoriya@paken.org>
  6. * 2006 by Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/i2c.h>
  21. #include <linux/videodev2.h>
  22. #include <linux/slab.h>
  23. #include <media/v4l2-device.h>
  24. #include <media/i2c/upd64031a.h>
  25. /* --------------------- read registers functions define -------------------- */
  26. /* bit masks */
  27. #define GR_MODE_MASK 0xc0
  28. #define DIRECT_3DYCS_CONNECT_MASK 0xc0
  29. #define SYNC_CIRCUIT_MASK 0xa0
  30. /* -------------------------------------------------------------------------- */
  31. MODULE_DESCRIPTION("uPD64031A driver");
  32. MODULE_AUTHOR("T. Adachi, Takeru KOMORIYA, Hans Verkuil");
  33. MODULE_LICENSE("GPL");
  34. static int debug;
  35. module_param(debug, int, 0644);
  36. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  37. enum {
  38. R00 = 0, R01, R02, R03, R04,
  39. R05, R06, R07, R08, R09,
  40. R0A, R0B, R0C, R0D, R0E, R0F,
  41. /* unused registers
  42. R10, R11, R12, R13, R14,
  43. R15, R16, R17,
  44. */
  45. TOT_REGS
  46. };
  47. struct upd64031a_state {
  48. struct v4l2_subdev sd;
  49. u8 regs[TOT_REGS];
  50. u8 gr_mode;
  51. u8 direct_3dycs_connect;
  52. u8 ext_comp_sync;
  53. u8 ext_vert_sync;
  54. };
  55. static inline struct upd64031a_state *to_state(struct v4l2_subdev *sd)
  56. {
  57. return container_of(sd, struct upd64031a_state, sd);
  58. }
  59. static u8 upd64031a_init[] = {
  60. 0x00, 0xb8, 0x48, 0xd2, 0xe6,
  61. 0x03, 0x10, 0x0b, 0xaf, 0x7f,
  62. 0x00, 0x00, 0x1d, 0x5e, 0x00,
  63. 0xd0
  64. };
  65. /* ------------------------------------------------------------------------ */
  66. static u8 upd64031a_read(struct v4l2_subdev *sd, u8 reg)
  67. {
  68. struct i2c_client *client = v4l2_get_subdevdata(sd);
  69. u8 buf[2];
  70. if (reg >= sizeof(buf))
  71. return 0xff;
  72. i2c_master_recv(client, buf, 2);
  73. return buf[reg];
  74. }
  75. /* ------------------------------------------------------------------------ */
  76. static void upd64031a_write(struct v4l2_subdev *sd, u8 reg, u8 val)
  77. {
  78. struct i2c_client *client = v4l2_get_subdevdata(sd);
  79. u8 buf[2];
  80. buf[0] = reg;
  81. buf[1] = val;
  82. v4l2_dbg(1, debug, sd, "write reg: %02X val: %02X\n", reg, val);
  83. if (i2c_master_send(client, buf, 2) != 2)
  84. v4l2_err(sd, "I/O error write 0x%02x/0x%02x\n", reg, val);
  85. }
  86. /* ------------------------------------------------------------------------ */
  87. /* The input changed due to new input or channel changed */
  88. static int upd64031a_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq)
  89. {
  90. struct upd64031a_state *state = to_state(sd);
  91. u8 reg = state->regs[R00];
  92. v4l2_dbg(1, debug, sd, "changed input or channel\n");
  93. upd64031a_write(sd, R00, reg | 0x10);
  94. upd64031a_write(sd, R00, reg & ~0x10);
  95. return 0;
  96. }
  97. /* ------------------------------------------------------------------------ */
  98. static int upd64031a_s_routing(struct v4l2_subdev *sd,
  99. u32 input, u32 output, u32 config)
  100. {
  101. struct upd64031a_state *state = to_state(sd);
  102. u8 r00, r05, r08;
  103. state->gr_mode = (input & 3) << 6;
  104. state->direct_3dycs_connect = (input & 0xc) << 4;
  105. state->ext_comp_sync =
  106. (input & UPD64031A_COMPOSITE_EXTERNAL) << 1;
  107. state->ext_vert_sync =
  108. (input & UPD64031A_VERTICAL_EXTERNAL) << 2;
  109. r00 = (state->regs[R00] & ~GR_MODE_MASK) | state->gr_mode;
  110. r05 = (state->regs[R00] & ~SYNC_CIRCUIT_MASK) |
  111. state->ext_comp_sync | state->ext_vert_sync;
  112. r08 = (state->regs[R08] & ~DIRECT_3DYCS_CONNECT_MASK) |
  113. state->direct_3dycs_connect;
  114. upd64031a_write(sd, R00, r00);
  115. upd64031a_write(sd, R05, r05);
  116. upd64031a_write(sd, R08, r08);
  117. return upd64031a_s_frequency(sd, NULL);
  118. }
  119. static int upd64031a_log_status(struct v4l2_subdev *sd)
  120. {
  121. v4l2_info(sd, "Status: SA00=0x%02x SA01=0x%02x\n",
  122. upd64031a_read(sd, 0), upd64031a_read(sd, 1));
  123. return 0;
  124. }
  125. #ifdef CONFIG_VIDEO_ADV_DEBUG
  126. static int upd64031a_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  127. {
  128. reg->val = upd64031a_read(sd, reg->reg & 0xff);
  129. reg->size = 1;
  130. return 0;
  131. }
  132. static int upd64031a_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
  133. {
  134. upd64031a_write(sd, reg->reg & 0xff, reg->val & 0xff);
  135. return 0;
  136. }
  137. #endif
  138. /* ----------------------------------------------------------------------- */
  139. static const struct v4l2_subdev_core_ops upd64031a_core_ops = {
  140. .log_status = upd64031a_log_status,
  141. #ifdef CONFIG_VIDEO_ADV_DEBUG
  142. .g_register = upd64031a_g_register,
  143. .s_register = upd64031a_s_register,
  144. #endif
  145. };
  146. static const struct v4l2_subdev_tuner_ops upd64031a_tuner_ops = {
  147. .s_frequency = upd64031a_s_frequency,
  148. };
  149. static const struct v4l2_subdev_video_ops upd64031a_video_ops = {
  150. .s_routing = upd64031a_s_routing,
  151. };
  152. static const struct v4l2_subdev_ops upd64031a_ops = {
  153. .core = &upd64031a_core_ops,
  154. .tuner = &upd64031a_tuner_ops,
  155. .video = &upd64031a_video_ops,
  156. };
  157. /* ------------------------------------------------------------------------ */
  158. /* i2c implementation */
  159. static int upd64031a_probe(struct i2c_client *client,
  160. const struct i2c_device_id *id)
  161. {
  162. struct upd64031a_state *state;
  163. struct v4l2_subdev *sd;
  164. int i;
  165. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  166. return -EIO;
  167. v4l_info(client, "chip found @ 0x%x (%s)\n",
  168. client->addr << 1, client->adapter->name);
  169. state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
  170. if (state == NULL)
  171. return -ENOMEM;
  172. sd = &state->sd;
  173. v4l2_i2c_subdev_init(sd, client, &upd64031a_ops);
  174. memcpy(state->regs, upd64031a_init, sizeof(state->regs));
  175. state->gr_mode = UPD64031A_GR_ON << 6;
  176. state->direct_3dycs_connect = UPD64031A_3DYCS_COMPOSITE << 4;
  177. state->ext_comp_sync = state->ext_vert_sync = 0;
  178. for (i = 0; i < TOT_REGS; i++)
  179. upd64031a_write(sd, i, state->regs[i]);
  180. return 0;
  181. }
  182. static int upd64031a_remove(struct i2c_client *client)
  183. {
  184. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  185. v4l2_device_unregister_subdev(sd);
  186. return 0;
  187. }
  188. /* ----------------------------------------------------------------------- */
  189. static const struct i2c_device_id upd64031a_id[] = {
  190. { "upd64031a", 0 },
  191. { }
  192. };
  193. MODULE_DEVICE_TABLE(i2c, upd64031a_id);
  194. static struct i2c_driver upd64031a_driver = {
  195. .driver = {
  196. .name = "upd64031a",
  197. },
  198. .probe = upd64031a_probe,
  199. .remove = upd64031a_remove,
  200. .id_table = upd64031a_id,
  201. };
  202. module_i2c_driver(upd64031a_driver);