hi3660-mailbox.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2017-2018 Hisilicon Limited.
  3. // Copyright (c) 2017-2018 Linaro Limited.
  4. #include <linux/bitops.h>
  5. #include <linux/delay.h>
  6. #include <linux/device.h>
  7. #include <linux/err.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/iopoll.h>
  11. #include <linux/mailbox_controller.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/slab.h>
  15. #include "mailbox.h"
  16. #define MBOX_CHAN_MAX 32
  17. #define MBOX_RX 0x0
  18. #define MBOX_TX 0x1
  19. #define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40))
  20. #define MBOX_SRC_REG 0x00
  21. #define MBOX_DST_REG 0x04
  22. #define MBOX_DCLR_REG 0x08
  23. #define MBOX_DSTAT_REG 0x0c
  24. #define MBOX_MODE_REG 0x10
  25. #define MBOX_IMASK_REG 0x14
  26. #define MBOX_ICLR_REG 0x18
  27. #define MBOX_SEND_REG 0x1c
  28. #define MBOX_DATA_REG 0x20
  29. #define MBOX_IPC_LOCK_REG 0xa00
  30. #define MBOX_IPC_UNLOCK 0x1acce551
  31. #define MBOX_AUTOMATIC_ACK 1
  32. #define MBOX_STATE_IDLE BIT(4)
  33. #define MBOX_STATE_ACK BIT(7)
  34. #define MBOX_MSG_LEN 8
  35. /**
  36. * Hi3660 mailbox channel information
  37. *
  38. * A channel can be used for TX or RX, it can trigger remote
  39. * processor interrupt to notify remote processor and can receive
  40. * interrupt if has incoming message.
  41. *
  42. * @dst_irq: Interrupt vector for remote processor
  43. * @ack_irq: Interrupt vector for local processor
  44. */
  45. struct hi3660_chan_info {
  46. unsigned int dst_irq;
  47. unsigned int ack_irq;
  48. };
  49. /**
  50. * Hi3660 mailbox controller data
  51. *
  52. * Mailbox controller includes 32 channels and can allocate
  53. * channel for message transferring.
  54. *
  55. * @dev: Device to which it is attached
  56. * @base: Base address of the register mapping region
  57. * @chan: Representation of channels in mailbox controller
  58. * @mchan: Representation of channel info
  59. * @controller: Representation of a communication channel controller
  60. */
  61. struct hi3660_mbox {
  62. struct device *dev;
  63. void __iomem *base;
  64. struct mbox_chan chan[MBOX_CHAN_MAX];
  65. struct hi3660_chan_info mchan[MBOX_CHAN_MAX];
  66. struct mbox_controller controller;
  67. };
  68. static struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox)
  69. {
  70. return container_of(mbox, struct hi3660_mbox, controller);
  71. }
  72. static int hi3660_mbox_check_state(struct mbox_chan *chan)
  73. {
  74. unsigned long ch = (unsigned long)chan->con_priv;
  75. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  76. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  77. void __iomem *base = MBOX_BASE(mbox, ch);
  78. unsigned long val;
  79. unsigned int ret;
  80. /* Mailbox is idle so directly bail out */
  81. if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE)
  82. return 0;
  83. /* Wait for acknowledge from remote */
  84. ret = readx_poll_timeout_atomic(readl, base + MBOX_MODE_REG,
  85. val, (val & MBOX_STATE_ACK), 1000, 300000);
  86. if (ret) {
  87. dev_err(mbox->dev, "%s: timeout for receiving ack\n", __func__);
  88. return ret;
  89. }
  90. /* Ensure channel is released */
  91. writel(0xffffffff, base + MBOX_IMASK_REG);
  92. writel(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
  93. return 0;
  94. }
  95. static int hi3660_mbox_unlock(struct mbox_chan *chan)
  96. {
  97. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  98. unsigned int val, retry = 3;
  99. do {
  100. writel(MBOX_IPC_UNLOCK, mbox->base + MBOX_IPC_LOCK_REG);
  101. val = readl(mbox->base + MBOX_IPC_LOCK_REG);
  102. if (!val)
  103. break;
  104. udelay(10);
  105. } while (retry--);
  106. if (val)
  107. dev_err(mbox->dev, "%s: failed to unlock mailbox\n", __func__);
  108. return (!val) ? 0 : -ETIMEDOUT;
  109. }
  110. static int hi3660_mbox_acquire_channel(struct mbox_chan *chan)
  111. {
  112. unsigned long ch = (unsigned long)chan->con_priv;
  113. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  114. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  115. void __iomem *base = MBOX_BASE(mbox, ch);
  116. unsigned int val, retry;
  117. for (retry = 10; retry; retry--) {
  118. /* Check if channel is in idle state */
  119. if (readl(base + MBOX_MODE_REG) & MBOX_STATE_IDLE) {
  120. writel(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
  121. /* Check ack bit has been set successfully */
  122. val = readl(base + MBOX_SRC_REG);
  123. if (val & BIT(mchan->ack_irq))
  124. break;
  125. }
  126. }
  127. if (!retry)
  128. dev_err(mbox->dev, "%s: failed to acquire channel\n", __func__);
  129. return retry ? 0 : -ETIMEDOUT;
  130. }
  131. static int hi3660_mbox_startup(struct mbox_chan *chan)
  132. {
  133. int ret;
  134. ret = hi3660_mbox_check_state(chan);
  135. if (ret)
  136. return ret;
  137. ret = hi3660_mbox_unlock(chan);
  138. if (ret)
  139. return ret;
  140. ret = hi3660_mbox_acquire_channel(chan);
  141. if (ret)
  142. return ret;
  143. return 0;
  144. }
  145. static int hi3660_mbox_send_data(struct mbox_chan *chan, void *msg)
  146. {
  147. unsigned long ch = (unsigned long)chan->con_priv;
  148. struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
  149. struct hi3660_chan_info *mchan = &mbox->mchan[ch];
  150. void __iomem *base = MBOX_BASE(mbox, ch);
  151. u32 *buf = msg;
  152. unsigned int i;
  153. /* Ensure channel is released */
  154. writel_relaxed(0xffffffff, base + MBOX_IMASK_REG);
  155. writel_relaxed(BIT(mchan->ack_irq), base + MBOX_SRC_REG);
  156. /* Clear mask for destination interrupt */
  157. writel_relaxed(~BIT(mchan->dst_irq), base + MBOX_IMASK_REG);
  158. /* Config destination for interrupt vector */
  159. writel_relaxed(BIT(mchan->dst_irq), base + MBOX_DST_REG);
  160. /* Automatic acknowledge mode */
  161. writel_relaxed(MBOX_AUTOMATIC_ACK, base + MBOX_MODE_REG);
  162. /* Fill message data */
  163. for (i = 0; i < MBOX_MSG_LEN; i++)
  164. writel_relaxed(buf[i], base + MBOX_DATA_REG + i * 4);
  165. /* Trigger data transferring */
  166. writel(BIT(mchan->ack_irq), base + MBOX_SEND_REG);
  167. return 0;
  168. }
  169. static struct mbox_chan_ops hi3660_mbox_ops = {
  170. .startup = hi3660_mbox_startup,
  171. .send_data = hi3660_mbox_send_data,
  172. };
  173. static struct mbox_chan *hi3660_mbox_xlate(struct mbox_controller *controller,
  174. const struct of_phandle_args *spec)
  175. {
  176. struct hi3660_mbox *mbox = to_hi3660_mbox(controller);
  177. struct hi3660_chan_info *mchan;
  178. unsigned int ch = spec->args[0];
  179. if (ch >= MBOX_CHAN_MAX) {
  180. dev_err(mbox->dev, "Invalid channel idx %d\n", ch);
  181. return ERR_PTR(-EINVAL);
  182. }
  183. mchan = &mbox->mchan[ch];
  184. mchan->dst_irq = spec->args[1];
  185. mchan->ack_irq = spec->args[2];
  186. return &mbox->chan[ch];
  187. }
  188. static const struct of_device_id hi3660_mbox_of_match[] = {
  189. { .compatible = "hisilicon,hi3660-mbox", },
  190. {},
  191. };
  192. MODULE_DEVICE_TABLE(of, hi3660_mbox_of_match);
  193. static int hi3660_mbox_probe(struct platform_device *pdev)
  194. {
  195. struct device *dev = &pdev->dev;
  196. struct hi3660_mbox *mbox;
  197. struct mbox_chan *chan;
  198. struct resource *res;
  199. unsigned long ch;
  200. int err;
  201. mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
  202. if (!mbox)
  203. return -ENOMEM;
  204. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  205. mbox->base = devm_ioremap_resource(dev, res);
  206. if (IS_ERR(mbox->base))
  207. return PTR_ERR(mbox->base);
  208. mbox->dev = dev;
  209. mbox->controller.dev = dev;
  210. mbox->controller.chans = mbox->chan;
  211. mbox->controller.num_chans = MBOX_CHAN_MAX;
  212. mbox->controller.ops = &hi3660_mbox_ops;
  213. mbox->controller.of_xlate = hi3660_mbox_xlate;
  214. /* Initialize mailbox channel data */
  215. chan = mbox->chan;
  216. for (ch = 0; ch < MBOX_CHAN_MAX; ch++)
  217. chan[ch].con_priv = (void *)ch;
  218. err = mbox_controller_register(&mbox->controller);
  219. if (err) {
  220. dev_err(dev, "Failed to register mailbox %d\n", err);
  221. return err;
  222. }
  223. platform_set_drvdata(pdev, mbox);
  224. dev_info(dev, "Mailbox enabled\n");
  225. return 0;
  226. }
  227. static int hi3660_mbox_remove(struct platform_device *pdev)
  228. {
  229. struct hi3660_mbox *mbox = platform_get_drvdata(pdev);
  230. mbox_controller_unregister(&mbox->controller);
  231. return 0;
  232. }
  233. static struct platform_driver hi3660_mbox_driver = {
  234. .probe = hi3660_mbox_probe,
  235. .remove = hi3660_mbox_remove,
  236. .driver = {
  237. .name = "hi3660-mbox",
  238. .of_match_table = hi3660_mbox_of_match,
  239. },
  240. };
  241. static int __init hi3660_mbox_init(void)
  242. {
  243. return platform_driver_register(&hi3660_mbox_driver);
  244. }
  245. core_initcall(hi3660_mbox_init);
  246. static void __exit hi3660_mbox_exit(void)
  247. {
  248. platform_driver_unregister(&hi3660_mbox_driver);
  249. }
  250. module_exit(hi3660_mbox_exit);
  251. MODULE_LICENSE("GPL");
  252. MODULE_DESCRIPTION("Hisilicon Hi3660 Mailbox Controller");
  253. MODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");