umem.c 30 KB

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  1. /*
  2. * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
  3. *
  4. * (C) 2001 San Mehat <nettwerk@valinux.com>
  5. * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
  6. * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
  7. *
  8. * This driver for the Micro Memory PCI Memory Module with Battery Backup
  9. * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
  10. *
  11. * This driver is released to the public under the terms of the
  12. * GNU GENERAL PUBLIC LICENSE version 2
  13. * See the file COPYING for details.
  14. *
  15. * This driver provides a standard block device interface for Micro Memory(tm)
  16. * PCI based RAM boards.
  17. * 10/05/01: Phap Nguyen - Rebuilt the driver
  18. * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
  19. * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
  20. * - use stand disk partitioning (so fdisk works).
  21. * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
  22. * - incorporate into main kernel
  23. * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
  24. * - use spin_lock_bh instead of _irq
  25. * - Never block on make_request. queue
  26. * bh's instead.
  27. * - unregister umem from devfs at mod unload
  28. * - Change version to 2.3
  29. * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
  30. * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
  31. * 15May2002:NeilBrown - convert to bio for 2.5
  32. * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
  33. * - a sequence of writes that cover the card, and
  34. * - set initialised bit then.
  35. */
  36. #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
  37. #include <linux/fs.h>
  38. #include <linux/bio.h>
  39. #include <linux/kernel.h>
  40. #include <linux/mm.h>
  41. #include <linux/mman.h>
  42. #include <linux/gfp.h>
  43. #include <linux/ioctl.h>
  44. #include <linux/module.h>
  45. #include <linux/init.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/timer.h>
  48. #include <linux/pci.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/fcntl.h> /* O_ACCMODE */
  51. #include <linux/hdreg.h> /* HDIO_GETGEO */
  52. #include "umem.h"
  53. #include <linux/uaccess.h>
  54. #include <asm/io.h>
  55. #define MM_MAXCARDS 4
  56. #define MM_RAHEAD 2 /* two sectors */
  57. #define MM_BLKSIZE 1024 /* 1k blocks */
  58. #define MM_HARDSECT 512 /* 512-byte hardware sectors */
  59. #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
  60. /*
  61. * Version Information
  62. */
  63. #define DRIVER_NAME "umem"
  64. #define DRIVER_VERSION "v2.3"
  65. #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
  66. #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
  67. static int debug;
  68. /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
  69. #define HW_TRACE(x)
  70. #define DEBUG_LED_ON_TRANSFER 0x01
  71. #define DEBUG_BATTERY_POLLING 0x02
  72. module_param(debug, int, 0644);
  73. MODULE_PARM_DESC(debug, "Debug bitmask");
  74. static int pci_read_cmd = 0x0C; /* Read Multiple */
  75. module_param(pci_read_cmd, int, 0);
  76. MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
  77. static int pci_write_cmd = 0x0F; /* Write and Invalidate */
  78. module_param(pci_write_cmd, int, 0);
  79. MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
  80. static int pci_cmds;
  81. static int major_nr;
  82. #include <linux/blkdev.h>
  83. #include <linux/blkpg.h>
  84. struct cardinfo {
  85. struct pci_dev *dev;
  86. unsigned char __iomem *csr_remap;
  87. unsigned int mm_size; /* size in kbytes */
  88. unsigned int init_size; /* initial segment, in sectors,
  89. * that we know to
  90. * have been written
  91. */
  92. struct bio *bio, *currentbio, **biotail;
  93. struct bvec_iter current_iter;
  94. struct request_queue *queue;
  95. struct mm_page {
  96. dma_addr_t page_dma;
  97. struct mm_dma_desc *desc;
  98. int cnt, headcnt;
  99. struct bio *bio, **biotail;
  100. struct bvec_iter iter;
  101. } mm_pages[2];
  102. #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
  103. int Active, Ready;
  104. struct tasklet_struct tasklet;
  105. unsigned int dma_status;
  106. struct {
  107. int good;
  108. int warned;
  109. unsigned long last_change;
  110. } battery[2];
  111. spinlock_t lock;
  112. int check_batteries;
  113. int flags;
  114. };
  115. static struct cardinfo cards[MM_MAXCARDS];
  116. static struct timer_list battery_timer;
  117. static int num_cards;
  118. static struct gendisk *mm_gendisk[MM_MAXCARDS];
  119. static void check_batteries(struct cardinfo *card);
  120. static int get_userbit(struct cardinfo *card, int bit)
  121. {
  122. unsigned char led;
  123. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  124. return led & bit;
  125. }
  126. static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
  127. {
  128. unsigned char led;
  129. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  130. if (state)
  131. led |= bit;
  132. else
  133. led &= ~bit;
  134. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  135. return 0;
  136. }
  137. /*
  138. * NOTE: For the power LED, use the LED_POWER_* macros since they differ
  139. */
  140. static void set_led(struct cardinfo *card, int shift, unsigned char state)
  141. {
  142. unsigned char led;
  143. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  144. if (state == LED_FLIP)
  145. led ^= (1<<shift);
  146. else {
  147. led &= ~(0x03 << shift);
  148. led |= (state << shift);
  149. }
  150. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  151. }
  152. #ifdef MM_DIAG
  153. static void dump_regs(struct cardinfo *card)
  154. {
  155. unsigned char *p;
  156. int i, i1;
  157. p = card->csr_remap;
  158. for (i = 0; i < 8; i++) {
  159. printk(KERN_DEBUG "%p ", p);
  160. for (i1 = 0; i1 < 16; i1++)
  161. printk("%02x ", *p++);
  162. printk("\n");
  163. }
  164. }
  165. #endif
  166. static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
  167. {
  168. dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
  169. if (dmastat & DMASCR_ANY_ERR)
  170. printk(KERN_CONT "ANY_ERR ");
  171. if (dmastat & DMASCR_MBE_ERR)
  172. printk(KERN_CONT "MBE_ERR ");
  173. if (dmastat & DMASCR_PARITY_ERR_REP)
  174. printk(KERN_CONT "PARITY_ERR_REP ");
  175. if (dmastat & DMASCR_PARITY_ERR_DET)
  176. printk(KERN_CONT "PARITY_ERR_DET ");
  177. if (dmastat & DMASCR_SYSTEM_ERR_SIG)
  178. printk(KERN_CONT "SYSTEM_ERR_SIG ");
  179. if (dmastat & DMASCR_TARGET_ABT)
  180. printk(KERN_CONT "TARGET_ABT ");
  181. if (dmastat & DMASCR_MASTER_ABT)
  182. printk(KERN_CONT "MASTER_ABT ");
  183. if (dmastat & DMASCR_CHAIN_COMPLETE)
  184. printk(KERN_CONT "CHAIN_COMPLETE ");
  185. if (dmastat & DMASCR_DMA_COMPLETE)
  186. printk(KERN_CONT "DMA_COMPLETE ");
  187. printk("\n");
  188. }
  189. /*
  190. * Theory of request handling
  191. *
  192. * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
  193. * We have two pages of mm_dma_desc, holding about 64 descriptors
  194. * each. These are allocated at init time.
  195. * One page is "Ready" and is either full, or can have request added.
  196. * The other page might be "Active", which DMA is happening on it.
  197. *
  198. * Whenever IO on the active page completes, the Ready page is activated
  199. * and the ex-Active page is clean out and made Ready.
  200. * Otherwise the Ready page is only activated when it becomes full.
  201. *
  202. * If a request arrives while both pages a full, it is queued, and b_rdev is
  203. * overloaded to record whether it was a read or a write.
  204. *
  205. * The interrupt handler only polls the device to clear the interrupt.
  206. * The processing of the result is done in a tasklet.
  207. */
  208. static void mm_start_io(struct cardinfo *card)
  209. {
  210. /* we have the lock, we know there is
  211. * no IO active, and we know that card->Active
  212. * is set
  213. */
  214. struct mm_dma_desc *desc;
  215. struct mm_page *page;
  216. int offset;
  217. /* make the last descriptor end the chain */
  218. page = &card->mm_pages[card->Active];
  219. pr_debug("start_io: %d %d->%d\n",
  220. card->Active, page->headcnt, page->cnt - 1);
  221. desc = &page->desc[page->cnt-1];
  222. desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
  223. desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
  224. desc->sem_control_bits = desc->control_bits;
  225. if (debug & DEBUG_LED_ON_TRANSFER)
  226. set_led(card, LED_REMOVE, LED_ON);
  227. desc = &page->desc[page->headcnt];
  228. writel(0, card->csr_remap + DMA_PCI_ADDR);
  229. writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
  230. writel(0, card->csr_remap + DMA_LOCAL_ADDR);
  231. writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
  232. writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
  233. writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
  234. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
  235. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
  236. offset = ((char *)desc) - ((char *)page->desc);
  237. writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
  238. card->csr_remap + DMA_DESCRIPTOR_ADDR);
  239. /* Force the value to u64 before shifting otherwise >> 32 is undefined C
  240. * and on some ports will do nothing ! */
  241. writel(cpu_to_le32(((u64)page->page_dma)>>32),
  242. card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
  243. /* Go, go, go */
  244. writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
  245. card->csr_remap + DMA_STATUS_CTRL);
  246. }
  247. static int add_bio(struct cardinfo *card);
  248. static void activate(struct cardinfo *card)
  249. {
  250. /* if No page is Active, and Ready is
  251. * not empty, then switch Ready page
  252. * to active and start IO.
  253. * Then add any bh's that are available to Ready
  254. */
  255. do {
  256. while (add_bio(card))
  257. ;
  258. if (card->Active == -1 &&
  259. card->mm_pages[card->Ready].cnt > 0) {
  260. card->Active = card->Ready;
  261. card->Ready = 1-card->Ready;
  262. mm_start_io(card);
  263. }
  264. } while (card->Active == -1 && add_bio(card));
  265. }
  266. static inline void reset_page(struct mm_page *page)
  267. {
  268. page->cnt = 0;
  269. page->headcnt = 0;
  270. page->bio = NULL;
  271. page->biotail = &page->bio;
  272. }
  273. /*
  274. * If there is room on Ready page, take
  275. * one bh off list and add it.
  276. * return 1 if there was room, else 0.
  277. */
  278. static int add_bio(struct cardinfo *card)
  279. {
  280. struct mm_page *p;
  281. struct mm_dma_desc *desc;
  282. dma_addr_t dma_handle;
  283. int offset;
  284. struct bio *bio;
  285. struct bio_vec vec;
  286. bio = card->currentbio;
  287. if (!bio && card->bio) {
  288. card->currentbio = card->bio;
  289. card->current_iter = card->bio->bi_iter;
  290. card->bio = card->bio->bi_next;
  291. if (card->bio == NULL)
  292. card->biotail = &card->bio;
  293. card->currentbio->bi_next = NULL;
  294. return 1;
  295. }
  296. if (!bio)
  297. return 0;
  298. if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
  299. return 0;
  300. vec = bio_iter_iovec(bio, card->current_iter);
  301. dma_handle = pci_map_page(card->dev,
  302. vec.bv_page,
  303. vec.bv_offset,
  304. vec.bv_len,
  305. bio_op(bio) == REQ_OP_READ ?
  306. PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
  307. p = &card->mm_pages[card->Ready];
  308. desc = &p->desc[p->cnt];
  309. p->cnt++;
  310. if (p->bio == NULL)
  311. p->iter = card->current_iter;
  312. if ((p->biotail) != &bio->bi_next) {
  313. *(p->biotail) = bio;
  314. p->biotail = &(bio->bi_next);
  315. bio->bi_next = NULL;
  316. }
  317. desc->data_dma_handle = dma_handle;
  318. desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
  319. desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
  320. desc->transfer_size = cpu_to_le32(vec.bv_len);
  321. offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
  322. desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
  323. desc->zero1 = desc->zero2 = 0;
  324. offset = (((char *)(desc+1)) - ((char *)p->desc));
  325. desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
  326. desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
  327. DMASCR_PARITY_INT_EN|
  328. DMASCR_CHAIN_EN |
  329. DMASCR_SEM_EN |
  330. pci_cmds);
  331. if (bio_op(bio) == REQ_OP_WRITE)
  332. desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
  333. desc->sem_control_bits = desc->control_bits;
  334. bio_advance_iter(bio, &card->current_iter, vec.bv_len);
  335. if (!card->current_iter.bi_size)
  336. card->currentbio = NULL;
  337. return 1;
  338. }
  339. static void process_page(unsigned long data)
  340. {
  341. /* check if any of the requests in the page are DMA_COMPLETE,
  342. * and deal with them appropriately.
  343. * If we find a descriptor without DMA_COMPLETE in the semaphore, then
  344. * dma must have hit an error on that descriptor, so use dma_status
  345. * instead and assume that all following descriptors must be re-tried.
  346. */
  347. struct mm_page *page;
  348. struct bio *return_bio = NULL;
  349. struct cardinfo *card = (struct cardinfo *)data;
  350. unsigned int dma_status = card->dma_status;
  351. spin_lock_bh(&card->lock);
  352. if (card->Active < 0)
  353. goto out_unlock;
  354. page = &card->mm_pages[card->Active];
  355. while (page->headcnt < page->cnt) {
  356. struct bio *bio = page->bio;
  357. struct mm_dma_desc *desc = &page->desc[page->headcnt];
  358. int control = le32_to_cpu(desc->sem_control_bits);
  359. int last = 0;
  360. struct bio_vec vec;
  361. if (!(control & DMASCR_DMA_COMPLETE)) {
  362. control = dma_status;
  363. last = 1;
  364. }
  365. page->headcnt++;
  366. vec = bio_iter_iovec(bio, page->iter);
  367. bio_advance_iter(bio, &page->iter, vec.bv_len);
  368. if (!page->iter.bi_size) {
  369. page->bio = bio->bi_next;
  370. if (page->bio)
  371. page->iter = page->bio->bi_iter;
  372. }
  373. pci_unmap_page(card->dev, desc->data_dma_handle,
  374. vec.bv_len,
  375. (control & DMASCR_TRANSFER_READ) ?
  376. PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
  377. if (control & DMASCR_HARD_ERROR) {
  378. /* error */
  379. bio->bi_status = BLK_STS_IOERR;
  380. dev_printk(KERN_WARNING, &card->dev->dev,
  381. "I/O error on sector %d/%d\n",
  382. le32_to_cpu(desc->local_addr)>>9,
  383. le32_to_cpu(desc->transfer_size));
  384. dump_dmastat(card, control);
  385. } else if (op_is_write(bio_op(bio)) &&
  386. le32_to_cpu(desc->local_addr) >> 9 ==
  387. card->init_size) {
  388. card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
  389. if (card->init_size >> 1 >= card->mm_size) {
  390. dev_printk(KERN_INFO, &card->dev->dev,
  391. "memory now initialised\n");
  392. set_userbit(card, MEMORY_INITIALIZED, 1);
  393. }
  394. }
  395. if (bio != page->bio) {
  396. bio->bi_next = return_bio;
  397. return_bio = bio;
  398. }
  399. if (last)
  400. break;
  401. }
  402. if (debug & DEBUG_LED_ON_TRANSFER)
  403. set_led(card, LED_REMOVE, LED_OFF);
  404. if (card->check_batteries) {
  405. card->check_batteries = 0;
  406. check_batteries(card);
  407. }
  408. if (page->headcnt >= page->cnt) {
  409. reset_page(page);
  410. card->Active = -1;
  411. activate(card);
  412. } else {
  413. /* haven't finished with this one yet */
  414. pr_debug("do some more\n");
  415. mm_start_io(card);
  416. }
  417. out_unlock:
  418. spin_unlock_bh(&card->lock);
  419. while (return_bio) {
  420. struct bio *bio = return_bio;
  421. return_bio = bio->bi_next;
  422. bio->bi_next = NULL;
  423. bio_endio(bio);
  424. }
  425. }
  426. static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
  427. {
  428. struct cardinfo *card = cb->data;
  429. spin_lock_irq(&card->lock);
  430. activate(card);
  431. spin_unlock_irq(&card->lock);
  432. kfree(cb);
  433. }
  434. static int mm_check_plugged(struct cardinfo *card)
  435. {
  436. return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
  437. }
  438. static blk_qc_t mm_make_request(struct request_queue *q, struct bio *bio)
  439. {
  440. struct cardinfo *card = q->queuedata;
  441. pr_debug("mm_make_request %llu %u\n",
  442. (unsigned long long)bio->bi_iter.bi_sector,
  443. bio->bi_iter.bi_size);
  444. blk_queue_split(q, &bio);
  445. spin_lock_irq(&card->lock);
  446. *card->biotail = bio;
  447. bio->bi_next = NULL;
  448. card->biotail = &bio->bi_next;
  449. if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card))
  450. activate(card);
  451. spin_unlock_irq(&card->lock);
  452. return BLK_QC_T_NONE;
  453. }
  454. static irqreturn_t mm_interrupt(int irq, void *__card)
  455. {
  456. struct cardinfo *card = (struct cardinfo *) __card;
  457. unsigned int dma_status;
  458. unsigned short cfg_status;
  459. HW_TRACE(0x30);
  460. dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
  461. if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
  462. /* interrupt wasn't for me ... */
  463. return IRQ_NONE;
  464. }
  465. /* clear COMPLETION interrupts */
  466. if (card->flags & UM_FLAG_NO_BYTE_STATUS)
  467. writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
  468. card->csr_remap + DMA_STATUS_CTRL);
  469. else
  470. writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
  471. card->csr_remap + DMA_STATUS_CTRL + 2);
  472. /* log errors and clear interrupt status */
  473. if (dma_status & DMASCR_ANY_ERR) {
  474. unsigned int data_log1, data_log2;
  475. unsigned int addr_log1, addr_log2;
  476. unsigned char stat, count, syndrome, check;
  477. stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
  478. data_log1 = le32_to_cpu(readl(card->csr_remap +
  479. ERROR_DATA_LOG));
  480. data_log2 = le32_to_cpu(readl(card->csr_remap +
  481. ERROR_DATA_LOG + 4));
  482. addr_log1 = le32_to_cpu(readl(card->csr_remap +
  483. ERROR_ADDR_LOG));
  484. addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
  485. count = readb(card->csr_remap + ERROR_COUNT);
  486. syndrome = readb(card->csr_remap + ERROR_SYNDROME);
  487. check = readb(card->csr_remap + ERROR_CHECK);
  488. dump_dmastat(card, dma_status);
  489. if (stat & 0x01)
  490. dev_printk(KERN_ERR, &card->dev->dev,
  491. "Memory access error detected (err count %d)\n",
  492. count);
  493. if (stat & 0x02)
  494. dev_printk(KERN_ERR, &card->dev->dev,
  495. "Multi-bit EDC error\n");
  496. dev_printk(KERN_ERR, &card->dev->dev,
  497. "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
  498. addr_log2, addr_log1, data_log2, data_log1);
  499. dev_printk(KERN_ERR, &card->dev->dev,
  500. "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
  501. check, syndrome);
  502. writeb(0, card->csr_remap + ERROR_COUNT);
  503. }
  504. if (dma_status & DMASCR_PARITY_ERR_REP) {
  505. dev_printk(KERN_ERR, &card->dev->dev,
  506. "PARITY ERROR REPORTED\n");
  507. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  508. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  509. }
  510. if (dma_status & DMASCR_PARITY_ERR_DET) {
  511. dev_printk(KERN_ERR, &card->dev->dev,
  512. "PARITY ERROR DETECTED\n");
  513. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  514. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  515. }
  516. if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
  517. dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
  518. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  519. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  520. }
  521. if (dma_status & DMASCR_TARGET_ABT) {
  522. dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
  523. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  524. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  525. }
  526. if (dma_status & DMASCR_MASTER_ABT) {
  527. dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
  528. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  529. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  530. }
  531. /* and process the DMA descriptors */
  532. card->dma_status = dma_status;
  533. tasklet_schedule(&card->tasklet);
  534. HW_TRACE(0x36);
  535. return IRQ_HANDLED;
  536. }
  537. /*
  538. * If both batteries are good, no LED
  539. * If either battery has been warned, solid LED
  540. * If both batteries are bad, flash the LED quickly
  541. * If either battery is bad, flash the LED semi quickly
  542. */
  543. static void set_fault_to_battery_status(struct cardinfo *card)
  544. {
  545. if (card->battery[0].good && card->battery[1].good)
  546. set_led(card, LED_FAULT, LED_OFF);
  547. else if (card->battery[0].warned || card->battery[1].warned)
  548. set_led(card, LED_FAULT, LED_ON);
  549. else if (!card->battery[0].good && !card->battery[1].good)
  550. set_led(card, LED_FAULT, LED_FLASH_7_0);
  551. else
  552. set_led(card, LED_FAULT, LED_FLASH_3_5);
  553. }
  554. static void init_battery_timer(void);
  555. static int check_battery(struct cardinfo *card, int battery, int status)
  556. {
  557. if (status != card->battery[battery].good) {
  558. card->battery[battery].good = !card->battery[battery].good;
  559. card->battery[battery].last_change = jiffies;
  560. if (card->battery[battery].good) {
  561. dev_printk(KERN_ERR, &card->dev->dev,
  562. "Battery %d now good\n", battery + 1);
  563. card->battery[battery].warned = 0;
  564. } else
  565. dev_printk(KERN_ERR, &card->dev->dev,
  566. "Battery %d now FAILED\n", battery + 1);
  567. return 1;
  568. } else if (!card->battery[battery].good &&
  569. !card->battery[battery].warned &&
  570. time_after_eq(jiffies, card->battery[battery].last_change +
  571. (HZ * 60 * 60 * 5))) {
  572. dev_printk(KERN_ERR, &card->dev->dev,
  573. "Battery %d still FAILED after 5 hours\n", battery + 1);
  574. card->battery[battery].warned = 1;
  575. return 1;
  576. }
  577. return 0;
  578. }
  579. static void check_batteries(struct cardinfo *card)
  580. {
  581. /* NOTE: this must *never* be called while the card
  582. * is doing (bus-to-card) DMA, or you will need the
  583. * reset switch
  584. */
  585. unsigned char status;
  586. int ret1, ret2;
  587. status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  588. if (debug & DEBUG_BATTERY_POLLING)
  589. dev_printk(KERN_DEBUG, &card->dev->dev,
  590. "checking battery status, 1 = %s, 2 = %s\n",
  591. (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
  592. (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
  593. ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
  594. ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
  595. if (ret1 || ret2)
  596. set_fault_to_battery_status(card);
  597. }
  598. static void check_all_batteries(struct timer_list *unused)
  599. {
  600. int i;
  601. for (i = 0; i < num_cards; i++)
  602. if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
  603. struct cardinfo *card = &cards[i];
  604. spin_lock_bh(&card->lock);
  605. if (card->Active >= 0)
  606. card->check_batteries = 1;
  607. else
  608. check_batteries(card);
  609. spin_unlock_bh(&card->lock);
  610. }
  611. init_battery_timer();
  612. }
  613. static void init_battery_timer(void)
  614. {
  615. timer_setup(&battery_timer, check_all_batteries, 0);
  616. battery_timer.expires = jiffies + (HZ * 60);
  617. add_timer(&battery_timer);
  618. }
  619. static void del_battery_timer(void)
  620. {
  621. del_timer(&battery_timer);
  622. }
  623. /*
  624. * Note no locks taken out here. In a worst case scenario, we could drop
  625. * a chunk of system memory. But that should never happen, since validation
  626. * happens at open or mount time, when locks are held.
  627. *
  628. * That's crap, since doing that while some partitions are opened
  629. * or mounted will give you really nasty results.
  630. */
  631. static int mm_revalidate(struct gendisk *disk)
  632. {
  633. struct cardinfo *card = disk->private_data;
  634. set_capacity(disk, card->mm_size << 1);
  635. return 0;
  636. }
  637. static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  638. {
  639. struct cardinfo *card = bdev->bd_disk->private_data;
  640. int size = card->mm_size * (1024 / MM_HARDSECT);
  641. /*
  642. * get geometry: we have to fake one... trim the size to a
  643. * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
  644. * whatever cylinders.
  645. */
  646. geo->heads = 64;
  647. geo->sectors = 32;
  648. geo->cylinders = size / (geo->heads * geo->sectors);
  649. return 0;
  650. }
  651. static const struct block_device_operations mm_fops = {
  652. .owner = THIS_MODULE,
  653. .getgeo = mm_getgeo,
  654. .revalidate_disk = mm_revalidate,
  655. };
  656. static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  657. {
  658. int ret = -ENODEV;
  659. struct cardinfo *card = &cards[num_cards];
  660. unsigned char mem_present;
  661. unsigned char batt_status;
  662. unsigned int saved_bar, data;
  663. unsigned long csr_base;
  664. unsigned long csr_len;
  665. int magic_number;
  666. static int printed_version;
  667. if (!printed_version++)
  668. printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
  669. ret = pci_enable_device(dev);
  670. if (ret)
  671. return ret;
  672. pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
  673. pci_set_master(dev);
  674. card->dev = dev;
  675. csr_base = pci_resource_start(dev, 0);
  676. csr_len = pci_resource_len(dev, 0);
  677. if (!csr_base || !csr_len)
  678. return -ENODEV;
  679. dev_printk(KERN_INFO, &dev->dev,
  680. "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
  681. if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
  682. pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
  683. dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
  684. return -ENOMEM;
  685. }
  686. ret = pci_request_regions(dev, DRIVER_NAME);
  687. if (ret) {
  688. dev_printk(KERN_ERR, &card->dev->dev,
  689. "Unable to request memory region\n");
  690. goto failed_req_csr;
  691. }
  692. card->csr_remap = ioremap_nocache(csr_base, csr_len);
  693. if (!card->csr_remap) {
  694. dev_printk(KERN_ERR, &card->dev->dev,
  695. "Unable to remap memory region\n");
  696. ret = -ENOMEM;
  697. goto failed_remap_csr;
  698. }
  699. dev_printk(KERN_INFO, &card->dev->dev,
  700. "CSR 0x%08lx -> 0x%p (0x%lx)\n",
  701. csr_base, card->csr_remap, csr_len);
  702. switch (card->dev->device) {
  703. case 0x5415:
  704. card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
  705. magic_number = 0x59;
  706. break;
  707. case 0x5425:
  708. card->flags |= UM_FLAG_NO_BYTE_STATUS;
  709. magic_number = 0x5C;
  710. break;
  711. case 0x6155:
  712. card->flags |= UM_FLAG_NO_BYTE_STATUS |
  713. UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
  714. magic_number = 0x99;
  715. break;
  716. default:
  717. magic_number = 0x100;
  718. break;
  719. }
  720. if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
  721. dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
  722. ret = -ENOMEM;
  723. goto failed_magic;
  724. }
  725. card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
  726. PAGE_SIZE * 2,
  727. &card->mm_pages[0].page_dma);
  728. card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
  729. PAGE_SIZE * 2,
  730. &card->mm_pages[1].page_dma);
  731. if (card->mm_pages[0].desc == NULL ||
  732. card->mm_pages[1].desc == NULL) {
  733. dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
  734. goto failed_alloc;
  735. }
  736. reset_page(&card->mm_pages[0]);
  737. reset_page(&card->mm_pages[1]);
  738. card->Ready = 0; /* page 0 is ready */
  739. card->Active = -1; /* no page is active */
  740. card->bio = NULL;
  741. card->biotail = &card->bio;
  742. spin_lock_init(&card->lock);
  743. card->queue = blk_alloc_queue_node(GFP_KERNEL, NUMA_NO_NODE,
  744. &card->lock);
  745. if (!card->queue)
  746. goto failed_alloc;
  747. blk_queue_make_request(card->queue, mm_make_request);
  748. card->queue->queuedata = card;
  749. tasklet_init(&card->tasklet, process_page, (unsigned long)card);
  750. card->check_batteries = 0;
  751. mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
  752. switch (mem_present) {
  753. case MEM_128_MB:
  754. card->mm_size = 1024 * 128;
  755. break;
  756. case MEM_256_MB:
  757. card->mm_size = 1024 * 256;
  758. break;
  759. case MEM_512_MB:
  760. card->mm_size = 1024 * 512;
  761. break;
  762. case MEM_1_GB:
  763. card->mm_size = 1024 * 1024;
  764. break;
  765. case MEM_2_GB:
  766. card->mm_size = 1024 * 2048;
  767. break;
  768. default:
  769. card->mm_size = 0;
  770. break;
  771. }
  772. /* Clear the LED's we control */
  773. set_led(card, LED_REMOVE, LED_OFF);
  774. set_led(card, LED_FAULT, LED_OFF);
  775. batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  776. card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
  777. card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
  778. card->battery[0].last_change = card->battery[1].last_change = jiffies;
  779. if (card->flags & UM_FLAG_NO_BATT)
  780. dev_printk(KERN_INFO, &card->dev->dev,
  781. "Size %d KB\n", card->mm_size);
  782. else {
  783. dev_printk(KERN_INFO, &card->dev->dev,
  784. "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
  785. card->mm_size,
  786. batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
  787. card->battery[0].good ? "OK" : "FAILURE",
  788. batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
  789. card->battery[1].good ? "OK" : "FAILURE");
  790. set_fault_to_battery_status(card);
  791. }
  792. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
  793. data = 0xffffffff;
  794. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
  795. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
  796. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
  797. data &= 0xfffffff0;
  798. data = ~data;
  799. data += 1;
  800. if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
  801. card)) {
  802. dev_printk(KERN_ERR, &card->dev->dev,
  803. "Unable to allocate IRQ\n");
  804. ret = -ENODEV;
  805. goto failed_req_irq;
  806. }
  807. dev_printk(KERN_INFO, &card->dev->dev,
  808. "Window size %d bytes, IRQ %d\n", data, dev->irq);
  809. pci_set_drvdata(dev, card);
  810. if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
  811. pci_write_cmd = 0x07; /* then Memory Write command */
  812. if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
  813. unsigned short cfg_command;
  814. pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
  815. cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
  816. pci_write_config_word(dev, PCI_COMMAND, cfg_command);
  817. }
  818. pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
  819. num_cards++;
  820. if (!get_userbit(card, MEMORY_INITIALIZED)) {
  821. dev_printk(KERN_INFO, &card->dev->dev,
  822. "memory NOT initialized. Consider over-writing whole device.\n");
  823. card->init_size = 0;
  824. } else {
  825. dev_printk(KERN_INFO, &card->dev->dev,
  826. "memory already initialized\n");
  827. card->init_size = card->mm_size;
  828. }
  829. /* Enable ECC */
  830. writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
  831. return 0;
  832. failed_req_irq:
  833. failed_alloc:
  834. if (card->mm_pages[0].desc)
  835. pci_free_consistent(card->dev, PAGE_SIZE*2,
  836. card->mm_pages[0].desc,
  837. card->mm_pages[0].page_dma);
  838. if (card->mm_pages[1].desc)
  839. pci_free_consistent(card->dev, PAGE_SIZE*2,
  840. card->mm_pages[1].desc,
  841. card->mm_pages[1].page_dma);
  842. failed_magic:
  843. iounmap(card->csr_remap);
  844. failed_remap_csr:
  845. pci_release_regions(dev);
  846. failed_req_csr:
  847. return ret;
  848. }
  849. static void mm_pci_remove(struct pci_dev *dev)
  850. {
  851. struct cardinfo *card = pci_get_drvdata(dev);
  852. tasklet_kill(&card->tasklet);
  853. free_irq(dev->irq, card);
  854. iounmap(card->csr_remap);
  855. if (card->mm_pages[0].desc)
  856. pci_free_consistent(card->dev, PAGE_SIZE*2,
  857. card->mm_pages[0].desc,
  858. card->mm_pages[0].page_dma);
  859. if (card->mm_pages[1].desc)
  860. pci_free_consistent(card->dev, PAGE_SIZE*2,
  861. card->mm_pages[1].desc,
  862. card->mm_pages[1].page_dma);
  863. blk_cleanup_queue(card->queue);
  864. pci_release_regions(dev);
  865. pci_disable_device(dev);
  866. }
  867. static const struct pci_device_id mm_pci_ids[] = {
  868. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
  869. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
  870. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
  871. {
  872. .vendor = 0x8086,
  873. .device = 0xB555,
  874. .subvendor = 0x1332,
  875. .subdevice = 0x5460,
  876. .class = 0x050000,
  877. .class_mask = 0,
  878. }, { /* end: all zeroes */ }
  879. };
  880. MODULE_DEVICE_TABLE(pci, mm_pci_ids);
  881. static struct pci_driver mm_pci_driver = {
  882. .name = DRIVER_NAME,
  883. .id_table = mm_pci_ids,
  884. .probe = mm_pci_probe,
  885. .remove = mm_pci_remove,
  886. };
  887. static int __init mm_init(void)
  888. {
  889. int retval, i;
  890. int err;
  891. retval = pci_register_driver(&mm_pci_driver);
  892. if (retval)
  893. return -ENOMEM;
  894. err = major_nr = register_blkdev(0, DRIVER_NAME);
  895. if (err < 0) {
  896. pci_unregister_driver(&mm_pci_driver);
  897. return -EIO;
  898. }
  899. for (i = 0; i < num_cards; i++) {
  900. mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
  901. if (!mm_gendisk[i])
  902. goto out;
  903. }
  904. for (i = 0; i < num_cards; i++) {
  905. struct gendisk *disk = mm_gendisk[i];
  906. sprintf(disk->disk_name, "umem%c", 'a'+i);
  907. spin_lock_init(&cards[i].lock);
  908. disk->major = major_nr;
  909. disk->first_minor = i << MM_SHIFT;
  910. disk->fops = &mm_fops;
  911. disk->private_data = &cards[i];
  912. disk->queue = cards[i].queue;
  913. set_capacity(disk, cards[i].mm_size << 1);
  914. add_disk(disk);
  915. }
  916. init_battery_timer();
  917. printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
  918. /* printk("mm_init: Done. 10-19-01 9:00\n"); */
  919. return 0;
  920. out:
  921. pci_unregister_driver(&mm_pci_driver);
  922. unregister_blkdev(major_nr, DRIVER_NAME);
  923. while (i--)
  924. put_disk(mm_gendisk[i]);
  925. return -ENOMEM;
  926. }
  927. static void __exit mm_cleanup(void)
  928. {
  929. int i;
  930. del_battery_timer();
  931. for (i = 0; i < num_cards ; i++) {
  932. del_gendisk(mm_gendisk[i]);
  933. put_disk(mm_gendisk[i]);
  934. }
  935. pci_unregister_driver(&mm_pci_driver);
  936. unregister_blkdev(major_nr, DRIVER_NAME);
  937. }
  938. module_init(mm_init);
  939. module_exit(mm_cleanup);
  940. MODULE_AUTHOR(DRIVER_AUTHOR);
  941. MODULE_DESCRIPTION(DRIVER_DESC);
  942. MODULE_LICENSE("GPL");