pata_atp867x.c 14 KB

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  1. /*
  2. * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
  3. *
  4. * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
  5. *
  6. * Per Atp867 data sheet rev 1.2, Acard.
  7. * Based in part on early ide code from
  8. * 2003-2004 by Eric Uhrhane, Google, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. *
  25. * TODO:
  26. * 1. RAID features [comparison, XOR, striping, mirroring, etc.]
  27. */
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #include <linux/blkdev.h>
  32. #include <linux/delay.h>
  33. #include <linux/device.h>
  34. #include <linux/gfp.h>
  35. #include <scsi/scsi_host.h>
  36. #include <linux/libata.h>
  37. #define DRV_NAME "pata_atp867x"
  38. #define DRV_VERSION "0.7.5"
  39. /*
  40. * IO Registers
  41. * Note that all runtime hot priv ports are cached in ap private_data
  42. */
  43. enum {
  44. ATP867X_IO_CHANNEL_OFFSET = 0x10,
  45. /*
  46. * IO Register Bitfields
  47. */
  48. ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
  49. ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
  50. ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
  51. ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
  52. ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
  53. ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
  54. ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
  55. ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
  56. ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
  57. ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
  58. ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
  59. ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
  60. ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
  61. ATP867X_IO_DMAMODE_DISABLE = 0x00,
  62. ATP867X_IO_SYS_INFO_66MHZ = 0x04,
  63. ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
  64. ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
  65. ATP867X_IO_PORTSPD_VAL = 0x1143,
  66. ATP867X_PREREAD_VAL = 0x0200,
  67. ATP867X_NUM_PORTS = 4,
  68. ATP867X_BAR_IOBASE = 0,
  69. ATP867X_BAR_ROMBASE = 6,
  70. };
  71. #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
  72. #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
  73. #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
  74. (port) * ATP867X_IO_CHANNEL_OFFSET)
  75. #define ATP867X_IO_DMABASE(ap, port) (0x40 + \
  76. ATP867X_IO_PORTBASE((ap), (port)))
  77. #define ATP867X_IO_STATUS(ap, port) (0x07 + \
  78. ATP867X_IO_PORTBASE((ap), (port)))
  79. #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
  80. ATP867X_IO_PORTBASE((ap), (port)))
  81. /*
  82. * hot priv ports
  83. */
  84. #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
  85. ATP867X_IO_DMABASE((ap), (port)))
  86. #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
  87. ATP867X_IO_DMABASE((ap), (port)))
  88. #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
  89. ATP867X_IO_DMABASE((ap), (port)))
  90. #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
  91. ATP867X_IO_DMABASE((ap), (port)))
  92. #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
  93. ATP867X_IO_PORTBASE((ap), (port)))
  94. #define ATP867X_IO_PREREAD(ap, port) (0x4C + \
  95. ATP867X_IO_PORTBASE((ap), (port)))
  96. struct atp867x_priv {
  97. void __iomem *dma_mode;
  98. void __iomem *mstr_piospd;
  99. void __iomem *slave_piospd;
  100. void __iomem *eightb_piospd;
  101. int pci66mhz;
  102. };
  103. static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  104. {
  105. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  106. struct atp867x_priv *dp = ap->private_data;
  107. u8 speed = adev->dma_mode;
  108. u8 b;
  109. u8 mode = speed - XFER_UDMA_0 + 1;
  110. /*
  111. * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
  112. * on 66MHz bus
  113. * rev-A: UDMA_1~4 (5, 6 no change)
  114. * rev-B: all UDMA modes
  115. * UDMA_0 stays not to disable UDMA
  116. */
  117. if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
  118. (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
  119. mode < ATP867X_IO_DMAMODE_UDMA_5))
  120. mode--;
  121. b = ioread8(dp->dma_mode);
  122. if (adev->devno & 1) {
  123. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
  124. (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
  125. } else {
  126. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
  127. (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
  128. }
  129. iowrite8(b, dp->dma_mode);
  130. }
  131. static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
  132. unsigned int clk)
  133. {
  134. struct atp867x_priv *dp = ap->private_data;
  135. unsigned char clocks = clk;
  136. /*
  137. * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
  138. * on 66MHz bus
  139. */
  140. if (dp->pci66mhz)
  141. clocks++;
  142. switch (clocks) {
  143. case 0:
  144. clocks = 1;
  145. break;
  146. case 1 ... 6:
  147. break;
  148. default:
  149. printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
  150. "Using 12clk.\n", clk);
  151. /* fall through */
  152. case 9 ... 12:
  153. clocks = 7; /* 12 clk */
  154. break;
  155. case 7:
  156. case 8: /* default 8 clk */
  157. clocks = 0;
  158. goto active_clock_shift_done;
  159. }
  160. active_clock_shift_done:
  161. return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
  162. }
  163. static int atp867x_get_recover_clocks_shifted(unsigned int clk)
  164. {
  165. unsigned char clocks = clk;
  166. switch (clocks) {
  167. case 0:
  168. clocks = 1;
  169. break;
  170. case 1 ... 11:
  171. break;
  172. case 13:
  173. case 14:
  174. --clocks; /* by the spec */
  175. break;
  176. case 15:
  177. break;
  178. default:
  179. printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
  180. "Using default 12clk.\n", clk);
  181. /* fall through */
  182. case 12: /* default 12 clk */
  183. clocks = 0;
  184. break;
  185. }
  186. return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
  187. }
  188. static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
  189. {
  190. struct ata_device *peer = ata_dev_pair(adev);
  191. struct atp867x_priv *dp = ap->private_data;
  192. u8 speed = adev->pio_mode;
  193. struct ata_timing t, p;
  194. int T, UT;
  195. u8 b;
  196. T = 1000000000 / 33333;
  197. UT = T / 4;
  198. ata_timing_compute(adev, speed, &t, T, UT);
  199. if (peer && peer->pio_mode) {
  200. ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
  201. ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
  202. }
  203. b = ioread8(dp->dma_mode);
  204. if (adev->devno & 1)
  205. b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
  206. else
  207. b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
  208. iowrite8(b, dp->dma_mode);
  209. b = atp867x_get_active_clocks_shifted(ap, t.active) |
  210. atp867x_get_recover_clocks_shifted(t.recover);
  211. if (adev->devno & 1)
  212. iowrite8(b, dp->slave_piospd);
  213. else
  214. iowrite8(b, dp->mstr_piospd);
  215. b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
  216. atp867x_get_recover_clocks_shifted(t.rec8b);
  217. iowrite8(b, dp->eightb_piospd);
  218. }
  219. static int atp867x_cable_override(struct pci_dev *pdev)
  220. {
  221. if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
  222. (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
  223. pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
  224. return 1;
  225. }
  226. return 0;
  227. }
  228. static int atp867x_cable_detect(struct ata_port *ap)
  229. {
  230. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  231. if (atp867x_cable_override(pdev))
  232. return ATA_CBL_PATA40_SHORT;
  233. return ATA_CBL_PATA_UNK;
  234. }
  235. static struct scsi_host_template atp867x_sht = {
  236. ATA_BMDMA_SHT(DRV_NAME),
  237. };
  238. static struct ata_port_operations atp867x_ops = {
  239. .inherits = &ata_bmdma_port_ops,
  240. .cable_detect = atp867x_cable_detect,
  241. .set_piomode = atp867x_set_piomode,
  242. .set_dmamode = atp867x_set_dmamode,
  243. };
  244. #ifdef ATP867X_DEBUG
  245. static void atp867x_check_res(struct pci_dev *pdev)
  246. {
  247. int i;
  248. unsigned long start, len;
  249. /* Check the PCI resources for this channel are enabled */
  250. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  251. start = pci_resource_start(pdev, i);
  252. len = pci_resource_len(pdev, i);
  253. printk(KERN_DEBUG "ATP867X: resource start:len=%lx:%lx\n",
  254. start, len);
  255. }
  256. }
  257. static void atp867x_check_ports(struct ata_port *ap, int port)
  258. {
  259. struct ata_ioports *ioaddr = &ap->ioaddr;
  260. struct atp867x_priv *dp = ap->private_data;
  261. printk(KERN_DEBUG "ATP867X: port[%d] addresses\n"
  262. " cmd_addr =0x%llx, 0x%llx\n"
  263. " ctl_addr =0x%llx, 0x%llx\n"
  264. " bmdma_addr =0x%llx, 0x%llx\n"
  265. " data_addr =0x%llx\n"
  266. " error_addr =0x%llx\n"
  267. " feature_addr =0x%llx\n"
  268. " nsect_addr =0x%llx\n"
  269. " lbal_addr =0x%llx\n"
  270. " lbam_addr =0x%llx\n"
  271. " lbah_addr =0x%llx\n"
  272. " device_addr =0x%llx\n"
  273. " status_addr =0x%llx\n"
  274. " command_addr =0x%llx\n"
  275. " dp->dma_mode =0x%llx\n"
  276. " dp->mstr_piospd =0x%llx\n"
  277. " dp->slave_piospd =0x%llx\n"
  278. " dp->eightb_piospd =0x%llx\n"
  279. " dp->pci66mhz =0x%lx\n",
  280. port,
  281. (unsigned long long)ioaddr->cmd_addr,
  282. (unsigned long long)ATP867X_IO_PORTBASE(ap, port),
  283. (unsigned long long)ioaddr->ctl_addr,
  284. (unsigned long long)ATP867X_IO_ALTSTATUS(ap, port),
  285. (unsigned long long)ioaddr->bmdma_addr,
  286. (unsigned long long)ATP867X_IO_DMABASE(ap, port),
  287. (unsigned long long)ioaddr->data_addr,
  288. (unsigned long long)ioaddr->error_addr,
  289. (unsigned long long)ioaddr->feature_addr,
  290. (unsigned long long)ioaddr->nsect_addr,
  291. (unsigned long long)ioaddr->lbal_addr,
  292. (unsigned long long)ioaddr->lbam_addr,
  293. (unsigned long long)ioaddr->lbah_addr,
  294. (unsigned long long)ioaddr->device_addr,
  295. (unsigned long long)ioaddr->status_addr,
  296. (unsigned long long)ioaddr->command_addr,
  297. (unsigned long long)dp->dma_mode,
  298. (unsigned long long)dp->mstr_piospd,
  299. (unsigned long long)dp->slave_piospd,
  300. (unsigned long long)dp->eightb_piospd,
  301. (unsigned long)dp->pci66mhz);
  302. }
  303. #endif
  304. static int atp867x_set_priv(struct ata_port *ap)
  305. {
  306. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  307. struct atp867x_priv *dp;
  308. int port = ap->port_no;
  309. dp = ap->private_data =
  310. devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
  311. if (dp == NULL)
  312. return -ENOMEM;
  313. dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
  314. dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
  315. dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
  316. dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
  317. dp->pci66mhz =
  318. ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
  319. return 0;
  320. }
  321. static void atp867x_fixup(struct ata_host *host)
  322. {
  323. struct pci_dev *pdev = to_pci_dev(host->dev);
  324. struct ata_port *ap = host->ports[0];
  325. int i;
  326. u8 v;
  327. /*
  328. * Broken BIOS might not set latency high enough
  329. */
  330. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
  331. if (v < 0x80) {
  332. v = 0x80;
  333. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
  334. printk(KERN_DEBUG "ATP867X: set latency timer of device %s"
  335. " to %d\n", pci_name(pdev), v);
  336. }
  337. /*
  338. * init 8bit io ports speed(0aaarrrr) to 43h and
  339. * init udma modes of master/slave to 0/0(11h)
  340. */
  341. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  342. iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
  343. /*
  344. * init PreREAD counts
  345. */
  346. for (i = 0; i < ATP867X_NUM_PORTS; i++)
  347. iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
  348. v = ioread8(ATP867X_IOBASE(ap) + 0x28);
  349. v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
  350. v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
  351. iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
  352. /*
  353. * Turn off the over clocked udma5 mode, only for Rev-B
  354. */
  355. v = ioread8(ATP867X_SYS_INFO(ap));
  356. v &= ATP867X_IO_SYS_MASK_RESERVED;
  357. if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
  358. v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
  359. iowrite8(v, ATP867X_SYS_INFO(ap));
  360. }
  361. static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
  362. {
  363. struct device *gdev = host->dev;
  364. struct pci_dev *pdev = to_pci_dev(gdev);
  365. unsigned int mask = 0;
  366. int i, rc;
  367. /*
  368. * do not map rombase
  369. */
  370. rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
  371. if (rc == -EBUSY)
  372. pcim_pin_device(pdev);
  373. if (rc)
  374. return rc;
  375. host->iomap = pcim_iomap_table(pdev);
  376. #ifdef ATP867X_DEBUG
  377. atp867x_check_res(pdev);
  378. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  379. printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i,
  380. (unsigned long long)(host->iomap[i]));
  381. #endif
  382. /*
  383. * request, iomap BARs and init port addresses accordingly
  384. */
  385. for (i = 0; i < host->n_ports; i++) {
  386. struct ata_port *ap = host->ports[i];
  387. struct ata_ioports *ioaddr = &ap->ioaddr;
  388. ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
  389. ioaddr->ctl_addr = ioaddr->altstatus_addr
  390. = ATP867X_IO_ALTSTATUS(ap, i);
  391. ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
  392. ata_sff_std_ports(ioaddr);
  393. rc = atp867x_set_priv(ap);
  394. if (rc)
  395. return rc;
  396. #ifdef ATP867X_DEBUG
  397. atp867x_check_ports(ap, i);
  398. #endif
  399. ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
  400. (unsigned long)ioaddr->cmd_addr,
  401. (unsigned long)ioaddr->ctl_addr);
  402. ata_port_desc(ap, "bmdma 0x%lx",
  403. (unsigned long)ioaddr->bmdma_addr);
  404. mask |= 1 << i;
  405. }
  406. if (!mask) {
  407. dev_err(gdev, "no available native port\n");
  408. return -ENODEV;
  409. }
  410. atp867x_fixup(host);
  411. rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
  412. if (rc)
  413. return rc;
  414. rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
  415. return rc;
  416. }
  417. static int atp867x_init_one(struct pci_dev *pdev,
  418. const struct pci_device_id *id)
  419. {
  420. static const struct ata_port_info info_867x = {
  421. .flags = ATA_FLAG_SLAVE_POSS,
  422. .pio_mask = ATA_PIO4,
  423. .udma_mask = ATA_UDMA6,
  424. .port_ops = &atp867x_ops,
  425. };
  426. struct ata_host *host;
  427. const struct ata_port_info *ppi[] = { &info_867x, NULL };
  428. int rc;
  429. ata_print_version_once(&pdev->dev, DRV_VERSION);
  430. rc = pcim_enable_device(pdev);
  431. if (rc)
  432. return rc;
  433. printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
  434. pdev->device);
  435. host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
  436. if (!host) {
  437. dev_err(&pdev->dev, "failed to allocate ATA host\n");
  438. rc = -ENOMEM;
  439. goto err_out;
  440. }
  441. rc = atp867x_ata_pci_sff_init_host(host);
  442. if (rc) {
  443. dev_err(&pdev->dev, "failed to init host\n");
  444. goto err_out;
  445. }
  446. pci_set_master(pdev);
  447. rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
  448. IRQF_SHARED, &atp867x_sht);
  449. if (rc)
  450. dev_err(&pdev->dev, "failed to activate host\n");
  451. err_out:
  452. return rc;
  453. }
  454. #ifdef CONFIG_PM_SLEEP
  455. static int atp867x_reinit_one(struct pci_dev *pdev)
  456. {
  457. struct ata_host *host = pci_get_drvdata(pdev);
  458. int rc;
  459. rc = ata_pci_device_do_resume(pdev);
  460. if (rc)
  461. return rc;
  462. atp867x_fixup(host);
  463. ata_host_resume(host);
  464. return 0;
  465. }
  466. #endif
  467. static struct pci_device_id atp867x_pci_tbl[] = {
  468. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
  469. { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
  470. { },
  471. };
  472. static struct pci_driver atp867x_driver = {
  473. .name = DRV_NAME,
  474. .id_table = atp867x_pci_tbl,
  475. .probe = atp867x_init_one,
  476. .remove = ata_pci_remove_one,
  477. #ifdef CONFIG_PM_SLEEP
  478. .suspend = ata_pci_device_suspend,
  479. .resume = atp867x_reinit_one,
  480. #endif
  481. };
  482. module_pci_driver(atp867x_driver);
  483. MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
  484. MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
  485. MODULE_LICENSE("GPL");
  486. MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
  487. MODULE_VERSION(DRV_VERSION);