mmu_pv.c 68 KB

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  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched/mm.h>
  42. #include <linux/highmem.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/bug.h>
  45. #include <linux/vmalloc.h>
  46. #include <linux/export.h>
  47. #include <linux/init.h>
  48. #include <linux/gfp.h>
  49. #include <linux/memblock.h>
  50. #include <linux/seq_file.h>
  51. #include <linux/crash_dump.h>
  52. #ifdef CONFIG_KEXEC_CORE
  53. #include <linux/kexec.h>
  54. #endif
  55. #include <trace/events/xen.h>
  56. #include <asm/pgtable.h>
  57. #include <asm/tlbflush.h>
  58. #include <asm/fixmap.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/setup.h>
  61. #include <asm/paravirt.h>
  62. #include <asm/e820/api.h>
  63. #include <asm/linkage.h>
  64. #include <asm/page.h>
  65. #include <asm/init.h>
  66. #include <asm/pat.h>
  67. #include <asm/smp.h>
  68. #include <asm/tlb.h>
  69. #include <asm/xen/hypercall.h>
  70. #include <asm/xen/hypervisor.h>
  71. #include <xen/xen.h>
  72. #include <xen/page.h>
  73. #include <xen/interface/xen.h>
  74. #include <xen/interface/hvm/hvm_op.h>
  75. #include <xen/interface/version.h>
  76. #include <xen/interface/memory.h>
  77. #include <xen/hvc-console.h>
  78. #include "multicalls.h"
  79. #include "mmu.h"
  80. #include "debugfs.h"
  81. #ifdef CONFIG_X86_32
  82. /*
  83. * Identity map, in addition to plain kernel map. This needs to be
  84. * large enough to allocate page table pages to allocate the rest.
  85. * Each page can map 2MB.
  86. */
  87. #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
  88. static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
  89. #endif
  90. #ifdef CONFIG_X86_64
  91. /* l3 pud for userspace vsyscall mapping */
  92. static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
  93. #endif /* CONFIG_X86_64 */
  94. /*
  95. * Note about cr3 (pagetable base) values:
  96. *
  97. * xen_cr3 contains the current logical cr3 value; it contains the
  98. * last set cr3. This may not be the current effective cr3, because
  99. * its update may be being lazily deferred. However, a vcpu looking
  100. * at its own cr3 can use this value knowing that it everything will
  101. * be self-consistent.
  102. *
  103. * xen_current_cr3 contains the actual vcpu cr3; it is set once the
  104. * hypercall to set the vcpu cr3 is complete (so it may be a little
  105. * out of date, but it will never be set early). If one vcpu is
  106. * looking at another vcpu's cr3 value, it should use this variable.
  107. */
  108. DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
  109. DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
  110. static phys_addr_t xen_pt_base, xen_pt_size __initdata;
  111. static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
  112. /*
  113. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  114. * redzone above it, so round it up to a PGD boundary.
  115. */
  116. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  117. void make_lowmem_page_readonly(void *vaddr)
  118. {
  119. pte_t *pte, ptev;
  120. unsigned long address = (unsigned long)vaddr;
  121. unsigned int level;
  122. pte = lookup_address(address, &level);
  123. if (pte == NULL)
  124. return; /* vaddr missing */
  125. ptev = pte_wrprotect(*pte);
  126. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  127. BUG();
  128. }
  129. void make_lowmem_page_readwrite(void *vaddr)
  130. {
  131. pte_t *pte, ptev;
  132. unsigned long address = (unsigned long)vaddr;
  133. unsigned int level;
  134. pte = lookup_address(address, &level);
  135. if (pte == NULL)
  136. return; /* vaddr missing */
  137. ptev = pte_mkwrite(*pte);
  138. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  139. BUG();
  140. }
  141. /*
  142. * During early boot all page table pages are pinned, but we do not have struct
  143. * pages, so return true until struct pages are ready.
  144. */
  145. static bool xen_page_pinned(void *ptr)
  146. {
  147. if (static_branch_likely(&xen_struct_pages_ready)) {
  148. struct page *page = virt_to_page(ptr);
  149. return PagePinned(page);
  150. }
  151. return true;
  152. }
  153. static void xen_extend_mmu_update(const struct mmu_update *update)
  154. {
  155. struct multicall_space mcs;
  156. struct mmu_update *u;
  157. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  158. if (mcs.mc != NULL) {
  159. mcs.mc->args[1]++;
  160. } else {
  161. mcs = __xen_mc_entry(sizeof(*u));
  162. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  163. }
  164. u = mcs.args;
  165. *u = *update;
  166. }
  167. static void xen_extend_mmuext_op(const struct mmuext_op *op)
  168. {
  169. struct multicall_space mcs;
  170. struct mmuext_op *u;
  171. mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
  172. if (mcs.mc != NULL) {
  173. mcs.mc->args[1]++;
  174. } else {
  175. mcs = __xen_mc_entry(sizeof(*u));
  176. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  177. }
  178. u = mcs.args;
  179. *u = *op;
  180. }
  181. static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  182. {
  183. struct mmu_update u;
  184. preempt_disable();
  185. xen_mc_batch();
  186. /* ptr may be ioremapped for 64-bit pagetable setup */
  187. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  188. u.val = pmd_val_ma(val);
  189. xen_extend_mmu_update(&u);
  190. xen_mc_issue(PARAVIRT_LAZY_MMU);
  191. preempt_enable();
  192. }
  193. static void xen_set_pmd(pmd_t *ptr, pmd_t val)
  194. {
  195. trace_xen_mmu_set_pmd(ptr, val);
  196. /* If page is not pinned, we can just update the entry
  197. directly */
  198. if (!xen_page_pinned(ptr)) {
  199. *ptr = val;
  200. return;
  201. }
  202. xen_set_pmd_hyper(ptr, val);
  203. }
  204. /*
  205. * Associate a virtual page frame with a given physical page frame
  206. * and protection flags for that frame.
  207. */
  208. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  209. {
  210. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  211. }
  212. static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
  213. {
  214. struct mmu_update u;
  215. if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
  216. return false;
  217. xen_mc_batch();
  218. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  219. u.val = pte_val_ma(pteval);
  220. xen_extend_mmu_update(&u);
  221. xen_mc_issue(PARAVIRT_LAZY_MMU);
  222. return true;
  223. }
  224. static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
  225. {
  226. if (!xen_batched_set_pte(ptep, pteval)) {
  227. /*
  228. * Could call native_set_pte() here and trap and
  229. * emulate the PTE write but with 32-bit guests this
  230. * needs two traps (one for each of the two 32-bit
  231. * words in the PTE) so do one hypercall directly
  232. * instead.
  233. */
  234. struct mmu_update u;
  235. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  236. u.val = pte_val_ma(pteval);
  237. HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
  238. }
  239. }
  240. static void xen_set_pte(pte_t *ptep, pte_t pteval)
  241. {
  242. trace_xen_mmu_set_pte(ptep, pteval);
  243. __xen_set_pte(ptep, pteval);
  244. }
  245. static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  246. pte_t *ptep, pte_t pteval)
  247. {
  248. trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
  249. __xen_set_pte(ptep, pteval);
  250. }
  251. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
  252. unsigned long addr, pte_t *ptep)
  253. {
  254. /* Just return the pte as-is. We preserve the bits on commit */
  255. trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
  256. return *ptep;
  257. }
  258. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  259. pte_t *ptep, pte_t pte)
  260. {
  261. struct mmu_update u;
  262. trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
  263. xen_mc_batch();
  264. u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  265. u.val = pte_val_ma(pte);
  266. xen_extend_mmu_update(&u);
  267. xen_mc_issue(PARAVIRT_LAZY_MMU);
  268. }
  269. /* Assume pteval_t is equivalent to all the other *val_t types. */
  270. static pteval_t pte_mfn_to_pfn(pteval_t val)
  271. {
  272. if (val & _PAGE_PRESENT) {
  273. unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
  274. unsigned long pfn = mfn_to_pfn(mfn);
  275. pteval_t flags = val & PTE_FLAGS_MASK;
  276. if (unlikely(pfn == ~0))
  277. val = flags & ~_PAGE_PRESENT;
  278. else
  279. val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
  280. }
  281. return val;
  282. }
  283. static pteval_t pte_pfn_to_mfn(pteval_t val)
  284. {
  285. if (val & _PAGE_PRESENT) {
  286. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  287. pteval_t flags = val & PTE_FLAGS_MASK;
  288. unsigned long mfn;
  289. mfn = __pfn_to_mfn(pfn);
  290. /*
  291. * If there's no mfn for the pfn, then just create an
  292. * empty non-present pte. Unfortunately this loses
  293. * information about the original pfn, so
  294. * pte_mfn_to_pfn is asymmetric.
  295. */
  296. if (unlikely(mfn == INVALID_P2M_ENTRY)) {
  297. mfn = 0;
  298. flags = 0;
  299. } else
  300. mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
  301. val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
  302. }
  303. return val;
  304. }
  305. __visible pteval_t xen_pte_val(pte_t pte)
  306. {
  307. pteval_t pteval = pte.pte;
  308. return pte_mfn_to_pfn(pteval);
  309. }
  310. PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
  311. __visible pgdval_t xen_pgd_val(pgd_t pgd)
  312. {
  313. return pte_mfn_to_pfn(pgd.pgd);
  314. }
  315. PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
  316. __visible pte_t xen_make_pte(pteval_t pte)
  317. {
  318. pte = pte_pfn_to_mfn(pte);
  319. return native_make_pte(pte);
  320. }
  321. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
  322. __visible pgd_t xen_make_pgd(pgdval_t pgd)
  323. {
  324. pgd = pte_pfn_to_mfn(pgd);
  325. return native_make_pgd(pgd);
  326. }
  327. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
  328. __visible pmdval_t xen_pmd_val(pmd_t pmd)
  329. {
  330. return pte_mfn_to_pfn(pmd.pmd);
  331. }
  332. PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
  333. static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  334. {
  335. struct mmu_update u;
  336. preempt_disable();
  337. xen_mc_batch();
  338. /* ptr may be ioremapped for 64-bit pagetable setup */
  339. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  340. u.val = pud_val_ma(val);
  341. xen_extend_mmu_update(&u);
  342. xen_mc_issue(PARAVIRT_LAZY_MMU);
  343. preempt_enable();
  344. }
  345. static void xen_set_pud(pud_t *ptr, pud_t val)
  346. {
  347. trace_xen_mmu_set_pud(ptr, val);
  348. /* If page is not pinned, we can just update the entry
  349. directly */
  350. if (!xen_page_pinned(ptr)) {
  351. *ptr = val;
  352. return;
  353. }
  354. xen_set_pud_hyper(ptr, val);
  355. }
  356. #ifdef CONFIG_X86_PAE
  357. static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  358. {
  359. trace_xen_mmu_set_pte_atomic(ptep, pte);
  360. __xen_set_pte(ptep, pte);
  361. }
  362. static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  363. {
  364. trace_xen_mmu_pte_clear(mm, addr, ptep);
  365. __xen_set_pte(ptep, native_make_pte(0));
  366. }
  367. static void xen_pmd_clear(pmd_t *pmdp)
  368. {
  369. trace_xen_mmu_pmd_clear(pmdp);
  370. set_pmd(pmdp, __pmd(0));
  371. }
  372. #endif /* CONFIG_X86_PAE */
  373. __visible pmd_t xen_make_pmd(pmdval_t pmd)
  374. {
  375. pmd = pte_pfn_to_mfn(pmd);
  376. return native_make_pmd(pmd);
  377. }
  378. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
  379. #ifdef CONFIG_X86_64
  380. __visible pudval_t xen_pud_val(pud_t pud)
  381. {
  382. return pte_mfn_to_pfn(pud.pud);
  383. }
  384. PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
  385. __visible pud_t xen_make_pud(pudval_t pud)
  386. {
  387. pud = pte_pfn_to_mfn(pud);
  388. return native_make_pud(pud);
  389. }
  390. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
  391. static pgd_t *xen_get_user_pgd(pgd_t *pgd)
  392. {
  393. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  394. unsigned offset = pgd - pgd_page;
  395. pgd_t *user_ptr = NULL;
  396. if (offset < pgd_index(USER_LIMIT)) {
  397. struct page *page = virt_to_page(pgd_page);
  398. user_ptr = (pgd_t *)page->private;
  399. if (user_ptr)
  400. user_ptr += offset;
  401. }
  402. return user_ptr;
  403. }
  404. static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  405. {
  406. struct mmu_update u;
  407. u.ptr = virt_to_machine(ptr).maddr;
  408. u.val = p4d_val_ma(val);
  409. xen_extend_mmu_update(&u);
  410. }
  411. /*
  412. * Raw hypercall-based set_p4d, intended for in early boot before
  413. * there's a page structure. This implies:
  414. * 1. The only existing pagetable is the kernel's
  415. * 2. It is always pinned
  416. * 3. It has no user pagetable attached to it
  417. */
  418. static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  419. {
  420. preempt_disable();
  421. xen_mc_batch();
  422. __xen_set_p4d_hyper(ptr, val);
  423. xen_mc_issue(PARAVIRT_LAZY_MMU);
  424. preempt_enable();
  425. }
  426. static void xen_set_p4d(p4d_t *ptr, p4d_t val)
  427. {
  428. pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
  429. pgd_t pgd_val;
  430. trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
  431. /* If page is not pinned, we can just update the entry
  432. directly */
  433. if (!xen_page_pinned(ptr)) {
  434. *ptr = val;
  435. if (user_ptr) {
  436. WARN_ON(xen_page_pinned(user_ptr));
  437. pgd_val.pgd = p4d_val_ma(val);
  438. *user_ptr = pgd_val;
  439. }
  440. return;
  441. }
  442. /* If it's pinned, then we can at least batch the kernel and
  443. user updates together. */
  444. xen_mc_batch();
  445. __xen_set_p4d_hyper(ptr, val);
  446. if (user_ptr)
  447. __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
  448. xen_mc_issue(PARAVIRT_LAZY_MMU);
  449. }
  450. #if CONFIG_PGTABLE_LEVELS >= 5
  451. __visible p4dval_t xen_p4d_val(p4d_t p4d)
  452. {
  453. return pte_mfn_to_pfn(p4d.p4d);
  454. }
  455. PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
  456. __visible p4d_t xen_make_p4d(p4dval_t p4d)
  457. {
  458. p4d = pte_pfn_to_mfn(p4d);
  459. return native_make_p4d(p4d);
  460. }
  461. PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
  462. #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
  463. #endif /* CONFIG_X86_64 */
  464. static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
  465. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  466. bool last, unsigned long limit)
  467. {
  468. int i, nr, flush = 0;
  469. nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
  470. for (i = 0; i < nr; i++) {
  471. if (!pmd_none(pmd[i]))
  472. flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
  473. }
  474. return flush;
  475. }
  476. static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
  477. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  478. bool last, unsigned long limit)
  479. {
  480. int i, nr, flush = 0;
  481. nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
  482. for (i = 0; i < nr; i++) {
  483. pmd_t *pmd;
  484. if (pud_none(pud[i]))
  485. continue;
  486. pmd = pmd_offset(&pud[i], 0);
  487. if (PTRS_PER_PMD > 1)
  488. flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
  489. flush |= xen_pmd_walk(mm, pmd, func,
  490. last && i == nr - 1, limit);
  491. }
  492. return flush;
  493. }
  494. static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
  495. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  496. bool last, unsigned long limit)
  497. {
  498. int flush = 0;
  499. pud_t *pud;
  500. if (p4d_none(*p4d))
  501. return flush;
  502. pud = pud_offset(p4d, 0);
  503. if (PTRS_PER_PUD > 1)
  504. flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
  505. flush |= xen_pud_walk(mm, pud, func, last, limit);
  506. return flush;
  507. }
  508. /*
  509. * (Yet another) pagetable walker. This one is intended for pinning a
  510. * pagetable. This means that it walks a pagetable and calls the
  511. * callback function on each page it finds making up the page table,
  512. * at every level. It walks the entire pagetable, but it only bothers
  513. * pinning pte pages which are below limit. In the normal case this
  514. * will be STACK_TOP_MAX, but at boot we need to pin up to
  515. * FIXADDR_TOP.
  516. *
  517. * For 32-bit the important bit is that we don't pin beyond there,
  518. * because then we start getting into Xen's ptes.
  519. *
  520. * For 64-bit, we must skip the Xen hole in the middle of the address
  521. * space, just after the big x86-64 virtual hole.
  522. */
  523. static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
  524. int (*func)(struct mm_struct *mm, struct page *,
  525. enum pt_level),
  526. unsigned long limit)
  527. {
  528. int i, nr, flush = 0;
  529. unsigned hole_low = 0, hole_high = 0;
  530. /* The limit is the last byte to be touched */
  531. limit--;
  532. BUG_ON(limit >= FIXADDR_TOP);
  533. #ifdef CONFIG_X86_64
  534. /*
  535. * 64-bit has a great big hole in the middle of the address
  536. * space, which contains the Xen mappings.
  537. */
  538. hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
  539. hole_high = pgd_index(GUARD_HOLE_END_ADDR);
  540. #endif
  541. nr = pgd_index(limit) + 1;
  542. for (i = 0; i < nr; i++) {
  543. p4d_t *p4d;
  544. if (i >= hole_low && i < hole_high)
  545. continue;
  546. if (pgd_none(pgd[i]))
  547. continue;
  548. p4d = p4d_offset(&pgd[i], 0);
  549. flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
  550. }
  551. /* Do the top level last, so that the callbacks can use it as
  552. a cue to do final things like tlb flushes. */
  553. flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
  554. return flush;
  555. }
  556. static int xen_pgd_walk(struct mm_struct *mm,
  557. int (*func)(struct mm_struct *mm, struct page *,
  558. enum pt_level),
  559. unsigned long limit)
  560. {
  561. return __xen_pgd_walk(mm, mm->pgd, func, limit);
  562. }
  563. /* If we're using split pte locks, then take the page's lock and
  564. return a pointer to it. Otherwise return NULL. */
  565. static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
  566. {
  567. spinlock_t *ptl = NULL;
  568. #if USE_SPLIT_PTE_PTLOCKS
  569. ptl = ptlock_ptr(page);
  570. spin_lock_nest_lock(ptl, &mm->page_table_lock);
  571. #endif
  572. return ptl;
  573. }
  574. static void xen_pte_unlock(void *v)
  575. {
  576. spinlock_t *ptl = v;
  577. spin_unlock(ptl);
  578. }
  579. static void xen_do_pin(unsigned level, unsigned long pfn)
  580. {
  581. struct mmuext_op op;
  582. op.cmd = level;
  583. op.arg1.mfn = pfn_to_mfn(pfn);
  584. xen_extend_mmuext_op(&op);
  585. }
  586. static int xen_pin_page(struct mm_struct *mm, struct page *page,
  587. enum pt_level level)
  588. {
  589. unsigned pgfl = TestSetPagePinned(page);
  590. int flush;
  591. if (pgfl)
  592. flush = 0; /* already pinned */
  593. else if (PageHighMem(page))
  594. /* kmaps need flushing if we found an unpinned
  595. highpage */
  596. flush = 1;
  597. else {
  598. void *pt = lowmem_page_address(page);
  599. unsigned long pfn = page_to_pfn(page);
  600. struct multicall_space mcs = __xen_mc_entry(0);
  601. spinlock_t *ptl;
  602. flush = 0;
  603. /*
  604. * We need to hold the pagetable lock between the time
  605. * we make the pagetable RO and when we actually pin
  606. * it. If we don't, then other users may come in and
  607. * attempt to update the pagetable by writing it,
  608. * which will fail because the memory is RO but not
  609. * pinned, so Xen won't do the trap'n'emulate.
  610. *
  611. * If we're using split pte locks, we can't hold the
  612. * entire pagetable's worth of locks during the
  613. * traverse, because we may wrap the preempt count (8
  614. * bits). The solution is to mark RO and pin each PTE
  615. * page while holding the lock. This means the number
  616. * of locks we end up holding is never more than a
  617. * batch size (~32 entries, at present).
  618. *
  619. * If we're not using split pte locks, we needn't pin
  620. * the PTE pages independently, because we're
  621. * protected by the overall pagetable lock.
  622. */
  623. ptl = NULL;
  624. if (level == PT_PTE)
  625. ptl = xen_pte_lock(page, mm);
  626. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  627. pfn_pte(pfn, PAGE_KERNEL_RO),
  628. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  629. if (ptl) {
  630. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  631. /* Queue a deferred unlock for when this batch
  632. is completed. */
  633. xen_mc_callback(xen_pte_unlock, ptl);
  634. }
  635. }
  636. return flush;
  637. }
  638. /* This is called just after a mm has been created, but it has not
  639. been used yet. We need to make sure that its pagetable is all
  640. read-only, and can be pinned. */
  641. static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
  642. {
  643. trace_xen_mmu_pgd_pin(mm, pgd);
  644. xen_mc_batch();
  645. if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
  646. /* re-enable interrupts for flushing */
  647. xen_mc_issue(0);
  648. kmap_flush_unused();
  649. xen_mc_batch();
  650. }
  651. #ifdef CONFIG_X86_64
  652. {
  653. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  654. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  655. if (user_pgd) {
  656. xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
  657. xen_do_pin(MMUEXT_PIN_L4_TABLE,
  658. PFN_DOWN(__pa(user_pgd)));
  659. }
  660. }
  661. #else /* CONFIG_X86_32 */
  662. #ifdef CONFIG_X86_PAE
  663. /* Need to make sure unshared kernel PMD is pinnable */
  664. xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  665. PT_PMD);
  666. #endif
  667. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  668. #endif /* CONFIG_X86_64 */
  669. xen_mc_issue(0);
  670. }
  671. static void xen_pgd_pin(struct mm_struct *mm)
  672. {
  673. __xen_pgd_pin(mm, mm->pgd);
  674. }
  675. /*
  676. * On save, we need to pin all pagetables to make sure they get their
  677. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  678. * them (unpinned pgds are not currently in use, probably because the
  679. * process is under construction or destruction).
  680. *
  681. * Expected to be called in stop_machine() ("equivalent to taking
  682. * every spinlock in the system"), so the locking doesn't really
  683. * matter all that much.
  684. */
  685. void xen_mm_pin_all(void)
  686. {
  687. struct page *page;
  688. spin_lock(&pgd_lock);
  689. list_for_each_entry(page, &pgd_list, lru) {
  690. if (!PagePinned(page)) {
  691. __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
  692. SetPageSavePinned(page);
  693. }
  694. }
  695. spin_unlock(&pgd_lock);
  696. }
  697. static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
  698. enum pt_level level)
  699. {
  700. SetPagePinned(page);
  701. return 0;
  702. }
  703. /*
  704. * The init_mm pagetable is really pinned as soon as its created, but
  705. * that's before we have page structures to store the bits. So do all
  706. * the book-keeping now once struct pages for allocated pages are
  707. * initialized. This happens only after free_all_bootmem() is called.
  708. */
  709. static void __init xen_after_bootmem(void)
  710. {
  711. static_branch_enable(&xen_struct_pages_ready);
  712. #ifdef CONFIG_X86_64
  713. SetPagePinned(virt_to_page(level3_user_vsyscall));
  714. #endif
  715. xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
  716. }
  717. static int xen_unpin_page(struct mm_struct *mm, struct page *page,
  718. enum pt_level level)
  719. {
  720. unsigned pgfl = TestClearPagePinned(page);
  721. if (pgfl && !PageHighMem(page)) {
  722. void *pt = lowmem_page_address(page);
  723. unsigned long pfn = page_to_pfn(page);
  724. spinlock_t *ptl = NULL;
  725. struct multicall_space mcs;
  726. /*
  727. * Do the converse to pin_page. If we're using split
  728. * pte locks, we must be holding the lock for while
  729. * the pte page is unpinned but still RO to prevent
  730. * concurrent updates from seeing it in this
  731. * partially-pinned state.
  732. */
  733. if (level == PT_PTE) {
  734. ptl = xen_pte_lock(page, mm);
  735. if (ptl)
  736. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  737. }
  738. mcs = __xen_mc_entry(0);
  739. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  740. pfn_pte(pfn, PAGE_KERNEL),
  741. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  742. if (ptl) {
  743. /* unlock when batch completed */
  744. xen_mc_callback(xen_pte_unlock, ptl);
  745. }
  746. }
  747. return 0; /* never need to flush on unpin */
  748. }
  749. /* Release a pagetables pages back as normal RW */
  750. static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
  751. {
  752. trace_xen_mmu_pgd_unpin(mm, pgd);
  753. xen_mc_batch();
  754. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  755. #ifdef CONFIG_X86_64
  756. {
  757. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  758. if (user_pgd) {
  759. xen_do_pin(MMUEXT_UNPIN_TABLE,
  760. PFN_DOWN(__pa(user_pgd)));
  761. xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
  762. }
  763. }
  764. #endif
  765. #ifdef CONFIG_X86_PAE
  766. /* Need to make sure unshared kernel PMD is unpinned */
  767. xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  768. PT_PMD);
  769. #endif
  770. __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
  771. xen_mc_issue(0);
  772. }
  773. static void xen_pgd_unpin(struct mm_struct *mm)
  774. {
  775. __xen_pgd_unpin(mm, mm->pgd);
  776. }
  777. /*
  778. * On resume, undo any pinning done at save, so that the rest of the
  779. * kernel doesn't see any unexpected pinned pagetables.
  780. */
  781. void xen_mm_unpin_all(void)
  782. {
  783. struct page *page;
  784. spin_lock(&pgd_lock);
  785. list_for_each_entry(page, &pgd_list, lru) {
  786. if (PageSavePinned(page)) {
  787. BUG_ON(!PagePinned(page));
  788. __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
  789. ClearPageSavePinned(page);
  790. }
  791. }
  792. spin_unlock(&pgd_lock);
  793. }
  794. static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  795. {
  796. spin_lock(&next->page_table_lock);
  797. xen_pgd_pin(next);
  798. spin_unlock(&next->page_table_lock);
  799. }
  800. static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  801. {
  802. spin_lock(&mm->page_table_lock);
  803. xen_pgd_pin(mm);
  804. spin_unlock(&mm->page_table_lock);
  805. }
  806. static void drop_mm_ref_this_cpu(void *info)
  807. {
  808. struct mm_struct *mm = info;
  809. if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
  810. leave_mm(smp_processor_id());
  811. /*
  812. * If this cpu still has a stale cr3 reference, then make sure
  813. * it has been flushed.
  814. */
  815. if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
  816. xen_mc_flush();
  817. }
  818. #ifdef CONFIG_SMP
  819. /*
  820. * Another cpu may still have their %cr3 pointing at the pagetable, so
  821. * we need to repoint it somewhere else before we can unpin it.
  822. */
  823. static void xen_drop_mm_ref(struct mm_struct *mm)
  824. {
  825. cpumask_var_t mask;
  826. unsigned cpu;
  827. drop_mm_ref_this_cpu(mm);
  828. /* Get the "official" set of cpus referring to our pagetable. */
  829. if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
  830. for_each_online_cpu(cpu) {
  831. if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
  832. continue;
  833. smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
  834. }
  835. return;
  836. }
  837. /*
  838. * It's possible that a vcpu may have a stale reference to our
  839. * cr3, because its in lazy mode, and it hasn't yet flushed
  840. * its set of pending hypercalls yet. In this case, we can
  841. * look at its actual current cr3 value, and force it to flush
  842. * if needed.
  843. */
  844. cpumask_clear(mask);
  845. for_each_online_cpu(cpu) {
  846. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  847. cpumask_set_cpu(cpu, mask);
  848. }
  849. smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
  850. free_cpumask_var(mask);
  851. }
  852. #else
  853. static void xen_drop_mm_ref(struct mm_struct *mm)
  854. {
  855. drop_mm_ref_this_cpu(mm);
  856. }
  857. #endif
  858. /*
  859. * While a process runs, Xen pins its pagetables, which means that the
  860. * hypervisor forces it to be read-only, and it controls all updates
  861. * to it. This means that all pagetable updates have to go via the
  862. * hypervisor, which is moderately expensive.
  863. *
  864. * Since we're pulling the pagetable down, we switch to use init_mm,
  865. * unpin old process pagetable and mark it all read-write, which
  866. * allows further operations on it to be simple memory accesses.
  867. *
  868. * The only subtle point is that another CPU may be still using the
  869. * pagetable because of lazy tlb flushing. This means we need need to
  870. * switch all CPUs off this pagetable before we can unpin it.
  871. */
  872. static void xen_exit_mmap(struct mm_struct *mm)
  873. {
  874. get_cpu(); /* make sure we don't move around */
  875. xen_drop_mm_ref(mm);
  876. put_cpu();
  877. spin_lock(&mm->page_table_lock);
  878. /* pgd may not be pinned in the error exit path of execve */
  879. if (xen_page_pinned(mm->pgd))
  880. xen_pgd_unpin(mm);
  881. spin_unlock(&mm->page_table_lock);
  882. }
  883. static void xen_post_allocator_init(void);
  884. static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  885. {
  886. struct mmuext_op op;
  887. op.cmd = cmd;
  888. op.arg1.mfn = pfn_to_mfn(pfn);
  889. if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
  890. BUG();
  891. }
  892. #ifdef CONFIG_X86_64
  893. static void __init xen_cleanhighmap(unsigned long vaddr,
  894. unsigned long vaddr_end)
  895. {
  896. unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  897. pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
  898. /* NOTE: The loop is more greedy than the cleanup_highmap variant.
  899. * We include the PMD passed in on _both_ boundaries. */
  900. for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
  901. pmd++, vaddr += PMD_SIZE) {
  902. if (pmd_none(*pmd))
  903. continue;
  904. if (vaddr < (unsigned long) _text || vaddr > kernel_end)
  905. set_pmd(pmd, __pmd(0));
  906. }
  907. /* In case we did something silly, we should crash in this function
  908. * instead of somewhere later and be confusing. */
  909. xen_mc_flush();
  910. }
  911. /*
  912. * Make a page range writeable and free it.
  913. */
  914. static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
  915. {
  916. void *vaddr = __va(paddr);
  917. void *vaddr_end = vaddr + size;
  918. for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
  919. make_lowmem_page_readwrite(vaddr);
  920. memblock_free(paddr, size);
  921. }
  922. static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
  923. {
  924. unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
  925. if (unpin)
  926. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
  927. ClearPagePinned(virt_to_page(__va(pa)));
  928. xen_free_ro_pages(pa, PAGE_SIZE);
  929. }
  930. static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
  931. {
  932. unsigned long pa;
  933. pte_t *pte_tbl;
  934. int i;
  935. if (pmd_large(*pmd)) {
  936. pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
  937. xen_free_ro_pages(pa, PMD_SIZE);
  938. return;
  939. }
  940. pte_tbl = pte_offset_kernel(pmd, 0);
  941. for (i = 0; i < PTRS_PER_PTE; i++) {
  942. if (pte_none(pte_tbl[i]))
  943. continue;
  944. pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
  945. xen_free_ro_pages(pa, PAGE_SIZE);
  946. }
  947. set_pmd(pmd, __pmd(0));
  948. xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
  949. }
  950. static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
  951. {
  952. unsigned long pa;
  953. pmd_t *pmd_tbl;
  954. int i;
  955. if (pud_large(*pud)) {
  956. pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
  957. xen_free_ro_pages(pa, PUD_SIZE);
  958. return;
  959. }
  960. pmd_tbl = pmd_offset(pud, 0);
  961. for (i = 0; i < PTRS_PER_PMD; i++) {
  962. if (pmd_none(pmd_tbl[i]))
  963. continue;
  964. xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
  965. }
  966. set_pud(pud, __pud(0));
  967. xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
  968. }
  969. static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
  970. {
  971. unsigned long pa;
  972. pud_t *pud_tbl;
  973. int i;
  974. if (p4d_large(*p4d)) {
  975. pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
  976. xen_free_ro_pages(pa, P4D_SIZE);
  977. return;
  978. }
  979. pud_tbl = pud_offset(p4d, 0);
  980. for (i = 0; i < PTRS_PER_PUD; i++) {
  981. if (pud_none(pud_tbl[i]))
  982. continue;
  983. xen_cleanmfnmap_pud(pud_tbl + i, unpin);
  984. }
  985. set_p4d(p4d, __p4d(0));
  986. xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
  987. }
  988. /*
  989. * Since it is well isolated we can (and since it is perhaps large we should)
  990. * also free the page tables mapping the initial P->M table.
  991. */
  992. static void __init xen_cleanmfnmap(unsigned long vaddr)
  993. {
  994. pgd_t *pgd;
  995. p4d_t *p4d;
  996. bool unpin;
  997. unpin = (vaddr == 2 * PGDIR_SIZE);
  998. vaddr &= PMD_MASK;
  999. pgd = pgd_offset_k(vaddr);
  1000. p4d = p4d_offset(pgd, 0);
  1001. if (!p4d_none(*p4d))
  1002. xen_cleanmfnmap_p4d(p4d, unpin);
  1003. }
  1004. static void __init xen_pagetable_p2m_free(void)
  1005. {
  1006. unsigned long size;
  1007. unsigned long addr;
  1008. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  1009. /* No memory or already called. */
  1010. if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
  1011. return;
  1012. /* using __ka address and sticking INVALID_P2M_ENTRY! */
  1013. memset((void *)xen_start_info->mfn_list, 0xff, size);
  1014. addr = xen_start_info->mfn_list;
  1015. /*
  1016. * We could be in __ka space.
  1017. * We roundup to the PMD, which means that if anybody at this stage is
  1018. * using the __ka address of xen_start_info or
  1019. * xen_start_info->shared_info they are in going to crash. Fortunatly
  1020. * we have already revectored in xen_setup_kernel_pagetable.
  1021. */
  1022. size = roundup(size, PMD_SIZE);
  1023. if (addr >= __START_KERNEL_map) {
  1024. xen_cleanhighmap(addr, addr + size);
  1025. size = PAGE_ALIGN(xen_start_info->nr_pages *
  1026. sizeof(unsigned long));
  1027. memblock_free(__pa(addr), size);
  1028. } else {
  1029. xen_cleanmfnmap(addr);
  1030. }
  1031. }
  1032. static void __init xen_pagetable_cleanhighmap(void)
  1033. {
  1034. unsigned long size;
  1035. unsigned long addr;
  1036. /* At this stage, cleanup_highmap has already cleaned __ka space
  1037. * from _brk_limit way up to the max_pfn_mapped (which is the end of
  1038. * the ramdisk). We continue on, erasing PMD entries that point to page
  1039. * tables - do note that they are accessible at this stage via __va.
  1040. * As Xen is aligning the memory end to a 4MB boundary, for good
  1041. * measure we also round up to PMD_SIZE * 2 - which means that if
  1042. * anybody is using __ka address to the initial boot-stack - and try
  1043. * to use it - they are going to crash. The xen_start_info has been
  1044. * taken care of already in xen_setup_kernel_pagetable. */
  1045. addr = xen_start_info->pt_base;
  1046. size = xen_start_info->nr_pt_frames * PAGE_SIZE;
  1047. xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
  1048. xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
  1049. }
  1050. #endif
  1051. static void __init xen_pagetable_p2m_setup(void)
  1052. {
  1053. xen_vmalloc_p2m_tree();
  1054. #ifdef CONFIG_X86_64
  1055. xen_pagetable_p2m_free();
  1056. xen_pagetable_cleanhighmap();
  1057. #endif
  1058. /* And revector! Bye bye old array */
  1059. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1060. }
  1061. static void __init xen_pagetable_init(void)
  1062. {
  1063. paging_init();
  1064. xen_post_allocator_init();
  1065. xen_pagetable_p2m_setup();
  1066. /* Allocate and initialize top and mid mfn levels for p2m structure */
  1067. xen_build_mfn_list_list();
  1068. /* Remap memory freed due to conflicts with E820 map */
  1069. xen_remap_memory();
  1070. xen_setup_mfn_list_list();
  1071. }
  1072. static void xen_write_cr2(unsigned long cr2)
  1073. {
  1074. this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
  1075. }
  1076. static unsigned long xen_read_cr2(void)
  1077. {
  1078. return this_cpu_read(xen_vcpu)->arch.cr2;
  1079. }
  1080. unsigned long xen_read_cr2_direct(void)
  1081. {
  1082. return this_cpu_read(xen_vcpu_info.arch.cr2);
  1083. }
  1084. static noinline void xen_flush_tlb(void)
  1085. {
  1086. struct mmuext_op *op;
  1087. struct multicall_space mcs;
  1088. preempt_disable();
  1089. mcs = xen_mc_entry(sizeof(*op));
  1090. op = mcs.args;
  1091. op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
  1092. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1093. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1094. preempt_enable();
  1095. }
  1096. static void xen_flush_tlb_one_user(unsigned long addr)
  1097. {
  1098. struct mmuext_op *op;
  1099. struct multicall_space mcs;
  1100. trace_xen_mmu_flush_tlb_one_user(addr);
  1101. preempt_disable();
  1102. mcs = xen_mc_entry(sizeof(*op));
  1103. op = mcs.args;
  1104. op->cmd = MMUEXT_INVLPG_LOCAL;
  1105. op->arg1.linear_addr = addr & PAGE_MASK;
  1106. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1107. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1108. preempt_enable();
  1109. }
  1110. static void xen_flush_tlb_others(const struct cpumask *cpus,
  1111. const struct flush_tlb_info *info)
  1112. {
  1113. struct {
  1114. struct mmuext_op op;
  1115. DECLARE_BITMAP(mask, NR_CPUS);
  1116. } *args;
  1117. struct multicall_space mcs;
  1118. const size_t mc_entry_size = sizeof(args->op) +
  1119. sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
  1120. trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
  1121. if (cpumask_empty(cpus))
  1122. return; /* nothing to do */
  1123. mcs = xen_mc_entry(mc_entry_size);
  1124. args = mcs.args;
  1125. args->op.arg2.vcpumask = to_cpumask(args->mask);
  1126. /* Remove us, and any offline CPUS. */
  1127. cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
  1128. cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
  1129. args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
  1130. if (info->end != TLB_FLUSH_ALL &&
  1131. (info->end - info->start) <= PAGE_SIZE) {
  1132. args->op.cmd = MMUEXT_INVLPG_MULTI;
  1133. args->op.arg1.linear_addr = info->start;
  1134. }
  1135. MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
  1136. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1137. }
  1138. static unsigned long xen_read_cr3(void)
  1139. {
  1140. return this_cpu_read(xen_cr3);
  1141. }
  1142. static void set_current_cr3(void *v)
  1143. {
  1144. this_cpu_write(xen_current_cr3, (unsigned long)v);
  1145. }
  1146. static void __xen_write_cr3(bool kernel, unsigned long cr3)
  1147. {
  1148. struct mmuext_op op;
  1149. unsigned long mfn;
  1150. trace_xen_mmu_write_cr3(kernel, cr3);
  1151. if (cr3)
  1152. mfn = pfn_to_mfn(PFN_DOWN(cr3));
  1153. else
  1154. mfn = 0;
  1155. WARN_ON(mfn == 0 && kernel);
  1156. op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
  1157. op.arg1.mfn = mfn;
  1158. xen_extend_mmuext_op(&op);
  1159. if (kernel) {
  1160. this_cpu_write(xen_cr3, cr3);
  1161. /* Update xen_current_cr3 once the batch has actually
  1162. been submitted. */
  1163. xen_mc_callback(set_current_cr3, (void *)cr3);
  1164. }
  1165. }
  1166. static void xen_write_cr3(unsigned long cr3)
  1167. {
  1168. BUG_ON(preemptible());
  1169. xen_mc_batch(); /* disables interrupts */
  1170. /* Update while interrupts are disabled, so its atomic with
  1171. respect to ipis */
  1172. this_cpu_write(xen_cr3, cr3);
  1173. __xen_write_cr3(true, cr3);
  1174. #ifdef CONFIG_X86_64
  1175. {
  1176. pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
  1177. if (user_pgd)
  1178. __xen_write_cr3(false, __pa(user_pgd));
  1179. else
  1180. __xen_write_cr3(false, 0);
  1181. }
  1182. #endif
  1183. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1184. }
  1185. #ifdef CONFIG_X86_64
  1186. /*
  1187. * At the start of the day - when Xen launches a guest, it has already
  1188. * built pagetables for the guest. We diligently look over them
  1189. * in xen_setup_kernel_pagetable and graft as appropriate them in the
  1190. * init_top_pgt and its friends. Then when we are happy we load
  1191. * the new init_top_pgt - and continue on.
  1192. *
  1193. * The generic code starts (start_kernel) and 'init_mem_mapping' sets
  1194. * up the rest of the pagetables. When it has completed it loads the cr3.
  1195. * N.B. that baremetal would start at 'start_kernel' (and the early
  1196. * #PF handler would create bootstrap pagetables) - so we are running
  1197. * with the same assumptions as what to do when write_cr3 is executed
  1198. * at this point.
  1199. *
  1200. * Since there are no user-page tables at all, we have two variants
  1201. * of xen_write_cr3 - the early bootup (this one), and the late one
  1202. * (xen_write_cr3). The reason we have to do that is that in 64-bit
  1203. * the Linux kernel and user-space are both in ring 3 while the
  1204. * hypervisor is in ring 0.
  1205. */
  1206. static void __init xen_write_cr3_init(unsigned long cr3)
  1207. {
  1208. BUG_ON(preemptible());
  1209. xen_mc_batch(); /* disables interrupts */
  1210. /* Update while interrupts are disabled, so its atomic with
  1211. respect to ipis */
  1212. this_cpu_write(xen_cr3, cr3);
  1213. __xen_write_cr3(true, cr3);
  1214. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1215. }
  1216. #endif
  1217. static int xen_pgd_alloc(struct mm_struct *mm)
  1218. {
  1219. pgd_t *pgd = mm->pgd;
  1220. int ret = 0;
  1221. BUG_ON(PagePinned(virt_to_page(pgd)));
  1222. #ifdef CONFIG_X86_64
  1223. {
  1224. struct page *page = virt_to_page(pgd);
  1225. pgd_t *user_pgd;
  1226. BUG_ON(page->private != 0);
  1227. ret = -ENOMEM;
  1228. user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1229. page->private = (unsigned long)user_pgd;
  1230. if (user_pgd != NULL) {
  1231. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1232. user_pgd[pgd_index(VSYSCALL_ADDR)] =
  1233. __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
  1234. #endif
  1235. ret = 0;
  1236. }
  1237. BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
  1238. }
  1239. #endif
  1240. return ret;
  1241. }
  1242. static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
  1243. {
  1244. #ifdef CONFIG_X86_64
  1245. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  1246. if (user_pgd)
  1247. free_page((unsigned long)user_pgd);
  1248. #endif
  1249. }
  1250. /*
  1251. * Init-time set_pte while constructing initial pagetables, which
  1252. * doesn't allow RO page table pages to be remapped RW.
  1253. *
  1254. * If there is no MFN for this PFN then this page is initially
  1255. * ballooned out so clear the PTE (as in decrease_reservation() in
  1256. * drivers/xen/balloon.c).
  1257. *
  1258. * Many of these PTE updates are done on unpinned and writable pages
  1259. * and doing a hypercall for these is unnecessary and expensive. At
  1260. * this point it is not possible to tell if a page is pinned or not,
  1261. * so always write the PTE directly and rely on Xen trapping and
  1262. * emulating any updates as necessary.
  1263. */
  1264. __visible pte_t xen_make_pte_init(pteval_t pte)
  1265. {
  1266. #ifdef CONFIG_X86_64
  1267. unsigned long pfn;
  1268. /*
  1269. * Pages belonging to the initial p2m list mapped outside the default
  1270. * address range must be mapped read-only. This region contains the
  1271. * page tables for mapping the p2m list, too, and page tables MUST be
  1272. * mapped read-only.
  1273. */
  1274. pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
  1275. if (xen_start_info->mfn_list < __START_KERNEL_map &&
  1276. pfn >= xen_start_info->first_p2m_pfn &&
  1277. pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
  1278. pte &= ~_PAGE_RW;
  1279. #endif
  1280. pte = pte_pfn_to_mfn(pte);
  1281. return native_make_pte(pte);
  1282. }
  1283. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
  1284. static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
  1285. {
  1286. #ifdef CONFIG_X86_32
  1287. /* If there's an existing pte, then don't allow _PAGE_RW to be set */
  1288. if (pte_mfn(pte) != INVALID_P2M_ENTRY
  1289. && pte_val_ma(*ptep) & _PAGE_PRESENT)
  1290. pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
  1291. pte_val_ma(pte));
  1292. #endif
  1293. __xen_set_pte(ptep, pte);
  1294. }
  1295. /* Early in boot, while setting up the initial pagetable, assume
  1296. everything is pinned. */
  1297. static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
  1298. {
  1299. #ifdef CONFIG_FLATMEM
  1300. BUG_ON(mem_map); /* should only be used early */
  1301. #endif
  1302. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1303. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1304. }
  1305. /* Used for pmd and pud */
  1306. static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
  1307. {
  1308. #ifdef CONFIG_FLATMEM
  1309. BUG_ON(mem_map); /* should only be used early */
  1310. #endif
  1311. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1312. }
  1313. /* Early release_pte assumes that all pts are pinned, since there's
  1314. only init_mm and anything attached to that is pinned. */
  1315. static void __init xen_release_pte_init(unsigned long pfn)
  1316. {
  1317. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1318. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1319. }
  1320. static void __init xen_release_pmd_init(unsigned long pfn)
  1321. {
  1322. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1323. }
  1324. static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  1325. {
  1326. struct multicall_space mcs;
  1327. struct mmuext_op *op;
  1328. mcs = __xen_mc_entry(sizeof(*op));
  1329. op = mcs.args;
  1330. op->cmd = cmd;
  1331. op->arg1.mfn = pfn_to_mfn(pfn);
  1332. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  1333. }
  1334. static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
  1335. {
  1336. struct multicall_space mcs;
  1337. unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
  1338. mcs = __xen_mc_entry(0);
  1339. MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
  1340. pfn_pte(pfn, prot), 0);
  1341. }
  1342. /* This needs to make sure the new pte page is pinned iff its being
  1343. attached to a pinned pagetable. */
  1344. static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
  1345. unsigned level)
  1346. {
  1347. bool pinned = xen_page_pinned(mm->pgd);
  1348. trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
  1349. if (pinned) {
  1350. struct page *page = pfn_to_page(pfn);
  1351. if (static_branch_likely(&xen_struct_pages_ready))
  1352. SetPagePinned(page);
  1353. if (!PageHighMem(page)) {
  1354. xen_mc_batch();
  1355. __set_pfn_prot(pfn, PAGE_KERNEL_RO);
  1356. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1357. __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1358. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1359. } else {
  1360. /* make sure there are no stray mappings of
  1361. this page */
  1362. kmap_flush_unused();
  1363. }
  1364. }
  1365. }
  1366. static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
  1367. {
  1368. xen_alloc_ptpage(mm, pfn, PT_PTE);
  1369. }
  1370. static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
  1371. {
  1372. xen_alloc_ptpage(mm, pfn, PT_PMD);
  1373. }
  1374. /* This should never happen until we're OK to use struct page */
  1375. static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
  1376. {
  1377. struct page *page = pfn_to_page(pfn);
  1378. bool pinned = PagePinned(page);
  1379. trace_xen_mmu_release_ptpage(pfn, level, pinned);
  1380. if (pinned) {
  1381. if (!PageHighMem(page)) {
  1382. xen_mc_batch();
  1383. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1384. __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1385. __set_pfn_prot(pfn, PAGE_KERNEL);
  1386. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1387. }
  1388. ClearPagePinned(page);
  1389. }
  1390. }
  1391. static void xen_release_pte(unsigned long pfn)
  1392. {
  1393. xen_release_ptpage(pfn, PT_PTE);
  1394. }
  1395. static void xen_release_pmd(unsigned long pfn)
  1396. {
  1397. xen_release_ptpage(pfn, PT_PMD);
  1398. }
  1399. #ifdef CONFIG_X86_64
  1400. static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
  1401. {
  1402. xen_alloc_ptpage(mm, pfn, PT_PUD);
  1403. }
  1404. static void xen_release_pud(unsigned long pfn)
  1405. {
  1406. xen_release_ptpage(pfn, PT_PUD);
  1407. }
  1408. #endif
  1409. void __init xen_reserve_top(void)
  1410. {
  1411. #ifdef CONFIG_X86_32
  1412. unsigned long top = HYPERVISOR_VIRT_START;
  1413. struct xen_platform_parameters pp;
  1414. if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
  1415. top = pp.virt_start;
  1416. reserve_top_address(-top);
  1417. #endif /* CONFIG_X86_32 */
  1418. }
  1419. /*
  1420. * Like __va(), but returns address in the kernel mapping (which is
  1421. * all we have until the physical memory mapping has been set up.
  1422. */
  1423. static void * __init __ka(phys_addr_t paddr)
  1424. {
  1425. #ifdef CONFIG_X86_64
  1426. return (void *)(paddr + __START_KERNEL_map);
  1427. #else
  1428. return __va(paddr);
  1429. #endif
  1430. }
  1431. /* Convert a machine address to physical address */
  1432. static unsigned long __init m2p(phys_addr_t maddr)
  1433. {
  1434. phys_addr_t paddr;
  1435. maddr &= XEN_PTE_MFN_MASK;
  1436. paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
  1437. return paddr;
  1438. }
  1439. /* Convert a machine address to kernel virtual */
  1440. static void * __init m2v(phys_addr_t maddr)
  1441. {
  1442. return __ka(m2p(maddr));
  1443. }
  1444. /* Set the page permissions on an identity-mapped pages */
  1445. static void __init set_page_prot_flags(void *addr, pgprot_t prot,
  1446. unsigned long flags)
  1447. {
  1448. unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
  1449. pte_t pte = pfn_pte(pfn, prot);
  1450. if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
  1451. BUG();
  1452. }
  1453. static void __init set_page_prot(void *addr, pgprot_t prot)
  1454. {
  1455. return set_page_prot_flags(addr, prot, UVMF_NONE);
  1456. }
  1457. #ifdef CONFIG_X86_32
  1458. static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
  1459. {
  1460. unsigned pmdidx, pteidx;
  1461. unsigned ident_pte;
  1462. unsigned long pfn;
  1463. level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
  1464. PAGE_SIZE);
  1465. ident_pte = 0;
  1466. pfn = 0;
  1467. for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
  1468. pte_t *pte_page;
  1469. /* Reuse or allocate a page of ptes */
  1470. if (pmd_present(pmd[pmdidx]))
  1471. pte_page = m2v(pmd[pmdidx].pmd);
  1472. else {
  1473. /* Check for free pte pages */
  1474. if (ident_pte == LEVEL1_IDENT_ENTRIES)
  1475. break;
  1476. pte_page = &level1_ident_pgt[ident_pte];
  1477. ident_pte += PTRS_PER_PTE;
  1478. pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
  1479. }
  1480. /* Install mappings */
  1481. for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
  1482. pte_t pte;
  1483. if (pfn > max_pfn_mapped)
  1484. max_pfn_mapped = pfn;
  1485. if (!pte_none(pte_page[pteidx]))
  1486. continue;
  1487. pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
  1488. pte_page[pteidx] = pte;
  1489. }
  1490. }
  1491. for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
  1492. set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
  1493. set_page_prot(pmd, PAGE_KERNEL_RO);
  1494. }
  1495. #endif
  1496. void __init xen_setup_machphys_mapping(void)
  1497. {
  1498. struct xen_machphys_mapping mapping;
  1499. if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
  1500. machine_to_phys_mapping = (unsigned long *)mapping.v_start;
  1501. machine_to_phys_nr = mapping.max_mfn + 1;
  1502. } else {
  1503. machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
  1504. }
  1505. #ifdef CONFIG_X86_32
  1506. WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
  1507. < machine_to_phys_mapping);
  1508. #endif
  1509. }
  1510. #ifdef CONFIG_X86_64
  1511. static void __init convert_pfn_mfn(void *v)
  1512. {
  1513. pte_t *pte = v;
  1514. int i;
  1515. /* All levels are converted the same way, so just treat them
  1516. as ptes. */
  1517. for (i = 0; i < PTRS_PER_PTE; i++)
  1518. pte[i] = xen_make_pte(pte[i].pte);
  1519. }
  1520. static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
  1521. unsigned long addr)
  1522. {
  1523. if (*pt_base == PFN_DOWN(__pa(addr))) {
  1524. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1525. clear_page((void *)addr);
  1526. (*pt_base)++;
  1527. }
  1528. if (*pt_end == PFN_DOWN(__pa(addr))) {
  1529. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1530. clear_page((void *)addr);
  1531. (*pt_end)--;
  1532. }
  1533. }
  1534. /*
  1535. * Set up the initial kernel pagetable.
  1536. *
  1537. * We can construct this by grafting the Xen provided pagetable into
  1538. * head_64.S's preconstructed pagetables. We copy the Xen L2's into
  1539. * level2_ident_pgt, and level2_kernel_pgt. This means that only the
  1540. * kernel has a physical mapping to start with - but that's enough to
  1541. * get __va working. We need to fill in the rest of the physical
  1542. * mapping once some sort of allocator has been set up.
  1543. */
  1544. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1545. {
  1546. pud_t *l3;
  1547. pmd_t *l2;
  1548. unsigned long addr[3];
  1549. unsigned long pt_base, pt_end;
  1550. unsigned i;
  1551. /* max_pfn_mapped is the last pfn mapped in the initial memory
  1552. * mappings. Considering that on Xen after the kernel mappings we
  1553. * have the mappings of some pages that don't exist in pfn space, we
  1554. * set max_pfn_mapped to the last real pfn mapped. */
  1555. if (xen_start_info->mfn_list < __START_KERNEL_map)
  1556. max_pfn_mapped = xen_start_info->first_p2m_pfn;
  1557. else
  1558. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
  1559. pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
  1560. pt_end = pt_base + xen_start_info->nr_pt_frames;
  1561. /* Zap identity mapping */
  1562. init_top_pgt[0] = __pgd(0);
  1563. /* Pre-constructed entries are in pfn, so convert to mfn */
  1564. /* L4[273] -> level3_ident_pgt */
  1565. /* L4[511] -> level3_kernel_pgt */
  1566. convert_pfn_mfn(init_top_pgt);
  1567. /* L3_i[0] -> level2_ident_pgt */
  1568. convert_pfn_mfn(level3_ident_pgt);
  1569. /* L3_k[510] -> level2_kernel_pgt */
  1570. /* L3_k[511] -> level2_fixmap_pgt */
  1571. convert_pfn_mfn(level3_kernel_pgt);
  1572. /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
  1573. convert_pfn_mfn(level2_fixmap_pgt);
  1574. /* We get [511][511] and have Xen's version of level2_kernel_pgt */
  1575. l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
  1576. l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
  1577. addr[0] = (unsigned long)pgd;
  1578. addr[1] = (unsigned long)l3;
  1579. addr[2] = (unsigned long)l2;
  1580. /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
  1581. * Both L4[273][0] and L4[511][510] have entries that point to the same
  1582. * L2 (PMD) tables. Meaning that if you modify it in __va space
  1583. * it will be also modified in the __ka space! (But if you just
  1584. * modify the PMD table to point to other PTE's or none, then you
  1585. * are OK - which is what cleanup_highmap does) */
  1586. copy_page(level2_ident_pgt, l2);
  1587. /* Graft it onto L4[511][510] */
  1588. copy_page(level2_kernel_pgt, l2);
  1589. /*
  1590. * Zap execute permission from the ident map. Due to the sharing of
  1591. * L1 entries we need to do this in the L2.
  1592. */
  1593. if (__supported_pte_mask & _PAGE_NX) {
  1594. for (i = 0; i < PTRS_PER_PMD; ++i) {
  1595. if (pmd_none(level2_ident_pgt[i]))
  1596. continue;
  1597. level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
  1598. }
  1599. }
  1600. /* Copy the initial P->M table mappings if necessary. */
  1601. i = pgd_index(xen_start_info->mfn_list);
  1602. if (i && i < pgd_index(__START_KERNEL_map))
  1603. init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
  1604. /* Make pagetable pieces RO */
  1605. set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
  1606. set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
  1607. set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
  1608. set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
  1609. set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
  1610. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1611. set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
  1612. for (i = 0; i < FIXMAP_PMD_NUM; i++) {
  1613. set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
  1614. PAGE_KERNEL_RO);
  1615. }
  1616. /* Pin down new L4 */
  1617. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
  1618. PFN_DOWN(__pa_symbol(init_top_pgt)));
  1619. /* Unpin Xen-provided one */
  1620. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1621. /*
  1622. * At this stage there can be no user pgd, and no page structure to
  1623. * attach it to, so make sure we just set kernel pgd.
  1624. */
  1625. xen_mc_batch();
  1626. __xen_write_cr3(true, __pa(init_top_pgt));
  1627. xen_mc_issue(PARAVIRT_LAZY_CPU);
  1628. /* We can't that easily rip out L3 and L2, as the Xen pagetables are
  1629. * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
  1630. * the initial domain. For guests using the toolstack, they are in:
  1631. * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
  1632. * rip out the [L4] (pgd), but for guests we shave off three pages.
  1633. */
  1634. for (i = 0; i < ARRAY_SIZE(addr); i++)
  1635. check_pt_base(&pt_base, &pt_end, addr[i]);
  1636. /* Our (by three pages) smaller Xen pagetable that we are using */
  1637. xen_pt_base = PFN_PHYS(pt_base);
  1638. xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
  1639. memblock_reserve(xen_pt_base, xen_pt_size);
  1640. /* Revector the xen_start_info */
  1641. xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
  1642. }
  1643. /*
  1644. * Read a value from a physical address.
  1645. */
  1646. static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
  1647. {
  1648. unsigned long *vaddr;
  1649. unsigned long val;
  1650. vaddr = early_memremap_ro(addr, sizeof(val));
  1651. val = *vaddr;
  1652. early_memunmap(vaddr, sizeof(val));
  1653. return val;
  1654. }
  1655. /*
  1656. * Translate a virtual address to a physical one without relying on mapped
  1657. * page tables. Don't rely on big pages being aligned in (guest) physical
  1658. * space!
  1659. */
  1660. static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
  1661. {
  1662. phys_addr_t pa;
  1663. pgd_t pgd;
  1664. pud_t pud;
  1665. pmd_t pmd;
  1666. pte_t pte;
  1667. pa = read_cr3_pa();
  1668. pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
  1669. sizeof(pgd)));
  1670. if (!pgd_present(pgd))
  1671. return 0;
  1672. pa = pgd_val(pgd) & PTE_PFN_MASK;
  1673. pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
  1674. sizeof(pud)));
  1675. if (!pud_present(pud))
  1676. return 0;
  1677. pa = pud_val(pud) & PTE_PFN_MASK;
  1678. if (pud_large(pud))
  1679. return pa + (vaddr & ~PUD_MASK);
  1680. pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
  1681. sizeof(pmd)));
  1682. if (!pmd_present(pmd))
  1683. return 0;
  1684. pa = pmd_val(pmd) & PTE_PFN_MASK;
  1685. if (pmd_large(pmd))
  1686. return pa + (vaddr & ~PMD_MASK);
  1687. pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
  1688. sizeof(pte)));
  1689. if (!pte_present(pte))
  1690. return 0;
  1691. pa = pte_pfn(pte) << PAGE_SHIFT;
  1692. return pa | (vaddr & ~PAGE_MASK);
  1693. }
  1694. /*
  1695. * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
  1696. * this area.
  1697. */
  1698. void __init xen_relocate_p2m(void)
  1699. {
  1700. phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
  1701. unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
  1702. int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
  1703. pte_t *pt;
  1704. pmd_t *pmd;
  1705. pud_t *pud;
  1706. pgd_t *pgd;
  1707. unsigned long *new_p2m;
  1708. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  1709. n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
  1710. n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
  1711. n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
  1712. n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
  1713. n_frames = n_pte + n_pt + n_pmd + n_pud;
  1714. new_area = xen_find_free_area(PFN_PHYS(n_frames));
  1715. if (!new_area) {
  1716. xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
  1717. BUG();
  1718. }
  1719. /*
  1720. * Setup the page tables for addressing the new p2m list.
  1721. * We have asked the hypervisor to map the p2m list at the user address
  1722. * PUD_SIZE. It may have done so, or it may have used a kernel space
  1723. * address depending on the Xen version.
  1724. * To avoid any possible virtual address collision, just use
  1725. * 2 * PUD_SIZE for the new area.
  1726. */
  1727. pud_phys = new_area;
  1728. pmd_phys = pud_phys + PFN_PHYS(n_pud);
  1729. pt_phys = pmd_phys + PFN_PHYS(n_pmd);
  1730. p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
  1731. pgd = __va(read_cr3_pa());
  1732. new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
  1733. for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
  1734. pud = early_memremap(pud_phys, PAGE_SIZE);
  1735. clear_page(pud);
  1736. for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
  1737. idx_pmd++) {
  1738. pmd = early_memremap(pmd_phys, PAGE_SIZE);
  1739. clear_page(pmd);
  1740. for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
  1741. idx_pt++) {
  1742. pt = early_memremap(pt_phys, PAGE_SIZE);
  1743. clear_page(pt);
  1744. for (idx_pte = 0;
  1745. idx_pte < min(n_pte, PTRS_PER_PTE);
  1746. idx_pte++) {
  1747. pt[idx_pte] = pfn_pte(p2m_pfn,
  1748. PAGE_KERNEL);
  1749. p2m_pfn++;
  1750. }
  1751. n_pte -= PTRS_PER_PTE;
  1752. early_memunmap(pt, PAGE_SIZE);
  1753. make_lowmem_page_readonly(__va(pt_phys));
  1754. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
  1755. PFN_DOWN(pt_phys));
  1756. pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
  1757. pt_phys += PAGE_SIZE;
  1758. }
  1759. n_pt -= PTRS_PER_PMD;
  1760. early_memunmap(pmd, PAGE_SIZE);
  1761. make_lowmem_page_readonly(__va(pmd_phys));
  1762. pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
  1763. PFN_DOWN(pmd_phys));
  1764. pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
  1765. pmd_phys += PAGE_SIZE;
  1766. }
  1767. n_pmd -= PTRS_PER_PUD;
  1768. early_memunmap(pud, PAGE_SIZE);
  1769. make_lowmem_page_readonly(__va(pud_phys));
  1770. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
  1771. set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
  1772. pud_phys += PAGE_SIZE;
  1773. }
  1774. /* Now copy the old p2m info to the new area. */
  1775. memcpy(new_p2m, xen_p2m_addr, size);
  1776. xen_p2m_addr = new_p2m;
  1777. /* Release the old p2m list and set new list info. */
  1778. p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
  1779. BUG_ON(!p2m_pfn);
  1780. p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
  1781. if (xen_start_info->mfn_list < __START_KERNEL_map) {
  1782. pfn = xen_start_info->first_p2m_pfn;
  1783. pfn_end = xen_start_info->first_p2m_pfn +
  1784. xen_start_info->nr_p2m_frames;
  1785. set_pgd(pgd + 1, __pgd(0));
  1786. } else {
  1787. pfn = p2m_pfn;
  1788. pfn_end = p2m_pfn_end;
  1789. }
  1790. memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
  1791. while (pfn < pfn_end) {
  1792. if (pfn == p2m_pfn) {
  1793. pfn = p2m_pfn_end;
  1794. continue;
  1795. }
  1796. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1797. pfn++;
  1798. }
  1799. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1800. xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
  1801. xen_start_info->nr_p2m_frames = n_frames;
  1802. }
  1803. #else /* !CONFIG_X86_64 */
  1804. static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
  1805. static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
  1806. RESERVE_BRK(fixup_kernel_pmd, PAGE_SIZE);
  1807. RESERVE_BRK(fixup_kernel_pte, PAGE_SIZE);
  1808. static void __init xen_write_cr3_init(unsigned long cr3)
  1809. {
  1810. unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
  1811. BUG_ON(read_cr3_pa() != __pa(initial_page_table));
  1812. BUG_ON(cr3 != __pa(swapper_pg_dir));
  1813. /*
  1814. * We are switching to swapper_pg_dir for the first time (from
  1815. * initial_page_table) and therefore need to mark that page
  1816. * read-only and then pin it.
  1817. *
  1818. * Xen disallows sharing of kernel PMDs for PAE
  1819. * guests. Therefore we must copy the kernel PMD from
  1820. * initial_page_table into a new kernel PMD to be used in
  1821. * swapper_pg_dir.
  1822. */
  1823. swapper_kernel_pmd =
  1824. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1825. copy_page(swapper_kernel_pmd, initial_kernel_pmd);
  1826. swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
  1827. __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
  1828. set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
  1829. set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
  1830. xen_write_cr3(cr3);
  1831. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
  1832. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
  1833. PFN_DOWN(__pa(initial_page_table)));
  1834. set_page_prot(initial_page_table, PAGE_KERNEL);
  1835. set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
  1836. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1837. }
  1838. /*
  1839. * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
  1840. * not the first page table in the page table pool.
  1841. * Iterate through the initial page tables to find the real page table base.
  1842. */
  1843. static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
  1844. {
  1845. phys_addr_t pt_base, paddr;
  1846. unsigned pmdidx;
  1847. pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
  1848. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
  1849. if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
  1850. paddr = m2p(pmd[pmdidx].pmd);
  1851. pt_base = min(pt_base, paddr);
  1852. }
  1853. return pt_base;
  1854. }
  1855. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1856. {
  1857. pmd_t *kernel_pmd;
  1858. kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
  1859. xen_pt_base = xen_find_pt_base(kernel_pmd);
  1860. xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
  1861. initial_kernel_pmd =
  1862. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1863. max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
  1864. copy_page(initial_kernel_pmd, kernel_pmd);
  1865. xen_map_identity_early(initial_kernel_pmd, max_pfn);
  1866. copy_page(initial_page_table, pgd);
  1867. initial_page_table[KERNEL_PGD_BOUNDARY] =
  1868. __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
  1869. set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
  1870. set_page_prot(initial_page_table, PAGE_KERNEL_RO);
  1871. set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
  1872. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1873. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
  1874. PFN_DOWN(__pa(initial_page_table)));
  1875. xen_write_cr3(__pa(initial_page_table));
  1876. memblock_reserve(xen_pt_base, xen_pt_size);
  1877. }
  1878. #endif /* CONFIG_X86_64 */
  1879. void __init xen_reserve_special_pages(void)
  1880. {
  1881. phys_addr_t paddr;
  1882. memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
  1883. if (xen_start_info->store_mfn) {
  1884. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
  1885. memblock_reserve(paddr, PAGE_SIZE);
  1886. }
  1887. if (!xen_initial_domain()) {
  1888. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
  1889. memblock_reserve(paddr, PAGE_SIZE);
  1890. }
  1891. }
  1892. void __init xen_pt_check_e820(void)
  1893. {
  1894. if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
  1895. xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
  1896. BUG();
  1897. }
  1898. }
  1899. static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
  1900. static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
  1901. {
  1902. pte_t pte;
  1903. phys >>= PAGE_SHIFT;
  1904. switch (idx) {
  1905. case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
  1906. #ifdef CONFIG_X86_32
  1907. case FIX_WP_TEST:
  1908. # ifdef CONFIG_HIGHMEM
  1909. case FIX_KMAP_BEGIN ... FIX_KMAP_END:
  1910. # endif
  1911. #elif defined(CONFIG_X86_VSYSCALL_EMULATION)
  1912. case VSYSCALL_PAGE:
  1913. #endif
  1914. case FIX_TEXT_POKE0:
  1915. case FIX_TEXT_POKE1:
  1916. /* All local page mappings */
  1917. pte = pfn_pte(phys, prot);
  1918. break;
  1919. #ifdef CONFIG_X86_LOCAL_APIC
  1920. case FIX_APIC_BASE: /* maps dummy local APIC */
  1921. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1922. break;
  1923. #endif
  1924. #ifdef CONFIG_X86_IO_APIC
  1925. case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
  1926. /*
  1927. * We just don't map the IO APIC - all access is via
  1928. * hypercalls. Keep the address in the pte for reference.
  1929. */
  1930. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1931. break;
  1932. #endif
  1933. case FIX_PARAVIRT_BOOTMAP:
  1934. /* This is an MFN, but it isn't an IO mapping from the
  1935. IO domain */
  1936. pte = mfn_pte(phys, prot);
  1937. break;
  1938. default:
  1939. /* By default, set_fixmap is used for hardware mappings */
  1940. pte = mfn_pte(phys, prot);
  1941. break;
  1942. }
  1943. __native_set_fixmap(idx, pte);
  1944. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1945. /* Replicate changes to map the vsyscall page into the user
  1946. pagetable vsyscall mapping. */
  1947. if (idx == VSYSCALL_PAGE) {
  1948. unsigned long vaddr = __fix_to_virt(idx);
  1949. set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
  1950. }
  1951. #endif
  1952. }
  1953. static void __init xen_post_allocator_init(void)
  1954. {
  1955. pv_mmu_ops.set_pte = xen_set_pte;
  1956. pv_mmu_ops.set_pmd = xen_set_pmd;
  1957. pv_mmu_ops.set_pud = xen_set_pud;
  1958. #ifdef CONFIG_X86_64
  1959. pv_mmu_ops.set_p4d = xen_set_p4d;
  1960. #endif
  1961. /* This will work as long as patching hasn't happened yet
  1962. (which it hasn't) */
  1963. pv_mmu_ops.alloc_pte = xen_alloc_pte;
  1964. pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
  1965. pv_mmu_ops.release_pte = xen_release_pte;
  1966. pv_mmu_ops.release_pmd = xen_release_pmd;
  1967. #ifdef CONFIG_X86_64
  1968. pv_mmu_ops.alloc_pud = xen_alloc_pud;
  1969. pv_mmu_ops.release_pud = xen_release_pud;
  1970. #endif
  1971. pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte);
  1972. #ifdef CONFIG_X86_64
  1973. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1974. #endif
  1975. }
  1976. static void xen_leave_lazy_mmu(void)
  1977. {
  1978. preempt_disable();
  1979. xen_mc_flush();
  1980. paravirt_leave_lazy_mmu();
  1981. preempt_enable();
  1982. }
  1983. static const struct pv_mmu_ops xen_mmu_ops __initconst = {
  1984. .read_cr2 = xen_read_cr2,
  1985. .write_cr2 = xen_write_cr2,
  1986. .read_cr3 = xen_read_cr3,
  1987. .write_cr3 = xen_write_cr3_init,
  1988. .flush_tlb_user = xen_flush_tlb,
  1989. .flush_tlb_kernel = xen_flush_tlb,
  1990. .flush_tlb_one_user = xen_flush_tlb_one_user,
  1991. .flush_tlb_others = xen_flush_tlb_others,
  1992. .tlb_remove_table = tlb_remove_table,
  1993. .pgd_alloc = xen_pgd_alloc,
  1994. .pgd_free = xen_pgd_free,
  1995. .alloc_pte = xen_alloc_pte_init,
  1996. .release_pte = xen_release_pte_init,
  1997. .alloc_pmd = xen_alloc_pmd_init,
  1998. .release_pmd = xen_release_pmd_init,
  1999. .set_pte = xen_set_pte_init,
  2000. .set_pte_at = xen_set_pte_at,
  2001. .set_pmd = xen_set_pmd_hyper,
  2002. .ptep_modify_prot_start = __ptep_modify_prot_start,
  2003. .ptep_modify_prot_commit = __ptep_modify_prot_commit,
  2004. .pte_val = PV_CALLEE_SAVE(xen_pte_val),
  2005. .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
  2006. .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
  2007. .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
  2008. #ifdef CONFIG_X86_PAE
  2009. .set_pte_atomic = xen_set_pte_atomic,
  2010. .pte_clear = xen_pte_clear,
  2011. .pmd_clear = xen_pmd_clear,
  2012. #endif /* CONFIG_X86_PAE */
  2013. .set_pud = xen_set_pud_hyper,
  2014. .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
  2015. .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
  2016. #ifdef CONFIG_X86_64
  2017. .pud_val = PV_CALLEE_SAVE(xen_pud_val),
  2018. .make_pud = PV_CALLEE_SAVE(xen_make_pud),
  2019. .set_p4d = xen_set_p4d_hyper,
  2020. .alloc_pud = xen_alloc_pmd_init,
  2021. .release_pud = xen_release_pmd_init,
  2022. #if CONFIG_PGTABLE_LEVELS >= 5
  2023. .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
  2024. .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
  2025. #endif
  2026. #endif /* CONFIG_X86_64 */
  2027. .activate_mm = xen_activate_mm,
  2028. .dup_mmap = xen_dup_mmap,
  2029. .exit_mmap = xen_exit_mmap,
  2030. .lazy_mode = {
  2031. .enter = paravirt_enter_lazy_mmu,
  2032. .leave = xen_leave_lazy_mmu,
  2033. .flush = paravirt_flush_lazy_mmu,
  2034. },
  2035. .set_fixmap = xen_set_fixmap,
  2036. };
  2037. void __init xen_init_mmu_ops(void)
  2038. {
  2039. x86_init.paging.pagetable_init = xen_pagetable_init;
  2040. x86_init.hyper.init_after_bootmem = xen_after_bootmem;
  2041. pv_mmu_ops = xen_mmu_ops;
  2042. memset(dummy_mapping, 0xff, PAGE_SIZE);
  2043. }
  2044. /* Protected by xen_reservation_lock. */
  2045. #define MAX_CONTIG_ORDER 9 /* 2MB */
  2046. static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
  2047. #define VOID_PTE (mfn_pte(0, __pgprot(0)))
  2048. static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
  2049. unsigned long *in_frames,
  2050. unsigned long *out_frames)
  2051. {
  2052. int i;
  2053. struct multicall_space mcs;
  2054. xen_mc_batch();
  2055. for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
  2056. mcs = __xen_mc_entry(0);
  2057. if (in_frames)
  2058. in_frames[i] = virt_to_mfn(vaddr);
  2059. MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
  2060. __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
  2061. if (out_frames)
  2062. out_frames[i] = virt_to_pfn(vaddr);
  2063. }
  2064. xen_mc_issue(0);
  2065. }
  2066. /*
  2067. * Update the pfn-to-mfn mappings for a virtual address range, either to
  2068. * point to an array of mfns, or contiguously from a single starting
  2069. * mfn.
  2070. */
  2071. static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
  2072. unsigned long *mfns,
  2073. unsigned long first_mfn)
  2074. {
  2075. unsigned i, limit;
  2076. unsigned long mfn;
  2077. xen_mc_batch();
  2078. limit = 1u << order;
  2079. for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
  2080. struct multicall_space mcs;
  2081. unsigned flags;
  2082. mcs = __xen_mc_entry(0);
  2083. if (mfns)
  2084. mfn = mfns[i];
  2085. else
  2086. mfn = first_mfn + i;
  2087. if (i < (limit - 1))
  2088. flags = 0;
  2089. else {
  2090. if (order == 0)
  2091. flags = UVMF_INVLPG | UVMF_ALL;
  2092. else
  2093. flags = UVMF_TLB_FLUSH | UVMF_ALL;
  2094. }
  2095. MULTI_update_va_mapping(mcs.mc, vaddr,
  2096. mfn_pte(mfn, PAGE_KERNEL), flags);
  2097. set_phys_to_machine(virt_to_pfn(vaddr), mfn);
  2098. }
  2099. xen_mc_issue(0);
  2100. }
  2101. /*
  2102. * Perform the hypercall to exchange a region of our pfns to point to
  2103. * memory with the required contiguous alignment. Takes the pfns as
  2104. * input, and populates mfns as output.
  2105. *
  2106. * Returns a success code indicating whether the hypervisor was able to
  2107. * satisfy the request or not.
  2108. */
  2109. static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
  2110. unsigned long *pfns_in,
  2111. unsigned long extents_out,
  2112. unsigned int order_out,
  2113. unsigned long *mfns_out,
  2114. unsigned int address_bits)
  2115. {
  2116. long rc;
  2117. int success;
  2118. struct xen_memory_exchange exchange = {
  2119. .in = {
  2120. .nr_extents = extents_in,
  2121. .extent_order = order_in,
  2122. .extent_start = pfns_in,
  2123. .domid = DOMID_SELF
  2124. },
  2125. .out = {
  2126. .nr_extents = extents_out,
  2127. .extent_order = order_out,
  2128. .extent_start = mfns_out,
  2129. .address_bits = address_bits,
  2130. .domid = DOMID_SELF
  2131. }
  2132. };
  2133. BUG_ON(extents_in << order_in != extents_out << order_out);
  2134. rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
  2135. success = (exchange.nr_exchanged == extents_in);
  2136. BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
  2137. BUG_ON(success && (rc != 0));
  2138. return success;
  2139. }
  2140. int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
  2141. unsigned int address_bits,
  2142. dma_addr_t *dma_handle)
  2143. {
  2144. unsigned long *in_frames = discontig_frames, out_frame;
  2145. unsigned long flags;
  2146. int success;
  2147. unsigned long vstart = (unsigned long)phys_to_virt(pstart);
  2148. /*
  2149. * Currently an auto-translated guest will not perform I/O, nor will
  2150. * it require PAE page directories below 4GB. Therefore any calls to
  2151. * this function are redundant and can be ignored.
  2152. */
  2153. if (unlikely(order > MAX_CONTIG_ORDER))
  2154. return -ENOMEM;
  2155. memset((void *) vstart, 0, PAGE_SIZE << order);
  2156. spin_lock_irqsave(&xen_reservation_lock, flags);
  2157. /* 1. Zap current PTEs, remembering MFNs. */
  2158. xen_zap_pfn_range(vstart, order, in_frames, NULL);
  2159. /* 2. Get a new contiguous memory extent. */
  2160. out_frame = virt_to_pfn(vstart);
  2161. success = xen_exchange_memory(1UL << order, 0, in_frames,
  2162. 1, order, &out_frame,
  2163. address_bits);
  2164. /* 3. Map the new extent in place of old pages. */
  2165. if (success)
  2166. xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
  2167. else
  2168. xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
  2169. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2170. *dma_handle = virt_to_machine(vstart).maddr;
  2171. return success ? 0 : -ENOMEM;
  2172. }
  2173. EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
  2174. void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
  2175. {
  2176. unsigned long *out_frames = discontig_frames, in_frame;
  2177. unsigned long flags;
  2178. int success;
  2179. unsigned long vstart;
  2180. if (unlikely(order > MAX_CONTIG_ORDER))
  2181. return;
  2182. vstart = (unsigned long)phys_to_virt(pstart);
  2183. memset((void *) vstart, 0, PAGE_SIZE << order);
  2184. spin_lock_irqsave(&xen_reservation_lock, flags);
  2185. /* 1. Find start MFN of contiguous extent. */
  2186. in_frame = virt_to_mfn(vstart);
  2187. /* 2. Zap current PTEs. */
  2188. xen_zap_pfn_range(vstart, order, NULL, out_frames);
  2189. /* 3. Do the exchange for non-contiguous MFNs. */
  2190. success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
  2191. 0, out_frames, 0);
  2192. /* 4. Map new pages in place of old pages. */
  2193. if (success)
  2194. xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
  2195. else
  2196. xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
  2197. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2198. }
  2199. EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
  2200. #ifdef CONFIG_KEXEC_CORE
  2201. phys_addr_t paddr_vmcoreinfo_note(void)
  2202. {
  2203. if (xen_pv_domain())
  2204. return virt_to_machine(vmcoreinfo_note).maddr;
  2205. else
  2206. return __pa(vmcoreinfo_note);
  2207. }
  2208. #endif /* CONFIG_KEXEC_CORE */