errors.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*---------------------------------------------------------------------------+
  3. | errors.c |
  4. | |
  5. | The error handling functions for wm-FPU-emu |
  6. | |
  7. | Copyright (C) 1992,1993,1994,1996 |
  8. | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
  9. | E-mail billm@jacobi.maths.monash.edu.au |
  10. | |
  11. | |
  12. +---------------------------------------------------------------------------*/
  13. /*---------------------------------------------------------------------------+
  14. | Note: |
  15. | The file contains code which accesses user memory. |
  16. | Emulator static data may change when user memory is accessed, due to |
  17. | other processes using the emulator while swapping is in progress. |
  18. +---------------------------------------------------------------------------*/
  19. #include <linux/signal.h>
  20. #include <linux/uaccess.h>
  21. #include "fpu_emu.h"
  22. #include "fpu_system.h"
  23. #include "exception.h"
  24. #include "status_w.h"
  25. #include "control_w.h"
  26. #include "reg_constant.h"
  27. #include "version.h"
  28. /* */
  29. #undef PRINT_MESSAGES
  30. /* */
  31. #if 0
  32. void Un_impl(void)
  33. {
  34. u_char byte1, FPU_modrm;
  35. unsigned long address = FPU_ORIG_EIP;
  36. RE_ENTRANT_CHECK_OFF;
  37. /* No need to check access_ok(), we have previously fetched these bytes. */
  38. printk("Unimplemented FPU Opcode at eip=%p : ", (void __user *)address);
  39. if (FPU_CS == __USER_CS) {
  40. while (1) {
  41. FPU_get_user(byte1, (u_char __user *) address);
  42. if ((byte1 & 0xf8) == 0xd8)
  43. break;
  44. printk("[%02x]", byte1);
  45. address++;
  46. }
  47. printk("%02x ", byte1);
  48. FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
  49. if (FPU_modrm >= 0300)
  50. printk("%02x (%02x+%d)\n", FPU_modrm, FPU_modrm & 0xf8,
  51. FPU_modrm & 7);
  52. else
  53. printk("/%d\n", (FPU_modrm >> 3) & 7);
  54. } else {
  55. printk("cs selector = %04x\n", FPU_CS);
  56. }
  57. RE_ENTRANT_CHECK_ON;
  58. EXCEPTION(EX_Invalid);
  59. }
  60. #endif /* 0 */
  61. /*
  62. Called for opcodes which are illegal and which are known to result in a
  63. SIGILL with a real 80486.
  64. */
  65. void FPU_illegal(void)
  66. {
  67. math_abort(FPU_info, SIGILL);
  68. }
  69. void FPU_printall(void)
  70. {
  71. int i;
  72. static const char *tag_desc[] = { "Valid", "Zero", "ERROR", "Empty",
  73. "DeNorm", "Inf", "NaN"
  74. };
  75. u_char byte1, FPU_modrm;
  76. unsigned long address = FPU_ORIG_EIP;
  77. RE_ENTRANT_CHECK_OFF;
  78. /* No need to check access_ok(), we have previously fetched these bytes. */
  79. printk("At %p:", (void *)address);
  80. if (FPU_CS == __USER_CS) {
  81. #define MAX_PRINTED_BYTES 20
  82. for (i = 0; i < MAX_PRINTED_BYTES; i++) {
  83. FPU_get_user(byte1, (u_char __user *) address);
  84. if ((byte1 & 0xf8) == 0xd8) {
  85. printk(" %02x", byte1);
  86. break;
  87. }
  88. printk(" [%02x]", byte1);
  89. address++;
  90. }
  91. if (i == MAX_PRINTED_BYTES)
  92. printk(" [more..]\n");
  93. else {
  94. FPU_get_user(FPU_modrm, 1 + (u_char __user *) address);
  95. if (FPU_modrm >= 0300)
  96. printk(" %02x (%02x+%d)\n", FPU_modrm,
  97. FPU_modrm & 0xf8, FPU_modrm & 7);
  98. else
  99. printk(" /%d, mod=%d rm=%d\n",
  100. (FPU_modrm >> 3) & 7,
  101. (FPU_modrm >> 6) & 3, FPU_modrm & 7);
  102. }
  103. } else {
  104. printk("%04x\n", FPU_CS);
  105. }
  106. partial_status = status_word();
  107. #ifdef DEBUGGING
  108. if (partial_status & SW_Backward)
  109. printk("SW: backward compatibility\n");
  110. if (partial_status & SW_C3)
  111. printk("SW: condition bit 3\n");
  112. if (partial_status & SW_C2)
  113. printk("SW: condition bit 2\n");
  114. if (partial_status & SW_C1)
  115. printk("SW: condition bit 1\n");
  116. if (partial_status & SW_C0)
  117. printk("SW: condition bit 0\n");
  118. if (partial_status & SW_Summary)
  119. printk("SW: exception summary\n");
  120. if (partial_status & SW_Stack_Fault)
  121. printk("SW: stack fault\n");
  122. if (partial_status & SW_Precision)
  123. printk("SW: loss of precision\n");
  124. if (partial_status & SW_Underflow)
  125. printk("SW: underflow\n");
  126. if (partial_status & SW_Overflow)
  127. printk("SW: overflow\n");
  128. if (partial_status & SW_Zero_Div)
  129. printk("SW: divide by zero\n");
  130. if (partial_status & SW_Denorm_Op)
  131. printk("SW: denormalized operand\n");
  132. if (partial_status & SW_Invalid)
  133. printk("SW: invalid operation\n");
  134. #endif /* DEBUGGING */
  135. printk(" SW: b=%d st=%d es=%d sf=%d cc=%d%d%d%d ef=%d%d%d%d%d%d\n", partial_status & 0x8000 ? 1 : 0, /* busy */
  136. (partial_status & 0x3800) >> 11, /* stack top pointer */
  137. partial_status & 0x80 ? 1 : 0, /* Error summary status */
  138. partial_status & 0x40 ? 1 : 0, /* Stack flag */
  139. partial_status & SW_C3 ? 1 : 0, partial_status & SW_C2 ? 1 : 0, /* cc */
  140. partial_status & SW_C1 ? 1 : 0, partial_status & SW_C0 ? 1 : 0, /* cc */
  141. partial_status & SW_Precision ? 1 : 0,
  142. partial_status & SW_Underflow ? 1 : 0,
  143. partial_status & SW_Overflow ? 1 : 0,
  144. partial_status & SW_Zero_Div ? 1 : 0,
  145. partial_status & SW_Denorm_Op ? 1 : 0,
  146. partial_status & SW_Invalid ? 1 : 0);
  147. printk(" CW: ic=%d rc=%d%d pc=%d%d iem=%d ef=%d%d%d%d%d%d\n",
  148. control_word & 0x1000 ? 1 : 0,
  149. (control_word & 0x800) >> 11, (control_word & 0x400) >> 10,
  150. (control_word & 0x200) >> 9, (control_word & 0x100) >> 8,
  151. control_word & 0x80 ? 1 : 0,
  152. control_word & SW_Precision ? 1 : 0,
  153. control_word & SW_Underflow ? 1 : 0,
  154. control_word & SW_Overflow ? 1 : 0,
  155. control_word & SW_Zero_Div ? 1 : 0,
  156. control_word & SW_Denorm_Op ? 1 : 0,
  157. control_word & SW_Invalid ? 1 : 0);
  158. for (i = 0; i < 8; i++) {
  159. FPU_REG *r = &st(i);
  160. u_char tagi = FPU_gettagi(i);
  161. switch (tagi) {
  162. case TAG_Empty:
  163. continue;
  164. break;
  165. case TAG_Zero:
  166. case TAG_Special:
  167. tagi = FPU_Special(r);
  168. case TAG_Valid:
  169. printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
  170. getsign(r) ? '-' : '+',
  171. (long)(r->sigh >> 16),
  172. (long)(r->sigh & 0xFFFF),
  173. (long)(r->sigl >> 16),
  174. (long)(r->sigl & 0xFFFF),
  175. exponent(r) - EXP_BIAS + 1);
  176. break;
  177. default:
  178. printk("Whoops! Error in errors.c: tag%d is %d ", i,
  179. tagi);
  180. continue;
  181. break;
  182. }
  183. printk("%s\n", tag_desc[(int)(unsigned)tagi]);
  184. }
  185. RE_ENTRANT_CHECK_ON;
  186. }
  187. static struct {
  188. int type;
  189. const char *name;
  190. } exception_names[] = {
  191. {
  192. EX_StackOver, "stack overflow"}, {
  193. EX_StackUnder, "stack underflow"}, {
  194. EX_Precision, "loss of precision"}, {
  195. EX_Underflow, "underflow"}, {
  196. EX_Overflow, "overflow"}, {
  197. EX_ZeroDiv, "divide by zero"}, {
  198. EX_Denormal, "denormalized operand"}, {
  199. EX_Invalid, "invalid operation"}, {
  200. EX_INTERNAL, "INTERNAL BUG in " FPU_VERSION}, {
  201. 0, NULL}
  202. };
  203. /*
  204. EX_INTERNAL is always given with a code which indicates where the
  205. error was detected.
  206. Internal error types:
  207. 0x14 in fpu_etc.c
  208. 0x1nn in a *.c file:
  209. 0x101 in reg_add_sub.c
  210. 0x102 in reg_mul.c
  211. 0x104 in poly_atan.c
  212. 0x105 in reg_mul.c
  213. 0x107 in fpu_trig.c
  214. 0x108 in reg_compare.c
  215. 0x109 in reg_compare.c
  216. 0x110 in reg_add_sub.c
  217. 0x111 in fpe_entry.c
  218. 0x112 in fpu_trig.c
  219. 0x113 in errors.c
  220. 0x115 in fpu_trig.c
  221. 0x116 in fpu_trig.c
  222. 0x117 in fpu_trig.c
  223. 0x118 in fpu_trig.c
  224. 0x119 in fpu_trig.c
  225. 0x120 in poly_atan.c
  226. 0x121 in reg_compare.c
  227. 0x122 in reg_compare.c
  228. 0x123 in reg_compare.c
  229. 0x125 in fpu_trig.c
  230. 0x126 in fpu_entry.c
  231. 0x127 in poly_2xm1.c
  232. 0x128 in fpu_entry.c
  233. 0x129 in fpu_entry.c
  234. 0x130 in get_address.c
  235. 0x131 in get_address.c
  236. 0x132 in get_address.c
  237. 0x133 in get_address.c
  238. 0x140 in load_store.c
  239. 0x141 in load_store.c
  240. 0x150 in poly_sin.c
  241. 0x151 in poly_sin.c
  242. 0x160 in reg_ld_str.c
  243. 0x161 in reg_ld_str.c
  244. 0x162 in reg_ld_str.c
  245. 0x163 in reg_ld_str.c
  246. 0x164 in reg_ld_str.c
  247. 0x170 in fpu_tags.c
  248. 0x171 in fpu_tags.c
  249. 0x172 in fpu_tags.c
  250. 0x180 in reg_convert.c
  251. 0x2nn in an *.S file:
  252. 0x201 in reg_u_add.S
  253. 0x202 in reg_u_div.S
  254. 0x203 in reg_u_div.S
  255. 0x204 in reg_u_div.S
  256. 0x205 in reg_u_mul.S
  257. 0x206 in reg_u_sub.S
  258. 0x207 in wm_sqrt.S
  259. 0x208 in reg_div.S
  260. 0x209 in reg_u_sub.S
  261. 0x210 in reg_u_sub.S
  262. 0x211 in reg_u_sub.S
  263. 0x212 in reg_u_sub.S
  264. 0x213 in wm_sqrt.S
  265. 0x214 in wm_sqrt.S
  266. 0x215 in wm_sqrt.S
  267. 0x220 in reg_norm.S
  268. 0x221 in reg_norm.S
  269. 0x230 in reg_round.S
  270. 0x231 in reg_round.S
  271. 0x232 in reg_round.S
  272. 0x233 in reg_round.S
  273. 0x234 in reg_round.S
  274. 0x235 in reg_round.S
  275. 0x236 in reg_round.S
  276. 0x240 in div_Xsig.S
  277. 0x241 in div_Xsig.S
  278. 0x242 in div_Xsig.S
  279. */
  280. asmlinkage __visible void FPU_exception(int n)
  281. {
  282. int i, int_type;
  283. int_type = 0; /* Needed only to stop compiler warnings */
  284. if (n & EX_INTERNAL) {
  285. int_type = n - EX_INTERNAL;
  286. n = EX_INTERNAL;
  287. /* Set lots of exception bits! */
  288. partial_status |= (SW_Exc_Mask | SW_Summary | SW_Backward);
  289. } else {
  290. /* Extract only the bits which we use to set the status word */
  291. n &= (SW_Exc_Mask);
  292. /* Set the corresponding exception bit */
  293. partial_status |= n;
  294. /* Set summary bits iff exception isn't masked */
  295. if (partial_status & ~control_word & CW_Exceptions)
  296. partial_status |= (SW_Summary | SW_Backward);
  297. if (n & (SW_Stack_Fault | EX_Precision)) {
  298. if (!(n & SW_C1))
  299. /* This bit distinguishes over- from underflow for a stack fault,
  300. and roundup from round-down for precision loss. */
  301. partial_status &= ~SW_C1;
  302. }
  303. }
  304. RE_ENTRANT_CHECK_OFF;
  305. if ((~control_word & n & CW_Exceptions) || (n == EX_INTERNAL)) {
  306. /* Get a name string for error reporting */
  307. for (i = 0; exception_names[i].type; i++)
  308. if ((exception_names[i].type & n) ==
  309. exception_names[i].type)
  310. break;
  311. if (exception_names[i].type) {
  312. #ifdef PRINT_MESSAGES
  313. printk("FP Exception: %s!\n", exception_names[i].name);
  314. #endif /* PRINT_MESSAGES */
  315. } else
  316. printk("FPU emulator: Unknown Exception: 0x%04x!\n", n);
  317. if (n == EX_INTERNAL) {
  318. printk("FPU emulator: Internal error type 0x%04x\n",
  319. int_type);
  320. FPU_printall();
  321. }
  322. #ifdef PRINT_MESSAGES
  323. else
  324. FPU_printall();
  325. #endif /* PRINT_MESSAGES */
  326. /*
  327. * The 80486 generates an interrupt on the next non-control FPU
  328. * instruction. So we need some means of flagging it.
  329. * We use the ES (Error Summary) bit for this.
  330. */
  331. }
  332. RE_ENTRANT_CHECK_ON;
  333. #ifdef __DEBUG__
  334. math_abort(FPU_info, SIGFPE);
  335. #endif /* __DEBUG__ */
  336. }
  337. /* Real operation attempted on a NaN. */
  338. /* Returns < 0 if the exception is unmasked */
  339. int real_1op_NaN(FPU_REG *a)
  340. {
  341. int signalling, isNaN;
  342. isNaN = (exponent(a) == EXP_OVER) && (a->sigh & 0x80000000);
  343. /* The default result for the case of two "equal" NaNs (signs may
  344. differ) is chosen to reproduce 80486 behaviour */
  345. signalling = isNaN && !(a->sigh & 0x40000000);
  346. if (!signalling) {
  347. if (!isNaN) { /* pseudo-NaN, or other unsupported? */
  348. if (control_word & CW_Invalid) {
  349. /* Masked response */
  350. reg_copy(&CONST_QNaN, a);
  351. }
  352. EXCEPTION(EX_Invalid);
  353. return (!(control_word & CW_Invalid) ? FPU_Exception :
  354. 0) | TAG_Special;
  355. }
  356. return TAG_Special;
  357. }
  358. if (control_word & CW_Invalid) {
  359. /* The masked response */
  360. if (!(a->sigh & 0x80000000)) { /* pseudo-NaN ? */
  361. reg_copy(&CONST_QNaN, a);
  362. }
  363. /* ensure a Quiet NaN */
  364. a->sigh |= 0x40000000;
  365. }
  366. EXCEPTION(EX_Invalid);
  367. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
  368. }
  369. /* Real operation attempted on two operands, one a NaN. */
  370. /* Returns < 0 if the exception is unmasked */
  371. int real_2op_NaN(FPU_REG const *b, u_char tagb,
  372. int deststnr, FPU_REG const *defaultNaN)
  373. {
  374. FPU_REG *dest = &st(deststnr);
  375. FPU_REG const *a = dest;
  376. u_char taga = FPU_gettagi(deststnr);
  377. FPU_REG const *x;
  378. int signalling, unsupported;
  379. if (taga == TAG_Special)
  380. taga = FPU_Special(a);
  381. if (tagb == TAG_Special)
  382. tagb = FPU_Special(b);
  383. /* TW_NaN is also used for unsupported data types. */
  384. unsupported = ((taga == TW_NaN)
  385. && !((exponent(a) == EXP_OVER)
  386. && (a->sigh & 0x80000000)))
  387. || ((tagb == TW_NaN)
  388. && !((exponent(b) == EXP_OVER) && (b->sigh & 0x80000000)));
  389. if (unsupported) {
  390. if (control_word & CW_Invalid) {
  391. /* Masked response */
  392. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
  393. }
  394. EXCEPTION(EX_Invalid);
  395. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) |
  396. TAG_Special;
  397. }
  398. if (taga == TW_NaN) {
  399. x = a;
  400. if (tagb == TW_NaN) {
  401. signalling = !(a->sigh & b->sigh & 0x40000000);
  402. if (significand(b) > significand(a))
  403. x = b;
  404. else if (significand(b) == significand(a)) {
  405. /* The default result for the case of two "equal" NaNs (signs may
  406. differ) is chosen to reproduce 80486 behaviour */
  407. x = defaultNaN;
  408. }
  409. } else {
  410. /* return the quiet version of the NaN in a */
  411. signalling = !(a->sigh & 0x40000000);
  412. }
  413. } else
  414. #ifdef PARANOID
  415. if (tagb == TW_NaN)
  416. #endif /* PARANOID */
  417. {
  418. signalling = !(b->sigh & 0x40000000);
  419. x = b;
  420. }
  421. #ifdef PARANOID
  422. else {
  423. signalling = 0;
  424. EXCEPTION(EX_INTERNAL | 0x113);
  425. x = &CONST_QNaN;
  426. }
  427. #endif /* PARANOID */
  428. if ((!signalling) || (control_word & CW_Invalid)) {
  429. if (!x)
  430. x = b;
  431. if (!(x->sigh & 0x80000000)) /* pseudo-NaN ? */
  432. x = &CONST_QNaN;
  433. FPU_copy_to_regi(x, TAG_Special, deststnr);
  434. if (!signalling)
  435. return TAG_Special;
  436. /* ensure a Quiet NaN */
  437. dest->sigh |= 0x40000000;
  438. }
  439. EXCEPTION(EX_Invalid);
  440. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Special;
  441. }
  442. /* Invalid arith operation on Valid registers */
  443. /* Returns < 0 if the exception is unmasked */
  444. asmlinkage __visible int arith_invalid(int deststnr)
  445. {
  446. EXCEPTION(EX_Invalid);
  447. if (control_word & CW_Invalid) {
  448. /* The masked response */
  449. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, deststnr);
  450. }
  451. return (!(control_word & CW_Invalid) ? FPU_Exception : 0) | TAG_Valid;
  452. }
  453. /* Divide a finite number by zero */
  454. asmlinkage __visible int FPU_divide_by_zero(int deststnr, u_char sign)
  455. {
  456. FPU_REG *dest = &st(deststnr);
  457. int tag = TAG_Valid;
  458. if (control_word & CW_ZeroDiv) {
  459. /* The masked response */
  460. FPU_copy_to_regi(&CONST_INF, TAG_Special, deststnr);
  461. setsign(dest, sign);
  462. tag = TAG_Special;
  463. }
  464. EXCEPTION(EX_ZeroDiv);
  465. return (!(control_word & CW_ZeroDiv) ? FPU_Exception : 0) | tag;
  466. }
  467. /* This may be called often, so keep it lean */
  468. int set_precision_flag(int flags)
  469. {
  470. if (control_word & CW_Precision) {
  471. partial_status &= ~(SW_C1 & flags);
  472. partial_status |= flags; /* The masked response */
  473. return 0;
  474. } else {
  475. EXCEPTION(flags);
  476. return 1;
  477. }
  478. }
  479. /* This may be called often, so keep it lean */
  480. asmlinkage __visible void set_precision_flag_up(void)
  481. {
  482. if (control_word & CW_Precision)
  483. partial_status |= (SW_Precision | SW_C1); /* The masked response */
  484. else
  485. EXCEPTION(EX_Precision | SW_C1);
  486. }
  487. /* This may be called often, so keep it lean */
  488. asmlinkage __visible void set_precision_flag_down(void)
  489. {
  490. if (control_word & CW_Precision) { /* The masked response */
  491. partial_status &= ~SW_C1;
  492. partial_status |= SW_Precision;
  493. } else
  494. EXCEPTION(EX_Precision);
  495. }
  496. asmlinkage __visible int denormal_operand(void)
  497. {
  498. if (control_word & CW_Denormal) { /* The masked response */
  499. partial_status |= SW_Denorm_Op;
  500. return TAG_Special;
  501. } else {
  502. EXCEPTION(EX_Denormal);
  503. return TAG_Special | FPU_Exception;
  504. }
  505. }
  506. asmlinkage __visible int arith_overflow(FPU_REG *dest)
  507. {
  508. int tag = TAG_Valid;
  509. if (control_word & CW_Overflow) {
  510. /* The masked response */
  511. /* ###### The response here depends upon the rounding mode */
  512. reg_copy(&CONST_INF, dest);
  513. tag = TAG_Special;
  514. } else {
  515. /* Subtract the magic number from the exponent */
  516. addexponent(dest, (-3 * (1 << 13)));
  517. }
  518. EXCEPTION(EX_Overflow);
  519. if (control_word & CW_Overflow) {
  520. /* The overflow exception is masked. */
  521. /* By definition, precision is lost.
  522. The roundup bit (C1) is also set because we have
  523. "rounded" upwards to Infinity. */
  524. EXCEPTION(EX_Precision | SW_C1);
  525. return tag;
  526. }
  527. return tag;
  528. }
  529. asmlinkage __visible int arith_underflow(FPU_REG *dest)
  530. {
  531. int tag = TAG_Valid;
  532. if (control_word & CW_Underflow) {
  533. /* The masked response */
  534. if (exponent16(dest) <= EXP_UNDER - 63) {
  535. reg_copy(&CONST_Z, dest);
  536. partial_status &= ~SW_C1; /* Round down. */
  537. tag = TAG_Zero;
  538. } else {
  539. stdexp(dest);
  540. }
  541. } else {
  542. /* Add the magic number to the exponent. */
  543. addexponent(dest, (3 * (1 << 13)) + EXTENDED_Ebias);
  544. }
  545. EXCEPTION(EX_Underflow);
  546. if (control_word & CW_Underflow) {
  547. /* The underflow exception is masked. */
  548. EXCEPTION(EX_Precision);
  549. return tag;
  550. }
  551. return tag;
  552. }
  553. void FPU_stack_overflow(void)
  554. {
  555. if (control_word & CW_Invalid) {
  556. /* The masked response */
  557. top--;
  558. FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
  559. }
  560. EXCEPTION(EX_StackOver);
  561. return;
  562. }
  563. void FPU_stack_underflow(void)
  564. {
  565. if (control_word & CW_Invalid) {
  566. /* The masked response */
  567. FPU_copy_to_reg0(&CONST_QNaN, TAG_Special);
  568. }
  569. EXCEPTION(EX_StackUnder);
  570. return;
  571. }
  572. void FPU_stack_underflow_i(int i)
  573. {
  574. if (control_word & CW_Invalid) {
  575. /* The masked response */
  576. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
  577. }
  578. EXCEPTION(EX_StackUnder);
  579. return;
  580. }
  581. void FPU_stack_underflow_pop(int i)
  582. {
  583. if (control_word & CW_Invalid) {
  584. /* The masked response */
  585. FPU_copy_to_regi(&CONST_QNaN, TAG_Special, i);
  586. FPU_pop();
  587. }
  588. EXCEPTION(EX_StackUnder);
  589. return;
  590. }