hyperv.c 43 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669
  1. /*
  2. * KVM Microsoft Hyper-V emulation
  3. *
  4. * derived from arch/x86/kvm/x86.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10. * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
  11. *
  12. * Authors:
  13. * Avi Kivity <avi@qumranet.com>
  14. * Yaniv Kamay <yaniv@qumranet.com>
  15. * Amit Shah <amit.shah@qumranet.com>
  16. * Ben-Ami Yassour <benami@il.ibm.com>
  17. * Andrey Smetanin <asmetanin@virtuozzo.com>
  18. *
  19. * This work is licensed under the terms of the GNU GPL, version 2. See
  20. * the COPYING file in the top-level directory.
  21. *
  22. */
  23. #include "x86.h"
  24. #include "lapic.h"
  25. #include "ioapic.h"
  26. #include "hyperv.h"
  27. #include <linux/kvm_host.h>
  28. #include <linux/highmem.h>
  29. #include <linux/sched/cputime.h>
  30. #include <linux/eventfd.h>
  31. #include <asm/apicdef.h>
  32. #include <trace/events/kvm.h>
  33. #include "trace.h"
  34. static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
  35. {
  36. return atomic64_read(&synic->sint[sint]);
  37. }
  38. static inline int synic_get_sint_vector(u64 sint_value)
  39. {
  40. if (sint_value & HV_SYNIC_SINT_MASKED)
  41. return -1;
  42. return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
  43. }
  44. static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
  45. int vector)
  46. {
  47. int i;
  48. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  49. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  50. return true;
  51. }
  52. return false;
  53. }
  54. static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
  55. int vector)
  56. {
  57. int i;
  58. u64 sint_value;
  59. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  60. sint_value = synic_read_sint(synic, i);
  61. if (synic_get_sint_vector(sint_value) == vector &&
  62. sint_value & HV_SYNIC_SINT_AUTO_EOI)
  63. return true;
  64. }
  65. return false;
  66. }
  67. static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
  68. int vector)
  69. {
  70. if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
  71. return;
  72. if (synic_has_vector_connected(synic, vector))
  73. __set_bit(vector, synic->vec_bitmap);
  74. else
  75. __clear_bit(vector, synic->vec_bitmap);
  76. if (synic_has_vector_auto_eoi(synic, vector))
  77. __set_bit(vector, synic->auto_eoi_bitmap);
  78. else
  79. __clear_bit(vector, synic->auto_eoi_bitmap);
  80. }
  81. static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
  82. u64 data, bool host)
  83. {
  84. int vector, old_vector;
  85. bool masked;
  86. vector = data & HV_SYNIC_SINT_VECTOR_MASK;
  87. masked = data & HV_SYNIC_SINT_MASKED;
  88. /*
  89. * Valid vectors are 16-255, however, nested Hyper-V attempts to write
  90. * default '0x10000' value on boot and this should not #GP. We need to
  91. * allow zero-initing the register from host as well.
  92. */
  93. if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
  94. return 1;
  95. /*
  96. * Guest may configure multiple SINTs to use the same vector, so
  97. * we maintain a bitmap of vectors handled by synic, and a
  98. * bitmap of vectors with auto-eoi behavior. The bitmaps are
  99. * updated here, and atomically queried on fast paths.
  100. */
  101. old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
  102. atomic64_set(&synic->sint[sint], data);
  103. synic_update_vector(synic, old_vector);
  104. synic_update_vector(synic, vector);
  105. /* Load SynIC vectors into EOI exit bitmap */
  106. kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
  107. return 0;
  108. }
  109. static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
  110. {
  111. struct kvm_vcpu *vcpu = NULL;
  112. int i;
  113. if (vpidx >= KVM_MAX_VCPUS)
  114. return NULL;
  115. vcpu = kvm_get_vcpu(kvm, vpidx);
  116. if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  117. return vcpu;
  118. kvm_for_each_vcpu(i, vcpu, kvm)
  119. if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  120. return vcpu;
  121. return NULL;
  122. }
  123. static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
  124. {
  125. struct kvm_vcpu *vcpu;
  126. struct kvm_vcpu_hv_synic *synic;
  127. vcpu = get_vcpu_by_vpidx(kvm, vpidx);
  128. if (!vcpu)
  129. return NULL;
  130. synic = vcpu_to_synic(vcpu);
  131. return (synic->active) ? synic : NULL;
  132. }
  133. static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic,
  134. u32 sint)
  135. {
  136. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  137. struct page *page;
  138. gpa_t gpa;
  139. struct hv_message *msg;
  140. struct hv_message_page *msg_page;
  141. gpa = synic->msg_page & PAGE_MASK;
  142. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  143. if (is_error_page(page)) {
  144. vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n",
  145. gpa);
  146. return;
  147. }
  148. msg_page = kmap_atomic(page);
  149. msg = &msg_page->sint_message[sint];
  150. msg->header.message_flags.msg_pending = 0;
  151. kunmap_atomic(msg_page);
  152. kvm_release_page_dirty(page);
  153. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  154. }
  155. static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
  156. {
  157. struct kvm *kvm = vcpu->kvm;
  158. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  159. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  160. struct kvm_vcpu_hv_stimer *stimer;
  161. int gsi, idx, stimers_pending;
  162. trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
  163. if (synic->msg_page & HV_SYNIC_SIMP_ENABLE)
  164. synic_clear_sint_msg_pending(synic, sint);
  165. /* Try to deliver pending Hyper-V SynIC timers messages */
  166. stimers_pending = 0;
  167. for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
  168. stimer = &hv_vcpu->stimer[idx];
  169. if (stimer->msg_pending &&
  170. (stimer->config & HV_STIMER_ENABLE) &&
  171. HV_STIMER_SINT(stimer->config) == sint) {
  172. set_bit(stimer->index,
  173. hv_vcpu->stimer_pending_bitmap);
  174. stimers_pending++;
  175. }
  176. }
  177. if (stimers_pending)
  178. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  179. idx = srcu_read_lock(&kvm->irq_srcu);
  180. gsi = atomic_read(&synic->sint_to_gsi[sint]);
  181. if (gsi != -1)
  182. kvm_notify_acked_gsi(kvm, gsi);
  183. srcu_read_unlock(&kvm->irq_srcu, idx);
  184. }
  185. static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
  186. {
  187. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  188. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  189. hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
  190. hv_vcpu->exit.u.synic.msr = msr;
  191. hv_vcpu->exit.u.synic.control = synic->control;
  192. hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
  193. hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
  194. kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
  195. }
  196. static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
  197. u32 msr, u64 data, bool host)
  198. {
  199. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  200. int ret;
  201. if (!synic->active && !host)
  202. return 1;
  203. trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
  204. ret = 0;
  205. switch (msr) {
  206. case HV_X64_MSR_SCONTROL:
  207. synic->control = data;
  208. if (!host)
  209. synic_exit(synic, msr);
  210. break;
  211. case HV_X64_MSR_SVERSION:
  212. if (!host) {
  213. ret = 1;
  214. break;
  215. }
  216. synic->version = data;
  217. break;
  218. case HV_X64_MSR_SIEFP:
  219. if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
  220. !synic->dont_zero_synic_pages)
  221. if (kvm_clear_guest(vcpu->kvm,
  222. data & PAGE_MASK, PAGE_SIZE)) {
  223. ret = 1;
  224. break;
  225. }
  226. synic->evt_page = data;
  227. if (!host)
  228. synic_exit(synic, msr);
  229. break;
  230. case HV_X64_MSR_SIMP:
  231. if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
  232. !synic->dont_zero_synic_pages)
  233. if (kvm_clear_guest(vcpu->kvm,
  234. data & PAGE_MASK, PAGE_SIZE)) {
  235. ret = 1;
  236. break;
  237. }
  238. synic->msg_page = data;
  239. if (!host)
  240. synic_exit(synic, msr);
  241. break;
  242. case HV_X64_MSR_EOM: {
  243. int i;
  244. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  245. kvm_hv_notify_acked_sint(vcpu, i);
  246. break;
  247. }
  248. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  249. ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
  250. break;
  251. default:
  252. ret = 1;
  253. break;
  254. }
  255. return ret;
  256. }
  257. static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata,
  258. bool host)
  259. {
  260. int ret;
  261. if (!synic->active && !host)
  262. return 1;
  263. ret = 0;
  264. switch (msr) {
  265. case HV_X64_MSR_SCONTROL:
  266. *pdata = synic->control;
  267. break;
  268. case HV_X64_MSR_SVERSION:
  269. *pdata = synic->version;
  270. break;
  271. case HV_X64_MSR_SIEFP:
  272. *pdata = synic->evt_page;
  273. break;
  274. case HV_X64_MSR_SIMP:
  275. *pdata = synic->msg_page;
  276. break;
  277. case HV_X64_MSR_EOM:
  278. *pdata = 0;
  279. break;
  280. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  281. *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
  282. break;
  283. default:
  284. ret = 1;
  285. break;
  286. }
  287. return ret;
  288. }
  289. static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
  290. {
  291. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  292. struct kvm_lapic_irq irq;
  293. int ret, vector;
  294. if (sint >= ARRAY_SIZE(synic->sint))
  295. return -EINVAL;
  296. vector = synic_get_sint_vector(synic_read_sint(synic, sint));
  297. if (vector < 0)
  298. return -ENOENT;
  299. memset(&irq, 0, sizeof(irq));
  300. irq.shorthand = APIC_DEST_SELF;
  301. irq.dest_mode = APIC_DEST_PHYSICAL;
  302. irq.delivery_mode = APIC_DM_FIXED;
  303. irq.vector = vector;
  304. irq.level = 1;
  305. ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
  306. trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
  307. return ret;
  308. }
  309. int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
  310. {
  311. struct kvm_vcpu_hv_synic *synic;
  312. synic = synic_get(kvm, vpidx);
  313. if (!synic)
  314. return -EINVAL;
  315. return synic_set_irq(synic, sint);
  316. }
  317. void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
  318. {
  319. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  320. int i;
  321. trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
  322. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  323. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  324. kvm_hv_notify_acked_sint(vcpu, i);
  325. }
  326. static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
  327. {
  328. struct kvm_vcpu_hv_synic *synic;
  329. synic = synic_get(kvm, vpidx);
  330. if (!synic)
  331. return -EINVAL;
  332. if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
  333. return -EINVAL;
  334. atomic_set(&synic->sint_to_gsi[sint], gsi);
  335. return 0;
  336. }
  337. void kvm_hv_irq_routing_update(struct kvm *kvm)
  338. {
  339. struct kvm_irq_routing_table *irq_rt;
  340. struct kvm_kernel_irq_routing_entry *e;
  341. u32 gsi;
  342. irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
  343. lockdep_is_held(&kvm->irq_lock));
  344. for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
  345. hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
  346. if (e->type == KVM_IRQ_ROUTING_HV_SINT)
  347. kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
  348. e->hv_sint.sint, gsi);
  349. }
  350. }
  351. }
  352. static void synic_init(struct kvm_vcpu_hv_synic *synic)
  353. {
  354. int i;
  355. memset(synic, 0, sizeof(*synic));
  356. synic->version = HV_SYNIC_VERSION_1;
  357. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  358. atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
  359. atomic_set(&synic->sint_to_gsi[i], -1);
  360. }
  361. }
  362. static u64 get_time_ref_counter(struct kvm *kvm)
  363. {
  364. struct kvm_hv *hv = &kvm->arch.hyperv;
  365. struct kvm_vcpu *vcpu;
  366. u64 tsc;
  367. /*
  368. * The guest has not set up the TSC page or the clock isn't
  369. * stable, fall back to get_kvmclock_ns.
  370. */
  371. if (!hv->tsc_ref.tsc_sequence)
  372. return div_u64(get_kvmclock_ns(kvm), 100);
  373. vcpu = kvm_get_vcpu(kvm, 0);
  374. tsc = kvm_read_l1_tsc(vcpu, rdtsc());
  375. return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
  376. + hv->tsc_ref.tsc_offset;
  377. }
  378. static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
  379. bool vcpu_kick)
  380. {
  381. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  382. set_bit(stimer->index,
  383. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  384. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  385. if (vcpu_kick)
  386. kvm_vcpu_kick(vcpu);
  387. }
  388. static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
  389. {
  390. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  391. trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
  392. stimer->index);
  393. hrtimer_cancel(&stimer->timer);
  394. clear_bit(stimer->index,
  395. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  396. stimer->msg_pending = false;
  397. stimer->exp_time = 0;
  398. }
  399. static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
  400. {
  401. struct kvm_vcpu_hv_stimer *stimer;
  402. stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
  403. trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
  404. stimer->index);
  405. stimer_mark_pending(stimer, true);
  406. return HRTIMER_NORESTART;
  407. }
  408. /*
  409. * stimer_start() assumptions:
  410. * a) stimer->count is not equal to 0
  411. * b) stimer->config has HV_STIMER_ENABLE flag
  412. */
  413. static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
  414. {
  415. u64 time_now;
  416. ktime_t ktime_now;
  417. time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
  418. ktime_now = ktime_get();
  419. if (stimer->config & HV_STIMER_PERIODIC) {
  420. if (stimer->exp_time) {
  421. if (time_now >= stimer->exp_time) {
  422. u64 remainder;
  423. div64_u64_rem(time_now - stimer->exp_time,
  424. stimer->count, &remainder);
  425. stimer->exp_time =
  426. time_now + (stimer->count - remainder);
  427. }
  428. } else
  429. stimer->exp_time = time_now + stimer->count;
  430. trace_kvm_hv_stimer_start_periodic(
  431. stimer_to_vcpu(stimer)->vcpu_id,
  432. stimer->index,
  433. time_now, stimer->exp_time);
  434. hrtimer_start(&stimer->timer,
  435. ktime_add_ns(ktime_now,
  436. 100 * (stimer->exp_time - time_now)),
  437. HRTIMER_MODE_ABS);
  438. return 0;
  439. }
  440. stimer->exp_time = stimer->count;
  441. if (time_now >= stimer->count) {
  442. /*
  443. * Expire timer according to Hypervisor Top-Level Functional
  444. * specification v4(15.3.1):
  445. * "If a one shot is enabled and the specified count is in
  446. * the past, it will expire immediately."
  447. */
  448. stimer_mark_pending(stimer, false);
  449. return 0;
  450. }
  451. trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
  452. stimer->index,
  453. time_now, stimer->count);
  454. hrtimer_start(&stimer->timer,
  455. ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
  456. HRTIMER_MODE_ABS);
  457. return 0;
  458. }
  459. static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
  460. bool host)
  461. {
  462. trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
  463. stimer->index, config, host);
  464. stimer_cleanup(stimer);
  465. if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0)
  466. config &= ~HV_STIMER_ENABLE;
  467. stimer->config = config;
  468. stimer_mark_pending(stimer, false);
  469. return 0;
  470. }
  471. static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
  472. bool host)
  473. {
  474. trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
  475. stimer->index, count, host);
  476. stimer_cleanup(stimer);
  477. stimer->count = count;
  478. if (stimer->count == 0)
  479. stimer->config &= ~HV_STIMER_ENABLE;
  480. else if (stimer->config & HV_STIMER_AUTOENABLE)
  481. stimer->config |= HV_STIMER_ENABLE;
  482. stimer_mark_pending(stimer, false);
  483. return 0;
  484. }
  485. static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
  486. {
  487. *pconfig = stimer->config;
  488. return 0;
  489. }
  490. static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
  491. {
  492. *pcount = stimer->count;
  493. return 0;
  494. }
  495. static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
  496. struct hv_message *src_msg)
  497. {
  498. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  499. struct page *page;
  500. gpa_t gpa;
  501. struct hv_message *dst_msg;
  502. int r;
  503. struct hv_message_page *msg_page;
  504. if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
  505. return -ENOENT;
  506. gpa = synic->msg_page & PAGE_MASK;
  507. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  508. if (is_error_page(page))
  509. return -EFAULT;
  510. msg_page = kmap_atomic(page);
  511. dst_msg = &msg_page->sint_message[sint];
  512. if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE,
  513. src_msg->header.message_type) != HVMSG_NONE) {
  514. dst_msg->header.message_flags.msg_pending = 1;
  515. r = -EAGAIN;
  516. } else {
  517. memcpy(&dst_msg->u.payload, &src_msg->u.payload,
  518. src_msg->header.payload_size);
  519. dst_msg->header.message_type = src_msg->header.message_type;
  520. dst_msg->header.payload_size = src_msg->header.payload_size;
  521. r = synic_set_irq(synic, sint);
  522. if (r >= 1)
  523. r = 0;
  524. else if (r == 0)
  525. r = -EFAULT;
  526. }
  527. kunmap_atomic(msg_page);
  528. kvm_release_page_dirty(page);
  529. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  530. return r;
  531. }
  532. static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
  533. {
  534. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  535. struct hv_message *msg = &stimer->msg;
  536. struct hv_timer_message_payload *payload =
  537. (struct hv_timer_message_payload *)&msg->u.payload;
  538. payload->expiration_time = stimer->exp_time;
  539. payload->delivery_time = get_time_ref_counter(vcpu->kvm);
  540. return synic_deliver_msg(vcpu_to_synic(vcpu),
  541. HV_STIMER_SINT(stimer->config), msg);
  542. }
  543. static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
  544. {
  545. int r;
  546. stimer->msg_pending = true;
  547. r = stimer_send_msg(stimer);
  548. trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
  549. stimer->index, r);
  550. if (!r) {
  551. stimer->msg_pending = false;
  552. if (!(stimer->config & HV_STIMER_PERIODIC))
  553. stimer->config &= ~HV_STIMER_ENABLE;
  554. }
  555. }
  556. void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
  557. {
  558. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  559. struct kvm_vcpu_hv_stimer *stimer;
  560. u64 time_now, exp_time;
  561. int i;
  562. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  563. if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
  564. stimer = &hv_vcpu->stimer[i];
  565. if (stimer->config & HV_STIMER_ENABLE) {
  566. exp_time = stimer->exp_time;
  567. if (exp_time) {
  568. time_now =
  569. get_time_ref_counter(vcpu->kvm);
  570. if (time_now >= exp_time)
  571. stimer_expiration(stimer);
  572. }
  573. if ((stimer->config & HV_STIMER_ENABLE) &&
  574. stimer->count) {
  575. if (!stimer->msg_pending)
  576. stimer_start(stimer);
  577. } else
  578. stimer_cleanup(stimer);
  579. }
  580. }
  581. }
  582. void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
  583. {
  584. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  585. int i;
  586. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  587. stimer_cleanup(&hv_vcpu->stimer[i]);
  588. }
  589. bool kvm_hv_assist_page_enabled(struct kvm_vcpu *vcpu)
  590. {
  591. if (!(vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE))
  592. return false;
  593. return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED;
  594. }
  595. EXPORT_SYMBOL_GPL(kvm_hv_assist_page_enabled);
  596. bool kvm_hv_get_assist_page(struct kvm_vcpu *vcpu,
  597. struct hv_vp_assist_page *assist_page)
  598. {
  599. if (!kvm_hv_assist_page_enabled(vcpu))
  600. return false;
  601. return !kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data,
  602. assist_page, sizeof(*assist_page));
  603. }
  604. EXPORT_SYMBOL_GPL(kvm_hv_get_assist_page);
  605. static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
  606. {
  607. struct hv_message *msg = &stimer->msg;
  608. struct hv_timer_message_payload *payload =
  609. (struct hv_timer_message_payload *)&msg->u.payload;
  610. memset(&msg->header, 0, sizeof(msg->header));
  611. msg->header.message_type = HVMSG_TIMER_EXPIRED;
  612. msg->header.payload_size = sizeof(*payload);
  613. payload->timer_index = stimer->index;
  614. payload->expiration_time = 0;
  615. payload->delivery_time = 0;
  616. }
  617. static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
  618. {
  619. memset(stimer, 0, sizeof(*stimer));
  620. stimer->index = timer_index;
  621. hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  622. stimer->timer.function = stimer_timer_callback;
  623. stimer_prepare_msg(stimer);
  624. }
  625. void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
  626. {
  627. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  628. int i;
  629. synic_init(&hv_vcpu->synic);
  630. bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
  631. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  632. stimer_init(&hv_vcpu->stimer[i], i);
  633. }
  634. void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
  635. {
  636. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  637. hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
  638. }
  639. int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
  640. {
  641. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  642. /*
  643. * Hyper-V SynIC auto EOI SINT's are
  644. * not compatible with APICV, so deactivate APICV
  645. */
  646. kvm_vcpu_deactivate_apicv(vcpu);
  647. synic->active = true;
  648. synic->dont_zero_synic_pages = dont_zero_synic_pages;
  649. return 0;
  650. }
  651. static bool kvm_hv_msr_partition_wide(u32 msr)
  652. {
  653. bool r = false;
  654. switch (msr) {
  655. case HV_X64_MSR_GUEST_OS_ID:
  656. case HV_X64_MSR_HYPERCALL:
  657. case HV_X64_MSR_REFERENCE_TSC:
  658. case HV_X64_MSR_TIME_REF_COUNT:
  659. case HV_X64_MSR_CRASH_CTL:
  660. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  661. case HV_X64_MSR_RESET:
  662. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  663. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  664. case HV_X64_MSR_TSC_EMULATION_STATUS:
  665. r = true;
  666. break;
  667. }
  668. return r;
  669. }
  670. static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
  671. u32 index, u64 *pdata)
  672. {
  673. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  674. size_t size = ARRAY_SIZE(hv->hv_crash_param);
  675. if (WARN_ON_ONCE(index >= size))
  676. return -EINVAL;
  677. *pdata = hv->hv_crash_param[array_index_nospec(index, size)];
  678. return 0;
  679. }
  680. static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
  681. {
  682. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  683. *pdata = hv->hv_crash_ctl;
  684. return 0;
  685. }
  686. static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
  687. {
  688. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  689. if (host)
  690. hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY;
  691. if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) {
  692. vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
  693. hv->hv_crash_param[0],
  694. hv->hv_crash_param[1],
  695. hv->hv_crash_param[2],
  696. hv->hv_crash_param[3],
  697. hv->hv_crash_param[4]);
  698. /* Send notification about crash to user space */
  699. kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
  700. }
  701. return 0;
  702. }
  703. static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
  704. u32 index, u64 data)
  705. {
  706. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  707. size_t size = ARRAY_SIZE(hv->hv_crash_param);
  708. if (WARN_ON_ONCE(index >= size))
  709. return -EINVAL;
  710. hv->hv_crash_param[array_index_nospec(index, size)] = data;
  711. return 0;
  712. }
  713. /*
  714. * The kvmclock and Hyper-V TSC page use similar formulas, and converting
  715. * between them is possible:
  716. *
  717. * kvmclock formula:
  718. * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
  719. * + system_time
  720. *
  721. * Hyper-V formula:
  722. * nsec/100 = ticks * scale / 2^64 + offset
  723. *
  724. * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
  725. * By dividing the kvmclock formula by 100 and equating what's left we get:
  726. * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  727. * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
  728. * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
  729. *
  730. * Now expand the kvmclock formula and divide by 100:
  731. * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
  732. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
  733. * + system_time
  734. * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  735. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  736. * + system_time / 100
  737. *
  738. * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
  739. * nsec/100 = ticks * scale / 2^64
  740. * - tsc_timestamp * scale / 2^64
  741. * + system_time / 100
  742. *
  743. * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
  744. * offset = system_time / 100 - tsc_timestamp * scale / 2^64
  745. *
  746. * These two equivalencies are implemented in this function.
  747. */
  748. static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
  749. HV_REFERENCE_TSC_PAGE *tsc_ref)
  750. {
  751. u64 max_mul;
  752. if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
  753. return false;
  754. /*
  755. * check if scale would overflow, if so we use the time ref counter
  756. * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
  757. * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
  758. * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
  759. */
  760. max_mul = 100ull << (32 - hv_clock->tsc_shift);
  761. if (hv_clock->tsc_to_system_mul >= max_mul)
  762. return false;
  763. /*
  764. * Otherwise compute the scale and offset according to the formulas
  765. * derived above.
  766. */
  767. tsc_ref->tsc_scale =
  768. mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
  769. hv_clock->tsc_to_system_mul,
  770. 100);
  771. tsc_ref->tsc_offset = hv_clock->system_time;
  772. do_div(tsc_ref->tsc_offset, 100);
  773. tsc_ref->tsc_offset -=
  774. mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
  775. return true;
  776. }
  777. void kvm_hv_setup_tsc_page(struct kvm *kvm,
  778. struct pvclock_vcpu_time_info *hv_clock)
  779. {
  780. struct kvm_hv *hv = &kvm->arch.hyperv;
  781. u32 tsc_seq;
  782. u64 gfn;
  783. BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
  784. BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
  785. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  786. return;
  787. mutex_lock(&kvm->arch.hyperv.hv_lock);
  788. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  789. goto out_unlock;
  790. gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
  791. /*
  792. * Because the TSC parameters only vary when there is a
  793. * change in the master clock, do not bother with caching.
  794. */
  795. if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
  796. &tsc_seq, sizeof(tsc_seq))))
  797. goto out_unlock;
  798. /*
  799. * While we're computing and writing the parameters, force the
  800. * guest to use the time reference count MSR.
  801. */
  802. hv->tsc_ref.tsc_sequence = 0;
  803. if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
  804. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
  805. goto out_unlock;
  806. if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
  807. goto out_unlock;
  808. /* Ensure sequence is zero before writing the rest of the struct. */
  809. smp_wmb();
  810. if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
  811. goto out_unlock;
  812. /*
  813. * Now switch to the TSC page mechanism by writing the sequence.
  814. */
  815. tsc_seq++;
  816. if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
  817. tsc_seq = 1;
  818. /* Write the struct entirely before the non-zero sequence. */
  819. smp_wmb();
  820. hv->tsc_ref.tsc_sequence = tsc_seq;
  821. kvm_write_guest(kvm, gfn_to_gpa(gfn),
  822. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
  823. out_unlock:
  824. mutex_unlock(&kvm->arch.hyperv.hv_lock);
  825. }
  826. static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
  827. bool host)
  828. {
  829. struct kvm *kvm = vcpu->kvm;
  830. struct kvm_hv *hv = &kvm->arch.hyperv;
  831. switch (msr) {
  832. case HV_X64_MSR_GUEST_OS_ID:
  833. hv->hv_guest_os_id = data;
  834. /* setting guest os id to zero disables hypercall page */
  835. if (!hv->hv_guest_os_id)
  836. hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
  837. break;
  838. case HV_X64_MSR_HYPERCALL: {
  839. u64 gfn;
  840. unsigned long addr;
  841. u8 instructions[4];
  842. /* if guest os id is not set hypercall should remain disabled */
  843. if (!hv->hv_guest_os_id)
  844. break;
  845. if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
  846. hv->hv_hypercall = data;
  847. break;
  848. }
  849. gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
  850. addr = gfn_to_hva(kvm, gfn);
  851. if (kvm_is_error_hva(addr))
  852. return 1;
  853. kvm_x86_ops->patch_hypercall(vcpu, instructions);
  854. ((unsigned char *)instructions)[3] = 0xc3; /* ret */
  855. if (__copy_to_user((void __user *)addr, instructions, 4))
  856. return 1;
  857. hv->hv_hypercall = data;
  858. mark_page_dirty(kvm, gfn);
  859. break;
  860. }
  861. case HV_X64_MSR_REFERENCE_TSC:
  862. hv->hv_tsc_page = data;
  863. if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
  864. kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
  865. break;
  866. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  867. return kvm_hv_msr_set_crash_data(vcpu,
  868. msr - HV_X64_MSR_CRASH_P0,
  869. data);
  870. case HV_X64_MSR_CRASH_CTL:
  871. return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
  872. case HV_X64_MSR_RESET:
  873. if (data == 1) {
  874. vcpu_debug(vcpu, "hyper-v reset requested\n");
  875. kvm_make_request(KVM_REQ_HV_RESET, vcpu);
  876. }
  877. break;
  878. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  879. hv->hv_reenlightenment_control = data;
  880. break;
  881. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  882. hv->hv_tsc_emulation_control = data;
  883. break;
  884. case HV_X64_MSR_TSC_EMULATION_STATUS:
  885. hv->hv_tsc_emulation_status = data;
  886. break;
  887. case HV_X64_MSR_TIME_REF_COUNT:
  888. /* read-only, but still ignore it if host-initiated */
  889. if (!host)
  890. return 1;
  891. break;
  892. default:
  893. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  894. msr, data);
  895. return 1;
  896. }
  897. return 0;
  898. }
  899. /* Calculate cpu time spent by current task in 100ns units */
  900. static u64 current_task_runtime_100ns(void)
  901. {
  902. u64 utime, stime;
  903. task_cputime_adjusted(current, &utime, &stime);
  904. return div_u64(utime + stime, 100);
  905. }
  906. static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  907. {
  908. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  909. switch (msr) {
  910. case HV_X64_MSR_VP_INDEX: {
  911. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  912. int vcpu_idx = kvm_vcpu_get_idx(vcpu);
  913. u32 new_vp_index = (u32)data;
  914. if (!host || new_vp_index >= KVM_MAX_VCPUS)
  915. return 1;
  916. if (new_vp_index == hv_vcpu->vp_index)
  917. return 0;
  918. /*
  919. * The VP index is initialized to vcpu_index by
  920. * kvm_hv_vcpu_postcreate so they initially match. Now the
  921. * VP index is changing, adjust num_mismatched_vp_indexes if
  922. * it now matches or no longer matches vcpu_idx.
  923. */
  924. if (hv_vcpu->vp_index == vcpu_idx)
  925. atomic_inc(&hv->num_mismatched_vp_indexes);
  926. else if (new_vp_index == vcpu_idx)
  927. atomic_dec(&hv->num_mismatched_vp_indexes);
  928. hv_vcpu->vp_index = new_vp_index;
  929. break;
  930. }
  931. case HV_X64_MSR_VP_ASSIST_PAGE: {
  932. u64 gfn;
  933. unsigned long addr;
  934. if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
  935. hv_vcpu->hv_vapic = data;
  936. if (kvm_lapic_enable_pv_eoi(vcpu, 0, 0))
  937. return 1;
  938. break;
  939. }
  940. gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
  941. addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
  942. if (kvm_is_error_hva(addr))
  943. return 1;
  944. if (__clear_user((void __user *)addr, PAGE_SIZE))
  945. return 1;
  946. hv_vcpu->hv_vapic = data;
  947. kvm_vcpu_mark_page_dirty(vcpu, gfn);
  948. if (kvm_lapic_enable_pv_eoi(vcpu,
  949. gfn_to_gpa(gfn) | KVM_MSR_ENABLED,
  950. sizeof(struct hv_vp_assist_page)))
  951. return 1;
  952. break;
  953. }
  954. case HV_X64_MSR_EOI:
  955. return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
  956. case HV_X64_MSR_ICR:
  957. return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
  958. case HV_X64_MSR_TPR:
  959. return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
  960. case HV_X64_MSR_VP_RUNTIME:
  961. if (!host)
  962. return 1;
  963. hv_vcpu->runtime_offset = data - current_task_runtime_100ns();
  964. break;
  965. case HV_X64_MSR_SCONTROL:
  966. case HV_X64_MSR_SVERSION:
  967. case HV_X64_MSR_SIEFP:
  968. case HV_X64_MSR_SIMP:
  969. case HV_X64_MSR_EOM:
  970. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  971. return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
  972. case HV_X64_MSR_STIMER0_CONFIG:
  973. case HV_X64_MSR_STIMER1_CONFIG:
  974. case HV_X64_MSR_STIMER2_CONFIG:
  975. case HV_X64_MSR_STIMER3_CONFIG: {
  976. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  977. return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
  978. data, host);
  979. }
  980. case HV_X64_MSR_STIMER0_COUNT:
  981. case HV_X64_MSR_STIMER1_COUNT:
  982. case HV_X64_MSR_STIMER2_COUNT:
  983. case HV_X64_MSR_STIMER3_COUNT: {
  984. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  985. return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
  986. data, host);
  987. }
  988. case HV_X64_MSR_TSC_FREQUENCY:
  989. case HV_X64_MSR_APIC_FREQUENCY:
  990. /* read-only, but still ignore it if host-initiated */
  991. if (!host)
  992. return 1;
  993. break;
  994. default:
  995. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  996. msr, data);
  997. return 1;
  998. }
  999. return 0;
  1000. }
  1001. static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  1002. {
  1003. u64 data = 0;
  1004. struct kvm *kvm = vcpu->kvm;
  1005. struct kvm_hv *hv = &kvm->arch.hyperv;
  1006. switch (msr) {
  1007. case HV_X64_MSR_GUEST_OS_ID:
  1008. data = hv->hv_guest_os_id;
  1009. break;
  1010. case HV_X64_MSR_HYPERCALL:
  1011. data = hv->hv_hypercall;
  1012. break;
  1013. case HV_X64_MSR_TIME_REF_COUNT:
  1014. data = get_time_ref_counter(kvm);
  1015. break;
  1016. case HV_X64_MSR_REFERENCE_TSC:
  1017. data = hv->hv_tsc_page;
  1018. break;
  1019. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  1020. return kvm_hv_msr_get_crash_data(vcpu,
  1021. msr - HV_X64_MSR_CRASH_P0,
  1022. pdata);
  1023. case HV_X64_MSR_CRASH_CTL:
  1024. return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
  1025. case HV_X64_MSR_RESET:
  1026. data = 0;
  1027. break;
  1028. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  1029. data = hv->hv_reenlightenment_control;
  1030. break;
  1031. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  1032. data = hv->hv_tsc_emulation_control;
  1033. break;
  1034. case HV_X64_MSR_TSC_EMULATION_STATUS:
  1035. data = hv->hv_tsc_emulation_status;
  1036. break;
  1037. default:
  1038. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1039. return 1;
  1040. }
  1041. *pdata = data;
  1042. return 0;
  1043. }
  1044. static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
  1045. bool host)
  1046. {
  1047. u64 data = 0;
  1048. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  1049. switch (msr) {
  1050. case HV_X64_MSR_VP_INDEX:
  1051. data = hv_vcpu->vp_index;
  1052. break;
  1053. case HV_X64_MSR_EOI:
  1054. return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
  1055. case HV_X64_MSR_ICR:
  1056. return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
  1057. case HV_X64_MSR_TPR:
  1058. return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
  1059. case HV_X64_MSR_VP_ASSIST_PAGE:
  1060. data = hv_vcpu->hv_vapic;
  1061. break;
  1062. case HV_X64_MSR_VP_RUNTIME:
  1063. data = current_task_runtime_100ns() + hv_vcpu->runtime_offset;
  1064. break;
  1065. case HV_X64_MSR_SCONTROL:
  1066. case HV_X64_MSR_SVERSION:
  1067. case HV_X64_MSR_SIEFP:
  1068. case HV_X64_MSR_SIMP:
  1069. case HV_X64_MSR_EOM:
  1070. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  1071. return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata, host);
  1072. case HV_X64_MSR_STIMER0_CONFIG:
  1073. case HV_X64_MSR_STIMER1_CONFIG:
  1074. case HV_X64_MSR_STIMER2_CONFIG:
  1075. case HV_X64_MSR_STIMER3_CONFIG: {
  1076. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  1077. return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
  1078. pdata);
  1079. }
  1080. case HV_X64_MSR_STIMER0_COUNT:
  1081. case HV_X64_MSR_STIMER1_COUNT:
  1082. case HV_X64_MSR_STIMER2_COUNT:
  1083. case HV_X64_MSR_STIMER3_COUNT: {
  1084. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  1085. return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
  1086. pdata);
  1087. }
  1088. case HV_X64_MSR_TSC_FREQUENCY:
  1089. data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
  1090. break;
  1091. case HV_X64_MSR_APIC_FREQUENCY:
  1092. data = APIC_BUS_FREQUENCY;
  1093. break;
  1094. default:
  1095. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1096. return 1;
  1097. }
  1098. *pdata = data;
  1099. return 0;
  1100. }
  1101. int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  1102. {
  1103. if (kvm_hv_msr_partition_wide(msr)) {
  1104. int r;
  1105. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1106. r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
  1107. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1108. return r;
  1109. } else
  1110. return kvm_hv_set_msr(vcpu, msr, data, host);
  1111. }
  1112. int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
  1113. {
  1114. if (kvm_hv_msr_partition_wide(msr)) {
  1115. int r;
  1116. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1117. r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
  1118. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1119. return r;
  1120. } else
  1121. return kvm_hv_get_msr(vcpu, msr, pdata, host);
  1122. }
  1123. static __always_inline int get_sparse_bank_no(u64 valid_bank_mask, int bank_no)
  1124. {
  1125. int i = 0, j;
  1126. if (!(valid_bank_mask & BIT_ULL(bank_no)))
  1127. return -1;
  1128. for (j = 0; j < bank_no; j++)
  1129. if (valid_bank_mask & BIT_ULL(j))
  1130. i++;
  1131. return i;
  1132. }
  1133. static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
  1134. u16 rep_cnt, bool ex)
  1135. {
  1136. struct kvm *kvm = current_vcpu->kvm;
  1137. struct kvm_vcpu_hv *hv_current = &current_vcpu->arch.hyperv;
  1138. struct hv_tlb_flush_ex flush_ex;
  1139. struct hv_tlb_flush flush;
  1140. struct kvm_vcpu *vcpu;
  1141. unsigned long vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)] = {0};
  1142. unsigned long valid_bank_mask = 0;
  1143. u64 sparse_banks[64];
  1144. int sparse_banks_len, i;
  1145. bool all_cpus;
  1146. if (!ex) {
  1147. if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
  1148. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1149. trace_kvm_hv_flush_tlb(flush.processor_mask,
  1150. flush.address_space, flush.flags);
  1151. sparse_banks[0] = flush.processor_mask;
  1152. /*
  1153. * Work around possible WS2012 bug: it sends hypercalls
  1154. * with processor_mask = 0x0 and HV_FLUSH_ALL_PROCESSORS clear,
  1155. * while also expecting us to flush something and crashing if
  1156. * we don't. Let's treat processor_mask == 0 same as
  1157. * HV_FLUSH_ALL_PROCESSORS.
  1158. */
  1159. all_cpus = (flush.flags & HV_FLUSH_ALL_PROCESSORS) ||
  1160. flush.processor_mask == 0;
  1161. } else {
  1162. if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
  1163. sizeof(flush_ex))))
  1164. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1165. trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
  1166. flush_ex.hv_vp_set.format,
  1167. flush_ex.address_space,
  1168. flush_ex.flags);
  1169. valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
  1170. all_cpus = flush_ex.hv_vp_set.format !=
  1171. HV_GENERIC_SET_SPARSE_4K;
  1172. sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
  1173. sizeof(sparse_banks[0]);
  1174. if (!sparse_banks_len && !all_cpus)
  1175. goto ret_success;
  1176. if (!all_cpus &&
  1177. kvm_read_guest(kvm,
  1178. ingpa + offsetof(struct hv_tlb_flush_ex,
  1179. hv_vp_set.bank_contents),
  1180. sparse_banks,
  1181. sparse_banks_len))
  1182. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1183. }
  1184. cpumask_clear(&hv_current->tlb_lush);
  1185. kvm_for_each_vcpu(i, vcpu, kvm) {
  1186. struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
  1187. int bank = hv->vp_index / 64, sbank = 0;
  1188. if (!all_cpus) {
  1189. /* Banks >64 can't be represented */
  1190. if (bank >= 64)
  1191. continue;
  1192. /* Non-ex hypercalls can only address first 64 vCPUs */
  1193. if (!ex && bank)
  1194. continue;
  1195. if (ex) {
  1196. /*
  1197. * Check is the bank of this vCPU is in sparse
  1198. * set and get the sparse bank number.
  1199. */
  1200. sbank = get_sparse_bank_no(valid_bank_mask,
  1201. bank);
  1202. if (sbank < 0)
  1203. continue;
  1204. }
  1205. if (!(sparse_banks[sbank] & BIT_ULL(hv->vp_index % 64)))
  1206. continue;
  1207. }
  1208. /*
  1209. * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we
  1210. * can't analyze it here, flush TLB regardless of the specified
  1211. * address space.
  1212. */
  1213. __set_bit(i, vcpu_bitmap);
  1214. }
  1215. kvm_make_vcpus_request_mask(kvm,
  1216. KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
  1217. vcpu_bitmap, &hv_current->tlb_lush);
  1218. ret_success:
  1219. /* We always do full TLB flush, set rep_done = rep_cnt. */
  1220. return (u64)HV_STATUS_SUCCESS |
  1221. ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
  1222. }
  1223. bool kvm_hv_hypercall_enabled(struct kvm *kvm)
  1224. {
  1225. return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
  1226. }
  1227. static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
  1228. {
  1229. bool longmode;
  1230. longmode = is_64_bit_mode(vcpu);
  1231. if (longmode)
  1232. kvm_register_write(vcpu, VCPU_REGS_RAX, result);
  1233. else {
  1234. kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32);
  1235. kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff);
  1236. }
  1237. }
  1238. static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
  1239. {
  1240. kvm_hv_hypercall_set_result(vcpu, result);
  1241. ++vcpu->stat.hypercalls;
  1242. return kvm_skip_emulated_instruction(vcpu);
  1243. }
  1244. static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
  1245. {
  1246. return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
  1247. }
  1248. static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
  1249. {
  1250. struct eventfd_ctx *eventfd;
  1251. if (unlikely(!fast)) {
  1252. int ret;
  1253. gpa_t gpa = param;
  1254. if ((gpa & (__alignof__(param) - 1)) ||
  1255. offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
  1256. return HV_STATUS_INVALID_ALIGNMENT;
  1257. ret = kvm_vcpu_read_guest(vcpu, gpa, &param, sizeof(param));
  1258. if (ret < 0)
  1259. return HV_STATUS_INVALID_ALIGNMENT;
  1260. }
  1261. /*
  1262. * Per spec, bits 32-47 contain the extra "flag number". However, we
  1263. * have no use for it, and in all known usecases it is zero, so just
  1264. * report lookup failure if it isn't.
  1265. */
  1266. if (param & 0xffff00000000ULL)
  1267. return HV_STATUS_INVALID_PORT_ID;
  1268. /* remaining bits are reserved-zero */
  1269. if (param & ~KVM_HYPERV_CONN_ID_MASK)
  1270. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1271. /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
  1272. rcu_read_lock();
  1273. eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
  1274. rcu_read_unlock();
  1275. if (!eventfd)
  1276. return HV_STATUS_INVALID_PORT_ID;
  1277. eventfd_signal(eventfd, 1);
  1278. return HV_STATUS_SUCCESS;
  1279. }
  1280. int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
  1281. {
  1282. u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
  1283. uint16_t code, rep_idx, rep_cnt;
  1284. bool fast, longmode, rep;
  1285. /*
  1286. * hypercall generates UD from non zero cpl and real mode
  1287. * per HYPER-V spec
  1288. */
  1289. if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
  1290. kvm_queue_exception(vcpu, UD_VECTOR);
  1291. return 1;
  1292. }
  1293. longmode = is_64_bit_mode(vcpu);
  1294. if (!longmode) {
  1295. param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
  1296. (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
  1297. ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
  1298. (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
  1299. outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
  1300. (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
  1301. }
  1302. #ifdef CONFIG_X86_64
  1303. else {
  1304. param = kvm_register_read(vcpu, VCPU_REGS_RCX);
  1305. ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
  1306. outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
  1307. }
  1308. #endif
  1309. code = param & 0xffff;
  1310. fast = !!(param & HV_HYPERCALL_FAST_BIT);
  1311. rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
  1312. rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
  1313. rep = !!(rep_cnt || rep_idx);
  1314. trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
  1315. switch (code) {
  1316. case HVCALL_NOTIFY_LONG_SPIN_WAIT:
  1317. if (unlikely(rep)) {
  1318. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1319. break;
  1320. }
  1321. kvm_vcpu_on_spin(vcpu, true);
  1322. break;
  1323. case HVCALL_SIGNAL_EVENT:
  1324. if (unlikely(rep)) {
  1325. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1326. break;
  1327. }
  1328. ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
  1329. if (ret != HV_STATUS_INVALID_PORT_ID)
  1330. break;
  1331. /* maybe userspace knows this conn_id: fall through */
  1332. case HVCALL_POST_MESSAGE:
  1333. /* don't bother userspace if it has no way to handle it */
  1334. if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
  1335. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1336. break;
  1337. }
  1338. vcpu->run->exit_reason = KVM_EXIT_HYPERV;
  1339. vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
  1340. vcpu->run->hyperv.u.hcall.input = param;
  1341. vcpu->run->hyperv.u.hcall.params[0] = ingpa;
  1342. vcpu->run->hyperv.u.hcall.params[1] = outgpa;
  1343. vcpu->arch.complete_userspace_io =
  1344. kvm_hv_hypercall_complete_userspace;
  1345. return 0;
  1346. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
  1347. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1348. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1349. break;
  1350. }
  1351. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1352. break;
  1353. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
  1354. if (unlikely(fast || rep)) {
  1355. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1356. break;
  1357. }
  1358. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1359. break;
  1360. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
  1361. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1362. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1363. break;
  1364. }
  1365. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1366. break;
  1367. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
  1368. if (unlikely(fast || rep)) {
  1369. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1370. break;
  1371. }
  1372. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1373. break;
  1374. default:
  1375. ret = HV_STATUS_INVALID_HYPERCALL_CODE;
  1376. break;
  1377. }
  1378. return kvm_hv_hypercall_complete(vcpu, ret);
  1379. }
  1380. void kvm_hv_init_vm(struct kvm *kvm)
  1381. {
  1382. mutex_init(&kvm->arch.hyperv.hv_lock);
  1383. idr_init(&kvm->arch.hyperv.conn_to_evt);
  1384. }
  1385. void kvm_hv_destroy_vm(struct kvm *kvm)
  1386. {
  1387. struct eventfd_ctx *eventfd;
  1388. int i;
  1389. idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
  1390. eventfd_ctx_put(eventfd);
  1391. idr_destroy(&kvm->arch.hyperv.conn_to_evt);
  1392. }
  1393. static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
  1394. {
  1395. struct kvm_hv *hv = &kvm->arch.hyperv;
  1396. struct eventfd_ctx *eventfd;
  1397. int ret;
  1398. eventfd = eventfd_ctx_fdget(fd);
  1399. if (IS_ERR(eventfd))
  1400. return PTR_ERR(eventfd);
  1401. mutex_lock(&hv->hv_lock);
  1402. ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
  1403. GFP_KERNEL);
  1404. mutex_unlock(&hv->hv_lock);
  1405. if (ret >= 0)
  1406. return 0;
  1407. if (ret == -ENOSPC)
  1408. ret = -EEXIST;
  1409. eventfd_ctx_put(eventfd);
  1410. return ret;
  1411. }
  1412. static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
  1413. {
  1414. struct kvm_hv *hv = &kvm->arch.hyperv;
  1415. struct eventfd_ctx *eventfd;
  1416. mutex_lock(&hv->hv_lock);
  1417. eventfd = idr_remove(&hv->conn_to_evt, conn_id);
  1418. mutex_unlock(&hv->hv_lock);
  1419. if (!eventfd)
  1420. return -ENOENT;
  1421. synchronize_srcu(&kvm->srcu);
  1422. eventfd_ctx_put(eventfd);
  1423. return 0;
  1424. }
  1425. int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
  1426. {
  1427. if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
  1428. (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
  1429. return -EINVAL;
  1430. if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
  1431. return kvm_hv_eventfd_deassign(kvm, args->conn_id);
  1432. return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
  1433. }