pci-tx4939.c 2.6 KB

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  1. /*
  2. * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
  3. * and RBTX49xx patch from CELF patch archive.
  4. *
  5. * Copyright 2001, 2003-2005 MontaVista Software Inc.
  6. * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  7. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/kernel.h>
  16. #include <linux/interrupt.h>
  17. #include <asm/txx9/generic.h>
  18. #include <asm/txx9/tx4939.h>
  19. int __init tx4939_report_pciclk(void)
  20. {
  21. int pciclk = 0;
  22. pr_info("PCIC --%s PCICLK:",
  23. (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
  24. " PCI66" : "");
  25. if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
  26. pciclk = txx9_master_clock * 20 / 6;
  27. if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
  28. pciclk /= 2;
  29. pr_cont("Internal(%u.%uMHz)",
  30. (pciclk + 50000) / 1000000,
  31. ((pciclk + 50000) / 100000) % 10);
  32. } else {
  33. pr_cont("External");
  34. pciclk = -1;
  35. }
  36. pr_cont("\n");
  37. return pciclk;
  38. }
  39. void __init tx4939_report_pci1clk(void)
  40. {
  41. unsigned int pciclk = txx9_master_clock * 20 / 6;
  42. pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
  43. (pciclk + 50000) / 1000000,
  44. ((pciclk + 50000) / 100000) % 10);
  45. }
  46. int tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
  47. {
  48. if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
  49. switch (slot) {
  50. case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
  51. if (__raw_readq(&tx4939_ccfgptr->pcfg) &
  52. TX4939_PCFG_ET0MODE)
  53. return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
  54. break;
  55. case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
  56. if (__raw_readq(&tx4939_ccfgptr->pcfg) &
  57. TX4939_PCFG_ET1MODE)
  58. return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
  59. break;
  60. }
  61. return 0;
  62. }
  63. return -1;
  64. }
  65. int tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  66. {
  67. int irq = tx4939_pcic1_map_irq(dev, slot);
  68. if (irq >= 0)
  69. return irq;
  70. irq = pin;
  71. /* IRQ rotation */
  72. irq--; /* 0-3 */
  73. irq = (irq + 33 - slot) % 4;
  74. irq++; /* 1-4 */
  75. switch (irq) {
  76. case 1:
  77. irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
  78. break;
  79. case 2:
  80. irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
  81. break;
  82. case 3:
  83. irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
  84. break;
  85. case 4:
  86. irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
  87. break;
  88. }
  89. return irq;
  90. }
  91. void __init tx4939_setup_pcierr_irq(void)
  92. {
  93. if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
  94. tx4927_pcierr_interrupt,
  95. 0, "PCI error",
  96. (void *)TX4939_PCIC_REG))
  97. pr_warn("Failed to request irq for PCIERR\n");
  98. }