paravirt-smp.c 3.3 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2013 Cavium, Inc.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/cpumask.h>
  10. #include <linux/kernel.h>
  11. #include <linux/sched.h>
  12. #include <linux/sched/task_stack.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/setup.h>
  15. #include <asm/time.h>
  16. #include <asm/smp.h>
  17. /*
  18. * Writing the sp releases the CPU, so writes must be ordered, gp
  19. * first, then sp.
  20. */
  21. unsigned long paravirt_smp_sp[NR_CPUS];
  22. unsigned long paravirt_smp_gp[NR_CPUS];
  23. static int numcpus = 1;
  24. static int __init set_numcpus(char *str)
  25. {
  26. int newval;
  27. if (get_option(&str, &newval)) {
  28. if (newval < 1 || newval >= NR_CPUS)
  29. goto bad;
  30. numcpus = newval;
  31. return 0;
  32. }
  33. bad:
  34. return -EINVAL;
  35. }
  36. early_param("numcpus", set_numcpus);
  37. static void paravirt_smp_setup(void)
  38. {
  39. int id;
  40. unsigned int cpunum = get_ebase_cpunum();
  41. if (WARN_ON(cpunum >= NR_CPUS))
  42. return;
  43. /* The present CPUs are initially just the boot cpu (CPU 0). */
  44. for (id = 0; id < NR_CPUS; id++) {
  45. set_cpu_possible(id, id == 0);
  46. set_cpu_present(id, id == 0);
  47. }
  48. __cpu_number_map[cpunum] = 0;
  49. __cpu_logical_map[0] = cpunum;
  50. for (id = 0; id < numcpus; id++) {
  51. set_cpu_possible(id, true);
  52. set_cpu_present(id, true);
  53. __cpu_number_map[id] = id;
  54. __cpu_logical_map[id] = id;
  55. }
  56. }
  57. void irq_mbox_ipi(int cpu, unsigned int actions);
  58. static void paravirt_send_ipi_single(int cpu, unsigned int action)
  59. {
  60. irq_mbox_ipi(cpu, action);
  61. }
  62. static void paravirt_send_ipi_mask(const struct cpumask *mask, unsigned int action)
  63. {
  64. unsigned int cpu;
  65. for_each_cpu(cpu, mask)
  66. paravirt_send_ipi_single(cpu, action);
  67. }
  68. static void paravirt_init_secondary(void)
  69. {
  70. unsigned int sr;
  71. sr = set_c0_status(ST0_BEV);
  72. write_c0_ebase((u32)ebase);
  73. sr |= STATUSF_IP2; /* Interrupt controller on IP2 */
  74. write_c0_status(sr);
  75. irq_cpu_online();
  76. }
  77. static void paravirt_smp_finish(void)
  78. {
  79. /* to generate the first CPU timer interrupt */
  80. write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
  81. local_irq_enable();
  82. }
  83. static int paravirt_boot_secondary(int cpu, struct task_struct *idle)
  84. {
  85. paravirt_smp_gp[cpu] = (unsigned long)task_thread_info(idle);
  86. smp_wmb();
  87. paravirt_smp_sp[cpu] = __KSTK_TOS(idle);
  88. return 0;
  89. }
  90. static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id)
  91. {
  92. scheduler_ipi();
  93. return IRQ_HANDLED;
  94. }
  95. static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)
  96. {
  97. generic_smp_call_function_interrupt();
  98. return IRQ_HANDLED;
  99. }
  100. static void paravirt_prepare_cpus(unsigned int max_cpus)
  101. {
  102. if (request_irq(MIPS_IRQ_MBOX0, paravirt_reched_interrupt,
  103. IRQF_PERCPU | IRQF_NO_THREAD, "Scheduler",
  104. paravirt_reched_interrupt)) {
  105. panic("Cannot request_irq for SchedulerIPI");
  106. }
  107. if (request_irq(MIPS_IRQ_MBOX1, paravirt_function_interrupt,
  108. IRQF_PERCPU | IRQF_NO_THREAD, "SMP-Call",
  109. paravirt_function_interrupt)) {
  110. panic("Cannot request_irq for SMP-Call");
  111. }
  112. }
  113. const struct plat_smp_ops paravirt_smp_ops = {
  114. .send_ipi_single = paravirt_send_ipi_single,
  115. .send_ipi_mask = paravirt_send_ipi_mask,
  116. .init_secondary = paravirt_init_secondary,
  117. .smp_finish = paravirt_smp_finish,
  118. .boot_secondary = paravirt_boot_secondary,
  119. .smp_setup = paravirt_smp_setup,
  120. .prepare_cpus = paravirt_prepare_cpus,
  121. };