prom.c 2.5 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify it
  3. * under the terms of the GNU General Public License version 2 as published
  4. * by the Free Software Foundation.
  5. *
  6. * Copyright (C) 2010 John Crispin <john@phrozen.org>
  7. */
  8. #include <linux/export.h>
  9. #include <linux/clk.h>
  10. #include <linux/bootmem.h>
  11. #include <linux/of_fdt.h>
  12. #include <asm/bootinfo.h>
  13. #include <asm/time.h>
  14. #include <asm/prom.h>
  15. #include <lantiq.h>
  16. #include "prom.h"
  17. #include "clk.h"
  18. /* access to the ebu needs to be locked between different drivers */
  19. DEFINE_SPINLOCK(ebu_lock);
  20. EXPORT_SYMBOL_GPL(ebu_lock);
  21. /*
  22. * This is needed by the VPE loader code, just set it to 0 and assume
  23. * that the firmware hardcodes this value to something useful.
  24. */
  25. unsigned long physical_memsize = 0L;
  26. /*
  27. * this struct is filled by the soc specific detection code and holds
  28. * information about the specific soc type, revision and name
  29. */
  30. static struct ltq_soc_info soc_info;
  31. const char *get_system_type(void)
  32. {
  33. return soc_info.sys_type;
  34. }
  35. int ltq_soc_type(void)
  36. {
  37. return soc_info.type;
  38. }
  39. void __init prom_free_prom_memory(void)
  40. {
  41. }
  42. static void __init prom_init_cmdline(void)
  43. {
  44. int argc = fw_arg0;
  45. char **argv = (char **) KSEG1ADDR(fw_arg1);
  46. int i;
  47. arcs_cmdline[0] = '\0';
  48. for (i = 0; i < argc; i++) {
  49. char *p = (char *) KSEG1ADDR(argv[i]);
  50. if (CPHYSADDR(p) && *p) {
  51. strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
  52. strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
  53. }
  54. }
  55. }
  56. void __init plat_mem_setup(void)
  57. {
  58. void *dtb;
  59. ioport_resource.start = IOPORT_RESOURCE_START;
  60. ioport_resource.end = IOPORT_RESOURCE_END;
  61. iomem_resource.start = IOMEM_RESOURCE_START;
  62. iomem_resource.end = IOMEM_RESOURCE_END;
  63. set_io_port_base((unsigned long) KSEG1);
  64. if (fw_passed_dtb) /* UHI interface */
  65. dtb = (void *)fw_passed_dtb;
  66. else if (__dtb_start != __dtb_end)
  67. dtb = (void *)__dtb_start;
  68. else
  69. panic("no dtb found");
  70. /*
  71. * Load the devicetree. This causes the chosen node to be
  72. * parsed resulting in our memory appearing
  73. */
  74. __dt_setup_arch(dtb);
  75. }
  76. void __init device_tree_init(void)
  77. {
  78. unflatten_and_copy_device_tree();
  79. }
  80. void __init prom_init(void)
  81. {
  82. /* call the soc specific detetcion code and get it to fill soc_info */
  83. ltq_soc_detect(&soc_info);
  84. snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
  85. soc_info.name, soc_info.rev_type);
  86. soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
  87. pr_info("SoC: %s\n", soc_info.sys_type);
  88. prom_init_cmdline();
  89. #if defined(CONFIG_MIPS_MT_SMP)
  90. if (register_vsmp_smp_ops())
  91. panic("failed to register_vsmp_smp_ops()");
  92. #endif
  93. }