sltimers.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /***************************************************************************/
  3. /*
  4. * sltimers.c -- generic ColdFire slice timer support.
  5. *
  6. * Copyright (C) 2009-2010, Philippe De Muyter <phdm@macqel.be>
  7. * based on
  8. * timers.c -- generic ColdFire hardware timer support.
  9. * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
  10. */
  11. /***************************************************************************/
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/profile.h>
  18. #include <linux/clocksource.h>
  19. #include <asm/io.h>
  20. #include <asm/traps.h>
  21. #include <asm/machdep.h>
  22. #include <asm/coldfire.h>
  23. #include <asm/mcfslt.h>
  24. #include <asm/mcfsim.h>
  25. /***************************************************************************/
  26. #ifdef CONFIG_HIGHPROFILE
  27. /*
  28. * By default use Slice Timer 1 as the profiler clock timer.
  29. */
  30. #define PA(a) (MCFSLT_TIMER1 + (a))
  31. /*
  32. * Choose a reasonably fast profile timer. Make it an odd value to
  33. * try and get good coverage of kernel operations.
  34. */
  35. #define PROFILEHZ 1013
  36. irqreturn_t mcfslt_profile_tick(int irq, void *dummy)
  37. {
  38. /* Reset Slice Timer 1 */
  39. __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
  40. if (current->pid)
  41. profile_tick(CPU_PROFILING);
  42. return IRQ_HANDLED;
  43. }
  44. static struct irqaction mcfslt_profile_irq = {
  45. .name = "profile timer",
  46. .flags = IRQF_TIMER,
  47. .handler = mcfslt_profile_tick,
  48. };
  49. void mcfslt_profile_init(void)
  50. {
  51. printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n",
  52. PROFILEHZ);
  53. setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq);
  54. /* Set up TIMER 2 as high speed profile clock */
  55. __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
  56. __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
  57. PA(MCFSLT_SCR));
  58. }
  59. #endif /* CONFIG_HIGHPROFILE */
  60. /***************************************************************************/
  61. /*
  62. * By default use Slice Timer 0 as the system clock timer.
  63. */
  64. #define TA(a) (MCFSLT_TIMER0 + (a))
  65. static u32 mcfslt_cycles_per_jiffy;
  66. static u32 mcfslt_cnt;
  67. static irq_handler_t timer_interrupt;
  68. static irqreturn_t mcfslt_tick(int irq, void *dummy)
  69. {
  70. /* Reset Slice Timer 0 */
  71. __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
  72. mcfslt_cnt += mcfslt_cycles_per_jiffy;
  73. return timer_interrupt(irq, dummy);
  74. }
  75. static struct irqaction mcfslt_timer_irq = {
  76. .name = "timer",
  77. .flags = IRQF_TIMER,
  78. .handler = mcfslt_tick,
  79. };
  80. static u64 mcfslt_read_clk(struct clocksource *cs)
  81. {
  82. unsigned long flags;
  83. u32 cycles, scnt;
  84. local_irq_save(flags);
  85. scnt = __raw_readl(TA(MCFSLT_SCNT));
  86. cycles = mcfslt_cnt;
  87. if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
  88. cycles += mcfslt_cycles_per_jiffy;
  89. scnt = __raw_readl(TA(MCFSLT_SCNT));
  90. }
  91. local_irq_restore(flags);
  92. /* subtract because slice timers count down */
  93. return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt);
  94. }
  95. static struct clocksource mcfslt_clk = {
  96. .name = "slt",
  97. .rating = 250,
  98. .read = mcfslt_read_clk,
  99. .mask = CLOCKSOURCE_MASK(32),
  100. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  101. };
  102. void hw_timer_init(irq_handler_t handler)
  103. {
  104. mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ;
  105. /*
  106. * The coldfire slice timer (SLT) runs from STCNT to 0 included,
  107. * then STCNT again and so on. It counts thus actually
  108. * STCNT + 1 steps for 1 tick, not STCNT. So if you want
  109. * n cycles, initialize STCNT with n - 1.
  110. */
  111. __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
  112. __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
  113. TA(MCFSLT_SCR));
  114. /* initialize mcfslt_cnt knowing that slice timers count down */
  115. mcfslt_cnt = mcfslt_cycles_per_jiffy;
  116. timer_interrupt = handler;
  117. setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq);
  118. clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK);
  119. #ifdef CONFIG_HIGHPROFILE
  120. mcfslt_profile_init();
  121. #endif
  122. }