debug-sr.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206
  1. /*
  2. * Copyright (C) 2015 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include <linux/compiler.h>
  18. #include <linux/kvm_host.h>
  19. #include <asm/debug-monitors.h>
  20. #include <asm/kvm_asm.h>
  21. #include <asm/kvm_hyp.h>
  22. #include <asm/kvm_mmu.h>
  23. #define read_debug(r,n) read_sysreg(r##n##_el1)
  24. #define write_debug(v,r,n) write_sysreg(v, r##n##_el1)
  25. #define save_debug(ptr,reg,nr) \
  26. switch (nr) { \
  27. case 15: ptr[15] = read_debug(reg, 15); \
  28. case 14: ptr[14] = read_debug(reg, 14); \
  29. case 13: ptr[13] = read_debug(reg, 13); \
  30. case 12: ptr[12] = read_debug(reg, 12); \
  31. case 11: ptr[11] = read_debug(reg, 11); \
  32. case 10: ptr[10] = read_debug(reg, 10); \
  33. case 9: ptr[9] = read_debug(reg, 9); \
  34. case 8: ptr[8] = read_debug(reg, 8); \
  35. case 7: ptr[7] = read_debug(reg, 7); \
  36. case 6: ptr[6] = read_debug(reg, 6); \
  37. case 5: ptr[5] = read_debug(reg, 5); \
  38. case 4: ptr[4] = read_debug(reg, 4); \
  39. case 3: ptr[3] = read_debug(reg, 3); \
  40. case 2: ptr[2] = read_debug(reg, 2); \
  41. case 1: ptr[1] = read_debug(reg, 1); \
  42. default: ptr[0] = read_debug(reg, 0); \
  43. }
  44. #define restore_debug(ptr,reg,nr) \
  45. switch (nr) { \
  46. case 15: write_debug(ptr[15], reg, 15); \
  47. case 14: write_debug(ptr[14], reg, 14); \
  48. case 13: write_debug(ptr[13], reg, 13); \
  49. case 12: write_debug(ptr[12], reg, 12); \
  50. case 11: write_debug(ptr[11], reg, 11); \
  51. case 10: write_debug(ptr[10], reg, 10); \
  52. case 9: write_debug(ptr[9], reg, 9); \
  53. case 8: write_debug(ptr[8], reg, 8); \
  54. case 7: write_debug(ptr[7], reg, 7); \
  55. case 6: write_debug(ptr[6], reg, 6); \
  56. case 5: write_debug(ptr[5], reg, 5); \
  57. case 4: write_debug(ptr[4], reg, 4); \
  58. case 3: write_debug(ptr[3], reg, 3); \
  59. case 2: write_debug(ptr[2], reg, 2); \
  60. case 1: write_debug(ptr[1], reg, 1); \
  61. default: write_debug(ptr[0], reg, 0); \
  62. }
  63. static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1)
  64. {
  65. u64 reg;
  66. /* Clear pmscr in case of early return */
  67. *pmscr_el1 = 0;
  68. /* SPE present on this CPU? */
  69. if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1),
  70. ID_AA64DFR0_PMSVER_SHIFT))
  71. return;
  72. /* Yes; is it owned by EL3? */
  73. reg = read_sysreg_s(SYS_PMBIDR_EL1);
  74. if (reg & BIT(SYS_PMBIDR_EL1_P_SHIFT))
  75. return;
  76. /* No; is the host actually using the thing? */
  77. reg = read_sysreg_s(SYS_PMBLIMITR_EL1);
  78. if (!(reg & BIT(SYS_PMBLIMITR_EL1_E_SHIFT)))
  79. return;
  80. /* Yes; save the control register and disable data generation */
  81. *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1);
  82. write_sysreg_s(0, SYS_PMSCR_EL1);
  83. isb();
  84. /* Now drain all buffered data to memory */
  85. psb_csync();
  86. dsb(nsh);
  87. }
  88. static void __hyp_text __debug_restore_spe_nvhe(u64 pmscr_el1)
  89. {
  90. if (!pmscr_el1)
  91. return;
  92. /* The host page table is installed, but not yet synchronised */
  93. isb();
  94. /* Re-enable data generation */
  95. write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1);
  96. }
  97. static void __hyp_text __debug_save_state(struct kvm_vcpu *vcpu,
  98. struct kvm_guest_debug_arch *dbg,
  99. struct kvm_cpu_context *ctxt)
  100. {
  101. u64 aa64dfr0;
  102. int brps, wrps;
  103. aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
  104. brps = (aa64dfr0 >> 12) & 0xf;
  105. wrps = (aa64dfr0 >> 20) & 0xf;
  106. save_debug(dbg->dbg_bcr, dbgbcr, brps);
  107. save_debug(dbg->dbg_bvr, dbgbvr, brps);
  108. save_debug(dbg->dbg_wcr, dbgwcr, wrps);
  109. save_debug(dbg->dbg_wvr, dbgwvr, wrps);
  110. ctxt->sys_regs[MDCCINT_EL1] = read_sysreg(mdccint_el1);
  111. }
  112. static void __hyp_text __debug_restore_state(struct kvm_vcpu *vcpu,
  113. struct kvm_guest_debug_arch *dbg,
  114. struct kvm_cpu_context *ctxt)
  115. {
  116. u64 aa64dfr0;
  117. int brps, wrps;
  118. aa64dfr0 = read_sysreg(id_aa64dfr0_el1);
  119. brps = (aa64dfr0 >> 12) & 0xf;
  120. wrps = (aa64dfr0 >> 20) & 0xf;
  121. restore_debug(dbg->dbg_bcr, dbgbcr, brps);
  122. restore_debug(dbg->dbg_bvr, dbgbvr, brps);
  123. restore_debug(dbg->dbg_wcr, dbgwcr, wrps);
  124. restore_debug(dbg->dbg_wvr, dbgwvr, wrps);
  125. write_sysreg(ctxt->sys_regs[MDCCINT_EL1], mdccint_el1);
  126. }
  127. void __hyp_text __debug_switch_to_guest(struct kvm_vcpu *vcpu)
  128. {
  129. struct kvm_cpu_context *host_ctxt;
  130. struct kvm_cpu_context *guest_ctxt;
  131. struct kvm_guest_debug_arch *host_dbg;
  132. struct kvm_guest_debug_arch *guest_dbg;
  133. /*
  134. * Non-VHE: Disable and flush SPE data generation
  135. * VHE: The vcpu can run, but it can't hide.
  136. */
  137. if (!has_vhe())
  138. __debug_save_spe_nvhe(&vcpu->arch.host_debug_state.pmscr_el1);
  139. if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY))
  140. return;
  141. host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context);
  142. guest_ctxt = &vcpu->arch.ctxt;
  143. host_dbg = &vcpu->arch.host_debug_state.regs;
  144. guest_dbg = kern_hyp_va(vcpu->arch.debug_ptr);
  145. __debug_save_state(vcpu, host_dbg, host_ctxt);
  146. __debug_restore_state(vcpu, guest_dbg, guest_ctxt);
  147. }
  148. void __hyp_text __debug_switch_to_host(struct kvm_vcpu *vcpu)
  149. {
  150. struct kvm_cpu_context *host_ctxt;
  151. struct kvm_cpu_context *guest_ctxt;
  152. struct kvm_guest_debug_arch *host_dbg;
  153. struct kvm_guest_debug_arch *guest_dbg;
  154. if (!has_vhe())
  155. __debug_restore_spe_nvhe(vcpu->arch.host_debug_state.pmscr_el1);
  156. if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY))
  157. return;
  158. host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context);
  159. guest_ctxt = &vcpu->arch.ctxt;
  160. host_dbg = &vcpu->arch.host_debug_state.regs;
  161. guest_dbg = kern_hyp_va(vcpu->arch.debug_ptr);
  162. __debug_save_state(vcpu, guest_dbg, guest_ctxt);
  163. __debug_restore_state(vcpu, host_dbg, host_ctxt);
  164. vcpu->arch.flags &= ~KVM_ARM64_DEBUG_DIRTY;
  165. }
  166. u32 __hyp_text __kvm_get_mdcr_el2(void)
  167. {
  168. return read_sysreg(mdcr_el2);
  169. }