rk3399-firefly.dts 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/input/linux-event-codes.h>
  7. #include <dt-bindings/pwm/pwm.h>
  8. #include "rk3399.dtsi"
  9. #include "rk3399-opp.dtsi"
  10. / {
  11. model = "Firefly-RK3399 Board";
  12. compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
  13. chosen {
  14. stdout-path = "serial2:1500000n8";
  15. };
  16. backlight: backlight {
  17. compatible = "pwm-backlight";
  18. enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
  19. pwms = <&pwm0 0 25000 0>;
  20. brightness-levels = <
  21. 0 1 2 3 4 5 6 7
  22. 8 9 10 11 12 13 14 15
  23. 16 17 18 19 20 21 22 23
  24. 24 25 26 27 28 29 30 31
  25. 32 33 34 35 36 37 38 39
  26. 40 41 42 43 44 45 46 47
  27. 48 49 50 51 52 53 54 55
  28. 56 57 58 59 60 61 62 63
  29. 64 65 66 67 68 69 70 71
  30. 72 73 74 75 76 77 78 79
  31. 80 81 82 83 84 85 86 87
  32. 88 89 90 91 92 93 94 95
  33. 96 97 98 99 100 101 102 103
  34. 104 105 106 107 108 109 110 111
  35. 112 113 114 115 116 117 118 119
  36. 120 121 122 123 124 125 126 127
  37. 128 129 130 131 132 133 134 135
  38. 136 137 138 139 140 141 142 143
  39. 144 145 146 147 148 149 150 151
  40. 152 153 154 155 156 157 158 159
  41. 160 161 162 163 164 165 166 167
  42. 168 169 170 171 172 173 174 175
  43. 176 177 178 179 180 181 182 183
  44. 184 185 186 187 188 189 190 191
  45. 192 193 194 195 196 197 198 199
  46. 200 201 202 203 204 205 206 207
  47. 208 209 210 211 212 213 214 215
  48. 216 217 218 219 220 221 222 223
  49. 224 225 226 227 228 229 230 231
  50. 232 233 234 235 236 237 238 239
  51. 240 241 242 243 244 245 246 247
  52. 248 249 250 251 252 253 254 255>;
  53. default-brightness-level = <200>;
  54. };
  55. clkin_gmac: external-gmac-clock {
  56. compatible = "fixed-clock";
  57. clock-frequency = <125000000>;
  58. clock-output-names = "clkin_gmac";
  59. #clock-cells = <0>;
  60. };
  61. dc_12v: dc-12v {
  62. compatible = "regulator-fixed";
  63. regulator-name = "dc_12v";
  64. regulator-always-on;
  65. regulator-boot-on;
  66. regulator-min-microvolt = <12000000>;
  67. regulator-max-microvolt = <12000000>;
  68. };
  69. gpio-keys {
  70. compatible = "gpio-keys";
  71. autorepeat;
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&pwrbtn>;
  74. power {
  75. debounce-interval = <100>;
  76. gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
  77. label = "GPIO Key Power";
  78. linux,code = <KEY_POWER>;
  79. wakeup-source;
  80. };
  81. };
  82. leds {
  83. compatible = "gpio-leds";
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
  86. work-led {
  87. label = "work";
  88. default-state = "on";
  89. gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
  90. };
  91. diy-led {
  92. label = "diy";
  93. default-state = "off";
  94. gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
  95. };
  96. };
  97. rt5640-sound {
  98. compatible = "simple-audio-card";
  99. simple-audio-card,name = "rockchip,rt5640-codec";
  100. simple-audio-card,format = "i2s";
  101. simple-audio-card,mclk-fs = <256>;
  102. simple-audio-card,widgets =
  103. "Microphone", "Mic Jack",
  104. "Headphone", "Headphone Jack";
  105. simple-audio-card,routing =
  106. "Mic Jack", "MICBIAS1",
  107. "IN1P", "Mic Jack",
  108. "Headphone Jack", "HPOL",
  109. "Headphone Jack", "HPOR";
  110. simple-audio-card,cpu {
  111. sound-dai = <&i2s1>;
  112. };
  113. simple-audio-card,codec {
  114. sound-dai = <&rt5640>;
  115. };
  116. };
  117. sdio_pwrseq: sdio-pwrseq {
  118. compatible = "mmc-pwrseq-simple";
  119. clocks = <&rk808 1>;
  120. clock-names = "ext_clock";
  121. pinctrl-names = "default";
  122. pinctrl-0 = <&wifi_enable_h>;
  123. /*
  124. * On the module itself this is one of these (depending
  125. * on the actual card populated):
  126. * - SDIO_RESET_L_WL_REG_ON
  127. * - PDN (power down when low)
  128. */
  129. reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
  130. };
  131. /* switched by pmic_sleep */
  132. vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
  133. compatible = "regulator-fixed";
  134. regulator-name = "vcc1v8_s3";
  135. regulator-always-on;
  136. regulator-boot-on;
  137. regulator-min-microvolt = <1800000>;
  138. regulator-max-microvolt = <1800000>;
  139. vin-supply = <&vcc_1v8>;
  140. };
  141. vcc3v3_pcie: vcc3v3-pcie-regulator {
  142. compatible = "regulator-fixed";
  143. enable-active-high;
  144. gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&pcie_pwr_en>;
  147. regulator-name = "vcc3v3_pcie";
  148. regulator-always-on;
  149. regulator-boot-on;
  150. vin-supply = <&dc_12v>;
  151. };
  152. vcc3v3_sys: vcc3v3-sys {
  153. compatible = "regulator-fixed";
  154. regulator-name = "vcc3v3_sys";
  155. regulator-always-on;
  156. regulator-boot-on;
  157. regulator-min-microvolt = <3300000>;
  158. regulator-max-microvolt = <3300000>;
  159. vin-supply = <&vcc_sys>;
  160. };
  161. /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
  162. vcc5v0_host: vcc5v0-host-regulator {
  163. compatible = "regulator-fixed";
  164. enable-active-high;
  165. gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
  166. pinctrl-names = "default";
  167. pinctrl-0 = <&vcc5v0_host_en>;
  168. regulator-name = "vcc5v0_host";
  169. regulator-always-on;
  170. vin-supply = <&vcc_sys>;
  171. };
  172. vcc_sys: vcc-sys {
  173. compatible = "regulator-fixed";
  174. regulator-name = "vcc_sys";
  175. regulator-always-on;
  176. regulator-boot-on;
  177. regulator-min-microvolt = <5000000>;
  178. regulator-max-microvolt = <5000000>;
  179. vin-supply = <&dc_12v>;
  180. };
  181. vdd_log: vdd-log {
  182. compatible = "pwm-regulator";
  183. pwms = <&pwm2 0 25000 1>;
  184. regulator-name = "vdd_log";
  185. regulator-always-on;
  186. regulator-boot-on;
  187. regulator-min-microvolt = <800000>;
  188. regulator-max-microvolt = <1400000>;
  189. vin-supply = <&vcc_sys>;
  190. };
  191. };
  192. &cpu_l0 {
  193. cpu-supply = <&vdd_cpu_l>;
  194. };
  195. &cpu_l1 {
  196. cpu-supply = <&vdd_cpu_l>;
  197. };
  198. &cpu_l2 {
  199. cpu-supply = <&vdd_cpu_l>;
  200. };
  201. &cpu_l3 {
  202. cpu-supply = <&vdd_cpu_l>;
  203. };
  204. &cpu_b0 {
  205. cpu-supply = <&vdd_cpu_b>;
  206. };
  207. &cpu_b1 {
  208. cpu-supply = <&vdd_cpu_b>;
  209. };
  210. &emmc_phy {
  211. status = "okay";
  212. };
  213. &gmac {
  214. assigned-clocks = <&cru SCLK_RMII_SRC>;
  215. assigned-clock-parents = <&clkin_gmac>;
  216. clock_in_out = "input";
  217. phy-supply = <&vcc_lan>;
  218. phy-mode = "rgmii";
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&rgmii_pins>;
  221. snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  222. snps,reset-active-low;
  223. snps,reset-delays-us = <0 10000 50000>;
  224. tx_delay = <0x28>;
  225. rx_delay = <0x11>;
  226. status = "okay";
  227. };
  228. &hdmi {
  229. ddc-i2c-bus = <&i2c3>;
  230. pinctrl-names = "default";
  231. pinctrl-0 = <&hdmi_cec>;
  232. status = "okay";
  233. };
  234. &i2c0 {
  235. clock-frequency = <400000>;
  236. i2c-scl-rising-time-ns = <168>;
  237. i2c-scl-falling-time-ns = <4>;
  238. status = "okay";
  239. rk808: pmic@1b {
  240. compatible = "rockchip,rk808";
  241. reg = <0x1b>;
  242. interrupt-parent = <&gpio1>;
  243. interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  244. #clock-cells = <1>;
  245. clock-output-names = "xin32k", "rk808-clkout2";
  246. pinctrl-names = "default";
  247. pinctrl-0 = <&pmic_int_l>;
  248. rockchip,system-power-controller;
  249. wakeup-source;
  250. vcc1-supply = <&vcc_sys>;
  251. vcc2-supply = <&vcc_sys>;
  252. vcc3-supply = <&vcc_sys>;
  253. vcc4-supply = <&vcc_sys>;
  254. vcc6-supply = <&vcc_sys>;
  255. vcc7-supply = <&vcc_sys>;
  256. vcc8-supply = <&vcc3v3_sys>;
  257. vcc9-supply = <&vcc_sys>;
  258. vcc10-supply = <&vcc_sys>;
  259. vcc11-supply = <&vcc_sys>;
  260. vcc12-supply = <&vcc3v3_sys>;
  261. vddio-supply = <&vcc1v8_pmu>;
  262. regulators {
  263. vdd_center: DCDC_REG1 {
  264. regulator-name = "vdd_center";
  265. regulator-always-on;
  266. regulator-boot-on;
  267. regulator-min-microvolt = <750000>;
  268. regulator-max-microvolt = <1350000>;
  269. regulator-ramp-delay = <6001>;
  270. regulator-state-mem {
  271. regulator-off-in-suspend;
  272. };
  273. };
  274. vdd_cpu_l: DCDC_REG2 {
  275. regulator-name = "vdd_cpu_l";
  276. regulator-always-on;
  277. regulator-boot-on;
  278. regulator-min-microvolt = <750000>;
  279. regulator-max-microvolt = <1350000>;
  280. regulator-ramp-delay = <6001>;
  281. regulator-state-mem {
  282. regulator-off-in-suspend;
  283. };
  284. };
  285. vcc_ddr: DCDC_REG3 {
  286. regulator-name = "vcc_ddr";
  287. regulator-always-on;
  288. regulator-boot-on;
  289. regulator-state-mem {
  290. regulator-on-in-suspend;
  291. };
  292. };
  293. vcc_1v8: DCDC_REG4 {
  294. regulator-name = "vcc_1v8";
  295. regulator-always-on;
  296. regulator-boot-on;
  297. regulator-min-microvolt = <1800000>;
  298. regulator-max-microvolt = <1800000>;
  299. regulator-state-mem {
  300. regulator-on-in-suspend;
  301. regulator-suspend-microvolt = <1800000>;
  302. };
  303. };
  304. vcc1v8_dvp: LDO_REG1 {
  305. regulator-name = "vcc1v8_dvp";
  306. regulator-always-on;
  307. regulator-boot-on;
  308. regulator-min-microvolt = <1800000>;
  309. regulator-max-microvolt = <1800000>;
  310. regulator-state-mem {
  311. regulator-off-in-suspend;
  312. };
  313. };
  314. vcc2v8_dvp: LDO_REG2 {
  315. regulator-name = "vcc2v8_dvp";
  316. regulator-always-on;
  317. regulator-boot-on;
  318. regulator-min-microvolt = <2800000>;
  319. regulator-max-microvolt = <2800000>;
  320. regulator-state-mem {
  321. regulator-off-in-suspend;
  322. };
  323. };
  324. vcc1v8_pmu: LDO_REG3 {
  325. regulator-name = "vcc1v8_pmu";
  326. regulator-always-on;
  327. regulator-boot-on;
  328. regulator-min-microvolt = <1800000>;
  329. regulator-max-microvolt = <1800000>;
  330. regulator-state-mem {
  331. regulator-on-in-suspend;
  332. regulator-suspend-microvolt = <1800000>;
  333. };
  334. };
  335. vcc_sdio: LDO_REG4 {
  336. regulator-name = "vcc_sdio";
  337. regulator-always-on;
  338. regulator-boot-on;
  339. regulator-min-microvolt = <1800000>;
  340. regulator-max-microvolt = <3000000>;
  341. regulator-state-mem {
  342. regulator-on-in-suspend;
  343. regulator-suspend-microvolt = <3000000>;
  344. };
  345. };
  346. vcca3v0_codec: LDO_REG5 {
  347. regulator-name = "vcca3v0_codec";
  348. regulator-always-on;
  349. regulator-boot-on;
  350. regulator-min-microvolt = <3000000>;
  351. regulator-max-microvolt = <3000000>;
  352. regulator-state-mem {
  353. regulator-off-in-suspend;
  354. };
  355. };
  356. vcc_1v5: LDO_REG6 {
  357. regulator-name = "vcc_1v5";
  358. regulator-always-on;
  359. regulator-boot-on;
  360. regulator-min-microvolt = <1500000>;
  361. regulator-max-microvolt = <1500000>;
  362. regulator-state-mem {
  363. regulator-on-in-suspend;
  364. regulator-suspend-microvolt = <1500000>;
  365. };
  366. };
  367. vcca1v8_codec: LDO_REG7 {
  368. regulator-name = "vcca1v8_codec";
  369. regulator-always-on;
  370. regulator-boot-on;
  371. regulator-min-microvolt = <1800000>;
  372. regulator-max-microvolt = <1800000>;
  373. regulator-state-mem {
  374. regulator-off-in-suspend;
  375. };
  376. };
  377. vcc_3v0: LDO_REG8 {
  378. regulator-name = "vcc_3v0";
  379. regulator-always-on;
  380. regulator-boot-on;
  381. regulator-min-microvolt = <3000000>;
  382. regulator-max-microvolt = <3000000>;
  383. regulator-state-mem {
  384. regulator-on-in-suspend;
  385. regulator-suspend-microvolt = <3000000>;
  386. };
  387. };
  388. vcc3v3_s3: vcc_lan: SWITCH_REG1 {
  389. regulator-name = "vcc3v3_s3";
  390. regulator-always-on;
  391. regulator-boot-on;
  392. regulator-state-mem {
  393. regulator-off-in-suspend;
  394. };
  395. };
  396. vcc3v3_s0: SWITCH_REG2 {
  397. regulator-name = "vcc3v3_s0";
  398. regulator-always-on;
  399. regulator-boot-on;
  400. regulator-state-mem {
  401. regulator-off-in-suspend;
  402. };
  403. };
  404. };
  405. };
  406. vdd_cpu_b: regulator@40 {
  407. compatible = "silergy,syr827";
  408. reg = <0x40>;
  409. fcs,suspend-voltage-selector = <1>;
  410. regulator-name = "vdd_cpu_b";
  411. regulator-min-microvolt = <712500>;
  412. regulator-max-microvolt = <1500000>;
  413. regulator-ramp-delay = <1000>;
  414. regulator-always-on;
  415. regulator-boot-on;
  416. vin-supply = <&vcc_sys>;
  417. regulator-state-mem {
  418. regulator-off-in-suspend;
  419. };
  420. };
  421. vdd_gpu: regulator@41 {
  422. compatible = "silergy,syr828";
  423. reg = <0x41>;
  424. fcs,suspend-voltage-selector = <1>;
  425. regulator-name = "vdd_gpu";
  426. regulator-min-microvolt = <712500>;
  427. regulator-max-microvolt = <1500000>;
  428. regulator-ramp-delay = <1000>;
  429. regulator-always-on;
  430. regulator-boot-on;
  431. vin-supply = <&vcc_sys>;
  432. regulator-state-mem {
  433. regulator-off-in-suspend;
  434. };
  435. };
  436. };
  437. &i2c1 {
  438. i2c-scl-rising-time-ns = <300>;
  439. i2c-scl-falling-time-ns = <15>;
  440. status = "okay";
  441. rt5640: rt5640@1c {
  442. compatible = "realtek,rt5640";
  443. reg = <0x1c>;
  444. clocks = <&cru SCLK_I2S_8CH_OUT>;
  445. clock-names = "mclk";
  446. realtek,in1-differential;
  447. #sound-dai-cells = <0>;
  448. pinctrl-names = "default";
  449. pinctrl-0 = <&rt5640_hpcon>;
  450. };
  451. };
  452. &i2c3 {
  453. i2c-scl-rising-time-ns = <450>;
  454. i2c-scl-falling-time-ns = <15>;
  455. status = "okay";
  456. };
  457. &i2c4 {
  458. i2c-scl-rising-time-ns = <600>;
  459. i2c-scl-falling-time-ns = <20>;
  460. status = "okay";
  461. accelerometer@68 {
  462. compatible = "invensense,mpu6500";
  463. reg = <0x68>;
  464. interrupt-parent = <&gpio1>;
  465. interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
  466. };
  467. };
  468. &i2s0 {
  469. rockchip,playback-channels = <8>;
  470. rockchip,capture-channels = <8>;
  471. status = "okay";
  472. };
  473. &i2s1 {
  474. rockchip,playback-channels = <2>;
  475. rockchip,capture-channels = <2>;
  476. status = "okay";
  477. };
  478. &i2s2 {
  479. status = "okay";
  480. };
  481. &io_domains {
  482. status = "okay";
  483. bt656-supply = <&vcc1v8_dvp>;
  484. audio-supply = <&vcca1v8_codec>;
  485. sdmmc-supply = <&vcc_sdio>;
  486. gpio1830-supply = <&vcc_3v0>;
  487. };
  488. &pcie_phy {
  489. status = "okay";
  490. };
  491. &pcie0 {
  492. ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
  493. num-lanes = <4>;
  494. pinctrl-names = "default";
  495. pinctrl-0 = <&pcie_clkreqn_cpm>;
  496. status = "okay";
  497. };
  498. &pmu_io_domains {
  499. pmu1830-supply = <&vcc_3v0>;
  500. status = "okay";
  501. };
  502. &pinctrl {
  503. buttons {
  504. pwrbtn: pwrbtn {
  505. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
  506. };
  507. };
  508. lcd-panel {
  509. lcd_panel_reset: lcd-panel-reset {
  510. rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
  511. };
  512. };
  513. pcie {
  514. pcie_pwr_en: pcie-pwr-en {
  515. rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  516. };
  517. pcie_3g_drv: pcie-3g-drv {
  518. rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
  519. };
  520. };
  521. pmic {
  522. vsel1_gpio: vsel1-gpio {
  523. rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
  524. };
  525. vsel2_gpio: vsel2-gpio {
  526. rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
  527. };
  528. };
  529. sdio-pwrseq {
  530. wifi_enable_h: wifi-enable-h {
  531. rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  532. };
  533. };
  534. rt5640 {
  535. rt5640_hpcon: rt5640-hpcon {
  536. rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
  537. };
  538. };
  539. pmic {
  540. pmic_int_l: pmic-int-l {
  541. rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  542. };
  543. };
  544. usb2 {
  545. vcc5v0_host_en: vcc5v0-host-en {
  546. rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  547. };
  548. };
  549. leds {
  550. work_led_gpio: work_led-gpio {
  551. rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
  552. };
  553. diy_led_gpio: diy_led-gpio {
  554. rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  555. };
  556. };
  557. };
  558. &pwm0 {
  559. status = "okay";
  560. };
  561. &pwm2 {
  562. status = "okay";
  563. };
  564. &saradc {
  565. vref-supply = <&vcca1v8_s3>;
  566. status = "okay";
  567. };
  568. &sdmmc {
  569. bus-width = <4>;
  570. cap-mmc-highspeed;
  571. cap-sd-highspeed;
  572. cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  573. disable-wp;
  574. max-frequency = <150000000>;
  575. pinctrl-names = "default";
  576. pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
  577. status = "okay";
  578. };
  579. &sdhci {
  580. bus-width = <8>;
  581. mmc-hs400-1_8v;
  582. mmc-hs400-enhanced-strobe;
  583. non-removable;
  584. status = "okay";
  585. };
  586. &tcphy0 {
  587. status = "okay";
  588. };
  589. &tcphy1 {
  590. status = "okay";
  591. };
  592. &tsadc {
  593. /* tshut mode 0:CRU 1:GPIO */
  594. rockchip,hw-tshut-mode = <1>;
  595. /* tshut polarity 0:LOW 1:HIGH */
  596. rockchip,hw-tshut-polarity = <1>;
  597. status = "okay";
  598. };
  599. &u2phy0 {
  600. status = "okay";
  601. u2phy0_otg: otg-port {
  602. status = "okay";
  603. };
  604. u2phy0_host: host-port {
  605. phy-supply = <&vcc5v0_host>;
  606. status = "okay";
  607. };
  608. };
  609. &u2phy1 {
  610. status = "okay";
  611. u2phy1_otg: otg-port {
  612. status = "okay";
  613. };
  614. u2phy1_host: host-port {
  615. phy-supply = <&vcc5v0_host>;
  616. status = "okay";
  617. };
  618. };
  619. &uart0 {
  620. pinctrl-names = "default";
  621. pinctrl-0 = <&uart0_xfer &uart0_cts>;
  622. status = "okay";
  623. };
  624. &uart2 {
  625. status = "okay";
  626. };
  627. &usb_host0_ehci {
  628. status = "okay";
  629. };
  630. &usb_host0_ohci {
  631. status = "okay";
  632. };
  633. &usb_host1_ehci {
  634. status = "okay";
  635. };
  636. &usb_host1_ohci {
  637. status = "okay";
  638. };
  639. &usbdrd3_0 {
  640. status = "okay";
  641. };
  642. &usbdrd_dwc3_0 {
  643. status = "okay";
  644. dr_mode = "otg";
  645. };
  646. &usbdrd3_1 {
  647. status = "okay";
  648. };
  649. &usbdrd_dwc3_1 {
  650. status = "okay";
  651. dr_mode = "host";
  652. };
  653. &vopb {
  654. status = "okay";
  655. };
  656. &vopb_mmu {
  657. status = "okay";
  658. };
  659. &vopl {
  660. status = "okay";
  661. };
  662. &vopl_mmu {
  663. status = "okay";
  664. };