ulcb.dtsi 8.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the R-Car Gen3 ULCB board
  4. *
  5. * Copyright (C) 2016 Renesas Electronics Corp.
  6. * Copyright (C) 2016 Cogent Embedded, Inc.
  7. */
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/input/input.h>
  10. / {
  11. model = "Renesas R-Car Gen3 ULCB board";
  12. aliases {
  13. serial0 = &scif2;
  14. ethernet0 = &avb;
  15. };
  16. chosen {
  17. stdout-path = "serial0:115200n8";
  18. };
  19. audio_clkout: audio-clkout {
  20. /*
  21. * This is same as <&rcar_sound 0>
  22. * but needed to avoid cs2000/rcar_sound probe dead-lock
  23. */
  24. compatible = "fixed-clock";
  25. #clock-cells = <0>;
  26. clock-frequency = <12288000>;
  27. };
  28. hdmi0-out {
  29. compatible = "hdmi-connector";
  30. type = "a";
  31. port {
  32. hdmi0_con: endpoint {
  33. };
  34. };
  35. };
  36. keyboard {
  37. compatible = "gpio-keys";
  38. key-1 {
  39. linux,code = <KEY_1>;
  40. label = "SW3";
  41. wakeup-source;
  42. debounce-interval = <20>;
  43. gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  44. };
  45. };
  46. leds {
  47. compatible = "gpio-leds";
  48. led5 {
  49. gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  50. };
  51. led6 {
  52. gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  53. };
  54. };
  55. reg_1p8v: regulator0 {
  56. compatible = "regulator-fixed";
  57. regulator-name = "fixed-1.8V";
  58. regulator-min-microvolt = <1800000>;
  59. regulator-max-microvolt = <1800000>;
  60. regulator-boot-on;
  61. regulator-always-on;
  62. };
  63. reg_3p3v: regulator1 {
  64. compatible = "regulator-fixed";
  65. regulator-name = "fixed-3.3V";
  66. regulator-min-microvolt = <3300000>;
  67. regulator-max-microvolt = <3300000>;
  68. regulator-boot-on;
  69. regulator-always-on;
  70. };
  71. rsnd_ak4613: sound {
  72. compatible = "simple-audio-card";
  73. simple-audio-card,format = "left_j";
  74. simple-audio-card,bitclock-master = <&sndcpu>;
  75. simple-audio-card,frame-master = <&sndcpu>;
  76. sndcpu: simple-audio-card,cpu {
  77. sound-dai = <&rcar_sound>;
  78. };
  79. sndcodec: simple-audio-card,codec {
  80. sound-dai = <&ak4613>;
  81. };
  82. };
  83. vcc_sdhi0: regulator-vcc-sdhi0 {
  84. compatible = "regulator-fixed";
  85. regulator-name = "SDHI0 Vcc";
  86. regulator-min-microvolt = <3300000>;
  87. regulator-max-microvolt = <3300000>;
  88. gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  89. enable-active-high;
  90. };
  91. vccq_sdhi0: regulator-vccq-sdhi0 {
  92. compatible = "regulator-gpio";
  93. regulator-name = "SDHI0 VccQ";
  94. regulator-min-microvolt = <1800000>;
  95. regulator-max-microvolt = <3300000>;
  96. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
  97. gpios-states = <1>;
  98. states = <3300000 1
  99. 1800000 0>;
  100. };
  101. x12_clk: x12 {
  102. compatible = "fixed-clock";
  103. #clock-cells = <0>;
  104. clock-frequency = <24576000>;
  105. };
  106. x23_clk: x23-clock {
  107. compatible = "fixed-clock";
  108. #clock-cells = <0>;
  109. clock-frequency = <25000000>;
  110. };
  111. };
  112. &audio_clk_a {
  113. clock-frequency = <22579200>;
  114. };
  115. &avb {
  116. pinctrl-0 = <&avb_pins>;
  117. pinctrl-names = "default";
  118. phy-handle = <&phy0>;
  119. phy-mode = "rgmii-txid";
  120. status = "okay";
  121. phy0: ethernet-phy@0 {
  122. rxc-skew-ps = <1500>;
  123. reg = <0>;
  124. interrupt-parent = <&gpio2>;
  125. interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  126. reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  127. };
  128. };
  129. &du {
  130. status = "okay";
  131. };
  132. &ehci1 {
  133. status = "okay";
  134. };
  135. &extal_clk {
  136. clock-frequency = <16666666>;
  137. };
  138. &extalr_clk {
  139. clock-frequency = <32768>;
  140. };
  141. &hdmi0 {
  142. status = "okay";
  143. ports {
  144. port@1 {
  145. reg = <1>;
  146. rcar_dw_hdmi0_out: endpoint {
  147. remote-endpoint = <&hdmi0_con>;
  148. };
  149. };
  150. };
  151. };
  152. &hdmi0_con {
  153. remote-endpoint = <&rcar_dw_hdmi0_out>;
  154. };
  155. &i2c2 {
  156. pinctrl-0 = <&i2c2_pins>;
  157. pinctrl-names = "default";
  158. status = "okay";
  159. clock-frequency = <100000>;
  160. ak4613: codec@10 {
  161. compatible = "asahi-kasei,ak4613";
  162. #sound-dai-cells = <0>;
  163. reg = <0x10>;
  164. clocks = <&rcar_sound 3>;
  165. asahi-kasei,in1-single-end;
  166. asahi-kasei,in2-single-end;
  167. asahi-kasei,out1-single-end;
  168. asahi-kasei,out2-single-end;
  169. asahi-kasei,out3-single-end;
  170. asahi-kasei,out4-single-end;
  171. asahi-kasei,out5-single-end;
  172. asahi-kasei,out6-single-end;
  173. };
  174. cs2000: clk-multiplier@4f {
  175. #clock-cells = <0>;
  176. compatible = "cirrus,cs2000-cp";
  177. reg = <0x4f>;
  178. clocks = <&audio_clkout>, <&x12_clk>;
  179. clock-names = "clk_in", "ref_clk";
  180. assigned-clocks = <&cs2000>;
  181. assigned-clock-rates = <24576000>; /* 1/1 divide */
  182. };
  183. };
  184. &i2c4 {
  185. status = "okay";
  186. clock-frequency = <400000>;
  187. versaclock5: clock-generator@6a {
  188. compatible = "idt,5p49v5925";
  189. reg = <0x6a>;
  190. #clock-cells = <1>;
  191. clocks = <&x23_clk>;
  192. clock-names = "xin";
  193. };
  194. };
  195. &i2c_dvfs {
  196. status = "okay";
  197. pmic: pmic@30 {
  198. pinctrl-0 = <&irq0_pins>;
  199. pinctrl-names = "default";
  200. compatible = "rohm,bd9571mwv";
  201. reg = <0x30>;
  202. interrupt-parent = <&intc_ex>;
  203. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  204. interrupt-controller;
  205. #interrupt-cells = <2>;
  206. gpio-controller;
  207. #gpio-cells = <2>;
  208. rohm,ddr-backup-power = <0xf>;
  209. rohm,rstbmode-pulse;
  210. regulators {
  211. dvfs: dvfs {
  212. regulator-name = "dvfs";
  213. regulator-min-microvolt = <750000>;
  214. regulator-max-microvolt = <1030000>;
  215. regulator-boot-on;
  216. regulator-always-on;
  217. };
  218. };
  219. };
  220. };
  221. &ohci1 {
  222. status = "okay";
  223. };
  224. &pfc {
  225. pinctrl-0 = <&scif_clk_pins>;
  226. pinctrl-names = "default";
  227. avb_pins: avb {
  228. mux {
  229. groups = "avb_link", "avb_mdio", "avb_mii";
  230. function = "avb";
  231. };
  232. pins_mdio {
  233. groups = "avb_mdio";
  234. drive-strength = <24>;
  235. };
  236. pins_mii_tx {
  237. pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  238. "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  239. drive-strength = <12>;
  240. };
  241. };
  242. i2c2_pins: i2c2 {
  243. groups = "i2c2_a";
  244. function = "i2c2";
  245. };
  246. irq0_pins: irq0 {
  247. groups = "intc_ex_irq0";
  248. function = "intc_ex";
  249. };
  250. scif2_pins: scif2 {
  251. groups = "scif2_data_a";
  252. function = "scif2";
  253. };
  254. scif_clk_pins: scif_clk {
  255. groups = "scif_clk_a";
  256. function = "scif_clk";
  257. };
  258. sdhi0_pins: sd0 {
  259. groups = "sdhi0_data4", "sdhi0_ctrl";
  260. function = "sdhi0";
  261. power-source = <3300>;
  262. };
  263. sdhi0_pins_uhs: sd0_uhs {
  264. groups = "sdhi0_data4", "sdhi0_ctrl";
  265. function = "sdhi0";
  266. power-source = <1800>;
  267. };
  268. sdhi2_pins: sd2 {
  269. groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
  270. function = "sdhi2";
  271. power-source = <3300>;
  272. };
  273. sdhi2_pins_uhs: sd2_uhs {
  274. groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
  275. function = "sdhi2";
  276. power-source = <1800>;
  277. };
  278. sound_pins: sound {
  279. groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
  280. function = "ssi";
  281. };
  282. sound_clk_pins: sound-clk {
  283. groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
  284. "audio_clkout_a", "audio_clkout3_a";
  285. function = "audio_clk";
  286. };
  287. usb1_pins: usb1 {
  288. groups = "usb1";
  289. function = "usb1";
  290. };
  291. };
  292. &rcar_sound {
  293. pinctrl-0 = <&sound_pins &sound_clk_pins>;
  294. pinctrl-names = "default";
  295. /* Single DAI */
  296. #sound-dai-cells = <0>;
  297. /* audio_clkout0/1/2/3 */
  298. #clock-cells = <1>;
  299. clock-frequency = <12288000 11289600>;
  300. status = "okay";
  301. /* update <audio_clk_b> to <cs2000> */
  302. clocks = <&cpg CPG_MOD 1005>,
  303. <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
  304. <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
  305. <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
  306. <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
  307. <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
  308. <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
  309. <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
  310. <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
  311. <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
  312. <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
  313. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  314. <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  315. <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
  316. <&audio_clk_a>, <&cs2000>,
  317. <&audio_clk_c>,
  318. <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
  319. rcar_sound,dai {
  320. dai0 {
  321. playback = <&ssi0 &src0 &dvc0>;
  322. capture = <&ssi1 &src1 &dvc1>;
  323. };
  324. };
  325. };
  326. &scif2 {
  327. pinctrl-0 = <&scif2_pins>;
  328. pinctrl-names = "default";
  329. status = "okay";
  330. };
  331. &scif_clk {
  332. clock-frequency = <14745600>;
  333. };
  334. &sdhi0 {
  335. pinctrl-0 = <&sdhi0_pins>;
  336. pinctrl-1 = <&sdhi0_pins_uhs>;
  337. pinctrl-names = "default", "state_uhs";
  338. vmmc-supply = <&vcc_sdhi0>;
  339. vqmmc-supply = <&vccq_sdhi0>;
  340. cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  341. bus-width = <4>;
  342. sd-uhs-sdr50;
  343. status = "okay";
  344. };
  345. &sdhi2 {
  346. /* used for on-board 8bit eMMC */
  347. pinctrl-0 = <&sdhi2_pins>;
  348. pinctrl-1 = <&sdhi2_pins_uhs>;
  349. pinctrl-names = "default", "state_uhs";
  350. vmmc-supply = <&reg_3p3v>;
  351. vqmmc-supply = <&reg_1p8v>;
  352. bus-width = <8>;
  353. mmc-hs200-1_8v;
  354. non-removable;
  355. status = "okay";
  356. };
  357. &ssi1 {
  358. shared-pin;
  359. };
  360. &usb2_phy1 {
  361. pinctrl-0 = <&usb1_pins>;
  362. pinctrl-names = "default";
  363. status = "okay";
  364. };
  365. &rwdt {
  366. timeout-sec = <60>;
  367. status = "okay";
  368. };