tegra210-p2571.dts 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /dts-v1/;
  3. #include <dt-bindings/input/input.h>
  4. #include "tegra210-p2530.dtsi"
  5. / {
  6. model = "NVIDIA Tegra210 P2571 reference design";
  7. compatible = "nvidia,p2571", "nvidia,tegra210";
  8. pinmux: pinmux@700008d4 {
  9. pinctrl-names = "boot";
  10. pinctrl-0 = <&state_boot>;
  11. state_boot: pinmux {
  12. pex_l0_rst_n_pa0 {
  13. nvidia,pins = "pex_l0_rst_n_pa0";
  14. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  15. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  16. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  17. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  18. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  19. };
  20. pex_l0_clkreq_n_pa1 {
  21. nvidia,pins = "pex_l0_clkreq_n_pa1";
  22. nvidia,function = "rsvd1";
  23. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  24. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  25. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  26. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  27. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  28. };
  29. pex_wake_n_pa2 {
  30. nvidia,pins = "pex_wake_n_pa2";
  31. nvidia,function = "rsvd1";
  32. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  33. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  34. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  35. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  36. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  37. };
  38. pex_l1_rst_n_pa3 {
  39. nvidia,pins = "pex_l1_rst_n_pa3";
  40. nvidia,function = "rsvd1";
  41. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  42. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  43. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  44. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  45. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  46. };
  47. pex_l1_clkreq_n_pa4 {
  48. nvidia,pins = "pex_l1_clkreq_n_pa4";
  49. nvidia,function = "rsvd1";
  50. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  51. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  52. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  53. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  54. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  55. };
  56. sata_led_active_pa5 {
  57. nvidia,pins = "sata_led_active_pa5";
  58. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  59. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  60. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  61. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  62. };
  63. pa6 {
  64. nvidia,pins = "pa6";
  65. nvidia,function = "rsvd1";
  66. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  67. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  68. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  69. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  70. };
  71. dap1_fs_pb0 {
  72. nvidia,pins = "dap1_fs_pb0";
  73. nvidia,function = "rsvd1";
  74. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  75. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  76. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  77. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  78. };
  79. dap1_din_pb1 {
  80. nvidia,pins = "dap1_din_pb1";
  81. nvidia,function = "rsvd1";
  82. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  83. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  84. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  85. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  86. };
  87. dap1_dout_pb2 {
  88. nvidia,pins = "dap1_dout_pb2";
  89. nvidia,function = "rsvd1";
  90. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  91. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  92. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  93. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  94. };
  95. dap1_sclk_pb3 {
  96. nvidia,pins = "dap1_sclk_pb3";
  97. nvidia,function = "rsvd1";
  98. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  99. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  100. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  101. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  102. };
  103. spi2_mosi_pb4 {
  104. nvidia,pins = "spi2_mosi_pb4";
  105. nvidia,function = "rsvd2";
  106. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  107. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  108. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  109. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  110. };
  111. spi2_miso_pb5 {
  112. nvidia,pins = "spi2_miso_pb5";
  113. nvidia,function = "rsvd2";
  114. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  115. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  116. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  117. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  118. };
  119. spi2_sck_pb6 {
  120. nvidia,pins = "spi2_sck_pb6";
  121. nvidia,function = "rsvd2";
  122. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  123. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  124. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  125. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  126. };
  127. spi2_cs0_pb7 {
  128. nvidia,pins = "spi2_cs0_pb7";
  129. nvidia,function = "rsvd2";
  130. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  131. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  132. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  133. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  134. };
  135. spi1_mosi_pc0 {
  136. nvidia,pins = "spi1_mosi_pc0";
  137. nvidia,function = "rsvd1";
  138. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  139. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  140. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  141. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  142. };
  143. spi1_miso_pc1 {
  144. nvidia,pins = "spi1_miso_pc1";
  145. nvidia,function = "rsvd1";
  146. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  147. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  148. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  149. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  150. };
  151. spi1_sck_pc2 {
  152. nvidia,pins = "spi1_sck_pc2";
  153. nvidia,function = "rsvd1";
  154. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  155. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  156. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  157. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  158. };
  159. spi1_cs0_pc3 {
  160. nvidia,pins = "spi1_cs0_pc3";
  161. nvidia,function = "rsvd1";
  162. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  163. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  164. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  165. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  166. };
  167. spi1_cs1_pc4 {
  168. nvidia,pins = "spi1_cs1_pc4";
  169. nvidia,function = "rsvd1";
  170. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  171. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  172. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  173. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  174. };
  175. spi4_sck_pc5 {
  176. nvidia,pins = "spi4_sck_pc5";
  177. nvidia,function = "rsvd1";
  178. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  179. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  180. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  181. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  182. };
  183. spi4_cs0_pc6 {
  184. nvidia,pins = "spi4_cs0_pc6";
  185. nvidia,function = "rsvd1";
  186. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  187. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  188. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  189. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  190. };
  191. spi4_mosi_pc7 {
  192. nvidia,pins = "spi4_mosi_pc7";
  193. nvidia,function = "rsvd1";
  194. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  195. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  196. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  197. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  198. };
  199. spi4_miso_pd0 {
  200. nvidia,pins = "spi4_miso_pd0";
  201. nvidia,function = "rsvd1";
  202. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  203. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  204. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  205. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  206. };
  207. uart3_tx_pd1 {
  208. nvidia,pins = "uart3_tx_pd1";
  209. nvidia,function = "rsvd2";
  210. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  211. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  212. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  213. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  214. };
  215. uart3_rx_pd2 {
  216. nvidia,pins = "uart3_rx_pd2";
  217. nvidia,function = "rsvd2";
  218. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  219. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  220. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  221. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  222. };
  223. uart3_rts_pd3 {
  224. nvidia,pins = "uart3_rts_pd3";
  225. nvidia,function = "rsvd2";
  226. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  227. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  228. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  229. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  230. };
  231. uart3_cts_pd4 {
  232. nvidia,pins = "uart3_cts_pd4";
  233. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  234. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  235. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  236. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  237. };
  238. dmic1_clk_pe0 {
  239. nvidia,pins = "dmic1_clk_pe0";
  240. nvidia,function = "i2s3";
  241. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  242. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  243. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  244. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  245. };
  246. dmic1_dat_pe1 {
  247. nvidia,pins = "dmic1_dat_pe1";
  248. nvidia,function = "i2s3";
  249. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  250. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  251. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  252. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  253. };
  254. dmic2_clk_pe2 {
  255. nvidia,pins = "dmic2_clk_pe2";
  256. nvidia,function = "i2s3";
  257. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  258. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  259. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  260. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  261. };
  262. dmic2_dat_pe3 {
  263. nvidia,pins = "dmic2_dat_pe3";
  264. nvidia,function = "i2s3";
  265. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  266. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  267. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  268. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  269. };
  270. dmic3_clk_pe4 {
  271. nvidia,pins = "dmic3_clk_pe4";
  272. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  273. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  274. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  275. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  276. };
  277. dmic3_dat_pe5 {
  278. nvidia,pins = "dmic3_dat_pe5";
  279. nvidia,function = "rsvd2";
  280. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  281. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  282. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  283. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  284. };
  285. pe6 {
  286. nvidia,pins = "pe6";
  287. nvidia,function = "rsvd0";
  288. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  289. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  290. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  291. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  292. };
  293. pe7 {
  294. nvidia,pins = "pe7";
  295. nvidia,function = "pwm3";
  296. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  297. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  298. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  299. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  300. };
  301. gen3_i2c_scl_pf0 {
  302. nvidia,pins = "gen3_i2c_scl_pf0";
  303. nvidia,function = "i2c3";
  304. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  305. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  306. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  307. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  308. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  309. };
  310. gen3_i2c_sda_pf1 {
  311. nvidia,pins = "gen3_i2c_sda_pf1";
  312. nvidia,function = "i2c3";
  313. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  314. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  315. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  316. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  317. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  318. };
  319. uart2_tx_pg0 {
  320. nvidia,pins = "uart2_tx_pg0";
  321. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  322. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  323. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  324. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  325. };
  326. uart2_rx_pg1 {
  327. nvidia,pins = "uart2_rx_pg1";
  328. nvidia,function = "uartb";
  329. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  330. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  331. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  332. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  333. };
  334. uart2_rts_pg2 {
  335. nvidia,pins = "uart2_rts_pg2";
  336. nvidia,function = "rsvd2";
  337. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  338. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  339. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  340. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  341. };
  342. uart2_cts_pg3 {
  343. nvidia,pins = "uart2_cts_pg3";
  344. nvidia,function = "rsvd2";
  345. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  346. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  347. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  348. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  349. };
  350. wifi_en_ph0 {
  351. nvidia,pins = "wifi_en_ph0";
  352. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  353. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  354. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  355. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  356. };
  357. wifi_rst_ph1 {
  358. nvidia,pins = "wifi_rst_ph1";
  359. nvidia,function = "rsvd0";
  360. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  361. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  362. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  363. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  364. };
  365. wifi_wake_ap_ph2 {
  366. nvidia,pins = "wifi_wake_ap_ph2";
  367. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  368. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  369. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  370. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  371. };
  372. ap_wake_bt_ph3 {
  373. nvidia,pins = "ap_wake_bt_ph3";
  374. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  375. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  376. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  377. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  378. };
  379. bt_rst_ph4 {
  380. nvidia,pins = "bt_rst_ph4";
  381. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  382. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  383. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  384. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  385. };
  386. bt_wake_ap_ph5 {
  387. nvidia,pins = "bt_wake_ap_ph5";
  388. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  389. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  390. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  391. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  392. };
  393. ph6 {
  394. nvidia,pins = "ph6";
  395. nvidia,function = "rsvd0";
  396. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  397. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  398. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  399. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  400. };
  401. ap_wake_nfc_ph7 {
  402. nvidia,pins = "ap_wake_nfc_ph7";
  403. nvidia,function = "rsvd0";
  404. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  405. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  406. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  407. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  408. };
  409. nfc_en_pi0 {
  410. nvidia,pins = "nfc_en_pi0";
  411. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  412. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  413. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  414. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  415. };
  416. nfc_int_pi1 {
  417. nvidia,pins = "nfc_int_pi1";
  418. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  419. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  420. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  421. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  422. };
  423. gps_en_pi2 {
  424. nvidia,pins = "gps_en_pi2";
  425. nvidia,function = "rsvd0";
  426. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  427. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  428. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  429. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  430. };
  431. gps_rst_pi3 {
  432. nvidia,pins = "gps_rst_pi3";
  433. nvidia,function = "rsvd0";
  434. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  435. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  436. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  437. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  438. };
  439. uart4_tx_pi4 {
  440. nvidia,pins = "uart4_tx_pi4";
  441. nvidia,function = "uartd";
  442. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  443. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  444. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  445. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  446. };
  447. uart4_rx_pi5 {
  448. nvidia,pins = "uart4_rx_pi5";
  449. nvidia,function = "uartd";
  450. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  451. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  452. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  453. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  454. };
  455. uart4_rts_pi6 {
  456. nvidia,pins = "uart4_rts_pi6";
  457. nvidia,function = "uartd";
  458. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  459. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  460. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  461. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  462. };
  463. uart4_cts_pi7 {
  464. nvidia,pins = "uart4_cts_pi7";
  465. nvidia,function = "uartd";
  466. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  467. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  468. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  469. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  470. };
  471. gen1_i2c_sda_pj0 {
  472. nvidia,pins = "gen1_i2c_sda_pj0";
  473. nvidia,function = "i2c1";
  474. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  475. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  476. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  477. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  478. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  479. };
  480. gen1_i2c_scl_pj1 {
  481. nvidia,pins = "gen1_i2c_scl_pj1";
  482. nvidia,function = "i2c1";
  483. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  484. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  485. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  486. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  487. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  488. };
  489. gen2_i2c_scl_pj2 {
  490. nvidia,pins = "gen2_i2c_scl_pj2";
  491. nvidia,function = "i2c2";
  492. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  493. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  494. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  495. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  496. nvidia,io-hv = <TEGRA_PIN_ENABLE>;
  497. };
  498. gen2_i2c_sda_pj3 {
  499. nvidia,pins = "gen2_i2c_sda_pj3";
  500. nvidia,function = "i2c2";
  501. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  502. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  503. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  504. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  505. nvidia,io-hv = <TEGRA_PIN_ENABLE>;
  506. };
  507. dap4_fs_pj4 {
  508. nvidia,pins = "dap4_fs_pj4";
  509. nvidia,function = "rsvd1";
  510. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  511. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  512. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  513. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  514. };
  515. dap4_din_pj5 {
  516. nvidia,pins = "dap4_din_pj5";
  517. nvidia,function = "rsvd1";
  518. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  519. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  520. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  521. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  522. };
  523. dap4_dout_pj6 {
  524. nvidia,pins = "dap4_dout_pj6";
  525. nvidia,function = "rsvd1";
  526. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  527. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  528. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  529. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  530. };
  531. dap4_sclk_pj7 {
  532. nvidia,pins = "dap4_sclk_pj7";
  533. nvidia,function = "rsvd1";
  534. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  535. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  536. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  537. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  538. };
  539. pk0 {
  540. nvidia,pins = "pk0";
  541. nvidia,function = "rsvd2";
  542. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  543. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  544. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  545. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  546. };
  547. pk1 {
  548. nvidia,pins = "pk1";
  549. nvidia,function = "rsvd2";
  550. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  551. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  552. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  553. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  554. };
  555. pk2 {
  556. nvidia,pins = "pk2";
  557. nvidia,function = "rsvd2";
  558. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  559. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  560. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  561. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  562. };
  563. pk3 {
  564. nvidia,pins = "pk3";
  565. nvidia,function = "rsvd2";
  566. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  567. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  568. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  569. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  570. };
  571. pk4 {
  572. nvidia,pins = "pk4";
  573. nvidia,function = "rsvd1";
  574. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  575. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  576. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  577. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  578. };
  579. pk5 {
  580. nvidia,pins = "pk5";
  581. nvidia,function = "rsvd1";
  582. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  583. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  584. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  585. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  586. };
  587. pk6 {
  588. nvidia,pins = "pk6";
  589. nvidia,function = "rsvd1";
  590. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  591. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  592. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  593. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  594. };
  595. pk7 {
  596. nvidia,pins = "pk7";
  597. nvidia,function = "rsvd1";
  598. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  599. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  600. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  601. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  602. };
  603. pl0 {
  604. nvidia,pins = "pl0";
  605. nvidia,function = "rsvd0";
  606. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  607. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  608. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  609. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  610. };
  611. pl1 {
  612. nvidia,pins = "pl1";
  613. nvidia,function = "rsvd1";
  614. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  615. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  616. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  617. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  618. };
  619. sdmmc1_clk_pm0 {
  620. nvidia,pins = "sdmmc1_clk_pm0";
  621. nvidia,function = "sdmmc1";
  622. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  623. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  624. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  625. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  626. };
  627. sdmmc1_cmd_pm1 {
  628. nvidia,pins = "sdmmc1_cmd_pm1";
  629. nvidia,function = "sdmmc1";
  630. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  631. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  632. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  633. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  634. };
  635. sdmmc1_dat3_pm2 {
  636. nvidia,pins = "sdmmc1_dat3_pm2";
  637. nvidia,function = "sdmmc1";
  638. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  639. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  640. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  641. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  642. };
  643. sdmmc1_dat2_pm3 {
  644. nvidia,pins = "sdmmc1_dat2_pm3";
  645. nvidia,function = "sdmmc1";
  646. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  647. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  648. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  649. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  650. };
  651. sdmmc1_dat1_pm4 {
  652. nvidia,pins = "sdmmc1_dat1_pm4";
  653. nvidia,function = "sdmmc1";
  654. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  655. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  656. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  657. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  658. };
  659. sdmmc1_dat0_pm5 {
  660. nvidia,pins = "sdmmc1_dat0_pm5";
  661. nvidia,function = "sdmmc1";
  662. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  663. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  664. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  665. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  666. };
  667. sdmmc3_clk_pp0 {
  668. nvidia,pins = "sdmmc3_clk_pp0";
  669. nvidia,function = "sdmmc3";
  670. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  671. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  672. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  673. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  674. };
  675. sdmmc3_cmd_pp1 {
  676. nvidia,pins = "sdmmc3_cmd_pp1";
  677. nvidia,function = "sdmmc3";
  678. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  679. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  680. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  681. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  682. };
  683. sdmmc3_dat3_pp2 {
  684. nvidia,pins = "sdmmc3_dat3_pp2";
  685. nvidia,function = "sdmmc3";
  686. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  687. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  688. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  689. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  690. };
  691. sdmmc3_dat2_pp3 {
  692. nvidia,pins = "sdmmc3_dat2_pp3";
  693. nvidia,function = "sdmmc3";
  694. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  695. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  696. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  697. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  698. };
  699. sdmmc3_dat1_pp4 {
  700. nvidia,pins = "sdmmc3_dat1_pp4";
  701. nvidia,function = "sdmmc3";
  702. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  703. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  704. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  705. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  706. };
  707. sdmmc3_dat0_pp5 {
  708. nvidia,pins = "sdmmc3_dat0_pp5";
  709. nvidia,function = "sdmmc3";
  710. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  711. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  712. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  713. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  714. };
  715. cam1_mclk_ps0 {
  716. nvidia,pins = "cam1_mclk_ps0";
  717. nvidia,function = "rsvd1";
  718. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  719. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  720. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  721. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  722. };
  723. cam2_mclk_ps1 {
  724. nvidia,pins = "cam2_mclk_ps1";
  725. nvidia,function = "rsvd1";
  726. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  727. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  728. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  729. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  730. };
  731. cam_i2c_scl_ps2 {
  732. nvidia,pins = "cam_i2c_scl_ps2";
  733. nvidia,function = "i2cvi";
  734. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  735. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  736. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  737. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  738. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  739. };
  740. cam_i2c_sda_ps3 {
  741. nvidia,pins = "cam_i2c_sda_ps3";
  742. nvidia,function = "i2cvi";
  743. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  744. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  745. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  746. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  747. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  748. };
  749. cam_rst_ps4 {
  750. nvidia,pins = "cam_rst_ps4";
  751. nvidia,function = "rsvd1";
  752. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  753. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  754. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  755. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  756. };
  757. cam_af_en_ps5 {
  758. nvidia,pins = "cam_af_en_ps5";
  759. nvidia,function = "rsvd2";
  760. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  761. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  762. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  763. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  764. };
  765. cam_flash_en_ps6 {
  766. nvidia,pins = "cam_flash_en_ps6";
  767. nvidia,function = "rsvd2";
  768. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  769. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  770. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  771. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  772. };
  773. cam1_pwdn_ps7 {
  774. nvidia,pins = "cam1_pwdn_ps7";
  775. nvidia,function = "rsvd1";
  776. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  777. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  778. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  779. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  780. };
  781. cam2_pwdn_pt0 {
  782. nvidia,pins = "cam2_pwdn_pt0";
  783. nvidia,function = "rsvd1";
  784. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  785. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  786. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  787. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  788. };
  789. cam1_strobe_pt1 {
  790. nvidia,pins = "cam1_strobe_pt1";
  791. nvidia,function = "rsvd1";
  792. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  793. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  794. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  795. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  796. };
  797. uart1_tx_pu0 {
  798. nvidia,pins = "uart1_tx_pu0";
  799. nvidia,function = "uarta";
  800. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  801. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  802. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  803. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  804. };
  805. uart1_rx_pu1 {
  806. nvidia,pins = "uart1_rx_pu1";
  807. nvidia,function = "uarta";
  808. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  809. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  810. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  811. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  812. };
  813. uart1_rts_pu2 {
  814. nvidia,pins = "uart1_rts_pu2";
  815. nvidia,function = "uarta";
  816. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  817. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  818. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  819. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  820. };
  821. uart1_cts_pu3 {
  822. nvidia,pins = "uart1_cts_pu3";
  823. nvidia,function = "uarta";
  824. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  825. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  826. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  827. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  828. };
  829. lcd_bl_pwm_pv0 {
  830. nvidia,pins = "lcd_bl_pwm_pv0";
  831. nvidia,function = "pwm0";
  832. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  833. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  834. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  835. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  836. };
  837. lcd_bl_en_pv1 {
  838. nvidia,pins = "lcd_bl_en_pv1";
  839. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  840. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  841. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  842. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  843. };
  844. lcd_rst_pv2 {
  845. nvidia,pins = "lcd_rst_pv2";
  846. nvidia,function = "rsvd0";
  847. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  848. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  849. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  850. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  851. };
  852. lcd_gpio1_pv3 {
  853. nvidia,pins = "lcd_gpio1_pv3";
  854. nvidia,function = "rsvd1";
  855. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  856. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  857. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  858. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  859. };
  860. lcd_gpio2_pv4 {
  861. nvidia,pins = "lcd_gpio2_pv4";
  862. nvidia,function = "pwm1";
  863. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  864. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  865. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  866. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  867. };
  868. ap_ready_pv5 {
  869. nvidia,pins = "ap_ready_pv5";
  870. nvidia,function = "rsvd0";
  871. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  872. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  873. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  874. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  875. };
  876. touch_rst_pv6 {
  877. nvidia,pins = "touch_rst_pv6";
  878. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  879. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  880. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  881. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  882. };
  883. touch_clk_pv7 {
  884. nvidia,pins = "touch_clk_pv7";
  885. nvidia,function = "rsvd1";
  886. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  887. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  888. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  889. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  890. };
  891. modem_wake_ap_px0 {
  892. nvidia,pins = "modem_wake_ap_px0";
  893. nvidia,function = "rsvd0";
  894. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  895. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  896. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  897. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  898. };
  899. touch_int_px1 {
  900. nvidia,pins = "touch_int_px1";
  901. nvidia,function = "rsvd0";
  902. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  903. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  904. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  905. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  906. };
  907. motion_int_px2 {
  908. nvidia,pins = "motion_int_px2";
  909. nvidia,function = "rsvd0";
  910. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  911. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  912. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  913. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  914. };
  915. als_prox_int_px3 {
  916. nvidia,pins = "als_prox_int_px3";
  917. nvidia,function = "rsvd0";
  918. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  919. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  920. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  921. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  922. };
  923. temp_alert_px4 {
  924. nvidia,pins = "temp_alert_px4";
  925. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  926. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  927. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  928. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  929. };
  930. button_power_on_px5 {
  931. nvidia,pins = "button_power_on_px5";
  932. nvidia,function = "rsvd0";
  933. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  934. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  935. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  936. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  937. };
  938. button_vol_up_px6 {
  939. nvidia,pins = "button_vol_up_px6";
  940. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  941. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  942. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  943. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  944. };
  945. button_vol_down_px7 {
  946. nvidia,pins = "button_vol_down_px7";
  947. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  948. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  949. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  950. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  951. };
  952. button_slide_sw_py0 {
  953. nvidia,pins = "button_slide_sw_py0";
  954. nvidia,function = "rsvd0";
  955. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  956. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  957. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  958. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  959. };
  960. button_home_py1 {
  961. nvidia,pins = "button_home_py1";
  962. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  963. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  964. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  965. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  966. };
  967. lcd_te_py2 {
  968. nvidia,pins = "lcd_te_py2";
  969. nvidia,function = "rsvd1";
  970. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  971. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  972. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  973. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  974. };
  975. pwr_i2c_scl_py3 {
  976. nvidia,pins = "pwr_i2c_scl_py3";
  977. nvidia,function = "i2cpmu";
  978. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  979. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  980. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  981. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  982. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  983. };
  984. pwr_i2c_sda_py4 {
  985. nvidia,pins = "pwr_i2c_sda_py4";
  986. nvidia,function = "i2cpmu";
  987. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  988. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  989. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  990. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  991. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  992. };
  993. clk_32k_out_py5 {
  994. nvidia,pins = "clk_32k_out_py5";
  995. nvidia,function = "soc";
  996. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  997. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  998. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  999. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1000. };
  1001. pz0 {
  1002. nvidia,pins = "pz0";
  1003. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  1004. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1005. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1006. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1007. };
  1008. pz1 {
  1009. nvidia,pins = "pz1";
  1010. nvidia,function = "sdmmc1";
  1011. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  1012. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1013. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1014. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1015. };
  1016. pz2 {
  1017. nvidia,pins = "pz2";
  1018. nvidia,function = "rsvd2";
  1019. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1020. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1021. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1022. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1023. };
  1024. pz3 {
  1025. nvidia,pins = "pz3";
  1026. nvidia,function = "rsvd1";
  1027. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1028. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1029. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1030. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1031. };
  1032. pz4 {
  1033. nvidia,pins = "pz4";
  1034. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1035. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1036. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1037. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1038. };
  1039. pz5 {
  1040. nvidia,pins = "pz5";
  1041. nvidia,function = "soc";
  1042. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  1043. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1044. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1045. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1046. };
  1047. dap2_fs_paa0 {
  1048. nvidia,pins = "dap2_fs_paa0";
  1049. nvidia,function = "i2s2";
  1050. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1051. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1052. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1053. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1054. };
  1055. dap2_sclk_paa1 {
  1056. nvidia,pins = "dap2_sclk_paa1";
  1057. nvidia,function = "i2s2";
  1058. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1059. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1060. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1061. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1062. };
  1063. dap2_din_paa2 {
  1064. nvidia,pins = "dap2_din_paa2";
  1065. nvidia,function = "i2s2";
  1066. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1067. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1068. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1069. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1070. };
  1071. dap2_dout_paa3 {
  1072. nvidia,pins = "dap2_dout_paa3";
  1073. nvidia,function = "i2s2";
  1074. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1075. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1076. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1077. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1078. };
  1079. aud_mclk_pbb0 {
  1080. nvidia,pins = "aud_mclk_pbb0";
  1081. nvidia,function = "aud";
  1082. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1083. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1084. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1085. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1086. };
  1087. dvfs_pwm_pbb1 {
  1088. nvidia,pins = "dvfs_pwm_pbb1";
  1089. nvidia,function = "cldvfs";
  1090. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1091. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1092. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1093. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1094. };
  1095. dvfs_clk_pbb2 {
  1096. nvidia,pins = "dvfs_clk_pbb2";
  1097. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1098. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1099. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1100. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1101. };
  1102. gpio_x1_aud_pbb3 {
  1103. nvidia,pins = "gpio_x1_aud_pbb3";
  1104. nvidia,function = "rsvd0";
  1105. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1106. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1107. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1108. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1109. };
  1110. gpio_x3_aud_pbb4 {
  1111. nvidia,pins = "gpio_x3_aud_pbb4";
  1112. nvidia,function = "rsvd0";
  1113. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1114. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1115. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1116. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1117. };
  1118. hdmi_cec_pcc0 {
  1119. nvidia,pins = "hdmi_cec_pcc0";
  1120. nvidia,function = "cec";
  1121. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1122. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1123. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1124. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1125. nvidia,io-hv = <TEGRA_PIN_ENABLE>;
  1126. };
  1127. hdmi_int_dp_hpd_pcc1 {
  1128. nvidia,pins = "hdmi_int_dp_hpd_pcc1";
  1129. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1130. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1131. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1132. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1133. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  1134. };
  1135. spdif_out_pcc2 {
  1136. nvidia,pins = "spdif_out_pcc2";
  1137. nvidia,function = "rsvd1";
  1138. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1139. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1140. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1141. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1142. };
  1143. spdif_in_pcc3 {
  1144. nvidia,pins = "spdif_in_pcc3";
  1145. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1146. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1147. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1148. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1149. };
  1150. usb_vbus_en0_pcc4 {
  1151. nvidia,pins = "usb_vbus_en0_pcc4";
  1152. nvidia,function = "usb";
  1153. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1154. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1155. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1156. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1157. nvidia,io-hv = <TEGRA_PIN_ENABLE>;
  1158. };
  1159. usb_vbus_en1_pcc5 {
  1160. nvidia,pins = "usb_vbus_en1_pcc5";
  1161. nvidia,function = "usb";
  1162. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1163. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1164. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1165. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1166. nvidia,io-hv = <TEGRA_PIN_ENABLE>;
  1167. };
  1168. dp_hpd0_pcc6 {
  1169. nvidia,pins = "dp_hpd0_pcc6";
  1170. nvidia,function = "rsvd1";
  1171. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1172. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1173. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1174. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1175. };
  1176. pcc7 {
  1177. nvidia,pins = "pcc7";
  1178. nvidia,function = "rsvd0";
  1179. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1180. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1181. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1182. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1183. nvidia,io-hv = <TEGRA_PIN_DISABLE>;
  1184. };
  1185. spi2_cs1_pdd0 {
  1186. nvidia,pins = "spi2_cs1_pdd0";
  1187. nvidia,function = "rsvd1";
  1188. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1189. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1190. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1191. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1192. };
  1193. qspi_sck_pee0 {
  1194. nvidia,pins = "qspi_sck_pee0";
  1195. nvidia,function = "rsvd1";
  1196. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1197. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1198. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1199. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1200. };
  1201. qspi_cs_n_pee1 {
  1202. nvidia,pins = "qspi_cs_n_pee1";
  1203. nvidia,function = "rsvd1";
  1204. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1205. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1206. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1207. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1208. };
  1209. qspi_io0_pee2 {
  1210. nvidia,pins = "qspi_io0_pee2";
  1211. nvidia,function = "rsvd1";
  1212. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1213. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1214. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1215. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1216. };
  1217. qspi_io1_pee3 {
  1218. nvidia,pins = "qspi_io1_pee3";
  1219. nvidia,function = "rsvd1";
  1220. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1221. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1222. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1223. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1224. };
  1225. qspi_io2_pee4 {
  1226. nvidia,pins = "qspi_io2_pee4";
  1227. nvidia,function = "rsvd1";
  1228. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1229. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1230. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1231. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1232. };
  1233. qspi_io3_pee5 {
  1234. nvidia,pins = "qspi_io3_pee5";
  1235. nvidia,function = "rsvd1";
  1236. nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  1237. nvidia,tristate = <TEGRA_PIN_ENABLE>;
  1238. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1239. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1240. };
  1241. core_pwr_req {
  1242. nvidia,pins = "core_pwr_req";
  1243. nvidia,function = "core";
  1244. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1245. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1246. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1247. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1248. };
  1249. cpu_pwr_req {
  1250. nvidia,pins = "cpu_pwr_req";
  1251. nvidia,function = "cpu";
  1252. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1253. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1254. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1255. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1256. };
  1257. pwr_int_n {
  1258. nvidia,pins = "pwr_int_n";
  1259. nvidia,function = "pmi";
  1260. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  1261. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1262. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1263. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1264. };
  1265. clk_32k_in {
  1266. nvidia,pins = "clk_32k_in";
  1267. nvidia,function = "clk";
  1268. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1269. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1270. nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  1271. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1272. };
  1273. jtag_rtck {
  1274. nvidia,pins = "jtag_rtck";
  1275. nvidia,function = "jtag";
  1276. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1277. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1278. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1279. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1280. };
  1281. clk_req {
  1282. nvidia,pins = "clk_req";
  1283. nvidia,function = "sys";
  1284. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1285. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1286. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1287. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1288. };
  1289. shutdown {
  1290. nvidia,pins = "shutdown";
  1291. nvidia,function = "shutdown";
  1292. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  1293. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  1294. nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  1295. nvidia,open-drain = <TEGRA_PIN_DISABLE>;
  1296. };
  1297. };
  1298. };
  1299. };