mt8173-evb.dts 13 KB

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  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Eddie Huang <eddie.huang@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. /dts-v1/;
  15. #include <dt-bindings/gpio/gpio.h>
  16. #include "mt8173.dtsi"
  17. / {
  18. model = "MediaTek MT8173 evaluation board";
  19. compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
  20. aliases {
  21. serial0 = &uart0;
  22. serial1 = &uart1;
  23. serial2 = &uart2;
  24. serial3 = &uart3;
  25. };
  26. memory@40000000 {
  27. device_type = "memory";
  28. reg = <0 0x40000000 0 0x80000000>;
  29. };
  30. chosen { };
  31. connector {
  32. compatible = "hdmi-connector";
  33. label = "hdmi";
  34. type = "d";
  35. port {
  36. hdmi_connector_in: endpoint {
  37. remote-endpoint = <&hdmi0_out>;
  38. };
  39. };
  40. };
  41. extcon_usb: extcon_iddig {
  42. compatible = "linux,extcon-usb-gpio";
  43. id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
  44. };
  45. usb_p1_vbus: regulator@0 {
  46. compatible = "regulator-fixed";
  47. regulator-name = "usb_vbus";
  48. regulator-min-microvolt = <5000000>;
  49. regulator-max-microvolt = <5000000>;
  50. gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
  51. enable-active-high;
  52. };
  53. usb_p0_vbus: regulator@1 {
  54. compatible = "regulator-fixed";
  55. regulator-name = "vbus";
  56. regulator-min-microvolt = <5000000>;
  57. regulator-max-microvolt = <5000000>;
  58. gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
  59. enable-active-high;
  60. };
  61. };
  62. &cec {
  63. status = "okay";
  64. };
  65. &cpu0 {
  66. proc-supply = <&mt6397_vpca15_reg>;
  67. };
  68. &cpu1 {
  69. proc-supply = <&mt6397_vpca15_reg>;
  70. };
  71. &cpu2 {
  72. proc-supply = <&da9211_vcpu_reg>;
  73. sram-supply = <&mt6397_vsramca7_reg>;
  74. };
  75. &cpu3 {
  76. proc-supply = <&da9211_vcpu_reg>;
  77. sram-supply = <&mt6397_vsramca7_reg>;
  78. };
  79. &dpi0 {
  80. status = "okay";
  81. };
  82. &hdmi_phy {
  83. status = "okay";
  84. };
  85. &hdmi0 {
  86. status = "okay";
  87. ports {
  88. port@1 {
  89. reg = <1>;
  90. hdmi0_out: endpoint {
  91. remote-endpoint = <&hdmi_connector_in>;
  92. };
  93. };
  94. };
  95. };
  96. &i2c1 {
  97. status = "okay";
  98. buck: da9211@68 {
  99. compatible = "dlg,da9211";
  100. reg = <0x68>;
  101. regulators {
  102. da9211_vcpu_reg: BUCKA {
  103. regulator-name = "VBUCKA";
  104. regulator-min-microvolt = < 700000>;
  105. regulator-max-microvolt = <1310000>;
  106. regulator-min-microamp = <2000000>;
  107. regulator-max-microamp = <4400000>;
  108. regulator-ramp-delay = <10000>;
  109. regulator-always-on;
  110. };
  111. da9211_vgpu_reg: BUCKB {
  112. regulator-name = "VBUCKB";
  113. regulator-min-microvolt = < 700000>;
  114. regulator-max-microvolt = <1310000>;
  115. regulator-min-microamp = <2000000>;
  116. regulator-max-microamp = <3000000>;
  117. regulator-ramp-delay = <10000>;
  118. };
  119. };
  120. };
  121. };
  122. &mmc0 {
  123. status = "okay";
  124. pinctrl-names = "default", "state_uhs";
  125. pinctrl-0 = <&mmc0_pins_default>;
  126. pinctrl-1 = <&mmc0_pins_uhs>;
  127. bus-width = <8>;
  128. max-frequency = <50000000>;
  129. cap-mmc-highspeed;
  130. mediatek,hs200-cmd-int-delay=<26>;
  131. mediatek,hs400-cmd-int-delay=<14>;
  132. mediatek,hs400-cmd-resp-sel-rising;
  133. vmmc-supply = <&mt6397_vemc_3v3_reg>;
  134. vqmmc-supply = <&mt6397_vio18_reg>;
  135. non-removable;
  136. };
  137. &mmc1 {
  138. status = "okay";
  139. pinctrl-names = "default", "state_uhs";
  140. pinctrl-0 = <&mmc1_pins_default>;
  141. pinctrl-1 = <&mmc1_pins_uhs>;
  142. bus-width = <4>;
  143. max-frequency = <50000000>;
  144. cap-sd-highspeed;
  145. sd-uhs-sdr25;
  146. cd-gpios = <&pio 132 0>;
  147. vmmc-supply = <&mt6397_vmch_reg>;
  148. vqmmc-supply = <&mt6397_vmc_reg>;
  149. };
  150. &pio {
  151. disp_pwm0_pins: disp_pwm0_pins {
  152. pins1 {
  153. pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
  154. output-low;
  155. };
  156. };
  157. mmc0_pins_default: mmc0default {
  158. pins_cmd_dat {
  159. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  160. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  161. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  162. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  163. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  164. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  165. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  166. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  167. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  168. input-enable;
  169. bias-pull-up;
  170. };
  171. pins_clk {
  172. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  173. bias-pull-down;
  174. };
  175. pins_rst {
  176. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  177. bias-pull-up;
  178. };
  179. };
  180. mmc1_pins_default: mmc1default {
  181. pins_cmd_dat {
  182. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  183. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  184. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  185. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  186. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  187. input-enable;
  188. drive-strength = <MTK_DRIVE_4mA>;
  189. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  190. };
  191. pins_clk {
  192. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  193. bias-pull-down;
  194. drive-strength = <MTK_DRIVE_4mA>;
  195. };
  196. pins_insert {
  197. pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
  198. bias-pull-up;
  199. };
  200. };
  201. mmc0_pins_uhs: mmc0 {
  202. pins_cmd_dat {
  203. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  204. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  205. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  206. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  207. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  208. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  209. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  210. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  211. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  212. input-enable;
  213. drive-strength = <MTK_DRIVE_2mA>;
  214. bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  215. };
  216. pins_clk {
  217. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  218. drive-strength = <MTK_DRIVE_2mA>;
  219. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  220. };
  221. pins_rst {
  222. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  223. bias-pull-up;
  224. };
  225. };
  226. mmc1_pins_uhs: mmc1 {
  227. pins_cmd_dat {
  228. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  229. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  230. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  231. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  232. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  233. input-enable;
  234. drive-strength = <MTK_DRIVE_4mA>;
  235. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  236. };
  237. pins_clk {
  238. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  239. drive-strength = <MTK_DRIVE_4mA>;
  240. bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  241. };
  242. };
  243. usb_id_pins_float: usb_iddig_pull_up {
  244. pins_iddig {
  245. pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
  246. bias-pull-up;
  247. };
  248. };
  249. usb_id_pins_ground: usb_iddig_pull_down {
  250. pins_iddig {
  251. pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
  252. bias-pull-down;
  253. };
  254. };
  255. };
  256. &pwm0 {
  257. pinctrl-names = "default";
  258. pinctrl-0 = <&disp_pwm0_pins>;
  259. status = "okay";
  260. };
  261. &pwrap {
  262. /* Only MT8173 E1 needs USB power domain */
  263. power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
  264. pmic: mt6397 {
  265. compatible = "mediatek,mt6397";
  266. interrupt-parent = <&pio>;
  267. interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
  268. interrupt-controller;
  269. #interrupt-cells = <2>;
  270. mt6397regulator: mt6397regulator {
  271. compatible = "mediatek,mt6397-regulator";
  272. mt6397_vpca15_reg: buck_vpca15 {
  273. regulator-compatible = "buck_vpca15";
  274. regulator-name = "vpca15";
  275. regulator-min-microvolt = < 700000>;
  276. regulator-max-microvolt = <1350000>;
  277. regulator-ramp-delay = <12500>;
  278. regulator-always-on;
  279. };
  280. mt6397_vpca7_reg: buck_vpca7 {
  281. regulator-compatible = "buck_vpca7";
  282. regulator-name = "vpca7";
  283. regulator-min-microvolt = < 700000>;
  284. regulator-max-microvolt = <1350000>;
  285. regulator-ramp-delay = <12500>;
  286. regulator-enable-ramp-delay = <115>;
  287. };
  288. mt6397_vsramca15_reg: buck_vsramca15 {
  289. regulator-compatible = "buck_vsramca15";
  290. regulator-name = "vsramca15";
  291. regulator-min-microvolt = < 700000>;
  292. regulator-max-microvolt = <1350000>;
  293. regulator-ramp-delay = <12500>;
  294. regulator-always-on;
  295. };
  296. mt6397_vsramca7_reg: buck_vsramca7 {
  297. regulator-compatible = "buck_vsramca7";
  298. regulator-name = "vsramca7";
  299. regulator-min-microvolt = < 700000>;
  300. regulator-max-microvolt = <1350000>;
  301. regulator-ramp-delay = <12500>;
  302. regulator-always-on;
  303. };
  304. mt6397_vcore_reg: buck_vcore {
  305. regulator-compatible = "buck_vcore";
  306. regulator-name = "vcore";
  307. regulator-min-microvolt = < 700000>;
  308. regulator-max-microvolt = <1350000>;
  309. regulator-ramp-delay = <12500>;
  310. regulator-always-on;
  311. };
  312. mt6397_vgpu_reg: buck_vgpu {
  313. regulator-compatible = "buck_vgpu";
  314. regulator-name = "vgpu";
  315. regulator-min-microvolt = < 700000>;
  316. regulator-max-microvolt = <1350000>;
  317. regulator-ramp-delay = <12500>;
  318. regulator-enable-ramp-delay = <115>;
  319. };
  320. mt6397_vdrm_reg: buck_vdrm {
  321. regulator-compatible = "buck_vdrm";
  322. regulator-name = "vdrm";
  323. regulator-min-microvolt = <1200000>;
  324. regulator-max-microvolt = <1400000>;
  325. regulator-ramp-delay = <12500>;
  326. regulator-always-on;
  327. };
  328. mt6397_vio18_reg: buck_vio18 {
  329. regulator-compatible = "buck_vio18";
  330. regulator-name = "vio18";
  331. regulator-min-microvolt = <1620000>;
  332. regulator-max-microvolt = <1980000>;
  333. regulator-ramp-delay = <12500>;
  334. regulator-always-on;
  335. };
  336. mt6397_vtcxo_reg: ldo_vtcxo {
  337. regulator-compatible = "ldo_vtcxo";
  338. regulator-name = "vtcxo";
  339. regulator-always-on;
  340. };
  341. mt6397_va28_reg: ldo_va28 {
  342. regulator-compatible = "ldo_va28";
  343. regulator-name = "va28";
  344. regulator-always-on;
  345. };
  346. mt6397_vcama_reg: ldo_vcama {
  347. regulator-compatible = "ldo_vcama";
  348. regulator-name = "vcama";
  349. regulator-min-microvolt = <1500000>;
  350. regulator-max-microvolt = <2800000>;
  351. regulator-enable-ramp-delay = <218>;
  352. };
  353. mt6397_vio28_reg: ldo_vio28 {
  354. regulator-compatible = "ldo_vio28";
  355. regulator-name = "vio28";
  356. regulator-always-on;
  357. };
  358. mt6397_vusb_reg: ldo_vusb {
  359. regulator-compatible = "ldo_vusb";
  360. regulator-name = "vusb";
  361. };
  362. mt6397_vmc_reg: ldo_vmc {
  363. regulator-compatible = "ldo_vmc";
  364. regulator-name = "vmc";
  365. regulator-min-microvolt = <1800000>;
  366. regulator-max-microvolt = <3300000>;
  367. regulator-enable-ramp-delay = <218>;
  368. };
  369. mt6397_vmch_reg: ldo_vmch {
  370. regulator-compatible = "ldo_vmch";
  371. regulator-name = "vmch";
  372. regulator-min-microvolt = <3000000>;
  373. regulator-max-microvolt = <3300000>;
  374. regulator-enable-ramp-delay = <218>;
  375. };
  376. mt6397_vemc_3v3_reg: ldo_vemc3v3 {
  377. regulator-compatible = "ldo_vemc3v3";
  378. regulator-name = "vemc_3v3";
  379. regulator-min-microvolt = <3000000>;
  380. regulator-max-microvolt = <3300000>;
  381. regulator-enable-ramp-delay = <218>;
  382. };
  383. mt6397_vgp1_reg: ldo_vgp1 {
  384. regulator-compatible = "ldo_vgp1";
  385. regulator-name = "vcamd";
  386. regulator-min-microvolt = <1220000>;
  387. regulator-max-microvolt = <3300000>;
  388. regulator-enable-ramp-delay = <240>;
  389. };
  390. mt6397_vgp2_reg: ldo_vgp2 {
  391. regulator-compatible = "ldo_vgp2";
  392. regulator-name = "vcamio";
  393. regulator-min-microvolt = <1000000>;
  394. regulator-max-microvolt = <3300000>;
  395. regulator-enable-ramp-delay = <218>;
  396. };
  397. mt6397_vgp3_reg: ldo_vgp3 {
  398. regulator-compatible = "ldo_vgp3";
  399. regulator-name = "vcamaf";
  400. regulator-min-microvolt = <1200000>;
  401. regulator-max-microvolt = <3300000>;
  402. regulator-enable-ramp-delay = <218>;
  403. };
  404. mt6397_vgp4_reg: ldo_vgp4 {
  405. regulator-compatible = "ldo_vgp4";
  406. regulator-name = "vgp4";
  407. regulator-min-microvolt = <1200000>;
  408. regulator-max-microvolt = <3300000>;
  409. regulator-enable-ramp-delay = <218>;
  410. };
  411. mt6397_vgp5_reg: ldo_vgp5 {
  412. regulator-compatible = "ldo_vgp5";
  413. regulator-name = "vgp5";
  414. regulator-min-microvolt = <1200000>;
  415. regulator-max-microvolt = <3000000>;
  416. regulator-enable-ramp-delay = <218>;
  417. };
  418. mt6397_vgp6_reg: ldo_vgp6 {
  419. regulator-compatible = "ldo_vgp6";
  420. regulator-name = "vgp6";
  421. regulator-min-microvolt = <1200000>;
  422. regulator-max-microvolt = <3300000>;
  423. regulator-enable-ramp-delay = <218>;
  424. };
  425. mt6397_vibr_reg: ldo_vibr {
  426. regulator-compatible = "ldo_vibr";
  427. regulator-name = "vibr";
  428. regulator-min-microvolt = <1300000>;
  429. regulator-max-microvolt = <3300000>;
  430. regulator-enable-ramp-delay = <218>;
  431. };
  432. };
  433. };
  434. };
  435. &pio {
  436. spi_pins_a: spi0 {
  437. pins_spi {
  438. pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
  439. <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
  440. <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
  441. <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
  442. };
  443. };
  444. };
  445. &spi {
  446. pinctrl-names = "default";
  447. pinctrl-0 = <&spi_pins_a>;
  448. mediatek,pad-select = <0>;
  449. status = "okay";
  450. };
  451. &ssusb {
  452. vusb33-supply = <&mt6397_vusb_reg>;
  453. vbus-supply = <&usb_p0_vbus>;
  454. extcon = <&extcon_usb>;
  455. dr_mode = "otg";
  456. wakeup-source;
  457. pinctrl-names = "default", "id_float", "id_ground";
  458. pinctrl-0 = <&usb_id_pins_float>;
  459. pinctrl-1 = <&usb_id_pins_float>;
  460. pinctrl-2 = <&usb_id_pins_ground>;
  461. status = "okay";
  462. };
  463. &uart0 {
  464. status = "okay";
  465. };
  466. &usb_host {
  467. vusb33-supply = <&mt6397_vusb_reg>;
  468. vbus-supply = <&usb_p1_vbus>;
  469. status = "okay";
  470. };