armada-ap810-ap0-octa-core.dtsi 1.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2017 Marvell Technology Group Ltd.
  4. *
  5. * Device Tree file for Marvell Armada AP810 OCTA cores.
  6. */
  7. #include "armada-ap810-ap0.dtsi"
  8. / {
  9. cpus {
  10. #address-cells = <1>;
  11. #size-cells = <0>;
  12. compatible = "marvell,armada-ap810-octa";
  13. cpu@0 {
  14. device_type = "cpu";
  15. compatible = "arm,cortex-a72", "arm,armv8";
  16. reg = <0x000>;
  17. enable-method = "psci";
  18. };
  19. cpu@1 {
  20. device_type = "cpu";
  21. compatible = "arm,cortex-a72", "arm,armv8";
  22. reg = <0x001>;
  23. enable-method = "psci";
  24. };
  25. cpu@100 {
  26. device_type = "cpu";
  27. compatible = "arm,cortex-a72", "arm,armv8";
  28. reg = <0x100>;
  29. enable-method = "psci";
  30. };
  31. cpu@101 {
  32. device_type = "cpu";
  33. compatible = "arm,cortex-a72", "arm,armv8";
  34. reg = <0x101>;
  35. enable-method = "psci";
  36. };
  37. cpu@200 {
  38. device_type = "cpu";
  39. compatible = "arm,cortex-a72", "arm,armv8";
  40. reg = <0x200>;
  41. enable-method = "psci";
  42. };
  43. cpu@201 {
  44. device_type = "cpu";
  45. compatible = "arm,cortex-a72", "arm,armv8";
  46. reg = <0x201>;
  47. enable-method = "psci";
  48. };
  49. cpu@300 {
  50. device_type = "cpu";
  51. compatible = "arm,cortex-a72", "arm,armv8";
  52. reg = <0x300>;
  53. enable-method = "psci";
  54. };
  55. cpu@301 {
  56. device_type = "cpu";
  57. compatible = "arm,cortex-a72", "arm,armv8";
  58. reg = <0x301>;
  59. enable-method = "psci";
  60. };
  61. };
  62. };